Merge tag 'v4.1-rockchip-socfixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes

The previous two suspend related fixes both fix the same issue
so only one of them (the newer one) is actually needed.

* tag 'v4.1-rockchip-socfixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"

2 files changed, 0 insertions, 30 deletions

diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
index 22812fe06460..b0dcbe28f78c 100644
--- a/arch/arm/mach-rockchip/pm.c
+++ b/arch/arm/mach-rockchip/pm.c
@@ -44,11 +44,9 @@ static void __iomem *rk3288_bootram_base;
 static phys_addr_t rk3288_bootram_phy;
 
 static struct regmap *pmu_regmap;
-static struct regmap *grf_regmap;
 static struct regmap *sgrf_regmap;
 
 static u32 rk3288_pmu_pwr_mode_con;
-static u32 rk3288_grf_soc_con0;
 static u32 rk3288_sgrf_soc_con0;
 
 static inline u32 rk3288_l2_config(void)
@@ -72,26 +70,12 @@ static void rk3288_slp_mode_set(int level)
 {
         u32 mode_set, mode_set1;
 
-        regmap_read(grf_regmap, RK3288_GRF_SOC_CON0, &rk3288_grf_soc_con0);
-
         regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
 
         regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
                     &rk3288_pmu_pwr_mode_con);
 
         /*
-         * We need set this bit GRF_FORCE_JTAG here, for the debug module,
-         * otherwise, it may become inaccessible after resume.
-         * This creates a potential security issue, as the sdmmc pins may
-         * accept jtag data for a short time during resume if no card is
-         * inserted.
-         * But this is of course also true for the regular boot, before we
-         * turn of the jtag/sdmmc autodetect.
-         */
-        regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, GRF_FORCE_JTAG |
-                     GRF_FORCE_JTAG_WRITE);
-
-        /*
          * SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR
          * PCLK_WDT_GATE - disable WDT during suspend.
          */
@@ -151,9 +135,6 @@ static void rk3288_slp_mode_set_resume(void)
         regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
                      rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE
                      | SGRF_FAST_BOOT_EN_WRITE);
-
-        regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, rk3288_grf_soc_con0 |
-                     GRF_FORCE_JTAG_WRITE);
 }
 
 static int rockchip_lpmode_enter(unsigned long arg)
@@ -212,13 +193,6 @@ static int rk3288_suspend_init(struct device_node *np)
                 return PTR_ERR(pmu_regmap);
         }
 
-        grf_regmap = syscon_regmap_lookup_by_compatible(
-                                "rockchip,rk3288-grf");
-        if (IS_ERR(grf_regmap)) {
-                pr_err("%s: could not find grf regmap\n", __func__);
-                return PTR_ERR(pmu_regmap);
-        }
-
         sram_np = of_find_compatible_node(NULL, NULL,
                                           "rockchip,rk3288-pmu-sram");
         if (!sram_np) {
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index f8a747bc1437..3e8d39c0c3d5 100644
--- a/arch/arm/mach-rockchip/pm.h
+++ b/arch/arm/mach-rockchip/pm.h
@@ -48,10 +48,6 @@ static inline void rockchip_suspend_init(void)
 #define RK3288_PMU_WAKEUP_RST_CLR_CNT   0x44
 #define RK3288_PMU_PWRMODE_CON1         0x90
 
-#define RK3288_GRF_SOC_CON0             0x244
-#define GRF_FORCE_JTAG                  BIT(12)
-#define GRF_FORCE_JTAG_WRITE            BIT(28)
-
 #define RK3288_SGRF_SOC_CON0            (0x0000)
 #define RK3288_SGRF_FAST_BOOT_ADDR      (0x0120)
 #define SGRF_PCLK_WDT_GATE              BIT(6)