diff options
author | Mike Frysinger <vapier@gentoo.org> | 2011-03-30 01:35:41 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2011-05-25 08:13:41 -0400 |
commit | 6b108049d67090988fbb0b9d9905ffca114b6ff1 (patch) | |
tree | ff8876b463118fb369ce7481ccc6e5a2682469b2 /arch | |
parent | e9e334c35ec3cd262d13640b50b67a29870a7105 (diff) |
Blackfin: ints-priority: unify duplicate vec to irq lookup logic
Seems the ipipe code just copied & pasted the existing irq lookup logic,
so pull the logic out of do_irq() and into a local helper, and convert
the two users over to that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 112 |
1 files changed, 44 insertions, 68 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 59e0efc98e23..01926e5948ba 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -1304,50 +1304,54 @@ int __init init_arch_irq(void) | |||
1304 | #ifdef CONFIG_DO_IRQ_L1 | 1304 | #ifdef CONFIG_DO_IRQ_L1 |
1305 | __attribute__((l1_text)) | 1305 | __attribute__((l1_text)) |
1306 | #endif | 1306 | #endif |
1307 | void do_irq(int vec, struct pt_regs *fp) | 1307 | static int vec_to_irq(int vec) |
1308 | { | 1308 | { |
1309 | if (vec == EVT_IVTMR_P) { | 1309 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; |
1310 | vec = IRQ_CORETMR; | 1310 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; |
1311 | } else { | 1311 | unsigned long sic_status[3]; |
1312 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | 1312 | |
1313 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | 1313 | if (likely(vec == EVT_IVTMR_P)) |
1314 | #if defined(SIC_ISR0) | 1314 | return IRQ_CORETMR; |
1315 | unsigned long sic_status[3]; | ||
1316 | 1315 | ||
1317 | if (smp_processor_id()) { | 1316 | #ifdef SIC_ISR |
1317 | sic_status[0] = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); | ||
1318 | #else | ||
1319 | if (smp_processor_id()) { | ||
1318 | # ifdef SICB_ISR0 | 1320 | # ifdef SICB_ISR0 |
1319 | /* This will be optimized out in UP mode. */ | 1321 | /* This will be optimized out in UP mode. */ |
1320 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); | 1322 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); |
1321 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); | 1323 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); |
1322 | # endif | 1324 | # endif |
1323 | } else { | 1325 | } else { |
1324 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1326 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
1325 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | 1327 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); |
1326 | } | 1328 | } |
1327 | # ifdef SIC_ISR2 | 1329 | #endif |
1328 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | 1330 | #ifdef SIC_ISR2 |
1329 | # endif | 1331 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); |
1330 | for (;; ivg++) { | 1332 | #endif |
1331 | if (ivg >= ivg_stop) | ||
1332 | return; | ||
1333 | if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) | ||
1334 | break; | ||
1335 | } | ||
1336 | #else | ||
1337 | unsigned long sic_status; | ||
1338 | |||
1339 | sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); | ||
1340 | 1333 | ||
1341 | for (;; ivg++) { | 1334 | for (;; ivg++) { |
1342 | if (ivg >= ivg_stop) | 1335 | if (ivg >= ivg_stop) |
1343 | return; | 1336 | return -1; |
1344 | if (sic_status & ivg->isrflag) | 1337 | #ifdef SIC_ISR |
1345 | break; | 1338 | if (sic_status[0] & ivg->isrflag) |
1346 | } | 1339 | #else |
1340 | if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) | ||
1347 | #endif | 1341 | #endif |
1348 | vec = ivg->irqno; | 1342 | return ivg->irqno; |
1349 | } | 1343 | } |
1350 | asm_do_IRQ(vec, fp); | 1344 | } |
1345 | |||
1346 | #ifdef CONFIG_DO_IRQ_L1 | ||
1347 | __attribute__((l1_text)) | ||
1348 | #endif | ||
1349 | void do_irq(int vec, struct pt_regs *fp) | ||
1350 | { | ||
1351 | int irq = vec_to_irq(vec); | ||
1352 | if (irq == -1) | ||
1353 | return; | ||
1354 | asm_do_IRQ(irq, fp); | ||
1351 | } | 1355 | } |
1352 | 1356 | ||
1353 | #ifdef CONFIG_IPIPE | 1357 | #ifdef CONFIG_IPIPE |
@@ -1385,37 +1389,9 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
1385 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; | 1389 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; |
1386 | int irq, s = 0; | 1390 | int irq, s = 0; |
1387 | 1391 | ||
1388 | if (likely(vec == EVT_IVTMR_P)) | 1392 | irq = vec_to_irq(vec); |
1389 | irq = IRQ_CORETMR; | 1393 | if (irq == -1) |
1390 | else { | 1394 | return 0; |
1391 | #if defined(SIC_ISR0) | ||
1392 | unsigned long sic_status[3]; | ||
1393 | |||
1394 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | ||
1395 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | ||
1396 | # ifdef SIC_ISR2 | ||
1397 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | ||
1398 | # endif | ||
1399 | for (;; ivg++) { | ||
1400 | if (ivg >= ivg_stop) | ||
1401 | return 0; | ||
1402 | if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) | ||
1403 | break; | ||
1404 | } | ||
1405 | #else | ||
1406 | unsigned long sic_status; | ||
1407 | |||
1408 | sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); | ||
1409 | |||
1410 | for (;; ivg++) { | ||
1411 | if (ivg >= ivg_stop) | ||
1412 | return 0; | ||
1413 | if (sic_status & ivg->isrflag) | ||
1414 | break; | ||
1415 | } | ||
1416 | #endif | ||
1417 | irq = ivg->irqno; | ||
1418 | } | ||
1419 | 1395 | ||
1420 | if (irq == IRQ_SYSTMR) { | 1396 | if (irq == IRQ_SYSTMR) { |
1421 | #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_TICKSOURCE_GPTMR0) | 1397 | #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_TICKSOURCE_GPTMR0) |