diff options
author | Marc Singer <elf@buici.com> | 2006-05-16 06:41:28 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-06-18 11:16:45 -0400 |
commit | 638b266630db8d492255d340e18d46ba6ab1b057 (patch) | |
tree | 305dbef19f1bbec6daaec98a52d38c15d47d3824 /arch | |
parent | 2295196c30ea686389519f699f0ccbfbc5c3b94c (diff) |
[ARM] 3401/1: lpd7a40x: platform update
Patch from Marc Singer
Updates to the lpd7a40x_platform files. Includes support for new
architecture, lpd7a400.
Signed-off-by: Marc Singer <elf@buici.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-lh7a40x/Makefile | 19 | ||||
-rw-r--r-- | arch/arm/mach-lh7a40x/arch-lpd7a40x.c | 200 | ||||
-rw-r--r-- | arch/arm/mach-lh7a40x/clocks.c | 199 | ||||
-rw-r--r-- | arch/arm/mach-lh7a40x/irq-lh7a404.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-lh7a40x/time.c | 4 |
5 files changed, 367 insertions, 72 deletions
diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile index e90512dbc2d6..94b8615fb3c3 100644 --- a/arch/arm/mach-lh7a40x/Makefile +++ b/arch/arm/mach-lh7a40x/Makefile | |||
@@ -4,11 +4,14 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := time.o | 7 | obj-y := time.o clocks.o |
8 | obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o | 8 | obj-m := |
9 | obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o | 9 | obj-n := |
10 | obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o | 10 | obj- := |
11 | 11 | ||
12 | obj-m := | 12 | obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o |
13 | obj-n := | 13 | obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o |
14 | obj- := | 14 | obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o |
15 | obj-$(CONFIG_LPD7A40X_CPLD_SSP) += ssp-cpld.o | ||
16 | obj-$(CONFIG_FB_ARMCLCD) += clcd.o | ||
17 | |||
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 12e23277c5ea..c0e6854289f1 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c | |||
@@ -23,6 +23,28 @@ | |||
23 | 23 | ||
24 | #include "common.h" | 24 | #include "common.h" |
25 | 25 | ||
26 | #define CPLD_INT_NETHERNET (1<<0) | ||
27 | #define CPLD_INTMASK_ETHERNET (1<<2) | ||
28 | #if defined (CONFIG_MACH_LPD7A400) | ||
29 | # define CPLD_INT_NTOUCH (1<<1) | ||
30 | # define CPLD_INTMASK_TOUCH (1<<3) | ||
31 | # define CPLD_INT_PEN (1<<4) | ||
32 | # define CPLD_INTMASK_PEN (1<<4) | ||
33 | # define CPLD_INT_PIRQ (1<<4) | ||
34 | #endif | ||
35 | #define CPLD_INTMASK_CPLD (1<<7) | ||
36 | #define CPLD_INT_CPLD (1<<6) | ||
37 | |||
38 | #define CPLD_CONTROL_SWINT (1<<7) /* Disable all CPLD IRQs */ | ||
39 | #define CPLD_CONTROL_OCMSK (1<<6) /* Mask USB1 connect IRQ */ | ||
40 | #define CPLD_CONTROL_PDRV (1<<5) /* PCC_nDRV high */ | ||
41 | #define CPLD_CONTROL_USB1C (1<<4) /* USB1 connect IRQ active */ | ||
42 | #define CPLD_CONTROL_USB1P (1<<3) /* USB1 power disable */ | ||
43 | #define CPLD_CONTROL_AWKP (1<<2) /* Auto-wakeup disabled */ | ||
44 | #define CPLD_CONTROL_LCD_ENABLE (1<<1) /* LCD Vee enable */ | ||
45 | #define CPLD_CONTROL_WRLAN_NENABLE (1<<0) /* SMC91x power disable */ | ||
46 | |||
47 | |||
26 | static struct resource smc91x_resources[] = { | 48 | static struct resource smc91x_resources[] = { |
27 | [0] = { | 49 | [0] = { |
28 | .start = CPLD00_PHYS, | 50 | .start = CPLD00_PHYS, |
@@ -48,12 +70,12 @@ static struct platform_device smc91x_device = { | |||
48 | static struct resource lh7a40x_usbclient_resources[] = { | 70 | static struct resource lh7a40x_usbclient_resources[] = { |
49 | [0] = { | 71 | [0] = { |
50 | .start = USB_PHYS, | 72 | .start = USB_PHYS, |
51 | .end = (USB_PHYS + 0xFF), | 73 | .end = (USB_PHYS + PAGE_SIZE), |
52 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
53 | }, | 75 | }, |
54 | [1] = { | 76 | [1] = { |
55 | .start = IRQ_USBINTR, | 77 | .start = IRQ_USB, |
56 | .end = IRQ_USBINTR, | 78 | .end = IRQ_USB, |
57 | .flags = IORESOURCE_IRQ, | 79 | .flags = IORESOURCE_IRQ, |
58 | }, | 80 | }, |
59 | }; | 81 | }; |
@@ -61,7 +83,8 @@ static struct resource lh7a40x_usbclient_resources[] = { | |||
61 | static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; | 83 | static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; |
62 | 84 | ||
63 | static struct platform_device lh7a40x_usbclient_device = { | 85 | static struct platform_device lh7a40x_usbclient_device = { |
64 | .name = "lh7a40x_udc", | 86 | // .name = "lh7a40x_udc", |
87 | .name = "lh7-udc", | ||
65 | .id = 0, | 88 | .id = 0, |
66 | .dev = { | 89 | .dev = { |
67 | .dma_mask = &lh7a40x_usbclient_dma_mask, | 90 | .dma_mask = &lh7a40x_usbclient_dma_mask, |
@@ -101,7 +124,7 @@ static struct platform_device lh7a404_usbhost_device = { | |||
101 | 124 | ||
102 | #endif | 125 | #endif |
103 | 126 | ||
104 | static struct platform_device *lpd7a40x_devs[] __initdata = { | 127 | static struct platform_device* lpd7a40x_devs[] __initdata = { |
105 | &smc91x_device, | 128 | &smc91x_device, |
106 | &lh7a40x_usbclient_device, | 129 | &lh7a40x_usbclient_device, |
107 | #if defined (CONFIG_ARCH_LH7A404) | 130 | #if defined (CONFIG_ARCH_LH7A404) |
@@ -113,29 +136,52 @@ extern void lpd7a400_map_io (void); | |||
113 | 136 | ||
114 | static void __init lpd7a40x_init (void) | 137 | static void __init lpd7a40x_init (void) |
115 | { | 138 | { |
116 | CPLD_CONTROL |= (1<<6); /* Mask USB1 connection IRQ */ | 139 | #if defined (CONFIG_MACH_LPD7A400) |
140 | CPLD_CONTROL |= 0 | ||
141 | | CPLD_CONTROL_SWINT /* Disable software interrupt */ | ||
142 | | CPLD_CONTROL_OCMSK; /* Mask USB1 connection IRQ */ | ||
117 | CPLD_CONTROL &= ~(0 | 143 | CPLD_CONTROL &= ~(0 |
118 | | (1<<1) /* Disable LCD */ | 144 | | CPLD_CONTROL_LCD_ENABLE /* Disable LCD */ |
119 | | (1<<0) /* Enable WLAN */ | 145 | | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ |
120 | ); | 146 | ); |
147 | #endif | ||
148 | |||
149 | #if defined (CONFIG_MACH_LPD7A404) | ||
150 | CPLD_CONTROL &= ~(0 | ||
151 | | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ | ||
152 | ); | ||
153 | #endif | ||
121 | 154 | ||
122 | platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); | 155 | platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); |
156 | #if defined (CONFIG_FB_ARMCLCD) | ||
157 | lh7a40x_clcd_init (); | ||
158 | #endif | ||
123 | } | 159 | } |
124 | 160 | ||
125 | static void lh7a40x_ack_cpld_irq (u32 irq) | 161 | static void lh7a40x_ack_cpld_irq (u32 irq) |
126 | { | 162 | { |
127 | /* CPLD doesn't have ack capability */ | 163 | /* CPLD doesn't have ack capability, but some devices may */ |
164 | |||
165 | #if defined (CPLD_INTMASK_TOUCH) | ||
166 | /* The touch control *must* mask the the interrupt because the | ||
167 | * interrupt bit is read by the driver to determine if the pen | ||
168 | * is still down. */ | ||
169 | if (irq == IRQ_TOUCH) | ||
170 | CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; | ||
171 | #endif | ||
128 | } | 172 | } |
129 | 173 | ||
130 | static void lh7a40x_mask_cpld_irq (u32 irq) | 174 | static void lh7a40x_mask_cpld_irq (u32 irq) |
131 | { | 175 | { |
132 | switch (irq) { | 176 | switch (irq) { |
133 | case IRQ_LPD7A40X_ETH_INT: | 177 | case IRQ_LPD7A40X_ETH_INT: |
134 | CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; | 178 | CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; |
135 | break; | 179 | break; |
136 | case IRQ_LPD7A400_TS: | 180 | #if defined (IRQ_TOUCH) |
137 | CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; | 181 | case IRQ_TOUCH: |
182 | CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; | ||
138 | break; | 183 | break; |
184 | #endif | ||
139 | } | 185 | } |
140 | } | 186 | } |
141 | 187 | ||
@@ -143,11 +189,13 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) | |||
143 | { | 189 | { |
144 | switch (irq) { | 190 | switch (irq) { |
145 | case IRQ_LPD7A40X_ETH_INT: | 191 | case IRQ_LPD7A40X_ETH_INT: |
146 | CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; | 192 | CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; |
147 | break; | 193 | break; |
148 | case IRQ_LPD7A400_TS: | 194 | #if defined (IRQ_TOUCH) |
149 | CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; | 195 | case IRQ_TOUCH: |
196 | CPLD_INTERRUPTS &= ~CPLD_INTMASK_TOUCH; | ||
150 | break; | 197 | break; |
198 | #endif | ||
151 | } | 199 | } |
152 | } | 200 | } |
153 | 201 | ||
@@ -164,11 +212,13 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, | |||
164 | 212 | ||
165 | desc->chip->ack (irq); | 213 | desc->chip->ack (irq); |
166 | 214 | ||
167 | if ((mask & 0x1) == 0) /* WLAN */ | 215 | if ((mask & (1<<0)) == 0) /* WLAN */ |
168 | IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); | 216 | IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); |
169 | 217 | ||
170 | if ((mask & 0x2) == 0) /* Touch */ | 218 | #if defined (IRQ_TOUCH) |
171 | IRQ_DISPATCH (IRQ_LPD7A400_TS); | 219 | if ((mask & (1<<1)) == 0) /* Touch */ |
220 | IRQ_DISPATCH (IRQ_TOUCH); | ||
221 | #endif | ||
172 | 222 | ||
173 | desc->chip->unmask (irq); /* Level-triggered need this */ | 223 | desc->chip->unmask (irq); /* Level-triggered need this */ |
174 | } | 224 | } |
@@ -204,9 +254,21 @@ void __init lh7a40x_init_board_irq (void) | |||
204 | 254 | ||
205 | /* Then, configure CPLD interrupt */ | 255 | /* Then, configure CPLD interrupt */ |
206 | 256 | ||
207 | CPLD_INTERRUPTS = 0x9c; /* Disable all CPLD interrupts */ | 257 | /* Disable all CPLD interrupts */ |
258 | #if defined (CONFIG_MACH_LPD7A400) | ||
259 | CPLD_INTERRUPTS = CPLD_INTMASK_TOUCH | CPLD_INTMASK_PEN | ||
260 | | CPLD_INTMASK_ETHERNET; | ||
261 | /* *** FIXME: don't know why we need 7 and 4. 7 is way wrong | ||
262 | and 4 is uncefined. */ | ||
263 | // (1<<7)|(1<<4)|(1<<3)|(1<<2); | ||
264 | #endif | ||
265 | #if defined (CONFIG_MACH_LPD7A404) | ||
266 | CPLD_INTERRUPTS = CPLD_INTMASK_ETHERNET; | ||
267 | /* *** FIXME: don't know why we need 6 and 5, neither is defined. */ | ||
268 | // (1<<6)|(1<<5)|(1<<3); | ||
269 | #endif | ||
208 | GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ | 270 | GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ |
209 | GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ | 271 | GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */ |
210 | GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ | 272 | GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ |
211 | barrier (); | 273 | barrier (); |
212 | GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ | 274 | GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ |
@@ -216,7 +278,7 @@ void __init lh7a40x_init_board_irq (void) | |||
216 | for (irq = IRQ_BOARD_START; | 278 | for (irq = IRQ_BOARD_START; |
217 | irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { | 279 | irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { |
218 | set_irq_chip (irq, &lpd7a40x_cpld_chip); | 280 | set_irq_chip (irq, &lpd7a40x_cpld_chip); |
219 | set_irq_handler (irq, do_edge_IRQ); | 281 | set_irq_handler (irq, do_level_IRQ); |
220 | set_irq_flags (irq, IRQF_VALID); | 282 | set_irq_flags (irq, IRQF_VALID); |
221 | } | 283 | } |
222 | 284 | ||
@@ -226,91 +288,109 @@ void __init lh7a40x_init_board_irq (void) | |||
226 | lpd7a40x_cpld_handler); | 288 | lpd7a40x_cpld_handler); |
227 | } | 289 | } |
228 | 290 | ||
229 | static struct map_desc lpd7a400_io_desc[] __initdata = { | 291 | static struct map_desc lpd7a40x_io_desc[] __initdata = { |
230 | { | 292 | { |
231 | .virtual = IO_VIRT, | 293 | .virtual = IO_VIRT, |
232 | .pfn = __phys_to_pfn(IO_PHYS), | 294 | .pfn = __phys_to_pfn(IO_PHYS), |
233 | .length = IO_SIZE, | 295 | .length = IO_SIZE, |
234 | .type = MT_DEVICE | 296 | .type = MT_DEVICE |
235 | }, { /* Mapping added to work around chip select problems */ | 297 | }, |
298 | { /* Mapping added to work around chip select problems */ | ||
236 | .virtual = IOBARRIER_VIRT, | 299 | .virtual = IOBARRIER_VIRT, |
237 | .pfn = __phys_to_pfn(IOBARRIER_PHYS), | 300 | .pfn = __phys_to_pfn(IOBARRIER_PHYS), |
238 | .length = IOBARRIER_SIZE, | 301 | .length = IOBARRIER_SIZE, |
239 | .type = MT_DEVICE | 302 | .type = MT_DEVICE |
240 | }, { | 303 | }, |
304 | { | ||
241 | .virtual = CF_VIRT, | 305 | .virtual = CF_VIRT, |
242 | .pfn = __phys_to_pfn(CF_PHYS), | 306 | .pfn = __phys_to_pfn(CF_PHYS), |
243 | .length = CF_SIZE, | 307 | .length = CF_SIZE, |
244 | .type = MT_DEVICE | 308 | .type = MT_DEVICE |
245 | }, { | 309 | }, |
310 | { | ||
246 | .virtual = CPLD02_VIRT, | 311 | .virtual = CPLD02_VIRT, |
247 | .pfn = __phys_to_pfn(CPLD02_PHYS), | 312 | .pfn = __phys_to_pfn(CPLD02_PHYS), |
248 | .length = CPLD02_SIZE, | 313 | .length = CPLD02_SIZE, |
249 | .type = MT_DEVICE | 314 | .type = MT_DEVICE |
250 | }, { | 315 | }, |
316 | { | ||
251 | .virtual = CPLD06_VIRT, | 317 | .virtual = CPLD06_VIRT, |
252 | .pfn = __phys_to_pfn(CPLD06_PHYS), | 318 | .pfn = __phys_to_pfn(CPLD06_PHYS), |
253 | .length = CPLD06_SIZE, | 319 | .length = CPLD06_SIZE, |
320 | .type = MT_DEVICE | ||
321 | }, | ||
322 | { | ||
323 | .virtual = CPLD08_VIRT, | ||
324 | .pfn = __phys_to_pfn(CPLD08_PHYS), | ||
325 | .length = CPLD08_SIZE, | ||
254 | .type = MT_DEVICE | 326 | .type = MT_DEVICE |
255 | }, { | 327 | }, |
328 | { | ||
256 | .virtual = CPLD08_VIRT, | 329 | .virtual = CPLD08_VIRT, |
257 | .pfn = __phys_to_pfn(CPLD08_PHYS), | 330 | .pfn = __phys_to_pfn(CPLD08_PHYS), |
258 | .length = CPLD08_SIZE, | 331 | .length = CPLD08_SIZE, |
259 | .type = MT_DEVICE | 332 | .type = MT_DEVICE |
260 | }, { | 333 | }, |
334 | { | ||
335 | .virtual = CPLD0A_VIRT, | ||
336 | .pfn = __phys_to_pfn(CPLD0A_PHYS), | ||
337 | .length = CPLD0A_SIZE, | ||
338 | .type = MT_DEVICE | ||
339 | }, | ||
340 | { | ||
261 | .virtual = CPLD0C_VIRT, | 341 | .virtual = CPLD0C_VIRT, |
262 | .pfn = __phys_to_pfn(CPLD0C_PHYS), | 342 | .pfn = __phys_to_pfn(CPLD0C_PHYS), |
263 | .length = CPLD0C_SIZE, | 343 | .length = CPLD0C_SIZE, |
264 | .type = MT_DEVICE | 344 | .type = MT_DEVICE |
265 | }, { | 345 | }, |
346 | { | ||
266 | .virtual = CPLD0E_VIRT, | 347 | .virtual = CPLD0E_VIRT, |
267 | .pfn = __phys_to_pfn(CPLD0E_PHYS), | 348 | .pfn = __phys_to_pfn(CPLD0E_PHYS), |
268 | .length = CPLD0E_SIZE, | 349 | .length = CPLD0E_SIZE, |
269 | .type = MT_DEVICE | 350 | .type = MT_DEVICE |
270 | }, { | 351 | }, |
352 | { | ||
271 | .virtual = CPLD10_VIRT, | 353 | .virtual = CPLD10_VIRT, |
272 | .pfn = __phys_to_pfn(CPLD10_PHYS), | 354 | .pfn = __phys_to_pfn(CPLD10_PHYS), |
273 | .length = CPLD10_SIZE, | 355 | .length = CPLD10_SIZE, |
274 | .type = MT_DEVICE | 356 | .type = MT_DEVICE |
275 | }, { | 357 | }, |
358 | { | ||
276 | .virtual = CPLD12_VIRT, | 359 | .virtual = CPLD12_VIRT, |
277 | .pfn = __phys_to_pfn(CPLD12_PHYS), | 360 | .pfn = __phys_to_pfn(CPLD12_PHYS), |
278 | .length = CPLD12_SIZE, | 361 | .length = CPLD12_SIZE, |
279 | .type = MT_DEVICE | 362 | .type = MT_DEVICE |
280 | }, { | 363 | }, |
364 | { | ||
281 | .virtual = CPLD14_VIRT, | 365 | .virtual = CPLD14_VIRT, |
282 | .pfn = __phys_to_pfn(CPLD14_PHYS), | 366 | .pfn = __phys_to_pfn(CPLD14_PHYS), |
283 | .length = CPLD14_SIZE, | 367 | .length = CPLD14_SIZE, |
284 | .type = MT_DEVICE | 368 | .type = MT_DEVICE |
285 | }, { | 369 | }, |
370 | { | ||
286 | .virtual = CPLD16_VIRT, | 371 | .virtual = CPLD16_VIRT, |
287 | .pfn = __phys_to_pfn(CPLD16_PHYS), | 372 | .pfn = __phys_to_pfn(CPLD16_PHYS), |
288 | .length = CPLD16_SIZE, | 373 | .length = CPLD16_SIZE, |
289 | .type = MT_DEVICE | 374 | .type = MT_DEVICE |
290 | }, { | 375 | }, |
376 | { | ||
291 | .virtual = CPLD18_VIRT, | 377 | .virtual = CPLD18_VIRT, |
292 | .pfn = __phys_to_pfn(CPLD18_PHYS), | 378 | .pfn = __phys_to_pfn(CPLD18_PHYS), |
293 | .length = CPLD18_SIZE, | 379 | .length = CPLD18_SIZE, |
294 | .type = MT_DEVICE | 380 | .type = MT_DEVICE |
295 | }, { | 381 | }, |
382 | { | ||
296 | .virtual = CPLD1A_VIRT, | 383 | .virtual = CPLD1A_VIRT, |
297 | .pfn = __phys_to_pfn(CPLD1A_PHYS), | 384 | .pfn = __phys_to_pfn(CPLD1A_PHYS), |
298 | .length = CPLD1A_SIZE, | 385 | .length = CPLD1A_SIZE, |
299 | .type = MT_DEVICE | 386 | .type = MT_DEVICE |
300 | }, | 387 | }, |
301 | /* This mapping is redundant since the smc driver performs another. */ | ||
302 | /* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ | ||
303 | }; | 388 | }; |
304 | 389 | ||
305 | void __init | 390 | void __init |
306 | lpd7a400_map_io(void) | 391 | lpd7a40x_map_io(void) |
307 | { | 392 | { |
308 | iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc)); | 393 | iotable_init (lpd7a40x_io_desc, ARRAY_SIZE (lpd7a40x_io_desc)); |
309 | |||
310 | /* Fixup (improve) Static Memory Controller settings */ | ||
311 | SMC_BCR0 = 0x200039af; /* Boot Flash */ | ||
312 | SMC_BCR6 = 0x1000fbe0; /* CPLD */ | ||
313 | SMC_BCR7 = 0x1000b2c2; /* Compact Flash */ | ||
314 | } | 394 | } |
315 | 395 | ||
316 | #ifdef CONFIG_MACH_LPD7A400 | 396 | #ifdef CONFIG_MACH_LPD7A400 |
@@ -320,7 +400,7 @@ MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") | |||
320 | .phys_io = 0x80000000, | 400 | .phys_io = 0x80000000, |
321 | .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, | 401 | .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, |
322 | .boot_params = 0xc0000100, | 402 | .boot_params = 0xc0000100, |
323 | .map_io = lpd7a400_map_io, | 403 | .map_io = lpd7a40x_map_io, |
324 | .init_irq = lh7a400_init_irq, | 404 | .init_irq = lh7a400_init_irq, |
325 | .timer = &lh7a40x_timer, | 405 | .timer = &lh7a40x_timer, |
326 | .init_machine = lpd7a40x_init, | 406 | .init_machine = lpd7a40x_init, |
@@ -335,7 +415,7 @@ MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") | |||
335 | .phys_io = 0x80000000, | 415 | .phys_io = 0x80000000, |
336 | .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, | 416 | .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, |
337 | .boot_params = 0xc0000100, | 417 | .boot_params = 0xc0000100, |
338 | .map_io = lpd7a400_map_io, | 418 | .map_io = lpd7a40x_map_io, |
339 | .init_irq = lh7a404_init_irq, | 419 | .init_irq = lh7a404_init_irq, |
340 | .timer = &lh7a40x_timer, | 420 | .timer = &lh7a40x_timer, |
341 | .init_machine = lpd7a40x_init, | 421 | .init_machine = lpd7a40x_init, |
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c new file mode 100644 index 000000000000..2291afe9f23e --- /dev/null +++ b/arch/arm/mach-lh7a40x/clocks.c | |||
@@ -0,0 +1,199 @@ | |||
1 | /* arch/arm/mach-lh7a40x/clocks.c | ||
2 | * | ||
3 | * Copyright (C) 2004 Marc Singer | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * version 2 as published by the Free Software Foundation. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/cpufreq.h> | ||
13 | #include <asm/hardware.h> | ||
14 | #include <asm/arch/clocks.h> | ||
15 | #include <linux/err.h> | ||
16 | |||
17 | struct module; | ||
18 | struct icst525_params; | ||
19 | |||
20 | struct clk { | ||
21 | struct list_head node; | ||
22 | unsigned long rate; | ||
23 | struct module *owner; | ||
24 | const char *name; | ||
25 | // void *data; | ||
26 | // const struct icst525_params *params; | ||
27 | // void (*setvco)(struct clk *, struct icst525_vco vco); | ||
28 | }; | ||
29 | |||
30 | int clk_register(struct clk *clk); | ||
31 | void clk_unregister(struct clk *clk); | ||
32 | |||
33 | /* ----- */ | ||
34 | |||
35 | #define MAINDIV1(c) (((c) >> 7) & 0x0f) | ||
36 | #define MAINDIV2(c) (((c) >> 11) & 0x1f) | ||
37 | #define PS(c) (((c) >> 18) & 0x03) | ||
38 | #define PREDIV(c) (((c) >> 2) & 0x1f) | ||
39 | #define HCLKDIV(c) (((c) >> 0) & 0x02) | ||
40 | #define PCLKDIV(c) (((c) >> 16) & 0x03) | ||
41 | |||
42 | unsigned int cpufreq_get (unsigned int cpu) /* in kHz */ | ||
43 | { | ||
44 | return fclkfreq_get ()/1000; | ||
45 | } | ||
46 | EXPORT_SYMBOL(cpufreq_get); | ||
47 | |||
48 | unsigned int fclkfreq_get (void) | ||
49 | { | ||
50 | unsigned int clkset = CSC_CLKSET; | ||
51 | unsigned int gclk | ||
52 | = XTAL_IN | ||
53 | / (1 << PS(clkset)) | ||
54 | * (MAINDIV1(clkset) + 2) | ||
55 | / (PREDIV(clkset) + 2) | ||
56 | * (MAINDIV2(clkset) + 2) | ||
57 | ; | ||
58 | return gclk; | ||
59 | } | ||
60 | |||
61 | unsigned int hclkfreq_get (void) | ||
62 | { | ||
63 | unsigned int clkset = CSC_CLKSET; | ||
64 | unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1); | ||
65 | |||
66 | return hclk; | ||
67 | } | ||
68 | |||
69 | unsigned int pclkfreq_get (void) | ||
70 | { | ||
71 | unsigned int clkset = CSC_CLKSET; | ||
72 | int pclkdiv = PCLKDIV(clkset); | ||
73 | unsigned int pclk; | ||
74 | if (pclkdiv == 0x3) | ||
75 | pclkdiv = 0x2; | ||
76 | pclk = hclkfreq_get () / (1 << pclkdiv); | ||
77 | |||
78 | return pclk; | ||
79 | } | ||
80 | |||
81 | /* ----- */ | ||
82 | |||
83 | static LIST_HEAD(clocks); | ||
84 | static DECLARE_MUTEX(clocks_sem); | ||
85 | |||
86 | struct clk *clk_get (struct device *dev, const char *id) | ||
87 | { | ||
88 | struct clk *p; | ||
89 | struct clk *clk = ERR_PTR(-ENOENT); | ||
90 | |||
91 | down (&clocks_sem); | ||
92 | list_for_each_entry (p, &clocks, node) { | ||
93 | if (strcmp (id, p->name) == 0 | ||
94 | && try_module_get(p->owner)) { | ||
95 | clk = p; | ||
96 | break; | ||
97 | } | ||
98 | } | ||
99 | up (&clocks_sem); | ||
100 | |||
101 | return clk; | ||
102 | } | ||
103 | EXPORT_SYMBOL(clk_get); | ||
104 | |||
105 | void clk_put (struct clk *clk) | ||
106 | { | ||
107 | module_put(clk->owner); | ||
108 | } | ||
109 | EXPORT_SYMBOL(clk_put); | ||
110 | |||
111 | int clk_enable (struct clk *clk) | ||
112 | { | ||
113 | return 0; | ||
114 | } | ||
115 | EXPORT_SYMBOL(clk_enable); | ||
116 | |||
117 | void clk_disable (struct clk *clk) | ||
118 | { | ||
119 | } | ||
120 | EXPORT_SYMBOL(clk_disable); | ||
121 | |||
122 | int clk_use (struct clk *clk) | ||
123 | { | ||
124 | return 0; | ||
125 | } | ||
126 | EXPORT_SYMBOL(clk_use); | ||
127 | |||
128 | void clk_unuse (struct clk *clk) | ||
129 | { | ||
130 | } | ||
131 | EXPORT_SYMBOL(clk_unuse); | ||
132 | |||
133 | unsigned long clk_get_rate (struct clk *clk) | ||
134 | { | ||
135 | return clk->rate; | ||
136 | } | ||
137 | EXPORT_SYMBOL(clk_get_rate); | ||
138 | |||
139 | long clk_round_rate (struct clk *clk, unsigned long rate) | ||
140 | { | ||
141 | return rate; | ||
142 | } | ||
143 | EXPORT_SYMBOL(clk_round_rate); | ||
144 | |||
145 | int clk_set_rate (struct clk *clk, unsigned long rate) | ||
146 | { | ||
147 | int ret = -EIO; | ||
148 | return ret; | ||
149 | } | ||
150 | EXPORT_SYMBOL(clk_set_rate); | ||
151 | |||
152 | #if 0 | ||
153 | /* | ||
154 | * These are fixed clocks. | ||
155 | */ | ||
156 | static struct clk kmi_clk = { | ||
157 | .name = "KMIREFCLK", | ||
158 | .rate = 24000000, | ||
159 | }; | ||
160 | |||
161 | static struct clk uart_clk = { | ||
162 | .name = "UARTCLK", | ||
163 | .rate = 24000000, | ||
164 | }; | ||
165 | |||
166 | static struct clk mmci_clk = { | ||
167 | .name = "MCLK", | ||
168 | .rate = 33000000, | ||
169 | }; | ||
170 | #endif | ||
171 | |||
172 | static struct clk clcd_clk = { | ||
173 | .name = "CLCDCLK", | ||
174 | .rate = 0, | ||
175 | }; | ||
176 | |||
177 | int clk_register (struct clk *clk) | ||
178 | { | ||
179 | down (&clocks_sem); | ||
180 | list_add (&clk->node, &clocks); | ||
181 | up (&clocks_sem); | ||
182 | return 0; | ||
183 | } | ||
184 | EXPORT_SYMBOL(clk_register); | ||
185 | |||
186 | void clk_unregister (struct clk *clk) | ||
187 | { | ||
188 | down (&clocks_sem); | ||
189 | list_del (&clk->node); | ||
190 | up (&clocks_sem); | ||
191 | } | ||
192 | EXPORT_SYMBOL(clk_unregister); | ||
193 | |||
194 | static int __init clk_init (void) | ||
195 | { | ||
196 | clk_register(&clcd_clk); | ||
197 | return 0; | ||
198 | } | ||
199 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index e902e3d87da4..2685a81454d2 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c | |||
@@ -28,13 +28,17 @@ | |||
28 | 28 | ||
29 | static unsigned char irq_pri_vic1[] = { | 29 | static unsigned char irq_pri_vic1[] = { |
30 | #if defined (USE_PRIORITIES) | 30 | #if defined (USE_PRIORITIES) |
31 | IRQ_GPIO3INTR, | 31 | IRQ_GPIO3INTR, /* CPLD */ |
32 | IRQ_DMAM2P4, IRQ_DMAM2P5, /* AC97 */ | ||
32 | #endif | 33 | #endif |
33 | }; | 34 | }; |
34 | static unsigned char irq_pri_vic2[] = { | 35 | static unsigned char irq_pri_vic2[] = { |
35 | #if defined (USE_PRIORITIES) | 36 | #if defined (USE_PRIORITIES) |
36 | IRQ_T3UI, IRQ_GPIO7INTR, | 37 | IRQ_T3UI, /* Timer */ |
38 | IRQ_GPIO7INTR, /* CPLD */ | ||
37 | IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, | 39 | IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, |
40 | IRQ_LCDINTR, /* LCD */ | ||
41 | IRQ_TSCINTR, /* ADC/Touchscreen */ | ||
38 | #endif | 42 | #endif |
39 | }; | 43 | }; |
40 | 44 | ||
@@ -98,10 +102,19 @@ static struct irqchip lh7a404_gpio_vic2_chip = { | |||
98 | 102 | ||
99 | /* IRQ initialization */ | 103 | /* IRQ initialization */ |
100 | 104 | ||
105 | #if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) | ||
106 | extern void* branch_irq_lh7a400; | ||
107 | #endif | ||
108 | |||
101 | void __init lh7a404_init_irq (void) | 109 | void __init lh7a404_init_irq (void) |
102 | { | 110 | { |
103 | int irq; | 111 | int irq; |
104 | 112 | ||
113 | #if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) | ||
114 | #define NOP 0xe1a00000 /* mov r0, r0 */ | ||
115 | branch_irq_lh7a400 = NOP; | ||
116 | #endif | ||
117 | |||
105 | VIC1_INTENCLR = 0xffffffff; | 118 | VIC1_INTENCLR = 0xffffffff; |
106 | VIC2_INTENCLR = 0xffffffff; | 119 | VIC2_INTENCLR = 0xffffffff; |
107 | VIC1_INTSEL = 0; /* All IRQs */ | 120 | VIC1_INTSEL = 0; /* All IRQs */ |
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index be377e331f25..ef9af375fcc4 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c | |||
@@ -1,4 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-lh7a40x/time.c | 2 | * arch/arm/mach-lh7a40x/time.c |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Logic Product Development | 4 | * Copyright (C) 2004 Logic Product Development |
@@ -57,7 +57,7 @@ static struct irqaction lh7a40x_timer_irq = { | |||
57 | .handler = lh7a40x_timer_interrupt, | 57 | .handler = lh7a40x_timer_interrupt, |
58 | }; | 58 | }; |
59 | 59 | ||
60 | static void __init lh7a40x_timer_init(void) | 60 | static void __init lh7a40x_timer_init (void) |
61 | { | 61 | { |
62 | /* Stop/disable all timers */ | 62 | /* Stop/disable all timers */ |
63 | TIMER_CONTROL1 = 0; | 63 | TIMER_CONTROL1 = 0; |