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authorJohn Crispin <blogic@openwrt.org>2013-01-20 16:02:55 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-16 19:25:31 -0500
commit5fff610b7c60195de98e68bec00c357f393ce634 (patch)
tree408b0dfb4bd006bd626246d69c3f4ce0b687c386 /arch
parent3a5bfe7bdbfd37c9206d7c6dfd7eb9664ccc5038 (diff)
MIPS: ralink: adds early_printk support
Add the code needed to make early printk work. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4897/
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/ralink/early_printk.c44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c
new file mode 100644
index 000000000000..c4ae47eb24ab
--- /dev/null
+++ b/arch/mips/ralink/early_printk.c
@@ -0,0 +1,44 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
7 */
8
9#include <linux/io.h>
10#include <linux/serial_reg.h>
11
12#include <asm/addrspace.h>
13
14#define EARLY_UART_BASE 0x10000c00
15
16#define UART_REG_RX 0x00
17#define UART_REG_TX 0x04
18#define UART_REG_IER 0x08
19#define UART_REG_IIR 0x0c
20#define UART_REG_FCR 0x10
21#define UART_REG_LCR 0x14
22#define UART_REG_MCR 0x18
23#define UART_REG_LSR 0x1c
24
25static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
26
27static inline void uart_w32(u32 val, unsigned reg)
28{
29 __raw_writel(val, uart_membase + reg);
30}
31
32static inline u32 uart_r32(unsigned reg)
33{
34 return __raw_readl(uart_membase + reg);
35}
36
37void prom_putchar(unsigned char ch)
38{
39 while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
40 ;
41 uart_w32(ch, UART_REG_TX);
42 while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
43 ;
44}