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authorStephen Warren <swarren@nvidia.com>2012-04-13 18:35:20 -0400
committerStephen Warren <swarren@nvidia.com>2012-04-25 17:22:10 -0400
commit563da21b1d1878736905bbff0f096fcd960d57c5 (patch)
treea73429c7eaf743341033b7fbd0c1011259797ddd /arch
parentaa607ebf93a5fc26275a575781399df971dd1b91 (diff)
ARM: dt: tegra: pinmux changes for USB ULPI
Ensure that the USB ULPI signals are not tri-stated, and have no pull- up or pull-down. Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or PV1 depending on the board, so UAC) is not tri-stated, and has no pull- up or pull-down. This change appears larger than it is due to the grouping and sorting of the pin configuration data. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts20
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts14
-rw-r--r--arch/arm/boot/dts/tegra-trimslice.dts18
3 files changed, 24 insertions, 28 deletions
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 59bf1cf6a65c..6857cec8382d 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -167,28 +167,28 @@
167 }; 167 };
168 conf_ata { 168 conf_ata {
169 nvidia,pins = "ata", "atb", "atc", "atd", "ate", 169 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
170 "cdev1", "dap1", "dtb", "gma", "gmb", 170 "cdev1", "cdev2", "dap1", "dtb", "gma",
171 "gmc", "gmd", "gme", "gpu7", "gpv", 171 "gmb", "gmc", "gmd", "gme", "gpu7",
172 "i2cp", "pta", "rm", "slxa", "slxk", 172 "gpv", "i2cp", "pta", "rm", "slxa",
173 "spia", "spib"; 173 "slxk", "spia", "spib", "uac";
174 nvidia,pull = <0>; 174 nvidia,pull = <0>;
175 nvidia,tristate = <0>; 175 nvidia,tristate = <0>;
176 }; 176 };
177 conf_cdev2 {
178 nvidia,pins = "cdev2", "csus", "spid", "spif";
179 nvidia,pull = <1>;
180 nvidia,tristate = <1>;
181 };
182 conf_ck32 { 177 conf_ck32 {
183 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 178 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
184 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 179 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
185 nvidia,pull = <0>; 180 nvidia,pull = <0>;
186 }; 181 };
182 conf_csus {
183 nvidia,pins = "csus", "spid", "spif";
184 nvidia,pull = <1>;
185 nvidia,tristate = <1>;
186 };
187 conf_crtp { 187 conf_crtp {
188 nvidia,pins = "crtp", "dap2", "dap3", "dap4", 188 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
189 "dtc", "dte", "dtf", "gpu", "sdio1", 189 "dtc", "dte", "dtf", "gpu", "sdio1",
190 "slxc", "slxd", "spdi", "spdo", "spig", 190 "slxc", "slxd", "spdi", "spdo", "spig",
191 "uac", "uda"; 191 "uda";
192 nvidia,pull = <0>; 192 nvidia,pull = <0>;
193 nvidia,tristate = <1>; 193 nvidia,tristate = <1>;
194 }; 194 };
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index fad92f2dbff0..34a917710e09 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -159,18 +159,14 @@
159 }; 159 };
160 conf_ata { 160 conf_ata {
161 nvidia,pins = "ata", "atb", "atc", "atd", "ate", 161 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
162 "cdev1", "dap1", "dap2", "dtf", "gma", 162 "cdev1", "cdev2", "dap1", "dap2", "dtf",
163 "gmb", "gmc", "gmd", "gme", "gpu", 163 "gma", "gmb", "gmc", "gmd", "gme",
164 "gpu7", "gpv", "i2cp", "pta", "rm", 164 "gpu", "gpu7", "gpv", "i2cp", "pta",
165 "sdio1", "slxk", "spdo", "uac", "uda"; 165 "rm", "sdio1", "slxk", "spdo", "uac",
166 "uda";
166 nvidia,pull = <0>; 167 nvidia,pull = <0>;
167 nvidia,tristate = <0>; 168 nvidia,tristate = <0>;
168 }; 169 };
169 conf_cdev2 {
170 nvidia,pins = "cdev2";
171 nvidia,pull = <1>;
172 nvidia,tristate = <0>;
173 };
174 conf_ck32 { 170 conf_ck32 {
175 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 171 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
176 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 172 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index 71b73aab87ff..e4fcf9a8178a 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -182,23 +182,23 @@
182 nvidia,tristate = <1>; 182 nvidia,tristate = <1>;
183 }; 183 };
184 conf_atb { 184 conf_atb {
185 nvidia,pins = "atb", "cdev1", "dap1", "gma", 185 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
186 "gmc", "gmd", "gpu", "gpu7", "gpv", 186 "gma", "gmc", "gmd", "gpu", "gpu7",
187 "sdio1", "slxa", "slxk", "uac"; 187 "gpv", "sdio1", "slxa", "slxk", "uac";
188 nvidia,pull = <0>; 188 nvidia,pull = <0>;
189 nvidia,tristate = <0>; 189 nvidia,tristate = <0>;
190 }; 190 };
191 conf_cdev2 {
192 nvidia,pins = "cdev2", "csus", "spia", "spib",
193 "spid", "spif";
194 nvidia,pull = <1>;
195 nvidia,tristate = <1>;
196 };
197 conf_ck32 { 191 conf_ck32 {
198 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 192 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
199 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 193 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
200 nvidia,pull = <0>; 194 nvidia,pull = <0>;
201 }; 195 };
196 conf_csus {
197 nvidia,pins = "csus", "spia", "spib",
198 "spid", "spif";
199 nvidia,pull = <1>;
200 nvidia,tristate = <1>;
201 };
202 conf_ddc { 202 conf_ddc {
203 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; 203 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
204 nvidia,pull = <2>; 204 nvidia,pull = <2>;