diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-29 15:16:17 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-29 15:16:17 -0400 |
commit | 507ffe4f3840ac24890a8123c702cf1b7fe4d33c (patch) | |
tree | 1046888f9db00f268a0056d7f6e427e21502f84c /arch | |
parent | fdc719b63ae35d6a2d8a2a2c76eed813294664bf (diff) | |
parent | 45efcb2d32d35f6509543e477568842d8467035d (diff) |
Merge tag 'tty-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver update from Greg Kroah-Hartman:
"Here's the big tty/serial driver merge request for 3.10-rc1
Once again, Jiri has a number of TTY driver fixes and cleanups, and
Peter Hurley came through with a bunch of ldisc fixes that resolve a
number of reported issues. There are some other serial driver
cleanups as well.
All of these have been in the linux-next tree for a while"
* tag 'tty-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (117 commits)
tty/serial/sirf: fix MODULE_DEVICE_TABLE
serial: mxs: drop superfluous {get|put}_device
serial: mxs: fix buffer overflow
ARM: PL011: add support for extended FIFO-size of PL011-r1p5
serial_core.c: add put_device() after device_find_child()
tty: Fix unsafe bit ops in tty_throttle_safe/unthrottle_safe
serial: sccnxp: Replace pdata.init/exit with regulator API
serial: sccnxp: Do not override device name
TTY: pty, fix compilation warning
TTY: rocket, fix compilation warning
TTY: ircomm: fix DTR being raised on hang up
TTY: synclinkmp: fix DTR being raised on hang up
TTY: synclink_gt: fix DTR being raised on hang up
TTY: synclink: fix DTR being raised on hang up
serial: 8250_dw: Fix the stub for dw8250_probe_acpi()
serial: 8250_dw: Convert to devm_ioremap()
serial: 8250_dw: Set port capabilities based on CPR register
serial: 8250_dw: Let ACPI code extract the DMA client info
serial: 8250_dw: Support clk framework also with ACPI
serial: 8250_dw: Enable runtime PM
...
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s3c24xx/clock-s3c2440.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/common.c | 5 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-serial.h | 282 | ||||
-rw-r--r-- | arch/ia64/hp/sim/simserial.c | 16 | ||||
-rw-r--r-- | arch/um/drivers/chan_kern.c | 6 | ||||
-rw-r--r-- | arch/um/drivers/line.c | 8 |
6 files changed, 16 insertions, 306 deletions
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index 04b87ec92537..1069b5680826 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c | |||
@@ -123,6 +123,11 @@ static struct clk s3c2440_clk_ac97 = { | |||
123 | .ctrlbit = S3C2440_CLKCON_AC97, | 123 | .ctrlbit = S3C2440_CLKCON_AC97, |
124 | }; | 124 | }; |
125 | 125 | ||
126 | #define S3C24XX_VA_UART0 (S3C_VA_UART) | ||
127 | #define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 ) | ||
128 | #define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 ) | ||
129 | #define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 ) | ||
130 | |||
126 | static unsigned long s3c2440_fclk_n_getrate(struct clk *clk) | 131 | static unsigned long s3c2440_fclk_n_getrate(struct clk *clk) |
127 | { | 132 | { |
128 | unsigned long ucon0, ucon1, ucon2, divisor; | 133 | unsigned long ucon0, ucon1, ucon2, divisor; |
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 6bcf87f65f9e..92e609440c57 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c | |||
@@ -239,6 +239,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | |||
239 | 239 | ||
240 | /* Serial port registrations */ | 240 | /* Serial port registrations */ |
241 | 241 | ||
242 | #define S3C2410_PA_UART0 (S3C24XX_PA_UART) | ||
243 | #define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) | ||
244 | #define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) | ||
245 | #define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 ) | ||
246 | |||
242 | static struct resource s3c2410_uart0_resource[] = { | 247 | static struct resource s3c2410_uart0_resource[] = { |
243 | [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), | 248 | [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), |
244 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \ | 249 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \ |
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 29c26a818842..f05f2afa440d 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -1,281 +1 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/regs-serial.h | #include <linux/serial_s3c.h> | |
2 | * | ||
3 | * From linux/include/asm-arm/hardware/serial_s3c2410.h | ||
4 | * | ||
5 | * Internal header file for Samsung S3C2410 serial ports (UART0-2) | ||
6 | * | ||
7 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
8 | * | ||
9 | * Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk) | ||
10 | * | ||
11 | * Adapted from: | ||
12 | * | ||
13 | * Internal header file for MX1ADS serial ports (UART1 & 2) | ||
14 | * | ||
15 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
16 | * | ||
17 | * This program is free software; you can redistribute it and/or modify | ||
18 | * it under the terms of the GNU General Public License as published by | ||
19 | * the Free Software Foundation; either version 2 of the License, or | ||
20 | * (at your option) any later version. | ||
21 | * | ||
22 | * This program is distributed in the hope that it will be useful, | ||
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
25 | * GNU General Public License for more details. | ||
26 | * | ||
27 | * You should have received a copy of the GNU General Public License | ||
28 | * along with this program; if not, write to the Free Software | ||
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
30 | */ | ||
31 | |||
32 | #ifndef __ASM_ARM_REGS_SERIAL_H | ||
33 | #define __ASM_ARM_REGS_SERIAL_H | ||
34 | |||
35 | #define S3C24XX_VA_UART0 (S3C_VA_UART) | ||
36 | #define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 ) | ||
37 | #define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 ) | ||
38 | #define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 ) | ||
39 | |||
40 | #define S3C2410_PA_UART0 (S3C24XX_PA_UART) | ||
41 | #define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) | ||
42 | #define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) | ||
43 | #define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 ) | ||
44 | |||
45 | #define S3C2410_URXH (0x24) | ||
46 | #define S3C2410_UTXH (0x20) | ||
47 | #define S3C2410_ULCON (0x00) | ||
48 | #define S3C2410_UCON (0x04) | ||
49 | #define S3C2410_UFCON (0x08) | ||
50 | #define S3C2410_UMCON (0x0C) | ||
51 | #define S3C2410_UBRDIV (0x28) | ||
52 | #define S3C2410_UTRSTAT (0x10) | ||
53 | #define S3C2410_UERSTAT (0x14) | ||
54 | #define S3C2410_UFSTAT (0x18) | ||
55 | #define S3C2410_UMSTAT (0x1C) | ||
56 | |||
57 | #define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) | ||
58 | |||
59 | #define S3C2410_LCON_CS5 (0x0) | ||
60 | #define S3C2410_LCON_CS6 (0x1) | ||
61 | #define S3C2410_LCON_CS7 (0x2) | ||
62 | #define S3C2410_LCON_CS8 (0x3) | ||
63 | #define S3C2410_LCON_CSMASK (0x3) | ||
64 | |||
65 | #define S3C2410_LCON_PNONE (0x0) | ||
66 | #define S3C2410_LCON_PEVEN (0x5 << 3) | ||
67 | #define S3C2410_LCON_PODD (0x4 << 3) | ||
68 | #define S3C2410_LCON_PMASK (0x7 << 3) | ||
69 | |||
70 | #define S3C2410_LCON_STOPB (1<<2) | ||
71 | #define S3C2410_LCON_IRM (1<<6) | ||
72 | |||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | ||
74 | #define S3C2440_UCON_CLKSHIFT (10) | ||
75 | #define S3C2440_UCON_PCLK (0<<10) | ||
76 | #define S3C2440_UCON_UCLK (1<<10) | ||
77 | #define S3C2440_UCON_PCLK2 (2<<10) | ||
78 | #define S3C2440_UCON_FCLK (3<<10) | ||
79 | #define S3C2443_UCON_EPLL (3<<10) | ||
80 | |||
81 | #define S3C6400_UCON_CLKMASK (3<<10) | ||
82 | #define S3C6400_UCON_CLKSHIFT (10) | ||
83 | #define S3C6400_UCON_PCLK (0<<10) | ||
84 | #define S3C6400_UCON_PCLK2 (2<<10) | ||
85 | #define S3C6400_UCON_UCLK0 (1<<10) | ||
86 | #define S3C6400_UCON_UCLK1 (3<<10) | ||
87 | |||
88 | #define S3C2440_UCON2_FCLK_EN (1<<15) | ||
89 | #define S3C2440_UCON0_DIVMASK (15 << 12) | ||
90 | #define S3C2440_UCON1_DIVMASK (15 << 12) | ||
91 | #define S3C2440_UCON2_DIVMASK (7 << 12) | ||
92 | #define S3C2440_UCON_DIVSHIFT (12) | ||
93 | |||
94 | #define S3C2412_UCON_CLKMASK (3<<10) | ||
95 | #define S3C2412_UCON_CLKSHIFT (10) | ||
96 | #define S3C2412_UCON_UCLK (1<<10) | ||
97 | #define S3C2412_UCON_USYSCLK (3<<10) | ||
98 | #define S3C2412_UCON_PCLK (0<<10) | ||
99 | #define S3C2412_UCON_PCLK2 (2<<10) | ||
100 | |||
101 | #define S3C2410_UCON_CLKMASK (1 << 10) | ||
102 | #define S3C2410_UCON_CLKSHIFT (10) | ||
103 | #define S3C2410_UCON_UCLK (1<<10) | ||
104 | #define S3C2410_UCON_SBREAK (1<<4) | ||
105 | |||
106 | #define S3C2410_UCON_TXILEVEL (1<<9) | ||
107 | #define S3C2410_UCON_RXILEVEL (1<<8) | ||
108 | #define S3C2410_UCON_TXIRQMODE (1<<2) | ||
109 | #define S3C2410_UCON_RXIRQMODE (1<<0) | ||
110 | #define S3C2410_UCON_RXFIFO_TOI (1<<7) | ||
111 | #define S3C2443_UCON_RXERR_IRQEN (1<<6) | ||
112 | #define S3C2443_UCON_LOOPBACK (1<<5) | ||
113 | |||
114 | #define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
115 | S3C2410_UCON_RXILEVEL | \ | ||
116 | S3C2410_UCON_TXIRQMODE | \ | ||
117 | S3C2410_UCON_RXIRQMODE | \ | ||
118 | S3C2410_UCON_RXFIFO_TOI) | ||
119 | |||
120 | #define S3C2410_UFCON_FIFOMODE (1<<0) | ||
121 | #define S3C2410_UFCON_TXTRIG0 (0<<6) | ||
122 | #define S3C2410_UFCON_RXTRIG8 (1<<4) | ||
123 | #define S3C2410_UFCON_RXTRIG12 (2<<4) | ||
124 | |||
125 | /* S3C2440 FIFO trigger levels */ | ||
126 | #define S3C2440_UFCON_RXTRIG1 (0<<4) | ||
127 | #define S3C2440_UFCON_RXTRIG8 (1<<4) | ||
128 | #define S3C2440_UFCON_RXTRIG16 (2<<4) | ||
129 | #define S3C2440_UFCON_RXTRIG32 (3<<4) | ||
130 | |||
131 | #define S3C2440_UFCON_TXTRIG0 (0<<6) | ||
132 | #define S3C2440_UFCON_TXTRIG16 (1<<6) | ||
133 | #define S3C2440_UFCON_TXTRIG32 (2<<6) | ||
134 | #define S3C2440_UFCON_TXTRIG48 (3<<6) | ||
135 | |||
136 | #define S3C2410_UFCON_RESETBOTH (3<<1) | ||
137 | #define S3C2410_UFCON_RESETTX (1<<2) | ||
138 | #define S3C2410_UFCON_RESETRX (1<<1) | ||
139 | |||
140 | #define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
141 | S3C2410_UFCON_TXTRIG0 | \ | ||
142 | S3C2410_UFCON_RXTRIG8 ) | ||
143 | |||
144 | #define S3C2410_UMCOM_AFC (1<<4) | ||
145 | #define S3C2410_UMCOM_RTS_LOW (1<<0) | ||
146 | |||
147 | #define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */ | ||
148 | #define S3C2412_UMCON_AFC_56 (1<<5) | ||
149 | #define S3C2412_UMCON_AFC_48 (2<<5) | ||
150 | #define S3C2412_UMCON_AFC_40 (3<<5) | ||
151 | #define S3C2412_UMCON_AFC_32 (4<<5) | ||
152 | #define S3C2412_UMCON_AFC_24 (5<<5) | ||
153 | #define S3C2412_UMCON_AFC_16 (6<<5) | ||
154 | #define S3C2412_UMCON_AFC_8 (7<<5) | ||
155 | |||
156 | #define S3C2410_UFSTAT_TXFULL (1<<9) | ||
157 | #define S3C2410_UFSTAT_RXFULL (1<<8) | ||
158 | #define S3C2410_UFSTAT_TXMASK (15<<4) | ||
159 | #define S3C2410_UFSTAT_TXSHIFT (4) | ||
160 | #define S3C2410_UFSTAT_RXMASK (15<<0) | ||
161 | #define S3C2410_UFSTAT_RXSHIFT (0) | ||
162 | |||
163 | /* UFSTAT S3C2443 same as S3C2440 */ | ||
164 | #define S3C2440_UFSTAT_TXFULL (1<<14) | ||
165 | #define S3C2440_UFSTAT_RXFULL (1<<6) | ||
166 | #define S3C2440_UFSTAT_TXSHIFT (8) | ||
167 | #define S3C2440_UFSTAT_RXSHIFT (0) | ||
168 | #define S3C2440_UFSTAT_TXMASK (63<<8) | ||
169 | #define S3C2440_UFSTAT_RXMASK (63) | ||
170 | |||
171 | #define S3C2410_UTRSTAT_TXE (1<<2) | ||
172 | #define S3C2410_UTRSTAT_TXFE (1<<1) | ||
173 | #define S3C2410_UTRSTAT_RXDR (1<<0) | ||
174 | |||
175 | #define S3C2410_UERSTAT_OVERRUN (1<<0) | ||
176 | #define S3C2410_UERSTAT_FRAME (1<<2) | ||
177 | #define S3C2410_UERSTAT_BREAK (1<<3) | ||
178 | #define S3C2443_UERSTAT_PARITY (1<<1) | ||
179 | |||
180 | #define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \ | ||
181 | S3C2410_UERSTAT_FRAME | \ | ||
182 | S3C2410_UERSTAT_BREAK) | ||
183 | |||
184 | #define S3C2410_UMSTAT_CTS (1<<0) | ||
185 | #define S3C2410_UMSTAT_DeltaCTS (1<<2) | ||
186 | |||
187 | #define S3C2443_DIVSLOT (0x2C) | ||
188 | |||
189 | /* S3C64XX interrupt registers. */ | ||
190 | #define S3C64XX_UINTP 0x30 | ||
191 | #define S3C64XX_UINTSP 0x34 | ||
192 | #define S3C64XX_UINTM 0x38 | ||
193 | |||
194 | #define S3C64XX_UINTM_RXD (0) | ||
195 | #define S3C64XX_UINTM_TXD (2) | ||
196 | #define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) | ||
197 | #define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) | ||
198 | |||
199 | /* Following are specific to S5PV210 */ | ||
200 | #define S5PV210_UCON_CLKMASK (1<<10) | ||
201 | #define S5PV210_UCON_CLKSHIFT (10) | ||
202 | #define S5PV210_UCON_PCLK (0<<10) | ||
203 | #define S5PV210_UCON_UCLK (1<<10) | ||
204 | |||
205 | #define S5PV210_UFCON_TXTRIG0 (0<<8) | ||
206 | #define S5PV210_UFCON_TXTRIG4 (1<<8) | ||
207 | #define S5PV210_UFCON_TXTRIG8 (2<<8) | ||
208 | #define S5PV210_UFCON_TXTRIG16 (3<<8) | ||
209 | #define S5PV210_UFCON_TXTRIG32 (4<<8) | ||
210 | #define S5PV210_UFCON_TXTRIG64 (5<<8) | ||
211 | #define S5PV210_UFCON_TXTRIG128 (6<<8) | ||
212 | #define S5PV210_UFCON_TXTRIG256 (7<<8) | ||
213 | |||
214 | #define S5PV210_UFCON_RXTRIG1 (0<<4) | ||
215 | #define S5PV210_UFCON_RXTRIG4 (1<<4) | ||
216 | #define S5PV210_UFCON_RXTRIG8 (2<<4) | ||
217 | #define S5PV210_UFCON_RXTRIG16 (3<<4) | ||
218 | #define S5PV210_UFCON_RXTRIG32 (4<<4) | ||
219 | #define S5PV210_UFCON_RXTRIG64 (5<<4) | ||
220 | #define S5PV210_UFCON_RXTRIG128 (6<<4) | ||
221 | #define S5PV210_UFCON_RXTRIG256 (7<<4) | ||
222 | |||
223 | #define S5PV210_UFSTAT_TXFULL (1<<24) | ||
224 | #define S5PV210_UFSTAT_RXFULL (1<<8) | ||
225 | #define S5PV210_UFSTAT_TXMASK (255<<16) | ||
226 | #define S5PV210_UFSTAT_TXSHIFT (16) | ||
227 | #define S5PV210_UFSTAT_RXMASK (255<<0) | ||
228 | #define S5PV210_UFSTAT_RXSHIFT (0) | ||
229 | |||
230 | #define S3C2410_UCON_CLKSEL0 (1 << 0) | ||
231 | #define S3C2410_UCON_CLKSEL1 (1 << 1) | ||
232 | #define S3C2410_UCON_CLKSEL2 (1 << 2) | ||
233 | #define S3C2410_UCON_CLKSEL3 (1 << 3) | ||
234 | |||
235 | /* Default values for s5pv210 UCON and UFCON uart registers */ | ||
236 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
237 | S3C2410_UCON_RXILEVEL | \ | ||
238 | S3C2410_UCON_TXIRQMODE | \ | ||
239 | S3C2410_UCON_RXIRQMODE | \ | ||
240 | S3C2410_UCON_RXFIFO_TOI | \ | ||
241 | S3C2443_UCON_RXERR_IRQEN) | ||
242 | |||
243 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
244 | S5PV210_UFCON_TXTRIG4 | \ | ||
245 | S5PV210_UFCON_RXTRIG4) | ||
246 | |||
247 | #ifndef __ASSEMBLY__ | ||
248 | |||
249 | /* configuration structure for per-machine configurations for the | ||
250 | * serial port | ||
251 | * | ||
252 | * the pointer is setup by the machine specific initialisation from the | ||
253 | * arch/arm/mach-s3c2410/ directory. | ||
254 | */ | ||
255 | |||
256 | struct s3c2410_uartcfg { | ||
257 | unsigned char hwport; /* hardware port number */ | ||
258 | unsigned char unused; | ||
259 | unsigned short flags; | ||
260 | upf_t uart_flags; /* default uart flags */ | ||
261 | unsigned int clk_sel; | ||
262 | |||
263 | unsigned int has_fracval; | ||
264 | |||
265 | unsigned long ucon; /* value of ucon for port */ | ||
266 | unsigned long ulcon; /* value of ulcon for port */ | ||
267 | unsigned long ufcon; /* value of ufcon for port */ | ||
268 | }; | ||
269 | |||
270 | /* s3c24xx_uart_devs | ||
271 | * | ||
272 | * this is exported from the core as we cannot use driver_register(), | ||
273 | * or platform_add_device() before the console_initcall() | ||
274 | */ | ||
275 | |||
276 | extern struct platform_device *s3c24xx_uart_devs[4]; | ||
277 | |||
278 | #endif /* __ASSEMBLY__ */ | ||
279 | |||
280 | #endif /* __ASM_ARM_REGS_SERIAL_H */ | ||
281 | |||
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c index da2f319fb71d..e70cadec7ce6 100644 --- a/arch/ia64/hp/sim/simserial.c +++ b/arch/ia64/hp/sim/simserial.c | |||
@@ -142,8 +142,7 @@ static void transmit_chars(struct tty_struct *tty, struct serial_state *info, | |||
142 | goto out; | 142 | goto out; |
143 | } | 143 | } |
144 | 144 | ||
145 | if (info->xmit.head == info->xmit.tail || tty->stopped || | 145 | if (info->xmit.head == info->xmit.tail || tty->stopped) { |
146 | tty->hw_stopped) { | ||
147 | #ifdef SIMSERIAL_DEBUG | 146 | #ifdef SIMSERIAL_DEBUG |
148 | printk("transmit_chars: head=%d, tail=%d, stopped=%d\n", | 147 | printk("transmit_chars: head=%d, tail=%d, stopped=%d\n", |
149 | info->xmit.head, info->xmit.tail, tty->stopped); | 148 | info->xmit.head, info->xmit.tail, tty->stopped); |
@@ -181,7 +180,7 @@ static void rs_flush_chars(struct tty_struct *tty) | |||
181 | struct serial_state *info = tty->driver_data; | 180 | struct serial_state *info = tty->driver_data; |
182 | 181 | ||
183 | if (info->xmit.head == info->xmit.tail || tty->stopped || | 182 | if (info->xmit.head == info->xmit.tail || tty->stopped || |
184 | tty->hw_stopped || !info->xmit.buf) | 183 | !info->xmit.buf) |
185 | return; | 184 | return; |
186 | 185 | ||
187 | transmit_chars(tty, info, NULL); | 186 | transmit_chars(tty, info, NULL); |
@@ -217,7 +216,7 @@ static int rs_write(struct tty_struct * tty, | |||
217 | * Hey, we transmit directly from here in our case | 216 | * Hey, we transmit directly from here in our case |
218 | */ | 217 | */ |
219 | if (CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) && | 218 | if (CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) && |
220 | !tty->stopped && !tty->hw_stopped) | 219 | !tty->stopped) |
221 | transmit_chars(tty, info, NULL); | 220 | transmit_chars(tty, info, NULL); |
222 | 221 | ||
223 | return ret; | 222 | return ret; |
@@ -325,14 +324,6 @@ static int rs_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) | |||
325 | 324 | ||
326 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) | 325 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) |
327 | 326 | ||
328 | static void rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios) | ||
329 | { | ||
330 | /* Handle turning off CRTSCTS */ | ||
331 | if ((old_termios->c_cflag & CRTSCTS) && | ||
332 | !(tty->termios.c_cflag & CRTSCTS)) { | ||
333 | tty->hw_stopped = 0; | ||
334 | } | ||
335 | } | ||
336 | /* | 327 | /* |
337 | * This routine will shutdown a serial port; interrupts are disabled, and | 328 | * This routine will shutdown a serial port; interrupts are disabled, and |
338 | * DTR is dropped if the hangup on close termio flag is on. | 329 | * DTR is dropped if the hangup on close termio flag is on. |
@@ -481,7 +472,6 @@ static const struct tty_operations hp_ops = { | |||
481 | .throttle = rs_throttle, | 472 | .throttle = rs_throttle, |
482 | .unthrottle = rs_unthrottle, | 473 | .unthrottle = rs_unthrottle, |
483 | .send_xchar = rs_send_xchar, | 474 | .send_xchar = rs_send_xchar, |
484 | .set_termios = rs_set_termios, | ||
485 | .hangup = rs_hangup, | 475 | .hangup = rs_hangup, |
486 | .proc_fops = &rs_proc_fops, | 476 | .proc_fops = &rs_proc_fops, |
487 | }; | 477 | }; |
diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c index 80b47cb71e0a..acbe6c67afba 100644 --- a/arch/um/drivers/chan_kern.c +++ b/arch/um/drivers/chan_kern.c | |||
@@ -568,11 +568,7 @@ void chan_interrupt(struct line *line, int irq) | |||
568 | reactivate_fd(chan->fd, irq); | 568 | reactivate_fd(chan->fd, irq); |
569 | if (err == -EIO) { | 569 | if (err == -EIO) { |
570 | if (chan->primary) { | 570 | if (chan->primary) { |
571 | struct tty_struct *tty = tty_port_tty_get(&line->port); | 571 | tty_port_tty_hangup(&line->port, false); |
572 | if (tty != NULL) { | ||
573 | tty_hangup(tty); | ||
574 | tty_kref_put(tty); | ||
575 | } | ||
576 | if (line->chan_out != chan) | 572 | if (line->chan_out != chan) |
577 | close_one_chan(line->chan_out, 1); | 573 | close_one_chan(line->chan_out, 1); |
578 | } | 574 | } |
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index be541cf69fd2..8035145f043b 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c | |||
@@ -248,7 +248,6 @@ static irqreturn_t line_write_interrupt(int irq, void *data) | |||
248 | { | 248 | { |
249 | struct chan *chan = data; | 249 | struct chan *chan = data; |
250 | struct line *line = chan->line; | 250 | struct line *line = chan->line; |
251 | struct tty_struct *tty; | ||
252 | int err; | 251 | int err; |
253 | 252 | ||
254 | /* | 253 | /* |
@@ -267,12 +266,7 @@ static irqreturn_t line_write_interrupt(int irq, void *data) | |||
267 | } | 266 | } |
268 | spin_unlock(&line->lock); | 267 | spin_unlock(&line->lock); |
269 | 268 | ||
270 | tty = tty_port_tty_get(&line->port); | 269 | tty_port_tty_wakeup(&line->port); |
271 | if (tty == NULL) | ||
272 | return IRQ_NONE; | ||
273 | |||
274 | tty_wakeup(tty); | ||
275 | tty_kref_put(tty); | ||
276 | 270 | ||
277 | return IRQ_HANDLED; | 271 | return IRQ_HANDLED; |
278 | } | 272 | } |