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authorViresh Kumar <viresh.kumar@linaro.org>2013-03-30 06:55:15 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-06-04 08:25:59 -0400
commit5070158804b5339c71809f5e673cea1cfacd804d (patch)
tree42256e81e326af4e568a179787e66d434a0b1ffc /arch
parent2361be23666232dbb4851a527f466c4cbf5340fc (diff)
cpufreq: rename index as driver_data in cpufreq_frequency_table
The "index" field of struct cpufreq_frequency_table was never an index and isn't used at all by the cpufreq core. It only is useful for cpufreq drivers for their internal purposes. Many people nowadays blindly set it in ascending order with the assumption that the core will use it, which is a mistake. Rename it to "driver_data" as that's what its purpose is. All of its users are updated accordingly. [rjw: Changelog] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-davinci/da850.c8
-rw-r--r--arch/arm/mach-s3c24xx/cpufreq-utils.c2
-rw-r--r--arch/arm/mach-s3c24xx/cpufreq.c4
-rw-r--r--arch/arm/mach-s3c24xx/pll-s3c2410.c54
-rw-r--r--arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c54
-rw-r--r--arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c110
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c6
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu-freq-core.h2
-rw-r--r--arch/mips/loongson/lemote-2f/clock.c3
-rw-r--r--arch/powerpc/platforms/pasemi/cpufreq.c5
10 files changed, 125 insertions, 123 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4d6933848abf..a0d4f6038b60 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1004,7 +1004,7 @@ static const struct da850_opp da850_opp_96 = {
1004 1004
1005#define OPP(freq) \ 1005#define OPP(freq) \
1006 { \ 1006 { \
1007 .index = (unsigned int) &da850_opp_##freq, \ 1007 .driver_data = (unsigned int) &da850_opp_##freq, \
1008 .frequency = freq * 1000, \ 1008 .frequency = freq * 1000, \
1009 } 1009 }
1010 1010
@@ -1016,7 +1016,7 @@ static struct cpufreq_frequency_table da850_freq_table[] = {
1016 OPP(200), 1016 OPP(200),
1017 OPP(96), 1017 OPP(96),
1018 { 1018 {
1019 .index = 0, 1019 .driver_data = 0,
1020 .frequency = CPUFREQ_TABLE_END, 1020 .frequency = CPUFREQ_TABLE_END,
1021 }, 1021 },
1022}; 1022};
@@ -1044,7 +1044,7 @@ static int da850_set_voltage(unsigned int index)
1044 if (!cvdd) 1044 if (!cvdd)
1045 return -ENODEV; 1045 return -ENODEV;
1046 1046
1047 opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; 1047 opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
1048 1048
1049 return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max); 1049 return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);
1050} 1050}
@@ -1125,7 +1125,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index)
1125 struct pll_data *pll = clk->pll_data; 1125 struct pll_data *pll = clk->pll_data;
1126 int ret; 1126 int ret;
1127 1127
1128 opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; 1128 opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
1129 prediv = opp->prediv; 1129 prediv = opp->prediv;
1130 mult = opp->mult; 1130 mult = opp->mult;
1131 postdiv = opp->postdiv; 1131 postdiv = opp->postdiv;
diff --git a/arch/arm/mach-s3c24xx/cpufreq-utils.c b/arch/arm/mach-s3c24xx/cpufreq-utils.c
index ddd8280e3875..2a0aa5684e72 100644
--- a/arch/arm/mach-s3c24xx/cpufreq-utils.c
+++ b/arch/arm/mach-s3c24xx/cpufreq-utils.c
@@ -60,5 +60,5 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
60 */ 60 */
61void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) 61void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
62{ 62{
63 __raw_writel(cfg->pll.index, S3C2410_MPLLCON); 63 __raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON);
64} 64}
diff --git a/arch/arm/mach-s3c24xx/cpufreq.c b/arch/arm/mach-s3c24xx/cpufreq.c
index 3c0e78ede0da..3513e7477160 100644
--- a/arch/arm/mach-s3c24xx/cpufreq.c
+++ b/arch/arm/mach-s3c24xx/cpufreq.c
@@ -70,7 +70,7 @@ static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
70 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); 70 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
71 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); 71 cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
72 72
73 cfg->pll.index = __raw_readl(S3C2410_MPLLCON); 73 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);
74 cfg->pll.frequency = fclk; 74 cfg->pll.frequency = fclk;
75 75
76 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); 76 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
@@ -431,7 +431,7 @@ static unsigned int suspend_freq;
431static int s3c_cpufreq_suspend(struct cpufreq_policy *policy) 431static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
432{ 432{
433 suspend_pll.frequency = clk_get_rate(_clk_mpll); 433 suspend_pll.frequency = clk_get_rate(_clk_mpll);
434 suspend_pll.index = __raw_readl(S3C2410_MPLLCON); 434 suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);
435 suspend_freq = s3c_cpufreq_get(0) * 1000; 435 suspend_freq = s3c_cpufreq_get(0) * 1000;
436 436
437 return 0; 437 return 0;
diff --git a/arch/arm/mach-s3c24xx/pll-s3c2410.c b/arch/arm/mach-s3c24xx/pll-s3c2410.c
index dcf3420a3271..5e37d368594b 100644
--- a/arch/arm/mach-s3c24xx/pll-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/pll-s3c2410.c
@@ -33,36 +33,36 @@
33#include <plat/cpu-freq-core.h> 33#include <plat/cpu-freq-core.h>
34 34
35static struct cpufreq_frequency_table pll_vals_12MHz[] = { 35static struct cpufreq_frequency_table pll_vals_12MHz[] = {
36 { .frequency = 34000000, .index = PLLVAL(82, 2, 3), }, 36 { .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), },
37 { .frequency = 45000000, .index = PLLVAL(82, 1, 3), }, 37 { .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), },
38 { .frequency = 51000000, .index = PLLVAL(161, 3, 3), }, 38 { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
39 { .frequency = 48000000, .index = PLLVAL(120, 2, 3), }, 39 { .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), },
40 { .frequency = 56000000, .index = PLLVAL(142, 2, 3), }, 40 { .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), },
41 { .frequency = 68000000, .index = PLLVAL(82, 2, 2), }, 41 { .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), },
42 { .frequency = 79000000, .index = PLLVAL(71, 1, 2), }, 42 { .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), },
43 { .frequency = 85000000, .index = PLLVAL(105, 2, 2), }, 43 { .frequency = 85000000, .driver_data = PLLVAL(105, 2, 2), },
44 { .frequency = 90000000, .index = PLLVAL(112, 2, 2), }, 44 { .frequency = 90000000, .driver_data = PLLVAL(112, 2, 2), },
45 { .frequency = 101000000, .index = PLLVAL(127, 2, 2), }, 45 { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2), },
46 { .frequency = 113000000, .index = PLLVAL(105, 1, 2), }, 46 { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2), },
47 { .frequency = 118000000, .index = PLLVAL(150, 2, 2), }, 47 { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2), },
48 { .frequency = 124000000, .index = PLLVAL(116, 1, 2), }, 48 { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2), },
49 { .frequency = 135000000, .index = PLLVAL(82, 2, 1), }, 49 { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1), },
50 { .frequency = 147000000, .index = PLLVAL(90, 2, 1), }, 50 { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1), },
51 { .frequency = 152000000, .index = PLLVAL(68, 1, 1), }, 51 { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1), },
52 { .frequency = 158000000, .index = PLLVAL(71, 1, 1), }, 52 { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1), },
53 { .frequency = 170000000, .index = PLLVAL(77, 1, 1), }, 53 { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1), },
54 { .frequency = 180000000, .index = PLLVAL(82, 1, 1), }, 54 { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1), },
55 { .frequency = 186000000, .index = PLLVAL(85, 1, 1), }, 55 { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1), },
56 { .frequency = 192000000, .index = PLLVAL(88, 1, 1), }, 56 { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1), },
57 { .frequency = 203000000, .index = PLLVAL(161, 3, 1), }, 57 { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1), },
58 58
59 /* 2410A extras */ 59 /* 2410A extras */
60 60
61 { .frequency = 210000000, .index = PLLVAL(132, 2, 1), }, 61 { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1), },
62 { .frequency = 226000000, .index = PLLVAL(105, 1, 1), }, 62 { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1), },
63 { .frequency = 266000000, .index = PLLVAL(125, 1, 1), }, 63 { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1), },
64 { .frequency = 268000000, .index = PLLVAL(126, 1, 1), }, 64 { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1), },
65 { .frequency = 270000000, .index = PLLVAL(127, 1, 1), }, 65 { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1), },
66}; 66};
67 67
68static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif) 68static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c b/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
index 673781758319..a19460e6e7b0 100644
--- a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
+++ b/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
@@ -21,33 +21,33 @@
21#include <plat/cpu-freq-core.h> 21#include <plat/cpu-freq-core.h>
22 22
23static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = { 23static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
24 { .frequency = 75000000, .index = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */ 24 { .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
25 { .frequency = 80000000, .index = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */ 25 { .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */
26 { .frequency = 90000000, .index = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */ 26 { .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */
27 { .frequency = 100000000, .index = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */ 27 { .frequency = 100000000, .driver_data = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */
28 { .frequency = 110000000, .index = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */ 28 { .frequency = 110000000, .driver_data = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */
29 { .frequency = 120000000, .index = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */ 29 { .frequency = 120000000, .driver_data = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */
30 { .frequency = 150000000, .index = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */ 30 { .frequency = 150000000, .driver_data = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */
31 { .frequency = 160000000, .index = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */ 31 { .frequency = 160000000, .driver_data = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */
32 { .frequency = 170000000, .index = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */ 32 { .frequency = 170000000, .driver_data = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */
33 { .frequency = 180000000, .index = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */ 33 { .frequency = 180000000, .driver_data = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */
34 { .frequency = 190000000, .index = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */ 34 { .frequency = 190000000, .driver_data = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */
35 { .frequency = 200000000, .index = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */ 35 { .frequency = 200000000, .driver_data = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */
36 { .frequency = 210000000, .index = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */ 36 { .frequency = 210000000, .driver_data = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */
37 { .frequency = 220000000, .index = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */ 37 { .frequency = 220000000, .driver_data = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */
38 { .frequency = 230000000, .index = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */ 38 { .frequency = 230000000, .driver_data = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */
39 { .frequency = 240000000, .index = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */ 39 { .frequency = 240000000, .driver_data = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */
40 { .frequency = 300000000, .index = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */ 40 { .frequency = 300000000, .driver_data = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */
41 { .frequency = 310000000, .index = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */ 41 { .frequency = 310000000, .driver_data = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */
42 { .frequency = 320000000, .index = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */ 42 { .frequency = 320000000, .driver_data = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */
43 { .frequency = 330000000, .index = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */ 43 { .frequency = 330000000, .driver_data = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */
44 { .frequency = 340000000, .index = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */ 44 { .frequency = 340000000, .driver_data = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */
45 { .frequency = 350000000, .index = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */ 45 { .frequency = 350000000, .driver_data = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */
46 { .frequency = 360000000, .index = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */ 46 { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */
47 { .frequency = 370000000, .index = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */ 47 { .frequency = 370000000, .driver_data = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */
48 { .frequency = 380000000, .index = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */ 48 { .frequency = 380000000, .driver_data = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */
49 { .frequency = 390000000, .index = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */ 49 { .frequency = 390000000, .driver_data = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */
50 { .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ 50 { .frequency = 400000000, .driver_data = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */
51}; 51};
52 52
53static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif) 53static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif)
diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c b/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
index debfa106289b..1191b2905625 100644
--- a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
+++ b/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
@@ -21,61 +21,61 @@
21#include <plat/cpu-freq-core.h> 21#include <plat/cpu-freq-core.h>
22 22
23static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = { 23static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
24 { .frequency = 78019200, .index = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */ 24 { .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
25 { .frequency = 84067200, .index = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */ 25 { .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */
26 { .frequency = 90115200, .index = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */ 26 { .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */
27 { .frequency = 96163200, .index = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */ 27 { .frequency = 96163200, .driver_data = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */
28 { .frequency = 102135600, .index = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */ 28 { .frequency = 102135600, .driver_data = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */
29 { .frequency = 108259200, .index = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */ 29 { .frequency = 108259200, .driver_data = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */
30 { .frequency = 114307200, .index = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */ 30 { .frequency = 114307200, .driver_data = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */
31 { .frequency = 120234240, .index = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */ 31 { .frequency = 120234240, .driver_data = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */
32 { .frequency = 126161280, .index = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */ 32 { .frequency = 126161280, .driver_data = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */
33 { .frequency = 132088320, .index = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */ 33 { .frequency = 132088320, .driver_data = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */
34 { .frequency = 138015360, .index = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */ 34 { .frequency = 138015360, .driver_data = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */
35 { .frequency = 144789120, .index = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */ 35 { .frequency = 144789120, .driver_data = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */
36 { .frequency = 150100363, .index = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */ 36 { .frequency = 150100363, .driver_data = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */
37 { .frequency = 156038400, .index = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */ 37 { .frequency = 156038400, .driver_data = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */
38 { .frequency = 162086400, .index = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */ 38 { .frequency = 162086400, .driver_data = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */
39 { .frequency = 168134400, .index = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */ 39 { .frequency = 168134400, .driver_data = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */
40 { .frequency = 174048000, .index = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */ 40 { .frequency = 174048000, .driver_data = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */
41 { .frequency = 180230400, .index = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */ 41 { .frequency = 180230400, .driver_data = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */
42 { .frequency = 186278400, .index = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */ 42 { .frequency = 186278400, .driver_data = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */
43 { .frequency = 192326400, .index = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */ 43 { .frequency = 192326400, .driver_data = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */
44 { .frequency = 198132480, .index = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */ 44 { .frequency = 198132480, .driver_data = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */
45 { .frequency = 204271200, .index = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */ 45 { .frequency = 204271200, .driver_data = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */
46 { .frequency = 210268800, .index = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */ 46 { .frequency = 210268800, .driver_data = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */
47 { .frequency = 216518400, .index = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */ 47 { .frequency = 216518400, .driver_data = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */
48 { .frequency = 222264000, .index = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */ 48 { .frequency = 222264000, .driver_data = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */
49 { .frequency = 228614400, .index = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */ 49 { .frequency = 228614400, .driver_data = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */
50 { .frequency = 234259200, .index = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */ 50 { .frequency = 234259200, .driver_data = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */
51 { .frequency = 240468480, .index = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */ 51 { .frequency = 240468480, .driver_data = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */
52 { .frequency = 246960000, .index = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */ 52 { .frequency = 246960000, .driver_data = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */
53 { .frequency = 252322560, .index = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */ 53 { .frequency = 252322560, .driver_data = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */
54 { .frequency = 258249600, .index = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */ 54 { .frequency = 258249600, .driver_data = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */
55 { .frequency = 264176640, .index = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */ 55 { .frequency = 264176640, .driver_data = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */
56 { .frequency = 270950400, .index = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */ 56 { .frequency = 270950400, .driver_data = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */
57 { .frequency = 276030720, .index = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */ 57 { .frequency = 276030720, .driver_data = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */
58 { .frequency = 282240000, .index = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */ 58 { .frequency = 282240000, .driver_data = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */
59 { .frequency = 289578240, .index = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */ 59 { .frequency = 289578240, .driver_data = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */
60 { .frequency = 294235200, .index = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */ 60 { .frequency = 294235200, .driver_data = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */
61 { .frequency = 300200727, .index = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */ 61 { .frequency = 300200727, .driver_data = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */
62 { .frequency = 306358690, .index = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */ 62 { .frequency = 306358690, .driver_data = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */
63 { .frequency = 312076800, .index = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */ 63 { .frequency = 312076800, .driver_data = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */
64 { .frequency = 318366720, .index = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */ 64 { .frequency = 318366720, .driver_data = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */
65 { .frequency = 324172800, .index = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */ 65 { .frequency = 324172800, .driver_data = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */
66 { .frequency = 330220800, .index = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */ 66 { .frequency = 330220800, .driver_data = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */
67 { .frequency = 336268800, .index = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */ 67 { .frequency = 336268800, .driver_data = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */
68 { .frequency = 342074880, .index = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */ 68 { .frequency = 342074880, .driver_data = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */
69 { .frequency = 348096000, .index = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */ 69 { .frequency = 348096000, .driver_data = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */
70 { .frequency = 355622400, .index = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */ 70 { .frequency = 355622400, .driver_data = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */
71 { .frequency = 360460800, .index = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */ 71 { .frequency = 360460800, .driver_data = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */
72 { .frequency = 366206400, .index = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */ 72 { .frequency = 366206400, .driver_data = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */
73 { .frequency = 372556800, .index = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */ 73 { .frequency = 372556800, .driver_data = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */
74 { .frequency = 378201600, .index = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */ 74 { .frequency = 378201600, .driver_data = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */
75 { .frequency = 384652800, .index = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */ 75 { .frequency = 384652800, .driver_data = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */
76 { .frequency = 391608000, .index = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */ 76 { .frequency = 391608000, .driver_data = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */
77 { .frequency = 396264960, .index = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */ 77 { .frequency = 396264960, .driver_data = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */
78 { .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ 78 { .frequency = 402192000, .driver_data = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */
79}; 79};
80 80
81static int s3c2440_plls169344_add(struct device *dev, 81static int s3c2440_plls169344_add(struct device *dev,
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 7e105932c09d..5390c6bbbc02 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -142,15 +142,15 @@ static void pllc2_table_rebuild(struct clk *clk)
142 /* Initialise PLLC2 frequency table */ 142 /* Initialise PLLC2 frequency table */
143 for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) { 143 for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) {
144 pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2; 144 pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2;
145 pllc2_freq_table[i].index = i; 145 pllc2_freq_table[i].driver_data = i;
146 } 146 }
147 147
148 /* This is a special entry - switching PLL off makes it a repeater */ 148 /* This is a special entry - switching PLL off makes it a repeater */
149 pllc2_freq_table[i].frequency = clk->parent->rate; 149 pllc2_freq_table[i].frequency = clk->parent->rate;
150 pllc2_freq_table[i].index = i; 150 pllc2_freq_table[i].driver_data = i;
151 151
152 pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END; 152 pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END;
153 pllc2_freq_table[i].index = i; 153 pllc2_freq_table[i].driver_data = i;
154} 154}
155 155
156static unsigned long pllc2_recalc(struct clk *clk) 156static unsigned long pllc2_recalc(struct clk *clk)
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index 95509d8eb140..a8a760ddfae1 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -285,7 +285,7 @@ static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table *table,
285 s3c_freq_dbg("%s: { %d = %u kHz }\n", 285 s3c_freq_dbg("%s: { %d = %u kHz }\n",
286 __func__, index, freq); 286 __func__, index, freq);
287 287
288 table[index].index = index; 288 table[index].driver_data = index;
289 table[index].frequency = freq; 289 table[index].frequency = freq;
290 } 290 }
291 291
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c
index bc739d4bab2e..4dc2f5fa3f67 100644
--- a/arch/mips/loongson/lemote-2f/clock.c
+++ b/arch/mips/loongson/lemote-2f/clock.c
@@ -121,7 +121,8 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
121 clk->rate = rate; 121 clk->rate = rate;
122 122
123 regval = LOONGSON_CHIPCFG0; 123 regval = LOONGSON_CHIPCFG0;
124 regval = (regval & ~0x7) | (loongson2_clockmod_table[i].index - 1); 124 regval = (regval & ~0x7) |
125 (loongson2_clockmod_table[i].driver_data - 1);
125 LOONGSON_CHIPCFG0 = regval; 126 LOONGSON_CHIPCFG0 = regval;
126 127
127 return ret; 128 return ret;
diff --git a/arch/powerpc/platforms/pasemi/cpufreq.c b/arch/powerpc/platforms/pasemi/cpufreq.c
index be1e7958909e..b704da404067 100644
--- a/arch/powerpc/platforms/pasemi/cpufreq.c
+++ b/arch/powerpc/platforms/pasemi/cpufreq.c
@@ -204,7 +204,8 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
204 204
205 /* initialize frequency table */ 205 /* initialize frequency table */
206 for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) { 206 for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
207 pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000; 207 pas_freqs[i].frequency =
208 get_astate_freq(pas_freqs[i].driver_data) * 100000;
208 pr_debug("%d: %d\n", i, pas_freqs[i].frequency); 209 pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
209 } 210 }
210 211
@@ -280,7 +281,7 @@ static int pas_cpufreq_target(struct cpufreq_policy *policy,
280 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n", 281 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
281 policy->cpu, 282 policy->cpu,
282 pas_freqs[pas_astate_new].frequency, 283 pas_freqs[pas_astate_new].frequency,
283 pas_freqs[pas_astate_new].index); 284 pas_freqs[pas_astate_new].driver_data);
284 285
285 current_astate = pas_astate_new; 286 current_astate = pas_astate_new;
286 287