diff options
author | David Daney <david.daney@cavium.com> | 2011-09-23 20:29:55 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-10-24 18:34:26 -0400 |
commit | 4d36f59d876d431c3d7b98dc8a1164d70273da55 (patch) | |
tree | 0c8213b54eeedaff9ebcd4db2b1ed7841dd02f70 /arch | |
parent | a1431b61a874cc1e11a3a8d59a08144eb34ae9eb (diff) |
MIPS: Add accessor macros for 64-bit performance counter registers.
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/mipsregs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 6a6f8a8f542d..2ea7b817feb8 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
@@ -1006,18 +1006,26 @@ do { \ | |||
1006 | #define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val) | 1006 | #define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val) |
1007 | #define read_c0_perfcntr0() __read_32bit_c0_register($25, 1) | 1007 | #define read_c0_perfcntr0() __read_32bit_c0_register($25, 1) |
1008 | #define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val) | 1008 | #define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val) |
1009 | #define read_c0_perfcntr0_64() __read_64bit_c0_register($25, 1) | ||
1010 | #define write_c0_perfcntr0_64(val) __write_64bit_c0_register($25, 1, val) | ||
1009 | #define read_c0_perfctrl1() __read_32bit_c0_register($25, 2) | 1011 | #define read_c0_perfctrl1() __read_32bit_c0_register($25, 2) |
1010 | #define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val) | 1012 | #define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val) |
1011 | #define read_c0_perfcntr1() __read_32bit_c0_register($25, 3) | 1013 | #define read_c0_perfcntr1() __read_32bit_c0_register($25, 3) |
1012 | #define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val) | 1014 | #define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val) |
1015 | #define read_c0_perfcntr1_64() __read_64bit_c0_register($25, 3) | ||
1016 | #define write_c0_perfcntr1_64(val) __write_64bit_c0_register($25, 3, val) | ||
1013 | #define read_c0_perfctrl2() __read_32bit_c0_register($25, 4) | 1017 | #define read_c0_perfctrl2() __read_32bit_c0_register($25, 4) |
1014 | #define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val) | 1018 | #define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val) |
1015 | #define read_c0_perfcntr2() __read_32bit_c0_register($25, 5) | 1019 | #define read_c0_perfcntr2() __read_32bit_c0_register($25, 5) |
1016 | #define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val) | 1020 | #define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val) |
1021 | #define read_c0_perfcntr2_64() __read_64bit_c0_register($25, 5) | ||
1022 | #define write_c0_perfcntr2_64(val) __write_64bit_c0_register($25, 5, val) | ||
1017 | #define read_c0_perfctrl3() __read_32bit_c0_register($25, 6) | 1023 | #define read_c0_perfctrl3() __read_32bit_c0_register($25, 6) |
1018 | #define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val) | 1024 | #define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val) |
1019 | #define read_c0_perfcntr3() __read_32bit_c0_register($25, 7) | 1025 | #define read_c0_perfcntr3() __read_32bit_c0_register($25, 7) |
1020 | #define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val) | 1026 | #define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val) |
1027 | #define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7) | ||
1028 | #define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val) | ||
1021 | 1029 | ||
1022 | /* RM9000 PerfCount performance counter register */ | 1030 | /* RM9000 PerfCount performance counter register */ |
1023 | #define read_c0_perfcount() __read_64bit_c0_register($25, 0) | 1031 | #define read_c0_perfcount() __read_64bit_c0_register($25, 0) |