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authorJayachandran C <jchandra@broadcom.com>2013-08-11 05:13:54 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-09-03 17:22:19 -0400
commit4ca86a2ff37ce92b6875a184a97a20188704cb6c (patch)
treebb9b5608a7031cd64a5f24dfcd1abdebaf44507e /arch
parent13314a91f0588546023570cfc9a1cf4ca5027c75 (diff)
MIPS: Netlogic: Add support for XLP2XX
XLP2XX is first in the series of 28nm XLPII processors. The changes are to: * Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c. * Add a cpu_is_xlpii() function to check for XLPII processors. * Update xlp_mmu_init() to use config4 to enable extended TLB. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5698/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/cpu.h1
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/xlp.h7
-rw-r--r--arch/mips/kernel/cpu-probe.c5
-rw-r--r--arch/mips/netlogic/xlp/setup.c27
4 files changed, 33 insertions, 7 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index c19861518c32..71b9f1998be7 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -179,6 +179,7 @@
179 179
180#define PRID_IMP_NETLOGIC_XLP8XX 0x1000 180#define PRID_IMP_NETLOGIC_XLP8XX 0x1000
181#define PRID_IMP_NETLOGIC_XLP3XX 0x1100 181#define PRID_IMP_NETLOGIC_XLP3XX 0x1100
182#define PRID_IMP_NETLOGIC_XLP2XX 0x1200
182 183
183/* 184/*
184 * Definitions for 7:0 on legacy processors 185 * Definitions for 7:0 on legacy processors
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
index d59cdd69496b..7a4a5142bbc5 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
@@ -64,5 +64,12 @@ int xlp_get_dram_map(int n, uint64_t *dram_map);
64/* Device tree related */ 64/* Device tree related */
65void *xlp_dt_init(void *fdtp); 65void *xlp_dt_init(void *fdtp);
66 66
67static inline int cpu_is_xlpii(void)
68{
69 int chip = read_c0_prid() & 0xff00;
70
71 return chip == PRID_IMP_NETLOGIC_XLP2XX;
72}
73
67#endif /* !__ASSEMBLY__ */ 74#endif /* !__ASSEMBLY__ */
68#endif /* _ASM_NLM_XLP_H */ 75#endif /* _ASM_NLM_XLP_H */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 8e8feb851f6b..37663c7862a5 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -906,6 +906,11 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
906 MIPS_CPU_LLSC); 906 MIPS_CPU_LLSC);
907 907
908 switch (c->processor_id & 0xff00) { 908 switch (c->processor_id & 0xff00) {
909 case PRID_IMP_NETLOGIC_XLP2XX:
910 c->cputype = CPU_XLP;
911 __cpu_name[cpu] = "Broadcom XLPII";
912 break;
913
909 case PRID_IMP_NETLOGIC_XLP8XX: 914 case PRID_IMP_NETLOGIC_XLP8XX:
910 case PRID_IMP_NETLOGIC_XLP3XX: 915 case PRID_IMP_NETLOGIC_XLP3XX:
911 c->cputype = CPU_XLP; 916 c->cputype = CPU_XLP;
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 7718368e4598..76a7131e486e 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -110,7 +110,12 @@ void __init plat_mem_setup(void)
110 110
111const char *get_system_type(void) 111const char *get_system_type(void)
112{ 112{
113 return "Netlogic XLP Series"; 113 switch (read_c0_prid() & 0xff00) {
114 case PRID_IMP_NETLOGIC_XLP2XX:
115 return "Broadcom XLPII Series";
116 default:
117 return "Netlogic XLP Series";
118 }
114} 119}
115 120
116void __init prom_free_prom_memory(void) 121void __init prom_free_prom_memory(void)
@@ -120,12 +125,20 @@ void __init prom_free_prom_memory(void)
120 125
121void xlp_mmu_init(void) 126void xlp_mmu_init(void)
122{ 127{
123 /* enable extended TLB and Large Fixed TLB */ 128 u32 conf4;
124 write_c0_config6(read_c0_config6() | 0x24); 129
125 130 if (cpu_is_xlpii()) {
126 /* set page mask of Fixed TLB in config7 */ 131 /* XLPII series has extended pagesize in config 4 */
127 write_c0_config7(PM_DEFAULT_MASK >> 132 conf4 = read_c0_config4() & ~0x1f00u;
128 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2))); 133 write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
134 } else {
135 /* enable extended TLB and Large Fixed TLB */
136 write_c0_config6(read_c0_config6() | 0x24);
137
138 /* set page mask of extended Fixed TLB in config7 */
139 write_c0_config7(PM_DEFAULT_MASK >>
140 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
141 }
129} 142}
130 143
131void nlm_percpu_init(int hwcpuid) 144void nlm_percpu_init(int hwcpuid)