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authorJeff Garzik <jgarzik@pobox.com>2005-11-20 01:05:35 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-20 01:05:35 -0500
commit4af452bd03ec73efb1d3bf560d6d22b12d96752e (patch)
tree25b79c5aa3f35da523b4a1f89e7734070a8931ce /arch
parent625876f32ed63af262db3d0ac8178d2c0f510636 (diff)
parent3bedff1d73b86e0cf52634efb447e9ada08f2cc6 (diff)
Merge branch 'master'
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/armksyms.c1
-rw-r--r--arch/arm/kernel/entry-common.S3
-rw-r--r--arch/arm/kernel/signal.c25
-rw-r--r--arch/arm/kernel/vmlinux.lds.S6
-rw-r--r--arch/arm/lib/getuser.S11
-rw-r--r--arch/arm/mm/Makefile2
-rw-r--r--arch/arm/mm/blockops.c185
-rw-r--r--arch/arm/mm/init.c24
-rw-r--r--arch/arm/mm/ioremap.c3
-rw-r--r--arch/powerpc/kernel/pci_64.c18
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c3
-rw-r--r--arch/powerpc/kernel/ptrace-common.h164
-rw-r--r--arch/powerpc/kernel/ptrace.c3
-rw-r--r--arch/powerpc/kernel/ptrace32.c3
-rw-r--r--arch/powerpc/mm/imalloc.c3
-rw-r--r--arch/powerpc/mm/init_64.c3
-rw-r--r--arch/powerpc/mm/mmu_decl.h14
-rw-r--r--arch/powerpc/mm/pgtable_64.c3
-rw-r--r--arch/powerpc/platforms/powermac/smp.c6
-rw-r--r--arch/powerpc/sysdev/mpic.c13
20 files changed, 233 insertions, 260 deletions
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 7a3261f0bf79..9997098009a9 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -120,7 +120,6 @@ EXPORT_SYMBOL(__arch_strncpy_from_user);
120EXPORT_SYMBOL(__get_user_1); 120EXPORT_SYMBOL(__get_user_1);
121EXPORT_SYMBOL(__get_user_2); 121EXPORT_SYMBOL(__get_user_2);
122EXPORT_SYMBOL(__get_user_4); 122EXPORT_SYMBOL(__get_user_4);
123EXPORT_SYMBOL(__get_user_8);
124 123
125EXPORT_SYMBOL(__put_user_1); 124EXPORT_SYMBOL(__put_user_1);
126EXPORT_SYMBOL(__put_user_2); 125EXPORT_SYMBOL(__put_user_2);
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 066597f4345a..f7f183075237 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -48,8 +48,7 @@ work_pending:
48 mov r0, sp @ 'regs' 48 mov r0, sp @ 'regs'
49 mov r2, why @ 'syscall' 49 mov r2, why @ 'syscall'
50 bl do_notify_resume 50 bl do_notify_resume
51 disable_irq @ disable interrupts 51 b ret_slow_syscall @ Check work again
52 b no_work_pending
53 52
54work_resched: 53work_resched:
55 bl schedule 54 bl schedule
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index a917e3dd3666..765922bcf9e7 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -595,23 +595,22 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
595 */ 595 */
596 ret |= !valid_user_regs(regs); 596 ret |= !valid_user_regs(regs);
597 597
598 /*
599 * Block the signal if we were unsuccessful.
600 */
601 if (ret != 0) { 598 if (ret != 0) {
602 spin_lock_irq(&tsk->sighand->siglock); 599 force_sigsegv(sig, tsk);
603 sigorsets(&tsk->blocked, &tsk->blocked, 600 return;
604 &ka->sa.sa_mask);
605 if (!(ka->sa.sa_flags & SA_NODEFER))
606 sigaddset(&tsk->blocked, sig);
607 recalc_sigpending();
608 spin_unlock_irq(&tsk->sighand->siglock);
609 } 601 }
610 602
611 if (ret == 0) 603 /*
612 return; 604 * Block the signal if we were successful.
605 */
606 spin_lock_irq(&tsk->sighand->siglock);
607 sigorsets(&tsk->blocked, &tsk->blocked,
608 &ka->sa.sa_mask);
609 if (!(ka->sa.sa_flags & SA_NODEFER))
610 sigaddset(&tsk->blocked, sig);
611 recalc_sigpending();
612 spin_unlock_irq(&tsk->sighand->siglock);
613 613
614 force_sigsegv(sig, tsk);
615} 614}
616 615
617/* 616/*
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 80c8e4c8cefa..9a47770114d4 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -172,6 +172,10 @@ SECTIONS
172 .comment 0 : { *(.comment) } 172 .comment 0 : { *(.comment) }
173} 173}
174 174
175/* those must never be empty */ 175/*
176 * These must never be empty
177 * If you have to comment these two assert statements out, your
178 * binutils is too old (for other reasons as well)
179 */
176ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support") 180ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
177ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") 181ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index d204018070a4..c03ea8e666ba 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -54,15 +54,6 @@ __get_user_4:
54 mov r0, #0 54 mov r0, #0
55 mov pc, lr 55 mov pc, lr
56 56
57 .global __get_user_8
58__get_user_8:
595: ldrt r2, [r0], #4
606: ldrt r3, [r0]
61 mov r0, #0
62 mov pc, lr
63
64__get_user_bad_8:
65 mov r3, #0
66__get_user_bad: 57__get_user_bad:
67 mov r2, #0 58 mov r2, #0
68 mov r0, #-EFAULT 59 mov r0, #-EFAULT
@@ -73,6 +64,4 @@ __get_user_bad:
73 .long 2b, __get_user_bad 64 .long 2b, __get_user_bad
74 .long 3b, __get_user_bad 65 .long 3b, __get_user_bad
75 .long 4b, __get_user_bad 66 .long 4b, __get_user_bad
76 .long 5b, __get_user_bad_8
77 .long 6b, __get_user_bad_8
78.previous 67.previous
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 59f47d4c2dfe..ffe73ba2bf17 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -51,4 +51,4 @@ obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o
51obj-$(CONFIG_CPU_SA110) += proc-sa110.o 51obj-$(CONFIG_CPU_SA110) += proc-sa110.o
52obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o 52obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
53obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o 53obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
54obj-$(CONFIG_CPU_V6) += proc-v6.o blockops.o 54obj-$(CONFIG_CPU_V6) += proc-v6.o
diff --git a/arch/arm/mm/blockops.c b/arch/arm/mm/blockops.c
deleted file mode 100644
index 4f5ee2d08996..000000000000
--- a/arch/arm/mm/blockops.c
+++ /dev/null
@@ -1,185 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/errno.h>
4#include <linux/mm.h>
5
6#include <asm/memory.h>
7#include <asm/ptrace.h>
8#include <asm/cacheflush.h>
9#include <asm/traps.h>
10
11extern struct cpu_cache_fns blk_cache_fns;
12
13#define HARVARD_CACHE
14
15/*
16 * blk_flush_kern_dcache_page(kaddr)
17 *
18 * Ensure that the data held in the page kaddr is written back
19 * to the page in question.
20 *
21 * - kaddr - kernel address (guaranteed to be page aligned)
22 */
23static void __attribute__((naked))
24blk_flush_kern_dcache_page(void *kaddr)
25{
26 asm(
27 "add r1, r0, %0 \n\
28 sub r1, r1, %1 \n\
291: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
30 mov r0, #0 \n\
31 mcr p15, 0, r0, c7, c5, 0 \n\
32 mcr p15, 0, r0, c7, c10, 4 \n\
33 mov pc, lr"
34 :
35 : "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
36}
37
38/*
39 * blk_dma_inv_range(start,end)
40 *
41 * Invalidate the data cache within the specified region; we will
42 * be performing a DMA operation in this region and we want to
43 * purge old data in the cache.
44 *
45 * - start - virtual start address of region
46 * - end - virtual end address of region
47 */
48static void __attribute__((naked))
49blk_dma_inv_range_unified(unsigned long start, unsigned long end)
50{
51 asm(
52 "tst r0, %0 \n\
53 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line \n\
54 tst r1, %0 \n\
55 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line\n\
56 .word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
57 mov r0, #0 \n\
58 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
59 mov pc, lr"
60 :
61 : "I" (L1_CACHE_BYTES - 1));
62}
63
64static void __attribute__((naked))
65blk_dma_inv_range_harvard(unsigned long start, unsigned long end)
66{
67 asm(
68 "tst r0, %0 \n\
69 mcrne p15, 0, r0, c7, c10, 1 @ clean D line \n\
70 tst r1, %0 \n\
71 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line \n\
72 .word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
73 mov r0, #0 \n\
74 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
75 mov pc, lr"
76 :
77 : "I" (L1_CACHE_BYTES - 1));
78}
79
80/*
81 * blk_dma_clean_range(start,end)
82 * - start - virtual start address of region
83 * - end - virtual end address of region
84 */
85static void __attribute__((naked))
86blk_dma_clean_range(unsigned long start, unsigned long end)
87{
88 asm(
89 ".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0 @ blocking \n\
90 mov r0, #0 \n\
91 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
92 mov pc, lr");
93}
94
95/*
96 * blk_dma_flush_range(start,end)
97 * - start - virtual start address of region
98 * - end - virtual end address of region
99 */
100static void __attribute__((naked))
101blk_dma_flush_range(unsigned long start, unsigned long end)
102{
103 asm(
104 ".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0 @ blocking \n\
105 mov pc, lr");
106}
107
108static int blockops_trap(struct pt_regs *regs, unsigned int instr)
109{
110 regs->ARM_r4 |= regs->ARM_r2;
111 regs->ARM_pc += 4;
112 return 0;
113}
114
115static char *func[] = {
116 "Prefetch data range",
117 "Clean+Invalidate data range",
118 "Clean data range",
119 "Invalidate data range",
120 "Invalidate instr range"
121};
122
123static struct undef_hook blockops_hook __initdata = {
124 .instr_mask = 0x0fffffd0,
125 .instr_val = 0x0c401f00,
126 .cpsr_mask = PSR_T_BIT,
127 .cpsr_val = 0,
128 .fn = blockops_trap,
129};
130
131static int __init blockops_check(void)
132{
133 register unsigned int err asm("r4") = 0;
134 unsigned int err_pos = 1;
135 unsigned int cache_type;
136 int i;
137
138 asm("mrc p15, 0, %0, c0, c0, 1" : "=r" (cache_type));
139
140 printk("Checking V6 block cache operations:\n");
141 register_undef_hook(&blockops_hook);
142
143 __asm__ ("mov r0, %0\n\t"
144 "mov r1, %1\n\t"
145 "mov r2, #1\n\t"
146 ".word 0xec401f2c @ mcrr p15, 0, r1, r0, c12, 2\n\t"
147 "mov r2, #2\n\t"
148 ".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0\n\t"
149 "mov r2, #4\n\t"
150 ".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0\n\t"
151 "mov r2, #8\n\t"
152 ".word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0\n\t"
153 "mov r2, #16\n\t"
154 ".word 0xec401f05 @ mcrr p15, 0, r1, r0, c5, 0\n\t"
155 :
156 : "r" (PAGE_OFFSET), "r" (PAGE_OFFSET + 128)
157 : "r0", "r1", "r2");
158
159 unregister_undef_hook(&blockops_hook);
160
161 for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
162 printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
163
164 if ((err & 8) == 0) {
165 printk(" --> Using %s block cache invalidate\n",
166 cache_type & (1 << 24) ? "harvard" : "unified");
167 if (cache_type & (1 << 24))
168 cpu_cache.dma_inv_range = blk_dma_inv_range_harvard;
169 else
170 cpu_cache.dma_inv_range = blk_dma_inv_range_unified;
171 }
172 if ((err & 4) == 0) {
173 printk(" --> Using block cache clean\n");
174 cpu_cache.dma_clean_range = blk_dma_clean_range;
175 }
176 if ((err & 2) == 0) {
177 printk(" --> Using block cache clean+invalidate\n");
178 cpu_cache.dma_flush_range = blk_dma_flush_range;
179 cpu_cache.flush_kern_dcache_page = blk_flush_kern_dcache_page;
180 }
181
182 return 0;
183}
184
185__initcall(blockops_check);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index c168f322ef8c..8b276ee38acf 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -420,7 +420,8 @@ static void __init bootmem_init(struct meminfo *mi)
420 * Set up device the mappings. Since we clear out the page tables for all 420 * Set up device the mappings. Since we clear out the page tables for all
421 * mappings above VMALLOC_END, we will remove any debug device mappings. 421 * mappings above VMALLOC_END, we will remove any debug device mappings.
422 * This means you have to be careful how you debug this function, or any 422 * This means you have to be careful how you debug this function, or any
423 * called function. (Do it by code inspection!) 423 * called function. This means you can't use any function or debugging
424 * method which may touch any device, otherwise the kernel _will_ crash.
424 */ 425 */
425static void __init devicemaps_init(struct machine_desc *mdesc) 426static void __init devicemaps_init(struct machine_desc *mdesc)
426{ 427{
@@ -428,6 +429,12 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
428 unsigned long addr; 429 unsigned long addr;
429 void *vectors; 430 void *vectors;
430 431
432 /*
433 * Allocate the vector page early.
434 */
435 vectors = alloc_bootmem_low_pages(PAGE_SIZE);
436 BUG_ON(!vectors);
437
431 for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) 438 for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
432 pmd_clear(pmd_off_k(addr)); 439 pmd_clear(pmd_off_k(addr));
433 440
@@ -461,12 +468,6 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
461 create_mapping(&map); 468 create_mapping(&map);
462#endif 469#endif
463 470
464 flush_cache_all();
465 local_flush_tlb_all();
466
467 vectors = alloc_bootmem_low_pages(PAGE_SIZE);
468 BUG_ON(!vectors);
469
470 /* 471 /*
471 * Create a mapping for the machine vectors at the high-vectors 472 * Create a mapping for the machine vectors at the high-vectors
472 * location (0xffff0000). If we aren't using high-vectors, also 473 * location (0xffff0000). If we aren't using high-vectors, also
@@ -491,12 +492,13 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
491 mdesc->map_io(); 492 mdesc->map_io();
492 493
493 /* 494 /*
494 * Finally flush the tlb again - this ensures that we're in a 495 * Finally flush the caches and tlb to ensure that we're in a
495 * consistent state wrt the writebuffer if the writebuffer needs 496 * consistent state wrt the writebuffer. This also ensures that
496 * draining. After this point, we can start to touch devices 497 * any write-allocated cache lines in the vector page are written
497 * again. 498 * back. After this point, we can start to touch devices again.
498 */ 499 */
499 local_flush_tlb_all(); 500 local_flush_tlb_all();
501 flush_cache_all();
500} 502}
501 503
502/* 504/*
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 0f128c28fee4..10901398e4a2 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
130 * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. 130 * mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
131 */ 131 */
132void __iomem * 132void __iomem *
133__ioremap(unsigned long phys_addr, size_t size, unsigned long flags, 133__ioremap(unsigned long phys_addr, size_t size, unsigned long flags)
134 unsigned long align)
135{ 134{
136 void * addr; 135 void * addr;
137 struct vm_struct * area; 136 struct vm_struct * area;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 5a5b24685081..8b6008ab217d 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -40,7 +40,7 @@
40#endif 40#endif
41 41
42unsigned long pci_probe_only = 1; 42unsigned long pci_probe_only = 1;
43unsigned long pci_assign_all_buses = 0; 43int pci_assign_all_buses = 0;
44 44
45/* 45/*
46 * legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch 46 * legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch
@@ -55,11 +55,6 @@ static void fixup_resource(struct resource *res, struct pci_dev *dev);
55static void do_bus_setup(struct pci_bus *bus); 55static void do_bus_setup(struct pci_bus *bus);
56#endif 56#endif
57 57
58unsigned int pcibios_assign_all_busses(void)
59{
60 return pci_assign_all_buses;
61}
62
63/* pci_io_base -- the base address from which io bars are offsets. 58/* pci_io_base -- the base address from which io bars are offsets.
64 * This is the lowest I/O base address (so bar values are always positive), 59 * This is the lowest I/O base address (so bar values are always positive),
65 * and it *must* be the start of ISA space if an ISA bus exists because 60 * and it *must* be the start of ISA space if an ISA bus exists because
@@ -1186,17 +1181,6 @@ void phbs_remap_io(void)
1186 remap_bus_range(hose->bus); 1181 remap_bus_range(hose->bus);
1187} 1182}
1188 1183
1189/*
1190 * ppc64 can have multifunction devices that do not respond to function 0.
1191 * In this case we must scan all functions.
1192 * XXX this can go now, we use the OF device tree in all the
1193 * cases that caused problems. -- paulus
1194 */
1195int pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
1196{
1197 return 0;
1198}
1199
1200static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev) 1184static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
1201{ 1185{
1202 struct pci_controller *hose = pci_bus_to_host(dev->bus); 1186 struct pci_controller *hose = pci_bus_to_host(dev->bus);
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 59846b40d521..af4d1bc9a2eb 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -146,9 +146,6 @@ EXPORT_SYMBOL(pci_bus_io_base);
146EXPORT_SYMBOL(pci_bus_io_base_phys); 146EXPORT_SYMBOL(pci_bus_io_base_phys);
147EXPORT_SYMBOL(pci_bus_mem_base_phys); 147EXPORT_SYMBOL(pci_bus_mem_base_phys);
148EXPORT_SYMBOL(pci_bus_to_hose); 148EXPORT_SYMBOL(pci_bus_to_hose);
149EXPORT_SYMBOL(pci_resource_to_bus);
150EXPORT_SYMBOL(pci_phys_to_bus);
151EXPORT_SYMBOL(pci_bus_to_phys);
152#endif /* CONFIG_PCI */ 149#endif /* CONFIG_PCI */
153 150
154#ifdef CONFIG_NOT_COHERENT_CACHE 151#ifdef CONFIG_NOT_COHERENT_CACHE
diff --git a/arch/powerpc/kernel/ptrace-common.h b/arch/powerpc/kernel/ptrace-common.h
new file mode 100644
index 000000000000..b1babb729673
--- /dev/null
+++ b/arch/powerpc/kernel/ptrace-common.h
@@ -0,0 +1,164 @@
1/*
2 * linux/arch/ppc64/kernel/ptrace-common.h
3 *
4 * Copyright (c) 2002 Stephen Rothwell, IBM Coproration
5 * Extracted from ptrace.c and ptrace32.c
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file README.legal in the main directory of
9 * this archive for more details.
10 */
11
12#ifndef _PPC64_PTRACE_COMMON_H
13#define _PPC64_PTRACE_COMMON_H
14
15#include <linux/config.h>
16#include <asm/system.h>
17
18/*
19 * Set of msr bits that gdb can change on behalf of a process.
20 */
21#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
22
23/*
24 * Get contents of register REGNO in task TASK.
25 */
26static inline unsigned long get_reg(struct task_struct *task, int regno)
27{
28 unsigned long tmp = 0;
29
30 /*
31 * Put the correct FP bits in, they might be wrong as a result
32 * of our lazy FP restore.
33 */
34 if (regno == PT_MSR) {
35 tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
36 tmp |= task->thread.fpexc_mode;
37 } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
38 tmp = ((unsigned long *)task->thread.regs)[regno];
39 }
40
41 return tmp;
42}
43
44/*
45 * Write contents of register REGNO in task TASK.
46 */
47static inline int put_reg(struct task_struct *task, int regno,
48 unsigned long data)
49{
50 if (regno < PT_SOFTE) {
51 if (regno == PT_MSR)
52 data = (data & MSR_DEBUGCHANGE)
53 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
54 ((unsigned long *)task->thread.regs)[regno] = data;
55 return 0;
56 }
57 return -EIO;
58}
59
60static inline void set_single_step(struct task_struct *task)
61{
62 struct pt_regs *regs = task->thread.regs;
63 if (regs != NULL)
64 regs->msr |= MSR_SE;
65 set_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
66}
67
68static inline void clear_single_step(struct task_struct *task)
69{
70 struct pt_regs *regs = task->thread.regs;
71 if (regs != NULL)
72 regs->msr &= ~MSR_SE;
73 clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
74}
75
76#ifdef CONFIG_ALTIVEC
77/*
78 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
79 * The transfer totals 34 quadword. Quadwords 0-31 contain the
80 * corresponding vector registers. Quadword 32 contains the vscr as the
81 * last word (offset 12) within that quadword. Quadword 33 contains the
82 * vrsave as the first word (offset 0) within the quadword.
83 *
84 * This definition of the VMX state is compatible with the current PPC32
85 * ptrace interface. This allows signal handling and ptrace to use the
86 * same structures. This also simplifies the implementation of a bi-arch
87 * (combined (32- and 64-bit) gdb.
88 */
89
90/*
91 * Get contents of AltiVec register state in task TASK
92 */
93static inline int get_vrregs(unsigned long __user *data,
94 struct task_struct *task)
95{
96 unsigned long regsize;
97
98 /* copy AltiVec registers VR[0] .. VR[31] */
99 regsize = 32 * sizeof(vector128);
100 if (copy_to_user(data, task->thread.vr, regsize))
101 return -EFAULT;
102 data += (regsize / sizeof(unsigned long));
103
104 /* copy VSCR */
105 regsize = 1 * sizeof(vector128);
106 if (copy_to_user(data, &task->thread.vscr, regsize))
107 return -EFAULT;
108 data += (regsize / sizeof(unsigned long));
109
110 /* copy VRSAVE */
111 if (put_user(task->thread.vrsave, (u32 __user *)data))
112 return -EFAULT;
113
114 return 0;
115}
116
117/*
118 * Write contents of AltiVec register state into task TASK.
119 */
120static inline int set_vrregs(struct task_struct *task,
121 unsigned long __user *data)
122{
123 unsigned long regsize;
124
125 /* copy AltiVec registers VR[0] .. VR[31] */
126 regsize = 32 * sizeof(vector128);
127 if (copy_from_user(task->thread.vr, data, regsize))
128 return -EFAULT;
129 data += (regsize / sizeof(unsigned long));
130
131 /* copy VSCR */
132 regsize = 1 * sizeof(vector128);
133 if (copy_from_user(&task->thread.vscr, data, regsize))
134 return -EFAULT;
135 data += (regsize / sizeof(unsigned long));
136
137 /* copy VRSAVE */
138 if (get_user(task->thread.vrsave, (u32 __user *)data))
139 return -EFAULT;
140
141 return 0;
142}
143#endif
144
145static inline int ptrace_set_debugreg(struct task_struct *task,
146 unsigned long addr, unsigned long data)
147{
148 /* We only support one DABR and no IABRS at the moment */
149 if (addr > 0)
150 return -EINVAL;
151
152 /* The bottom 3 bits are flags */
153 if ((data & ~0x7UL) >= TASK_SIZE)
154 return -EIO;
155
156 /* Ensure translation is on */
157 if (data && !(data & DABR_TRANSLATION))
158 return -EIO;
159
160 task->thread.dabr = data;
161 return 0;
162}
163
164#endif /* _PPC64_PTRACE_COMMON_H */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 3d2abd95c7ae..400793c71304 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -36,8 +36,9 @@
36#include <asm/page.h> 36#include <asm/page.h>
37#include <asm/pgtable.h> 37#include <asm/pgtable.h>
38#include <asm/system.h> 38#include <asm/system.h>
39
39#ifdef CONFIG_PPC64 40#ifdef CONFIG_PPC64
40#include <asm/ptrace-common.h> 41#include "ptrace-common.h"
41#endif 42#endif
42 43
43#ifdef CONFIG_PPC32 44#ifdef CONFIG_PPC32
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 91eb952e0293..61762640b877 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -33,7 +33,8 @@
33#include <asm/page.h> 33#include <asm/page.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/system.h> 35#include <asm/system.h>
36#include <asm/ptrace-common.h> 36
37#include "ptrace-common.h"
37 38
38/* 39/*
39 * does not yet catch signals sent when the child dies. 40 * does not yet catch signals sent when the child dies.
diff --git a/arch/powerpc/mm/imalloc.c b/arch/powerpc/mm/imalloc.c
index f4ca29cf5364..f9587bcc6a48 100644
--- a/arch/powerpc/mm/imalloc.c
+++ b/arch/powerpc/mm/imalloc.c
@@ -14,9 +14,10 @@
14#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16#include <asm/semaphore.h> 16#include <asm/semaphore.h>
17#include <asm/imalloc.h>
18#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
19 18
19#include "mmu_decl.h"
20
20static DECLARE_MUTEX(imlist_sem); 21static DECLARE_MUTEX(imlist_sem);
21struct vm_struct * imlist = NULL; 22struct vm_struct * imlist = NULL;
22 23
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 1134f70f231d..81cfb0c2ec58 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -64,7 +64,8 @@
64#include <asm/iommu.h> 64#include <asm/iommu.h>
65#include <asm/abs_addr.h> 65#include <asm/abs_addr.h>
66#include <asm/vdso.h> 66#include <asm/vdso.h>
67#include <asm/imalloc.h> 67
68#include "mmu_decl.h"
68 69
69#ifdef DEBUG 70#ifdef DEBUG
70#define DBG(fmt...) printk(fmt) 71#define DBG(fmt...) printk(fmt)
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index a4d7a327c0e5..bea2d21ac6f7 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -33,7 +33,6 @@ extern void invalidate_tlbcam_entry(int index);
33 33
34extern int __map_without_bats; 34extern int __map_without_bats;
35extern unsigned long ioremap_base; 35extern unsigned long ioremap_base;
36extern unsigned long ioremap_bot;
37extern unsigned int rtas_data, rtas_size; 36extern unsigned int rtas_data, rtas_size;
38 37
39extern PTE *Hash, *Hash_end; 38extern PTE *Hash, *Hash_end;
@@ -42,6 +41,7 @@ extern unsigned long Hash_size, Hash_mask;
42extern unsigned int num_tlbcam_entries; 41extern unsigned int num_tlbcam_entries;
43#endif 42#endif
44 43
44extern unsigned long ioremap_bot;
45extern unsigned long __max_low_memory; 45extern unsigned long __max_low_memory;
46extern unsigned long __initial_memory_limit; 46extern unsigned long __initial_memory_limit;
47extern unsigned long total_memory; 47extern unsigned long total_memory;
@@ -84,4 +84,16 @@ static inline void flush_HPTE(unsigned context, unsigned long va,
84 else 84 else
85 _tlbie(va); 85 _tlbie(va);
86} 86}
87#else /* CONFIG_PPC64 */
88/* imalloc region types */
89#define IM_REGION_UNUSED 0x1
90#define IM_REGION_SUBSET 0x2
91#define IM_REGION_EXISTS 0x4
92#define IM_REGION_OVERLAP 0x8
93#define IM_REGION_SUPERSET 0x10
94
95extern struct vm_struct * im_get_free_area(unsigned long size);
96extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
97 int region_type);
98extern void im_free(void *addr);
87#endif 99#endif
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index c7f7bb6f30b3..2ffca63602c5 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -64,7 +64,8 @@
64#include <asm/iommu.h> 64#include <asm/iommu.h>
65#include <asm/abs_addr.h> 65#include <asm/abs_addr.h>
66#include <asm/vdso.h> 66#include <asm/vdso.h>
67#include <asm/imalloc.h> 67
68#include "mmu_decl.h"
68 69
69unsigned long ioremap_bot = IMALLOC_BASE; 70unsigned long ioremap_bot = IMALLOC_BASE;
70static unsigned long phbs_io_bot = PHBS_IO_BASE; 71static unsigned long phbs_io_bot = PHBS_IO_BASE;
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 957b09103422..fb2a7c798e82 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -34,6 +34,7 @@
34#include <linux/errno.h> 34#include <linux/errno.h>
35#include <linux/hardirq.h> 35#include <linux/hardirq.h>
36#include <linux/cpu.h> 36#include <linux/cpu.h>
37#include <linux/compiler.h>
37 38
38#include <asm/ptrace.h> 39#include <asm/ptrace.h>
39#include <asm/atomic.h> 40#include <asm/atomic.h>
@@ -631,8 +632,9 @@ void smp_core99_give_timebase(void)
631 mb(); 632 mb();
632 633
633 /* wait for the secondary to have taken it */ 634 /* wait for the secondary to have taken it */
634 for (t = 100000; t > 0 && sec_tb_reset; --t) 635 /* note: can't use udelay here, since it needs the timebase running */
635 udelay(10); 636 for (t = 10000000; t > 0 && sec_tb_reset; --t)
637 barrier();
636 if (sec_tb_reset) 638 if (sec_tb_reset)
637 /* XXX BUG_ON here? */ 639 /* XXX BUG_ON here? */
638 printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n"); 640 printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n");
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 105f05341a41..58d1cc2023c8 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -361,7 +361,8 @@ static void mpic_enable_irq(unsigned int irq)
361 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); 361 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
362 362
363 mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, 363 mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
364 mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK); 364 mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
365 ~MPIC_VECPRI_MASK);
365 366
366 /* make sure mask gets to controller before we return to user */ 367 /* make sure mask gets to controller before we return to user */
367 do { 368 do {
@@ -381,7 +382,8 @@ static void mpic_disable_irq(unsigned int irq)
381 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); 382 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
382 383
383 mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, 384 mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
384 mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | MPIC_VECPRI_MASK); 385 mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
386 MPIC_VECPRI_MASK);
385 387
386 /* make sure mask gets to controller before we return to user */ 388 /* make sure mask gets to controller before we return to user */
387 do { 389 do {
@@ -735,12 +737,13 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
735 737
736 spin_lock_irqsave(&mpic_lock, flags); 738 spin_lock_irqsave(&mpic_lock, flags);
737 if (is_ipi) { 739 if (is_ipi) {
738 reg = mpic_ipi_read(irq - mpic->ipi_offset) & MPIC_VECPRI_PRIORITY_MASK; 740 reg = mpic_ipi_read(irq - mpic->ipi_offset) &
741 ~MPIC_VECPRI_PRIORITY_MASK;
739 mpic_ipi_write(irq - mpic->ipi_offset, 742 mpic_ipi_write(irq - mpic->ipi_offset,
740 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 743 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
741 } else { 744 } else {
742 reg = mpic_irq_read(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI) 745 reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI)
743 & MPIC_VECPRI_PRIORITY_MASK; 746 & ~MPIC_VECPRI_PRIORITY_MASK;
744 mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI, 747 mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI,
745 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 748 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
746 } 749 }