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authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2012-03-28 12:37:36 -0400
committerKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2012-05-01 14:50:09 -0400
commit4a8e2a3115e7aa4bd2deb4c6483d47c743e0fbb3 (patch)
treeccf267b6602e79f48bc99b4614ebd6f3787970cf /arch
parent69964ea4c7b68c9399f7977aa5b9aa6539a6a98a (diff)
x86/apic: Replace io_apic_ops with x86_io_apic_ops.
Which makes the code fit within the rest of the x86_ops functions. Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> [v1: Changed x86_apic -> x86_ioapic per Yinghai Lu <yinghai@kernel.org> suggestion] [v2: Rebased on tip/x86/urgent and redid to match Ingo's syntax style] Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/io_apic.h35
-rw-r--r--arch/x86/include/asm/x86_init.h9
-rw-r--r--arch/x86/kernel/apic/io_apic.c46
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/x86_init.c8
5 files changed, 44 insertions, 56 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 2c4943de5150..73d8c5398ea9 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -5,7 +5,7 @@
5#include <asm/mpspec.h> 5#include <asm/mpspec.h>
6#include <asm/apicdef.h> 6#include <asm/apicdef.h>
7#include <asm/irq_vectors.h> 7#include <asm/irq_vectors.h>
8 8#include <asm/x86_init.h>
9/* 9/*
10 * Intel IO-APIC support for SMP and UP systems. 10 * Intel IO-APIC support for SMP and UP systems.
11 * 11 *
@@ -21,15 +21,6 @@
21#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15) 21#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
22#define IO_APIC_REDIR_MASKED (1 << 16) 22#define IO_APIC_REDIR_MASKED (1 << 16)
23 23
24struct io_apic_ops {
25 void (*init) (void);
26 unsigned int (*read) (unsigned int apic, unsigned int reg);
27 void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
28 void (*modify)(unsigned int apic, unsigned int reg, unsigned int value);
29};
30
31void __init set_io_apic_ops(const struct io_apic_ops *);
32
33/* 24/*
34 * The structure of the IO-APIC: 25 * The structure of the IO-APIC:
35 */ 26 */
@@ -156,7 +147,6 @@ struct io_apic_irq_attr;
156extern int io_apic_set_pci_routing(struct device *dev, int irq, 147extern int io_apic_set_pci_routing(struct device *dev, int irq,
157 struct io_apic_irq_attr *irq_attr); 148 struct io_apic_irq_attr *irq_attr);
158void setup_IO_APIC_irq_extra(u32 gsi); 149void setup_IO_APIC_irq_extra(u32 gsi);
159extern void ioapic_and_gsi_init(void);
160extern void ioapic_insert_resources(void); 150extern void ioapic_insert_resources(void);
161 151
162int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); 152int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
@@ -185,12 +175,29 @@ extern void mp_save_irq(struct mpc_intsrc *m);
185 175
186extern void disable_ioapic_support(void); 176extern void disable_ioapic_support(void);
187 177
178extern void __init native_io_apic_init_mappings(void);
179extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
180extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
181extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
182
183static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
184{
185 return x86_io_apic_ops.read(apic, reg);
186}
187
188static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
189{
190 x86_io_apic_ops.write(apic, reg, value);
191}
192static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
193{
194 x86_io_apic_ops.modify(apic, reg, value);
195}
188#else /* !CONFIG_X86_IO_APIC */ 196#else /* !CONFIG_X86_IO_APIC */
189 197
190#define io_apic_assign_pci_irqs 0 198#define io_apic_assign_pci_irqs 0
191#define setup_ioapic_ids_from_mpc x86_init_noop 199#define setup_ioapic_ids_from_mpc x86_init_noop
192static const int timer_through_8259 = 0; 200static const int timer_through_8259 = 0;
193static inline void ioapic_and_gsi_init(void) { }
194static inline void ioapic_insert_resources(void) { } 201static inline void ioapic_insert_resources(void) { }
195#define gsi_top (NR_IRQS_LEGACY) 202#define gsi_top (NR_IRQS_LEGACY)
196static inline int mp_find_ioapic(u32 gsi) { return 0; } 203static inline int mp_find_ioapic(u32 gsi) { return 0; }
@@ -212,6 +219,10 @@ static inline int restore_ioapic_entries(void)
212 219
213static inline void mp_save_irq(struct mpc_intsrc *m) { }; 220static inline void mp_save_irq(struct mpc_intsrc *m) { };
214static inline void disable_ioapic_support(void) { } 221static inline void disable_ioapic_support(void) { }
222#define native_io_apic_init_mappings NULL
223#define native_io_apic_read NULL
224#define native_io_apic_write NULL
225#define native_io_apic_modify NULL
215#endif 226#endif
216 227
217#endif /* _ASM_X86_IO_APIC_H */ 228#endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 764b66a4cf89..c090af10ac7d 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -188,11 +188,18 @@ struct x86_msi_ops {
188 void (*restore_msi_irqs)(struct pci_dev *dev, int irq); 188 void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
189}; 189};
190 190
191struct x86_io_apic_ops {
192 void (*init) (void);
193 unsigned int (*read) (unsigned int apic, unsigned int reg);
194 void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
195 void (*modify)(unsigned int apic, unsigned int reg, unsigned int value);
196};
197
191extern struct x86_init_ops x86_init; 198extern struct x86_init_ops x86_init;
192extern struct x86_cpuinit_ops x86_cpuinit; 199extern struct x86_cpuinit_ops x86_cpuinit;
193extern struct x86_platform_ops x86_platform; 200extern struct x86_platform_ops x86_platform;
194extern struct x86_msi_ops x86_msi; 201extern struct x86_msi_ops x86_msi;
195 202extern struct x86_io_apic_ops x86_io_apic_ops;
196extern void x86_init_noop(void); 203extern void x86_init_noop(void);
197extern void x86_init_uint_noop(unsigned int unused); 204extern void x86_init_uint_noop(unsigned int unused);
198 205
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index e88300d8e80a..973539c128a4 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -68,24 +68,6 @@
68#define for_each_irq_pin(entry, head) \ 68#define for_each_irq_pin(entry, head) \
69 for (entry = head; entry; entry = entry->next) 69 for (entry = head; entry; entry = entry->next)
70 70
71static void __init __ioapic_init_mappings(void);
72
73static unsigned int __io_apic_read (unsigned int apic, unsigned int reg);
74static void __io_apic_write (unsigned int apic, unsigned int reg, unsigned int val);
75static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
76
77static struct io_apic_ops io_apic_ops = {
78 .init = __ioapic_init_mappings,
79 .read = __io_apic_read,
80 .write = __io_apic_write,
81 .modify = __io_apic_modify,
82};
83
84void __init set_io_apic_ops(const struct io_apic_ops *ops)
85{
86 io_apic_ops = *ops;
87}
88
89/* 71/*
90 * Is the SiS APIC rmw bug present ? 72 * Is the SiS APIC rmw bug present ?
91 * -1 = don't know, 0 = no, 1 = yes 73 * -1 = don't know, 0 = no, 1 = yes
@@ -313,21 +295,6 @@ static void free_irq_at(unsigned int at, struct irq_cfg *cfg)
313 irq_free_desc(at); 295 irq_free_desc(at);
314} 296}
315 297
316static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
317{
318 return io_apic_ops.read(apic, reg);
319}
320
321static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
322{
323 io_apic_ops.write(apic, reg, value);
324}
325
326static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
327{
328 io_apic_ops.modify(apic, reg, value);
329}
330
331 298
332struct io_apic { 299struct io_apic {
333 unsigned int index; 300 unsigned int index;
@@ -349,14 +316,14 @@ static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
349 writel(vector, &io_apic->eoi); 316 writel(vector, &io_apic->eoi);
350} 317}
351 318
352static unsigned int __io_apic_read(unsigned int apic, unsigned int reg) 319unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)
353{ 320{
354 struct io_apic __iomem *io_apic = io_apic_base(apic); 321 struct io_apic __iomem *io_apic = io_apic_base(apic);
355 writel(reg, &io_apic->index); 322 writel(reg, &io_apic->index);
356 return readl(&io_apic->data); 323 return readl(&io_apic->data);
357} 324}
358 325
359static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) 326void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
360{ 327{
361 struct io_apic __iomem *io_apic = io_apic_base(apic); 328 struct io_apic __iomem *io_apic = io_apic_base(apic);
362 329
@@ -370,7 +337,7 @@ static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int va
370 * 337 *
371 * Older SiS APIC requires we rewrite the index register 338 * Older SiS APIC requires we rewrite the index register
372 */ 339 */
373static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) 340void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
374{ 341{
375 struct io_apic __iomem *io_apic = io_apic_base(apic); 342 struct io_apic __iomem *io_apic = io_apic_base(apic);
376 343
@@ -3931,12 +3898,7 @@ static struct resource * __init ioapic_setup_resources(int nr_ioapics)
3931 return res; 3898 return res;
3932} 3899}
3933 3900
3934void __init ioapic_and_gsi_init(void) 3901void __init native_io_apic_init_mappings(void)
3935{
3936 io_apic_ops.init();
3937}
3938
3939static void __init __ioapic_init_mappings(void)
3940{ 3902{
3941 unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; 3903 unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;
3942 struct resource *ioapic_res; 3904 struct resource *ioapic_res;
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 1a2901562059..8526317c5f0b 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1012,7 +1012,7 @@ void __init setup_arch(char **cmdline_p)
1012 init_cpu_to_node(); 1012 init_cpu_to_node();
1013 1013
1014 init_apic_mappings(); 1014 init_apic_mappings();
1015 ioapic_and_gsi_init(); 1015 x86_io_apic_ops.init();
1016 1016
1017 kvm_guest_init(); 1017 kvm_guest_init();
1018 1018
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 9cf71d0b2d37..35c5e543f550 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -18,6 +18,7 @@
18#include <asm/e820.h> 18#include <asm/e820.h>
19#include <asm/time.h> 19#include <asm/time.h>
20#include <asm/irq.h> 20#include <asm/irq.h>
21#include <asm/io_apic.h>
21#include <asm/pat.h> 22#include <asm/pat.h>
22#include <asm/tsc.h> 23#include <asm/tsc.h>
23#include <asm/iommu.h> 24#include <asm/iommu.h>
@@ -119,3 +120,10 @@ struct x86_msi_ops x86_msi = {
119 .teardown_msi_irqs = default_teardown_msi_irqs, 120 .teardown_msi_irqs = default_teardown_msi_irqs,
120 .restore_msi_irqs = default_restore_msi_irqs, 121 .restore_msi_irqs = default_restore_msi_irqs,
121}; 122};
123
124struct x86_io_apic_ops x86_io_apic_ops = {
125 .init = native_io_apic_init_mappings,
126 .read = native_io_apic_read,
127 .write = native_io_apic_write,
128 .modify = native_io_apic_modify,
129};