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authorGuennadi Liakhovetski <lg@denx.de>2008-11-13 06:20:49 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2008-12-16 08:57:24 -0500
commit4a7b98d7e7f1c05331bfa82e2427f896e57de35b (patch)
tree741e93751778afd959c85645cb839a28d4edbf71 /arch
parent1d5aa17be13bafa6b104f4b46c958be3470b28ec (diff)
i.MX31: fix mxc_iomux_set_pad()
mxc_iomux_set_pad() is buggy on i.MX31 - it calculates the register and the offset therein wrongly. Fix it. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx3/iomux.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c
index 6e664be8cc13..7a5088b519a8 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux.c
@@ -74,17 +74,18 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
74 u32 field, l; 74 u32 field, l;
75 void __iomem *reg; 75 void __iomem *reg;
76 76
77 reg = IOMUXSW_PAD_CTL + (pin + 2) / 3; 77 pin &= IOMUX_PADNUM_MASK;
78 reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
78 field = (pin + 2) % 3; 79 field = (pin + 2) % 3;
79 80
80 pr_debug("%s: reg offset = 0x%x field = %d\n", 81 pr_debug("%s: reg offset = 0x%x, field = %d\n",
81 __func__, (pin + 2) / 3, field); 82 __func__, (pin + 2) / 3, field);
82 83
83 spin_lock(&gpio_mux_lock); 84 spin_lock(&gpio_mux_lock);
84 85
85 l = __raw_readl(reg); 86 l = __raw_readl(reg);
86 l &= ~(0x1ff << (field * 9)); 87 l &= ~(0x1ff << (field * 10));
87 l |= config << (field * 9); 88 l |= config << (field * 10);
88 __raw_writel(l, reg); 89 __raw_writel(l, reg);
89 90
90 spin_unlock(&gpio_mux_lock); 91 spin_unlock(&gpio_mux_lock);