diff options
author | Mark Nelson <markn@au1.ibm.com> | 2009-12-07 15:32:17 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-12-09 01:10:38 -0500 |
commit | 49bd3647134ea47420067aea8d1401e722bf2aac (patch) | |
tree | 329b14bdf4944d4f8e9ad32900f7157ccafc1c8b /arch | |
parent | 275a64f6040073254fa15eaf6e4e720f77d531d6 (diff) |
powerpc/pseries: Track previous CPPR values to correctly EOI interrupts
At the moment when we EOI an interrupt we set the CPPR back to 0xFF
regardless of its previous value. This could lead to problems if we
take an interrupt with a priority of 5, but before EOIing it we get
an IPI which has a priority of 4. The problem is that at the moment
when we EOI the IPI we will set the CPPR to 0xFF, but it should
really be set back to 5 (the previous priority).
To keep track of the previous CPPR values we create the xics_cppr
structure that has an array for CPPR values and an index pointing
to the current priority. This can easily grow if new priorities get
added in the future.
This will also be useful because the partition adjunct option of
upcoming machines will update the H_XIRR hcall to accept the CPPR
as a parameter.
Signed-off-by: Mark Nelson <markn@au1.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/pseries/xics.c | 56 |
1 files changed, 51 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 690f87584f6b..7d01b58f3989 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/cpu.h> | 20 | #include <linux/cpu.h> |
21 | #include <linux/msi.h> | 21 | #include <linux/msi.h> |
22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
23 | #include <linux/percpu.h> | ||
23 | 24 | ||
24 | #include <asm/firmware.h> | 25 | #include <asm/firmware.h> |
25 | #include <asm/io.h> | 26 | #include <asm/io.h> |
@@ -46,6 +47,12 @@ static struct irq_host *xics_host; | |||
46 | */ | 47 | */ |
47 | #define IPI_PRIORITY 4 | 48 | #define IPI_PRIORITY 4 |
48 | 49 | ||
50 | /* The least favored priority */ | ||
51 | #define LOWEST_PRIORITY 0xFF | ||
52 | |||
53 | /* The number of priorities defined above */ | ||
54 | #define MAX_NUM_PRIORITIES 3 | ||
55 | |||
49 | static unsigned int default_server = 0xFF; | 56 | static unsigned int default_server = 0xFF; |
50 | static unsigned int default_distrib_server = 0; | 57 | static unsigned int default_distrib_server = 0; |
51 | static unsigned int interrupt_server_size = 8; | 58 | static unsigned int interrupt_server_size = 8; |
@@ -56,6 +63,12 @@ static int ibm_set_xive; | |||
56 | static int ibm_int_on; | 63 | static int ibm_int_on; |
57 | static int ibm_int_off; | 64 | static int ibm_int_off; |
58 | 65 | ||
66 | struct xics_cppr { | ||
67 | unsigned char stack[MAX_NUM_PRIORITIES]; | ||
68 | int index; | ||
69 | }; | ||
70 | |||
71 | static DEFINE_PER_CPU(struct xics_cppr, xics_cppr); | ||
59 | 72 | ||
60 | /* Direct hardware low level accessors */ | 73 | /* Direct hardware low level accessors */ |
61 | 74 | ||
@@ -284,6 +297,19 @@ static inline unsigned int xics_xirr_vector(unsigned int xirr) | |||
284 | return xirr & 0x00ffffff; | 297 | return xirr & 0x00ffffff; |
285 | } | 298 | } |
286 | 299 | ||
300 | static void push_cppr(unsigned int vec) | ||
301 | { | ||
302 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
303 | |||
304 | if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1)) | ||
305 | return; | ||
306 | |||
307 | if (vec == XICS_IPI) | ||
308 | os_cppr->stack[++os_cppr->index] = IPI_PRIORITY; | ||
309 | else | ||
310 | os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY; | ||
311 | } | ||
312 | |||
287 | static unsigned int xics_get_irq_direct(void) | 313 | static unsigned int xics_get_irq_direct(void) |
288 | { | 314 | { |
289 | unsigned int xirr = direct_xirr_info_get(); | 315 | unsigned int xirr = direct_xirr_info_get(); |
@@ -294,8 +320,10 @@ static unsigned int xics_get_irq_direct(void) | |||
294 | return NO_IRQ; | 320 | return NO_IRQ; |
295 | 321 | ||
296 | irq = irq_radix_revmap_lookup(xics_host, vec); | 322 | irq = irq_radix_revmap_lookup(xics_host, vec); |
297 | if (likely(irq != NO_IRQ)) | 323 | if (likely(irq != NO_IRQ)) { |
324 | push_cppr(vec); | ||
298 | return irq; | 325 | return irq; |
326 | } | ||
299 | 327 | ||
300 | /* We don't have a linux mapping, so have rtas mask it. */ | 328 | /* We don't have a linux mapping, so have rtas mask it. */ |
301 | xics_mask_unknown_vec(vec); | 329 | xics_mask_unknown_vec(vec); |
@@ -315,8 +343,10 @@ static unsigned int xics_get_irq_lpar(void) | |||
315 | return NO_IRQ; | 343 | return NO_IRQ; |
316 | 344 | ||
317 | irq = irq_radix_revmap_lookup(xics_host, vec); | 345 | irq = irq_radix_revmap_lookup(xics_host, vec); |
318 | if (likely(irq != NO_IRQ)) | 346 | if (likely(irq != NO_IRQ)) { |
347 | push_cppr(vec); | ||
319 | return irq; | 348 | return irq; |
349 | } | ||
320 | 350 | ||
321 | /* We don't have a linux mapping, so have RTAS mask it. */ | 351 | /* We don't have a linux mapping, so have RTAS mask it. */ |
322 | xics_mask_unknown_vec(vec); | 352 | xics_mask_unknown_vec(vec); |
@@ -326,12 +356,22 @@ static unsigned int xics_get_irq_lpar(void) | |||
326 | return NO_IRQ; | 356 | return NO_IRQ; |
327 | } | 357 | } |
328 | 358 | ||
359 | static unsigned char pop_cppr(void) | ||
360 | { | ||
361 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
362 | |||
363 | if (WARN_ON(os_cppr->index < 1)) | ||
364 | return LOWEST_PRIORITY; | ||
365 | |||
366 | return os_cppr->stack[--os_cppr->index]; | ||
367 | } | ||
368 | |||
329 | static void xics_eoi_direct(unsigned int virq) | 369 | static void xics_eoi_direct(unsigned int virq) |
330 | { | 370 | { |
331 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | 371 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; |
332 | 372 | ||
333 | iosync(); | 373 | iosync(); |
334 | direct_xirr_info_set((0xff << 24) | irq); | 374 | direct_xirr_info_set((pop_cppr() << 24) | irq); |
335 | } | 375 | } |
336 | 376 | ||
337 | static void xics_eoi_lpar(unsigned int virq) | 377 | static void xics_eoi_lpar(unsigned int virq) |
@@ -339,7 +379,7 @@ static void xics_eoi_lpar(unsigned int virq) | |||
339 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | 379 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; |
340 | 380 | ||
341 | iosync(); | 381 | iosync(); |
342 | lpar_xirr_info_set((0xff << 24) | irq); | 382 | lpar_xirr_info_set((pop_cppr() << 24) | irq); |
343 | } | 383 | } |
344 | 384 | ||
345 | static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | 385 | static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) |
@@ -746,6 +786,12 @@ void __init xics_init_IRQ(void) | |||
746 | 786 | ||
747 | static void xics_set_cpu_priority(unsigned char cppr) | 787 | static void xics_set_cpu_priority(unsigned char cppr) |
748 | { | 788 | { |
789 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
790 | |||
791 | BUG_ON(os_cppr->index != 0); | ||
792 | |||
793 | os_cppr->stack[os_cppr->index] = cppr; | ||
794 | |||
749 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 795 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
750 | lpar_cppr_info(cppr); | 796 | lpar_cppr_info(cppr); |
751 | else | 797 | else |
@@ -772,7 +818,7 @@ static void xics_set_cpu_giq(unsigned int gserver, unsigned int join) | |||
772 | 818 | ||
773 | void xics_setup_cpu(void) | 819 | void xics_setup_cpu(void) |
774 | { | 820 | { |
775 | xics_set_cpu_priority(0xff); | 821 | xics_set_cpu_priority(LOWEST_PRIORITY); |
776 | 822 | ||
777 | xics_set_cpu_giq(default_distrib_server, 1); | 823 | xics_set_cpu_giq(default_distrib_server, 1); |
778 | } | 824 | } |