diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2011-11-22 12:30:32 -0500 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2011-12-08 05:33:29 -0500 |
commit | 497b7e943d0dc5743454de56dcdb67352bbf96b2 (patch) | |
tree | 7c8b85aef41299cd50f4c3740ab89800f10f79ae /arch | |
parent | 77f73a2c8e869b035e71eea5cae07c30fe4bded0 (diff) |
ARM: LPAE: Add the Kconfig entries
This patch adds the ARM_LPAE and ARCH_PHYS_ADDR_T_64BIT Kconfig entries
allowing LPAE support to be compiled into the kernel.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mm/Kconfig | 17 |
2 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 44789eff983f..885c04e39400 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1959,7 +1959,7 @@ endchoice | |||
1959 | 1959 | ||
1960 | config XIP_KERNEL | 1960 | config XIP_KERNEL |
1961 | bool "Kernel Execute-In-Place from ROM" | 1961 | bool "Kernel Execute-In-Place from ROM" |
1962 | depends on !ZBOOT_ROM | 1962 | depends on !ZBOOT_ROM && !ARM_LPAE |
1963 | help | 1963 | help |
1964 | Execute-In-Place allows the kernel to run from non-volatile storage | 1964 | Execute-In-Place allows the kernel to run from non-volatile storage |
1965 | directly addressable by the CPU, such as NOR flash. This saves RAM | 1965 | directly addressable by the CPU, such as NOR flash. This saves RAM |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 67f75a0b66d6..5cf7922ff5e7 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -629,6 +629,23 @@ config IO_36 | |||
629 | 629 | ||
630 | comment "Processor Features" | 630 | comment "Processor Features" |
631 | 631 | ||
632 | config ARM_LPAE | ||
633 | bool "Support for the Large Physical Address Extension" | ||
634 | depends on MMU && CPU_V7 | ||
635 | help | ||
636 | Say Y if you have an ARMv7 processor supporting the LPAE page | ||
637 | table format and you would like to access memory beyond the | ||
638 | 4GB limit. The resulting kernel image will not run on | ||
639 | processors without the LPA extension. | ||
640 | |||
641 | If unsure, say N. | ||
642 | |||
643 | config ARCH_PHYS_ADDR_T_64BIT | ||
644 | def_bool ARM_LPAE | ||
645 | |||
646 | config ARCH_DMA_ADDR_T_64BIT | ||
647 | bool | ||
648 | |||
632 | config ARM_THUMB | 649 | config ARM_THUMB |
633 | bool "Support Thumb user binaries" | 650 | bool "Support Thumb user binaries" |
634 | depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON | 651 | depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON |