Merge tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: multi-platform conversion

This branch converts Tegra to support multi-platform/single-zImage.

One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.

The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.

This branch is based on (part of) the previous soc pull request.

* tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: convert to multi-platform
  ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h>

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

10 files changed, 23 insertions, 290 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6584941e0fab..3a6333e66b41 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -600,25 +600,6 @@ config ARCH_LPC32XX
         help
           Support for the NXP LPC32XX family of processors
 
-config ARCH_TEGRA
-        bool "NVIDIA Tegra"
-        select ARCH_HAS_CPUFREQ
-        select ARCH_REQUIRE_GPIOLIB
-        select CLKDEV_LOOKUP
-        select CLKSRC_MMIO
-        select CLKSRC_OF
-        select COMMON_CLK
-        select GENERIC_CLOCKEVENTS
-        select HAVE_CLK
-        select HAVE_SMP
-        select MIGHT_HAVE_CACHE_L2X0
-        select SOC_BUS
-        select SPARSE_IRQ
-        select USE_OF
-        help
-          This enables support for NVIDIA Tegra based systems (Tegra APX,
-          Tegra 6xx and Tegra 2 series).
-
 config ARCH_PXA
         bool "PXA2xx/PXA3xx-based"
         depends on MMU
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d1c4893894ce..df99ee93030a 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,13 +1,28 @@
-if ARCH_TEGRA
+config ARCH_TEGRA
+        bool "NVIDIA Tegra" if ARCH_MULTI_V7
+        select ARCH_HAS_CPUFREQ
+        select ARCH_REQUIRE_GPIOLIB
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
+        select CLKSRC_OF
+        select COMMON_CLK
+        select GENERIC_CLOCKEVENTS
+        select HAVE_CLK
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
+        select SOC_BUS
+        select SPARSE_IRQ
+        select USE_OF
+        help
+          This enables support for NVIDIA Tegra based systems.
 
-comment "NVIDIA Tegra options"
+menu "NVIDIA Tegra options"
+        depends on ARCH_TEGRA
 
 config ARCH_TEGRA_2x_SOC
         bool "Enable support for Tegra20 family"
         select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
         select ARM_ERRATA_720789
-        select ARM_ERRATA_742230 if SMP
-        select ARM_ERRATA_751472
         select ARM_ERRATA_754327 if SMP
         select ARM_ERRATA_764369 if SMP
         select ARM_GIC
@@ -26,8 +41,6 @@ config ARCH_TEGRA_2x_SOC
 
 config ARCH_TEGRA_3x_SOC
         bool "Enable support for Tegra30 family"
-        select ARM_ERRATA_743622
-        select ARM_ERRATA_751472
         select ARM_ERRATA_754322
         select ARM_ERRATA_764369 if SMP
         select ARM_GIC
@@ -71,4 +84,4 @@ config TEGRA_AHB
 config TEGRA_EMC_SCALING_ENABLE
         bool "Enable scaling the memory frequency"
 
-endif
+endmenu
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
deleted file mode 100644
index 29433816233c..000000000000
--- a/arch/arm/mach-tegra/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
-zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC)    += 0x00008000
-params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
-initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 60431de585ca..1787327fae3a 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -40,6 +40,7 @@ int tegra_clk_debugfs_init(void);
 static inline int tegra_clk_debugfs_init(void) { return 0; }
 #endif
 
+int __init tegra_powergate_init(void);
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC) && defined(CONFIG_DEBUG_FS)
 int __init tegra_powergate_debugfs_init(void);
 #else
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index eb1f3c8c74cc..9f852c6fe5b9 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -27,8 +27,6 @@
 
 #include <asm/hardware/cache-l2x0.h>
 
-#include <mach/powergate.h>
-
 #include "board.h"
 #include "common.h"
 #include "fuse.h"
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
deleted file mode 100644
index 06763fe7529d..000000000000
--- a/arch/arm/mach-tegra/include/mach/powergate.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * drivers/regulator/tegra-regulator.c
- *
- * Copyright (c) 2010 Google, Inc
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef _MACH_TEGRA_POWERGATE_H_
-#define _MACH_TEGRA_POWERGATE_H_
-
-struct clk;
-
-#define TEGRA_POWERGATE_CPU     0
-#define TEGRA_POWERGATE_3D      1
-#define TEGRA_POWERGATE_VENC    2
-#define TEGRA_POWERGATE_PCIE    3
-#define TEGRA_POWERGATE_VDEC    4
-#define TEGRA_POWERGATE_L2      5
-#define TEGRA_POWERGATE_MPE     6
-#define TEGRA_POWERGATE_HEG     7
-#define TEGRA_POWERGATE_SATA    8
-#define TEGRA_POWERGATE_CPU1    9
-#define TEGRA_POWERGATE_CPU2    10
-#define TEGRA_POWERGATE_CPU3    11
-#define TEGRA_POWERGATE_CELP    12
-#define TEGRA_POWERGATE_3D1     13
-
-#define TEGRA_POWERGATE_CPU0    TEGRA_POWERGATE_CPU
-#define TEGRA_POWERGATE_3D0     TEGRA_POWERGATE_3D
-
-int  __init tegra_powergate_init(void);
-
-int tegra_cpu_powergate_id(int cpuid);
-int tegra_powergate_is_powered(int id);
-int tegra_powergate_power_on(int id);
-int tegra_powergate_power_off(int id);
-int tegra_powergate_remove_clamping(int id);
-
-/* Must be called with clk disabled, and returns with clk enabled */
-int tegra_powergate_sequence_power_up(int id, struct clk *clk);
-
-#endif /* _MACH_TEGRA_POWERGATE_H_ */
diff --git a/arch/arm/mach-tegra/include/mach/timex.h b/arch/arm/mach-tegra/include/mach/timex.h
deleted file mode 100644
index a44ccbdb7dbf..000000000000
--- a/arch/arm/mach-tegra/include/mach/timex.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/timex.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_TIMEX_H
-#define __MACH_TEGRA_TIMEX_H
-
-#define CLOCK_TICK_RATE         1000000
-
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
deleted file mode 100644
index 08386418196f..000000000000
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/uncompress.h
- *
- * Copyright (C) 2010 Google, Inc.
- * Copyright (C) 2011 Google, Inc.
- * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *      Doug Anderson <dianders@chromium.org>
- *      Stephen Warren <swarren@nvidia.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_UNCOMPRESS_H
-#define __MACH_TEGRA_UNCOMPRESS_H
-
-#include <linux/types.h>
-#include <linux/serial_reg.h>
-
-#include "../../iomap.h"
-
-#define BIT(x) (1 << (x))
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-
-#define DEBUG_UART_SHIFT 2
-
-volatile u8 *uart;
-
-static void putc(int c)
-{
-        if (uart == NULL)
-                return;
-
-        while (!(uart[UART_LSR << DEBUG_UART_SHIFT] & UART_LSR_THRE))
-                barrier();
-        uart[UART_TX << DEBUG_UART_SHIFT] = c;
-}
-
-static inline void flush(void)
-{
-}
-
-static const struct {
-        u32 base;
-        u32 reset_reg;
-        u32 clock_reg;
-        u32 bit;
-} uarts[] = {
-        {
-                TEGRA_UARTA_BASE,
-                TEGRA_CLK_RESET_BASE + 0x04,
-                TEGRA_CLK_RESET_BASE + 0x10,
-                6,
-        },
-        {
-                TEGRA_UARTB_BASE,
-                TEGRA_CLK_RESET_BASE + 0x04,
-                TEGRA_CLK_RESET_BASE + 0x10,
-                7,
-        },
-        {
-                TEGRA_UARTC_BASE,
-                TEGRA_CLK_RESET_BASE + 0x08,
-                TEGRA_CLK_RESET_BASE + 0x14,
-                23,
-        },
-        {
-                TEGRA_UARTD_BASE,
-                TEGRA_CLK_RESET_BASE + 0x0c,
-                TEGRA_CLK_RESET_BASE + 0x18,
-                1,
-        },
-        {
-                TEGRA_UARTE_BASE,
-                TEGRA_CLK_RESET_BASE + 0x0c,
-                TEGRA_CLK_RESET_BASE + 0x18,
-                2,
-        },
-};
-
-static inline bool uart_clocked(int i)
-{
-        if (*(u8 *)uarts[i].reset_reg & BIT(uarts[i].bit))
-                return false;
-
-        if (!(*(u8 *)uarts[i].clock_reg & BIT(uarts[i].bit)))
-                return false;
-
-        return true;
-}
-
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
-int auto_odmdata(void)
-{
-        volatile u32 *pmc = (volatile u32 *)TEGRA_PMC_BASE;
-        u32 odmdata = pmc[0xa0 / 4];
-
-        /*
-         * Bits 19:18 are the console type: 0=default, 1=none, 2==DCC, 3==UART
-         * Some boards apparently swap the last two values, but we don't have
-         * any way of catering for that here, so we just accept either. If this
-         * doesn't make sense for your board, just don't enable this feature.
-         *
-         * Bits 17:15 indicate the UART to use, 0/1/2/3/4 are UART A/B/C/D/E.
-         */
-
-        switch  ((odmdata >> 18) & 3) {
-        case 2:
-        case 3:
-                break;
-        default:
-                return -1;
-        }
-
-        return (odmdata >> 15) & 7;
-}
-#endif
-
-/*
- * Setup before decompression.  This is where we do UART selection for
- * earlyprintk and init the uart_base register.
- */
-static inline void arch_decomp_setup(void)
-{
-        int uart_id;
-        volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
-        u32 chip, div;
-
-#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
-        uart_id = auto_odmdata();
-#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
-        uart_id = 0;
-#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
-        uart_id = 1;
-#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
-        uart_id = 2;
-#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
-        uart_id = 3;
-#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
-        uart_id = 4;
-#endif
-
-        if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) ||
-            !uart_clocked(uart_id))
-                uart = NULL;
-        else
-                uart = (volatile u8 *)uarts[uart_id].base;
-
-        if (uart == NULL)
-                return;
-
-        chip = (apb_misc[0x804 / 4] >> 8) & 0xff;
-        if (chip == 0x20)
-                div = 0x0075;
-        else
-                div = 0x00dd;
-
-        uart[UART_LCR << DEBUG_UART_SHIFT] |= UART_LCR_DLAB;
-        uart[UART_DLL << DEBUG_UART_SHIFT] = div & 0xff;
-        uart[UART_DLM << DEBUG_UART_SHIFT] = div >> 8;
-        uart[UART_LCR << DEBUG_UART_SHIFT] = 3;
-}
-
-#endif
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index b60165f1ca02..46144a19a7e7 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -34,12 +34,11 @@
 #include <linux/delay.h>
 #include <linux/export.h>
 #include <linux/clk/tegra.h>
+#include <linux/tegra-powergate.h>
 
 #include <asm/sizes.h>
 #include <asm/mach/pci.h>
 
-#include <mach/powergate.h>
-
 #include "board.h"
 #include "iomap.h"
 
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index c6bc8f85759c..585d2974a3c1 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -27,8 +27,7 @@
 #include <linux/seq_file.h>
 #include <linux/spinlock.h>
 #include <linux/clk/tegra.h>
-
-#include <mach/powergate.h>
+#include <linux/tegra-powergate.h>
 
 #include "fuse.h"
 #include "iomap.h"