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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-23 17:02:12 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-23 17:02:12 -0400
commit475c77edf826333aa61625f49d6a2bec26ecb5a6 (patch)
tree8e1c6c319e347cd3c649fdb0b3ab45971c6b19e7 /arch
parent934e18b5cb4531cc6e81865bf54115cfd21d1ac6 (diff)
parent1488d5158dcd612fcdaf6b642451b026ee8bbcbb (diff)
Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci
Pull PCI changes (including maintainer change) from Jesse Barnes: "This pull has some good cleanups from Bjorn and Yinghai, as well as some more code from Yinghai to better handle resource re-allocation when enabled. There's also a new initcall_debug feature from Arjan which will print out quirk timing information to help identify slow quirks for fixing or refinement (Yinghai sent in a few patches to do just that once the new debug code landed). Beyond that, I'm handing off PCI maintainership to Bjorn Helgaas. He's been a core PCI and Linux contributor for some time now, and has kindly volunteered to take over. I just don't feel I have the time for PCI review and work that it deserves lately (I've taken on some other projects), and haven't been as responsive lately as I'd like, so I approached Bjorn asking if he'd like to manage things. He's going to give it a try, and I'm confident he'll do at least as well as I have in keeping the tree managed, patches flowing, and keeping things stable." Fix up some fairly trivial conflicts due to other cleanups (mips device resource fixup cleanups clashing with list handling cleanup, ppc iseries removal clashing with pci_probe_only cleanup etc) * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (112 commits) PCI: Bjorn gets PCI hotplug too PCI: hand PCI maintenance over to Bjorn Helgaas unicore32/PCI: move <asm-generic/pci-bridge.h> include to asm/pci.h sparc/PCI: convert devtree and arch-probed bus addresses to resource powerpc/PCI: allow reallocation on PA Semi powerpc/PCI: convert devtree bus addresses to resource powerpc/PCI: compute I/O space bus-to-resource offset consistently arm/PCI: don't export pci_flags PCI: fix bridge I/O window bus-to-resource conversion x86/PCI: add spinlock held check to 'pcibios_fwaddrmap_lookup()' PCI / PCIe: Introduce command line option to disable ARI PCI: make acpihp use __pci_remove_bus_device instead PCI: export __pci_remove_bus_device PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device PCI: print out PCI device info along with duration PCI: Move "pci reassigndev resource alignment" out of quirks.c PCI: Use class for quirk for usb host controller fixup PCI: Use class for quirk for ti816x class fixup PCI: Use class for quirk for intel e100 interrupt fixup ...
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/include/asm/pci.h7
-rw-r--r--arch/alpha/kernel/pci.c86
-rw-r--r--arch/alpha/kernel/pci_impl.h3
-rw-r--r--arch/alpha/kernel/sys_marvel.c3
-rw-r--r--arch/alpha/kernel/sys_titan.c3
-rw-r--r--arch/arm/common/it8152.c4
-rw-r--r--arch/arm/include/asm/pci.h8
-rw-r--r--arch/arm/kernel/bios32.c75
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c4
-rw-r--r--arch/arm/mach-dove/pcie.c4
-rw-r--r--arch/arm/mach-footbridge/dc21285.c8
-rw-r--r--arch/arm/mach-integrator/pci_v3.c7
-rw-r--r--arch/arm/mach-iop13xx/pci.c4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2400.c4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2800.c4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c4
-rw-r--r--arch/arm/mach-ixp2000/pci.c6
-rw-r--r--arch/arm/mach-ixp23xx/pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c4
-rw-r--r--arch/arm/mach-kirkwood/pcie.c4
-rw-r--r--arch/arm/mach-ks8695/pci.c4
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c4
-rw-r--r--arch/arm/mach-orion5x/pci.c14
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c8
-rw-r--r--arch/arm/mach-tegra/pcie.c6
-rw-r--r--arch/arm/mach-versatile/pci.c6
-rw-r--r--arch/arm/mm/iomap.c3
-rw-r--r--arch/arm/plat-iop/pci.c4
-rw-r--r--arch/ia64/include/asm/pci.h6
-rw-r--r--arch/ia64/pci/pci.c55
-rw-r--r--arch/ia64/sn/kernel/io_init.c16
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h1
-rw-r--r--arch/microblaze/include/asm/pci.h8
-rw-r--r--arch/microblaze/pci/pci-common.c117
-rw-r--r--arch/mips/include/asm/pci.h9
-rw-r--r--arch/mips/pci/fixup-cobalt.c61
-rw-r--r--arch/mips/pci/pci-bcm1480.c2
-rw-r--r--arch/mips/pci/pci-ip27.c2
-rw-r--r--arch/mips/pci/pci-lantiq.c3
-rw-r--r--arch/mips/pci/pci-sb1250.c2
-rw-r--r--arch/mips/pci/pci-xlr.c2
-rw-r--r--arch/mips/pci/pci.c86
-rw-r--r--arch/mn10300/include/asm/pci.h16
-rw-r--r--arch/mn10300/unit-asb2305/pci.c62
-rw-r--r--arch/parisc/include/asm/pci.h38
-rw-r--r--arch/parisc/kernel/pci.c52
-rw-r--r--arch/powerpc/include/asm/pci.h9
-rw-r--r--arch/powerpc/include/asm/ppc-pci.h2
-rw-r--r--arch/powerpc/kernel/pci-common.c86
-rw-r--r--arch/powerpc/kernel/pci_32.c6
-rw-r--r--arch/powerpc/kernel/pci_64.c7
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c12
-rw-r--r--arch/powerpc/kernel/rtas_pci.c10
-rw-r--r--arch/powerpc/platforms/maple/pci.c2
-rw-r--r--arch/powerpc/platforms/pasemi/pci.c3
-rw-r--r--arch/powerpc/platforms/powermac/pci.c3
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c5
-rw-r--r--arch/powerpc/platforms/powernv/pci.c5
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c2
-rw-r--r--arch/powerpc/platforms/pseries/setup.c3
-rw-r--r--arch/powerpc/platforms/wsp/wsp_pci.c1
-rw-r--r--arch/sh/drivers/pci/pci.c75
-rw-r--r--arch/sh/include/asm/pci.h6
-rw-r--r--arch/sparc/include/asm/pci_32.h8
-rw-r--r--arch/sparc/include/asm/pci_64.h8
-rw-r--r--arch/sparc/kernel/leon_pci.c47
-rw-r--r--arch/sparc/kernel/pci.c106
-rw-r--r--arch/unicore32/include/asm/pci.h1
-rw-r--r--arch/unicore32/kernel/pci.c5
-rw-r--r--arch/x86/kernel/pci-dma.c5
-rw-r--r--arch/x86/pci/acpi.c7
-rw-r--r--arch/x86/pci/fixup.c12
-rw-r--r--arch/x86/pci/i386.c85
-rw-r--r--arch/x86/pci/mrst.c40
-rw-r--r--arch/xtensa/kernel/pci.c17
75 files changed, 355 insertions, 1058 deletions
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index 28d0497fd3c7..d01afb78919c 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -7,6 +7,7 @@
7#include <linux/dma-mapping.h> 7#include <linux/dma-mapping.h>
8#include <asm/scatterlist.h> 8#include <asm/scatterlist.h>
9#include <asm/machvec.h> 9#include <asm/machvec.h>
10#include <asm-generic/pci-bridge.h>
10 11
11/* 12/*
12 * The following structure is used to manage multiple PCI busses. 13 * The following structure is used to manage multiple PCI busses.
@@ -99,12 +100,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
99 return channel ? 15 : 14; 100 return channel ? 15 : 14;
100} 101}
101 102
102extern void pcibios_resource_to_bus(struct pci_dev *, struct pci_bus_region *,
103 struct resource *);
104
105extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
106 struct pci_bus_region *region);
107
108#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 103#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
109 104
110static inline int pci_proc_domain(struct pci_bus *bus) 105static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index 8c723c1b086a..1a629636cc16 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -43,12 +43,10 @@ const char *const pci_mem_names[] = {
43 43
44const char pci_hae0_name[] = "HAE0"; 44const char pci_hae0_name[] = "HAE0";
45 45
46/* Indicate whether we respect the PCI setup left by console. */
47/* 46/*
48 * Make this long-lived so that we know when shutting down 47 * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
49 * whether we probed only or not. 48 * assignments.
50 */ 49 */
51int pci_probe_only;
52 50
53/* 51/*
54 * The PCI controller list. 52 * The PCI controller list.
@@ -215,7 +213,7 @@ pdev_save_srm_config(struct pci_dev *dev)
215 struct pdev_srm_saved_conf *tmp; 213 struct pdev_srm_saved_conf *tmp;
216 static int printed = 0; 214 static int printed = 0;
217 215
218 if (!alpha_using_srm || pci_probe_only) 216 if (!alpha_using_srm || pci_has_flag(PCI_PROBE_ONLY))
219 return; 217 return;
220 218
221 if (!printed) { 219 if (!printed) {
@@ -242,7 +240,7 @@ pci_restore_srm_config(void)
242 struct pdev_srm_saved_conf *tmp; 240 struct pdev_srm_saved_conf *tmp;
243 241
244 /* No need to restore if probed only. */ 242 /* No need to restore if probed only. */
245 if (pci_probe_only) 243 if (pci_has_flag(PCI_PROBE_ONLY))
246 return; 244 return;
247 245
248 /* Restore SRM config. */ 246 /* Restore SRM config. */
@@ -253,46 +251,17 @@ pci_restore_srm_config(void)
253#endif 251#endif
254 252
255void __devinit 253void __devinit
256pcibios_fixup_resource(struct resource *res, struct resource *root)
257{
258 res->start += root->start;
259 res->end += root->start;
260}
261
262void __devinit
263pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
264{
265 /* Update device resources. */
266 struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
267 int i;
268
269 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
270 if (!dev->resource[i].start)
271 continue;
272 if (dev->resource[i].flags & IORESOURCE_IO)
273 pcibios_fixup_resource(&dev->resource[i],
274 hose->io_space);
275 else if (dev->resource[i].flags & IORESOURCE_MEM)
276 pcibios_fixup_resource(&dev->resource[i],
277 hose->mem_space);
278 }
279}
280
281void __devinit
282pcibios_fixup_bus(struct pci_bus *bus) 254pcibios_fixup_bus(struct pci_bus *bus)
283{ 255{
284 struct pci_dev *dev = bus->self; 256 struct pci_dev *dev = bus->self;
285 257
286 if (pci_probe_only && dev && 258 if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
287 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 259 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
288 pci_read_bridge_bases(bus); 260 pci_read_bridge_bases(bus);
289 pcibios_fixup_device_resources(dev, bus);
290 } 261 }
291 262
292 list_for_each_entry(dev, &bus->devices, bus_list) { 263 list_for_each_entry(dev, &bus->devices, bus_list) {
293 pdev_save_srm_config(dev); 264 pdev_save_srm_config(dev);
294 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
295 pcibios_fixup_device_resources(dev, bus);
296 } 265 }
297} 266}
298 267
@@ -302,42 +271,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
302 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 271 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
303} 272}
304 273
305void
306pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
307 struct resource *res)
308{
309 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
310 unsigned long offset = 0;
311
312 if (res->flags & IORESOURCE_IO)
313 offset = hose->io_space->start;
314 else if (res->flags & IORESOURCE_MEM)
315 offset = hose->mem_space->start;
316
317 region->start = res->start - offset;
318 region->end = res->end - offset;
319}
320
321void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
322 struct pci_bus_region *region)
323{
324 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
325 unsigned long offset = 0;
326
327 if (res->flags & IORESOURCE_IO)
328 offset = hose->io_space->start;
329 else if (res->flags & IORESOURCE_MEM)
330 offset = hose->mem_space->start;
331
332 res->start = region->start + offset;
333 res->end = region->end + offset;
334}
335
336#ifdef CONFIG_HOTPLUG
337EXPORT_SYMBOL(pcibios_resource_to_bus);
338EXPORT_SYMBOL(pcibios_bus_to_resource);
339#endif
340
341int 274int
342pcibios_enable_device(struct pci_dev *dev, int mask) 275pcibios_enable_device(struct pci_dev *dev, int mask)
343{ 276{
@@ -374,7 +307,8 @@ pcibios_claim_one_bus(struct pci_bus *b)
374 307
375 if (r->parent || !r->start || !r->flags) 308 if (r->parent || !r->start || !r->flags)
376 continue; 309 continue;
377 if (pci_probe_only || (r->flags & IORESOURCE_PCI_FIXED)) 310 if (pci_has_flag(PCI_PROBE_ONLY) ||
311 (r->flags & IORESOURCE_PCI_FIXED))
378 pci_claim_resource(dev, i); 312 pci_claim_resource(dev, i);
379 } 313 }
380 } 314 }
@@ -416,8 +350,10 @@ common_init_pci(void)
416 hose->mem_space->end = end; 350 hose->mem_space->end = end;
417 351
418 INIT_LIST_HEAD(&resources); 352 INIT_LIST_HEAD(&resources);
419 pci_add_resource(&resources, hose->io_space); 353 pci_add_resource_offset(&resources, hose->io_space,
420 pci_add_resource(&resources, hose->mem_space); 354 hose->io_space->start);
355 pci_add_resource_offset(&resources, hose->mem_space,
356 hose->mem_space->start);
421 357
422 bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops, 358 bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
423 hose, &resources); 359 hose, &resources);
diff --git a/arch/alpha/kernel/pci_impl.h b/arch/alpha/kernel/pci_impl.h
index 85457b2d4516..2b0ac429f5eb 100644
--- a/arch/alpha/kernel/pci_impl.h
+++ b/arch/alpha/kernel/pci_impl.h
@@ -173,9 +173,6 @@ extern void pci_restore_srm_config(void);
173extern struct pci_controller *hose_head, **hose_tail; 173extern struct pci_controller *hose_head, **hose_tail;
174extern struct pci_controller *pci_isa_hose; 174extern struct pci_controller *pci_isa_hose;
175 175
176/* Indicate that we trust the console to configure things properly. */
177extern int pci_probe_only;
178
179extern unsigned long alpha_agpgart_size; 176extern unsigned long alpha_agpgart_size;
180 177
181extern void common_init_pci(void); 178extern void common_init_pci(void);
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 95cfc83ece8f..fc8b12508611 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -384,7 +384,8 @@ marvel_init_pci(void)
384 384
385 marvel_register_error_handlers(); 385 marvel_register_error_handlers();
386 386
387 pci_probe_only = 1; 387 /* Indicate that we trust the console to configure things properly */
388 pci_set_flags(PCI_PROBE_ONLY);
388 common_init_pci(); 389 common_init_pci();
389 locate_and_init_vga(NULL); 390 locate_and_init_vga(NULL);
390 391
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index f47b30a2a117..b8eafa053539 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -331,7 +331,8 @@ titan_init_pci(void)
331 */ 331 */
332 titan_late_init(); 332 titan_late_init();
333 333
334 pci_probe_only = 1; 334 /* Indicate that we trust the console to configure things properly */
335 pci_set_flags(PCI_PROBE_ONLY);
335 common_init_pci(); 336 common_init_pci();
336 SMC669_Init(0); 337 SMC669_Init(0);
337 locate_and_init_vga(NULL); 338 locate_and_init_vga(NULL);
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index fb1f1cfce60c..dcb13494ca0d 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
299 goto err1; 299 goto err1;
300 } 300 }
301 301
302 pci_add_resource(&sys->resources, &it8152_io); 302 pci_add_resource_offset(&sys->resources, &it8152_io, sys->io_offset);
303 pci_add_resource(&sys->resources, &it8152_mem); 303 pci_add_resource_offset(&sys->resources, &it8152_mem, sys->mem_offset);
304 304
305 if (platform_notify || platform_notify_remove) { 305 if (platform_notify || platform_notify_remove) {
306 printk(KERN_ERR "PCI: Can't use platform_notify\n"); 306 printk(KERN_ERR "PCI: Can't use platform_notify\n");
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index da337ba57ffd..a98a2e112fae 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -57,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
57extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 57extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
58 enum pci_mmap_state mmap_state, int write_combine); 58 enum pci_mmap_state mmap_state, int write_combine);
59 59
60extern void
61pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
62 struct resource *res);
63
64extern void
65pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
66 struct pci_bus_region *region);
67
68/* 60/*
69 * Dummy implementation; always return 0. 61 * Dummy implementation; always return 0.
70 */ 62 */
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index f58ba3589908..632df9a66f8c 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -16,7 +16,6 @@
16#include <asm/mach/pci.h> 16#include <asm/mach/pci.h>
17 17
18static int debug_pci; 18static int debug_pci;
19static int use_firmware;
20 19
21/* 20/*
22 * We can't use pci_find_device() here since we are 21 * We can't use pci_find_device() here since we are
@@ -295,28 +294,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
295} 294}
296 295
297/* 296/*
298 * Adjust the device resources from bus-centric to Linux-centric.
299 */
300static void __devinit
301pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
302{
303 resource_size_t offset;
304 int i;
305
306 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
307 if (dev->resource[i].start == 0)
308 continue;
309 if (dev->resource[i].flags & IORESOURCE_MEM)
310 offset = root->mem_offset;
311 else
312 offset = root->io_offset;
313
314 dev->resource[i].start += offset;
315 dev->resource[i].end += offset;
316 }
317}
318
319/*
320 * pcibios_fixup_bus - Called after each bus is probed, 297 * pcibios_fixup_bus - Called after each bus is probed,
321 * but before its children are examined. 298 * but before its children are examined.
322 */ 299 */
@@ -333,8 +310,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
333 list_for_each_entry(dev, &bus->devices, bus_list) { 310 list_for_each_entry(dev, &bus->devices, bus_list) {
334 u16 status; 311 u16 status;
335 312
336 pdev_fixup_device_resources(root, dev);
337
338 pci_read_config_word(dev, PCI_STATUS, &status); 313 pci_read_config_word(dev, PCI_STATUS, &status);
339 314
340 /* 315 /*
@@ -400,43 +375,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
400#endif 375#endif
401 376
402/* 377/*
403 * Convert from Linux-centric to bus-centric addresses for bridge devices.
404 */
405void
406pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
407 struct resource *res)
408{
409 struct pci_sys_data *root = dev->sysdata;
410 unsigned long offset = 0;
411
412 if (res->flags & IORESOURCE_IO)
413 offset = root->io_offset;
414 if (res->flags & IORESOURCE_MEM)
415 offset = root->mem_offset;
416
417 region->start = res->start - offset;
418 region->end = res->end - offset;
419}
420EXPORT_SYMBOL(pcibios_resource_to_bus);
421
422void __devinit
423pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
424 struct pci_bus_region *region)
425{
426 struct pci_sys_data *root = dev->sysdata;
427 unsigned long offset = 0;
428
429 if (res->flags & IORESOURCE_IO)
430 offset = root->io_offset;
431 if (res->flags & IORESOURCE_MEM)
432 offset = root->mem_offset;
433
434 res->start = region->start + offset;
435 res->end = region->end + offset;
436}
437EXPORT_SYMBOL(pcibios_bus_to_resource);
438
439/*
440 * Swizzle the device pin each time we cross a bridge. 378 * Swizzle the device pin each time we cross a bridge.
441 * This might update pin and returns the slot number. 379 * This might update pin and returns the slot number.
442 */ 380 */
@@ -497,10 +435,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
497 435
498 if (ret > 0) { 436 if (ret > 0) {
499 if (list_empty(&sys->resources)) { 437 if (list_empty(&sys->resources)) {
500 pci_add_resource(&sys->resources, 438 pci_add_resource_offset(&sys->resources,
501 &ioport_resource); 439 &ioport_resource, sys->io_offset);
502 pci_add_resource(&sys->resources, 440 pci_add_resource_offset(&sys->resources,
503 &iomem_resource); 441 &iomem_resource, sys->mem_offset);
504 } 442 }
505 443
506 sys->bus = hw->scan(nr, sys); 444 sys->bus = hw->scan(nr, sys);
@@ -525,6 +463,7 @@ void __init pci_common_init(struct hw_pci *hw)
525 463
526 INIT_LIST_HEAD(&hw->buses); 464 INIT_LIST_HEAD(&hw->buses);
527 465
466 pci_add_flags(PCI_REASSIGN_ALL_RSRC);
528 if (hw->preinit) 467 if (hw->preinit)
529 hw->preinit(); 468 hw->preinit();
530 pcibios_init_hw(hw); 469 pcibios_init_hw(hw);
@@ -536,7 +475,7 @@ void __init pci_common_init(struct hw_pci *hw)
536 list_for_each_entry(sys, &hw->buses, node) { 475 list_for_each_entry(sys, &hw->buses, node) {
537 struct pci_bus *bus = sys->bus; 476 struct pci_bus *bus = sys->bus;
538 477
539 if (!use_firmware) { 478 if (!pci_has_flag(PCI_PROBE_ONLY)) {
540 /* 479 /*
541 * Size the bridge windows. 480 * Size the bridge windows.
542 */ 481 */
@@ -573,7 +512,7 @@ char * __init pcibios_setup(char *str)
573 debug_pci = 1; 512 debug_pci = 1;
574 return NULL; 513 return NULL;
575 } else if (!strcmp(str, "firmware")) { 514 } else if (!strcmp(str, "firmware")) {
576 use_firmware = 1; 515 pci_add_flags(PCI_PROBE_ONLY);
577 return NULL; 516 return NULL;
578 } 517 }
579 return str; 518 return str;
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index e159d69967c9..79d001f831e0 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -155,8 +155,8 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
155 BUG_ON(request_resource(&iomem_resource, res_io) || 155 BUG_ON(request_resource(&iomem_resource, res_io) ||
156 request_resource(&iomem_resource, res_mem)); 156 request_resource(&iomem_resource, res_mem));
157 157
158 pci_add_resource(&sys->resources, res_io); 158 pci_add_resource_offset(&sys->resources, res_io, sys->io_offset);
159 pci_add_resource(&sys->resources, res_mem); 159 pci_add_resource_offset(&sys->resources, res_mem, sys->mem_offset);
160 160
161 return 1; 161 return 1;
162} 162}
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 52e96d397ba8..48a032005ea3 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
69 pp->res[0].flags = IORESOURCE_IO; 69 pp->res[0].flags = IORESOURCE_IO;
70 if (request_resource(&ioport_resource, &pp->res[0])) 70 if (request_resource(&ioport_resource, &pp->res[0]))
71 panic("Request PCIe IO resource failed\n"); 71 panic("Request PCIe IO resource failed\n");
72 pci_add_resource(&sys->resources, &pp->res[0]); 72 pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
73 73
74 /* 74 /*
75 * IORESOURCE_MEM 75 * IORESOURCE_MEM
@@ -88,7 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
88 pp->res[1].flags = IORESOURCE_MEM; 88 pp->res[1].flags = IORESOURCE_MEM;
89 if (request_resource(&iomem_resource, &pp->res[1])) 89 if (request_resource(&iomem_resource, &pp->res[1]))
90 panic("Request PCIe Memory resource failed\n"); 90 panic("Request PCIe Memory resource failed\n");
91 pci_add_resource(&sys->resources, &pp->res[1]); 91 pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
92 92
93 return 1; 93 return 1;
94} 94}
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index f685650c25d7..3194d3f73503 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -275,11 +275,13 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
275 allocate_resource(&iomem_resource, &res[0], 0x40000000, 275 allocate_resource(&iomem_resource, &res[0], 0x40000000,
276 0x80000000, 0xffffffff, 0x40000000, NULL, NULL); 276 0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
277 277
278 pci_add_resource(&sys->resources, &ioport_resource);
279 pci_add_resource(&sys->resources, &res[0]);
280 pci_add_resource(&sys->resources, &res[1]);
281 sys->mem_offset = DC21285_PCI_MEM; 278 sys->mem_offset = DC21285_PCI_MEM;
282 279
280 pci_add_resource_offset(&sys->resources,
281 &ioport_resource, sys->io_offset);
282 pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
283 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
284
283 return 1; 285 return 1;
284} 286}
285 287
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 3c82566acece..015be770c1d8 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -378,9 +378,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
378 * the mem resource for this bus 378 * the mem resource for this bus
379 * the prefetch mem resource for this bus 379 * the prefetch mem resource for this bus
380 */ 380 */
381 pci_add_resource(&sys->resources, &ioport_resource); 381 pci_add_resource_offset(&sys->resources,
382 pci_add_resource(&sys->resources, &non_mem); 382 &ioport_resource, sys->io_offset);
383 pci_add_resource(&sys->resources, &pre_mem); 383 pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
384 pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
384 385
385 return 1; 386 return 1;
386} 387}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index b8f5a8736511..861cb12ef436 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -1084,8 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
1084 request_resource(&ioport_resource, &res[0]); 1084 request_resource(&ioport_resource, &res[0]);
1085 request_resource(&iomem_resource, &res[1]); 1085 request_resource(&iomem_resource, &res[1]);
1086 1086
1087 pci_add_resource(&sys->resources, &res[0]); 1087 pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
1088 pci_add_resource(&sys->resources, &res[1]); 1088 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
1089 1089
1090 return 1; 1090 return 1;
1091} 1091}
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f53e911ec94a..d519944653ad 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -134,11 +134,11 @@ static void ixdp2400_pci_postinit(void)
134 134
135 if (ixdp2x00_master_npu()) { 135 if (ixdp2x00_master_npu()) {
136 dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN); 136 dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN);
137 pci_remove_bus_device(dev); 137 pci_stop_and_remove_bus_device(dev);
138 pci_dev_put(dev); 138 pci_dev_put(dev);
139 } else { 139 } else {
140 dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN); 140 dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN);
141 pci_remove_bus_device(dev); 141 pci_stop_and_remove_bus_device(dev);
142 pci_dev_put(dev); 142 pci_dev_put(dev);
143 143
144 ixdp2x00_slave_pci_postinit(); 144 ixdp2x00_slave_pci_postinit();
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index a2e7c393e74f..b415febd2025 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -262,14 +262,14 @@ int __init ixdp2800_pci_init(void)
262 pci_common_init(&ixdp2800_pci); 262 pci_common_init(&ixdp2800_pci);
263 if (ixdp2x00_master_npu()) { 263 if (ixdp2x00_master_npu()) {
264 dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN); 264 dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
265 pci_remove_bus_device(dev); 265 pci_stop_and_remove_bus_device(dev);
266 pci_dev_put(dev); 266 pci_dev_put(dev);
267 267
268 ixdp2800_master_enable_slave(); 268 ixdp2800_master_enable_slave();
269 ixdp2800_master_wait_for_slave_bus_scan(); 269 ixdp2800_master_wait_for_slave_bus_scan();
270 } else { 270 } else {
271 dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN); 271 dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN);
272 pci_remove_bus_device(dev); 272 pci_stop_and_remove_bus_device(dev);
273 pci_dev_put(dev); 273 pci_dev_put(dev);
274 } 274 }
275 } 275 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 634b6c852f68..dd9838299068 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -239,12 +239,12 @@ void ixdp2x00_slave_pci_postinit(void)
239 * Remove PMC device is there is one 239 * Remove PMC device is there is one
240 */ 240 */
241 if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) { 241 if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) {
242 pci_remove_bus_device(dev); 242 pci_stop_and_remove_bus_device(dev);
243 pci_dev_put(dev); 243 pci_dev_put(dev);
244 } 244 }
245 245
246 dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN); 246 dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN);
247 pci_remove_bus_device(dev); 247 pci_stop_and_remove_bus_device(dev);
248 pci_dev_put(dev); 248 pci_dev_put(dev);
249} 249}
250 250
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 626fda435aa9..49c36f3cd602 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -243,8 +243,10 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
243 if (nr >= 1) 243 if (nr >= 1)
244 return 0; 244 return 0;
245 245
246 pci_add_resource(&sys->resources, &ixp2000_pci_io_space); 246 pci_add_resource_offset(&sys->resources,
247 pci_add_resource(&sys->resources, &ixp2000_pci_mem_space); 247 &ixp2000_pci_io_space, sys->io_offset);
248 pci_add_resource_offset(&sys->resources,
249 &ixp2000_pci_mem_space, sys->mem_offset);
248 250
249 return 1; 251 return 1;
250} 252}
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 25b5c462cea2..3cbbd3208fa8 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -281,8 +281,10 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
281 if (nr >= 1) 281 if (nr >= 1)
282 return 0; 282 return 0;
283 283
284 pci_add_resource(&sys->resources, &ixp23xx_pci_io_space); 284 pci_add_resource_offset(&sys->resources,
285 pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space); 285 &ixp23xx_pci_io_space, sys->io_offset);
286 pci_add_resource_offset(&sys->resources,
287 &ixp23xx_pci_mem_space, sys->mem_offset);
286 288
287 return 1; 289 return 1;
288} 290}
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 5eff15f24bc2..8508882b13f0 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -472,8 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
472 request_resource(&ioport_resource, &res[0]); 472 request_resource(&ioport_resource, &res[0]);
473 request_resource(&iomem_resource, &res[1]); 473 request_resource(&iomem_resource, &res[1]);
474 474
475 pci_add_resource(&sys->resources, &res[0]); 475 pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
476 pci_add_resource(&sys->resources, &res[1]); 476 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
477 477
478 platform_notify = ixp4xx_pci_platform_notify; 478 platform_notify = ixp4xx_pci_platform_notify;
479 platform_notify_remove = ixp4xx_pci_platform_notify_remove; 479 platform_notify_remove = ixp4xx_pci_platform_notify_remove;
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index a066a6d8d9d2..f56a0118c1bb 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -198,9 +198,9 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
198 if (request_resource(&iomem_resource, &pp->res[1])) 198 if (request_resource(&iomem_resource, &pp->res[1]))
199 panic("Request PCIe%d Memory resource failed\n", index); 199 panic("Request PCIe%d Memory resource failed\n", index);
200 200
201 pci_add_resource(&sys->resources, &pp->res[0]);
202 pci_add_resource(&sys->resources, &pp->res[1]);
203 sys->io_offset = 0; 201 sys->io_offset = 0;
202 pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
203 pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
204 204
205 /* 205 /*
206 * Generic PCIe unit setup. 206 * Generic PCIe unit setup.
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index b26f992071df..acc701435817 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -169,8 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
169 request_resource(&iomem_resource, &pci_mem); 169 request_resource(&iomem_resource, &pci_mem);
170 request_resource(&ioport_resource, &pci_io); 170 request_resource(&ioport_resource, &pci_io);
171 171
172 pci_add_resource(&sys->resources, &pci_io); 172 pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset);
173 pci_add_resource(&sys->resources, &pci_mem); 173 pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset);
174 174
175 /* Assign and enable processor bridge */ 175 /* Assign and enable processor bridge */
176 ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); 176 ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 8459f6d7d8ca..df3e38055a24 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -155,8 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
156 orion_pcie_setup(pp->base); 156 orion_pcie_setup(pp->base);
157 157
158 pci_add_resource(&sys->resources, &pp->res[0]); 158 pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
159 pci_add_resource(&sys->resources, &pp->res[1]); 159 pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
160 160
161 return 1; 161 return 1;
162} 162}
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 09a045f0c406..d6a91948e4dc 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -171,13 +171,14 @@ static int __init pcie_setup(struct pci_sys_data *sys)
171 /* 171 /*
172 * IORESOURCE_IO 172 * IORESOURCE_IO
173 */ 173 */
174 sys->io_offset = 0;
174 res[0].name = "PCIe I/O Space"; 175 res[0].name = "PCIe I/O Space";
175 res[0].flags = IORESOURCE_IO; 176 res[0].flags = IORESOURCE_IO;
176 res[0].start = ORION5X_PCIE_IO_BUS_BASE; 177 res[0].start = ORION5X_PCIE_IO_BUS_BASE;
177 res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; 178 res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
178 if (request_resource(&ioport_resource, &res[0])) 179 if (request_resource(&ioport_resource, &res[0]))
179 panic("Request PCIe IO resource failed\n"); 180 panic("Request PCIe IO resource failed\n");
180 pci_add_resource(&sys->resources, &res[0]); 181 pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
181 182
182 /* 183 /*
183 * IORESOURCE_MEM 184 * IORESOURCE_MEM
@@ -188,9 +189,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
188 res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; 189 res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
189 if (request_resource(&iomem_resource, &res[1])) 190 if (request_resource(&iomem_resource, &res[1]))
190 panic("Request PCIe Memory resource failed\n"); 191 panic("Request PCIe Memory resource failed\n");
191 pci_add_resource(&sys->resources, &res[1]); 192 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
192
193 sys->io_offset = 0;
194 193
195 return 1; 194 return 1;
196} 195}
@@ -499,13 +498,14 @@ static int __init pci_setup(struct pci_sys_data *sys)
499 /* 498 /*
500 * IORESOURCE_IO 499 * IORESOURCE_IO
501 */ 500 */
501 sys->io_offset = 0;
502 res[0].name = "PCI I/O Space"; 502 res[0].name = "PCI I/O Space";
503 res[0].flags = IORESOURCE_IO; 503 res[0].flags = IORESOURCE_IO;
504 res[0].start = ORION5X_PCI_IO_BUS_BASE; 504 res[0].start = ORION5X_PCI_IO_BUS_BASE;
505 res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; 505 res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
506 if (request_resource(&ioport_resource, &res[0])) 506 if (request_resource(&ioport_resource, &res[0]))
507 panic("Request PCI IO resource failed\n"); 507 panic("Request PCI IO resource failed\n");
508 pci_add_resource(&sys->resources, &res[0]); 508 pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
509 509
510 /* 510 /*
511 * IORESOURCE_MEM 511 * IORESOURCE_MEM
@@ -516,9 +516,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
516 res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; 516 res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
517 if (request_resource(&iomem_resource, &res[1])) 517 if (request_resource(&iomem_resource, &res[1]))
518 panic("Request PCI Memory resource failed\n"); 518 panic("Request PCI Memory resource failed\n");
519 pci_add_resource(&sys->resources, &res[1]); 519 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
520
521 sys->io_offset = 0;
522 520
523 return 1; 521 return 1;
524} 522}
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index 0d01ca788922..b466bca9c651 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -244,9 +244,11 @@ static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
244 printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); 244 printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
245 return -EBUSY; 245 return -EBUSY;
246 } 246 }
247 pci_add_resource(&sys->resources, &pci_io_ports); 247 pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
248 pci_add_resource(&sys->resources, &pci_non_prefetchable_memory); 248 pci_add_resource_offset(&sys->resources,
249 pci_add_resource(&sys->resources, &pci_prefetchable_memory); 249 &pci_non_prefetchable_memory, sys->mem_offset);
250 pci_add_resource_offset(&sys->resources,
251 &pci_prefetchable_memory, sys->mem_offset);
250 252
251 return 1; 253 return 1;
252} 254}
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index af8b63435727..14b29ab5d8f0 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -408,7 +408,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
408 pp->res[0].flags = IORESOURCE_IO; 408 pp->res[0].flags = IORESOURCE_IO;
409 if (request_resource(&ioport_resource, &pp->res[0])) 409 if (request_resource(&ioport_resource, &pp->res[0]))
410 panic("Request PCIe IO resource failed\n"); 410 panic("Request PCIe IO resource failed\n");
411 pci_add_resource(&sys->resources, &pp->res[0]); 411 pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
412 412
413 /* 413 /*
414 * IORESOURCE_MEM 414 * IORESOURCE_MEM
@@ -427,7 +427,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
427 pp->res[1].flags = IORESOURCE_MEM; 427 pp->res[1].flags = IORESOURCE_MEM;
428 if (request_resource(&iomem_resource, &pp->res[1])) 428 if (request_resource(&iomem_resource, &pp->res[1]))
429 panic("Request PCIe Memory resource failed\n"); 429 panic("Request PCIe Memory resource failed\n");
430 pci_add_resource(&sys->resources, &pp->res[1]); 430 pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
431 431
432 /* 432 /*
433 * IORESOURCE_MEM | IORESOURCE_PREFETCH 433 * IORESOURCE_MEM | IORESOURCE_PREFETCH
@@ -446,7 +446,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
446 pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; 446 pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
447 if (request_resource(&iomem_resource, &pp->res[2])) 447 if (request_resource(&iomem_resource, &pp->res[2]))
448 panic("Request PCIe Prefetch Memory resource failed\n"); 448 panic("Request PCIe Prefetch Memory resource failed\n");
449 pci_add_resource(&sys->resources, &pp->res[2]); 449 pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset);
450 450
451 return 1; 451 return 1;
452} 452}
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 90069bce23bc..51733b022d04 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -219,9 +219,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
219 * the mem resource for this bus 219 * the mem resource for this bus
220 * the prefetch mem resource for this bus 220 * the prefetch mem resource for this bus
221 */ 221 */
222 pci_add_resource(resources, &io_mem); 222 pci_add_resource_offset(resources, &io_mem, sys->io_offset);
223 pci_add_resource(resources, &non_mem); 223 pci_add_resource_offset(resources, &non_mem, sys->mem_offset);
224 pci_add_resource(resources, &pre_mem); 224 pci_add_resource_offset(resources, &pre_mem, sys->mem_offset);
225 225
226 goto out; 226 goto out;
227 227
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c
index e62956e12030..4614208369f1 100644
--- a/arch/arm/mm/iomap.c
+++ b/arch/arm/mm/iomap.c
@@ -32,9 +32,6 @@ EXPORT_SYMBOL(pcibios_min_io);
32unsigned long pcibios_min_mem = 0x01000000; 32unsigned long pcibios_min_mem = 0x01000000;
33EXPORT_SYMBOL(pcibios_min_mem); 33EXPORT_SYMBOL(pcibios_min_mem);
34 34
35unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC;
36EXPORT_SYMBOL(pci_flags);
37
38void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 35void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
39{ 36{
40 if ((unsigned long)addr >= VMALLOC_START && 37 if ((unsigned long)addr >= VMALLOC_START &&
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index f4d40a27111e..72768356447a 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -215,8 +215,8 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
215 sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; 215 sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0;
216 sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; 216 sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR;
217 217
218 pci_add_resource(&sys->resources, &res[0]); 218 pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
219 pci_add_resource(&sys->resources, &res[1]); 219 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
220 220
221 return 1; 221 return 1;
222} 222}
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 279b38ae74aa..b22e5f5fa593 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -108,12 +108,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
108 return (pci_domain_nr(bus) != 0); 108 return (pci_domain_nr(bus) != 0);
109} 109}
110 110
111extern void pcibios_resource_to_bus(struct pci_dev *dev,
112 struct pci_bus_region *region, struct resource *res);
113
114extern void pcibios_bus_to_resource(struct pci_dev *dev,
115 struct resource *res, struct pci_bus_region *region);
116
117static inline struct resource * 111static inline struct resource *
118pcibios_select_root(struct pci_dev *pdev, struct resource *res) 112pcibios_select_root(struct pci_dev *pdev, struct resource *res)
119{ 113{
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f82f5d4b65fd..d1ce3200147c 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -320,7 +320,8 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
320 * Ignore these tiny memory ranges */ 320 * Ignore these tiny memory ranges */
321 if (!((window->resource.flags & IORESOURCE_MEM) && 321 if (!((window->resource.flags & IORESOURCE_MEM) &&
322 (window->resource.end - window->resource.start < 16))) 322 (window->resource.end - window->resource.start < 16)))
323 pci_add_resource(&info->resources, &window->resource); 323 pci_add_resource_offset(&info->resources, &window->resource,
324 window->offset);
324 325
325 return AE_OK; 326 return AE_OK;
326} 327}
@@ -395,54 +396,6 @@ out1:
395 return NULL; 396 return NULL;
396} 397}
397 398
398void pcibios_resource_to_bus(struct pci_dev *dev,
399 struct pci_bus_region *region, struct resource *res)
400{
401 struct pci_controller *controller = PCI_CONTROLLER(dev);
402 unsigned long offset = 0;
403 int i;
404
405 for (i = 0; i < controller->windows; i++) {
406 struct pci_window *window = &controller->window[i];
407 if (!(window->resource.flags & res->flags))
408 continue;
409 if (window->resource.start > res->start)
410 continue;
411 if (window->resource.end < res->end)
412 continue;
413 offset = window->offset;
414 break;
415 }
416
417 region->start = res->start - offset;
418 region->end = res->end - offset;
419}
420EXPORT_SYMBOL(pcibios_resource_to_bus);
421
422void pcibios_bus_to_resource(struct pci_dev *dev,
423 struct resource *res, struct pci_bus_region *region)
424{
425 struct pci_controller *controller = PCI_CONTROLLER(dev);
426 unsigned long offset = 0;
427 int i;
428
429 for (i = 0; i < controller->windows; i++) {
430 struct pci_window *window = &controller->window[i];
431 if (!(window->resource.flags & res->flags))
432 continue;
433 if (window->resource.start - window->offset > region->start)
434 continue;
435 if (window->resource.end - window->offset < region->end)
436 continue;
437 offset = window->offset;
438 break;
439 }
440
441 res->start = region->start + offset;
442 res->end = region->end + offset;
443}
444EXPORT_SYMBOL(pcibios_bus_to_resource);
445
446static int __devinit is_valid_resource(struct pci_dev *dev, int idx) 399static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
447{ 400{
448 unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM; 401 unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
@@ -464,15 +417,11 @@ static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
464static void __devinit 417static void __devinit
465pcibios_fixup_resources(struct pci_dev *dev, int start, int limit) 418pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
466{ 419{
467 struct pci_bus_region region;
468 int i; 420 int i;
469 421
470 for (i = start; i < limit; i++) { 422 for (i = start; i < limit; i++) {
471 if (!dev->resource[i].flags) 423 if (!dev->resource[i].flags)
472 continue; 424 continue;
473 region.start = dev->resource[i].start;
474 region.end = dev->resource[i].end;
475 pcibios_bus_to_resource(dev, &dev->resource[i], &region);
476 if ((is_valid_resource(dev, i))) 425 if ((is_valid_resource(dev, i)))
477 pci_claim_resource(dev, i); 426 pci_claim_resource(dev, i);
478 } 427 }
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index 0a36f082eaf1..238e2c511d94 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -297,7 +297,8 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
297 s64 status = 0; 297 s64 status = 0;
298 struct pci_controller *controller; 298 struct pci_controller *controller;
299 struct pcibus_bussoft *prom_bussoft_ptr; 299 struct pcibus_bussoft *prom_bussoft_ptr;
300 300 LIST_HEAD(resources);
301 int i;
301 302
302 status = sal_get_pcibus_info((u64) segment, (u64) busnum, 303 status = sal_get_pcibus_info((u64) segment, (u64) busnum,
303 (u64) ia64_tpa(&prom_bussoft_ptr)); 304 (u64) ia64_tpa(&prom_bussoft_ptr));
@@ -315,7 +316,15 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
315 */ 316 */
316 controller->platform_data = prom_bussoft_ptr; 317 controller->platform_data = prom_bussoft_ptr;
317 318
318 bus = pci_scan_bus(busnum, &pci_root_ops, controller); 319 sn_legacy_pci_window_fixup(controller,
320 prom_bussoft_ptr->bs_legacy_io,
321 prom_bussoft_ptr->bs_legacy_mem);
322 for (i = 0; i < controller->windows; i++)
323 pci_add_resource_offset(&resources,
324 &controller->window[i].resource,
325 controller->window[i].offset);
326 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
327 &resources);
319 if (bus == NULL) 328 if (bus == NULL)
320 goto error_return; /* error, or bus already scanned */ 329 goto error_return; /* error, or bus already scanned */
321 330
@@ -348,9 +357,6 @@ sn_bus_fixup(struct pci_bus *bus)
348 return; 357 return;
349 } 358 }
350 sn_common_bus_fixup(bus, prom_bussoft_ptr); 359 sn_common_bus_fixup(bus, prom_bussoft_ptr);
351 sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
352 prom_bussoft_ptr->bs_legacy_io,
353 prom_bussoft_ptr->bs_legacy_mem);
354 } 360 }
355 list_for_each_entry(pci_dev, &bus->devices, bus_list) { 361 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
356 sn_io_slot_fixup(pci_dev); 362 sn_io_slot_fixup(pci_dev);
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index e9834b2991d0..cb5d39794800 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -10,7 +10,6 @@
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/list.h> 11#include <linux/list.h>
12#include <linux/ioport.h> 12#include <linux/ioport.h>
13#include <asm-generic/pci-bridge.h>
14 13
15struct device_node; 14struct device_node;
16 15
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 033137628e8a..a0da88bf70c5 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -94,14 +94,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
94 */ 94 */
95#define PCI_DMA_BUS_IS_PHYS (1) 95#define PCI_DMA_BUS_IS_PHYS (1)
96 96
97extern void pcibios_resource_to_bus(struct pci_dev *dev,
98 struct pci_bus_region *region,
99 struct resource *res);
100
101extern void pcibios_bus_to_resource(struct pci_dev *dev,
102 struct resource *res,
103 struct pci_bus_region *region);
104
105static inline struct resource *pcibios_select_root(struct pci_dev *pdev, 97static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
106 struct resource *res) 98 struct resource *res)
107{ 99{
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 85f2ac1230a8..d10403dadd2b 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -46,9 +46,6 @@ static int global_phb_number; /* Global phb counter */
46/* ISA Memory physical address */ 46/* ISA Memory physical address */
47resource_size_t isa_mem_base; 47resource_size_t isa_mem_base;
48 48
49/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
50unsigned int pci_flags;
51
52static struct dma_map_ops *pci_dma_ops = &dma_direct_ops; 49static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
53 50
54unsigned long isa_io_base; 51unsigned long isa_io_base;
@@ -833,64 +830,7 @@ int pci_proc_domain(struct pci_bus *bus)
833{ 830{
834 struct pci_controller *hose = pci_bus_to_host(bus); 831 struct pci_controller *hose = pci_bus_to_host(bus);
835 832
836 if (!(pci_flags & PCI_ENABLE_PROC_DOMAINS)) 833 return 0;
837 return 0;
838 if (pci_flags & PCI_COMPAT_DOMAIN_0)
839 return hose->global_number != 0;
840 return 1;
841}
842
843void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
844 struct resource *res)
845{
846 resource_size_t offset = 0, mask = (resource_size_t)-1;
847 struct pci_controller *hose = pci_bus_to_host(dev->bus);
848
849 if (!hose)
850 return;
851 if (res->flags & IORESOURCE_IO) {
852 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
853 mask = 0xffffffffu;
854 } else if (res->flags & IORESOURCE_MEM)
855 offset = hose->pci_mem_offset;
856
857 region->start = (res->start - offset) & mask;
858 region->end = (res->end - offset) & mask;
859}
860EXPORT_SYMBOL(pcibios_resource_to_bus);
861
862void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
863 struct pci_bus_region *region)
864{
865 resource_size_t offset = 0, mask = (resource_size_t)-1;
866 struct pci_controller *hose = pci_bus_to_host(dev->bus);
867
868 if (!hose)
869 return;
870 if (res->flags & IORESOURCE_IO) {
871 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
872 mask = 0xffffffffu;
873 } else if (res->flags & IORESOURCE_MEM)
874 offset = hose->pci_mem_offset;
875 res->start = (region->start + offset) & mask;
876 res->end = (region->end + offset) & mask;
877}
878EXPORT_SYMBOL(pcibios_bus_to_resource);
879
880/* Fixup a bus resource into a linux resource */
881static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
882{
883 struct pci_controller *hose = pci_bus_to_host(dev->bus);
884 resource_size_t offset = 0, mask = (resource_size_t)-1;
885
886 if (res->flags & IORESOURCE_IO) {
887 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
888 mask = 0xffffffffu;
889 } else if (res->flags & IORESOURCE_MEM)
890 offset = hose->pci_mem_offset;
891
892 res->start = (res->start + offset) & mask;
893 res->end = (res->end + offset) & mask;
894} 834}
895 835
896/* This header fixup will do the resource fixup for all devices as they are 836/* This header fixup will do the resource fixup for all devices as they are
@@ -910,13 +850,7 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
910 struct resource *res = dev->resource + i; 850 struct resource *res = dev->resource + i;
911 if (!res->flags) 851 if (!res->flags)
912 continue; 852 continue;
913 /* On platforms that have PCI_PROBE_ONLY set, we don't 853 if (res->start == 0) {
914 * consider 0 as an unassigned BAR value. It's technically
915 * a valid value, but linux doesn't like it... so when we can
916 * re-assign things, we do so, but if we can't, we keep it
917 * around and hope for the best...
918 */
919 if (res->start == 0 && !(pci_flags & PCI_PROBE_ONLY)) {
920 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]" \ 854 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]" \
921 "is unassigned\n", 855 "is unassigned\n",
922 pci_name(dev), i, 856 pci_name(dev), i,
@@ -929,18 +863,11 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
929 continue; 863 continue;
930 } 864 }
931 865
932 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n", 866 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]\n",
933 pci_name(dev), i, 867 pci_name(dev), i,
934 (unsigned long long)res->start,\ 868 (unsigned long long)res->start,\
935 (unsigned long long)res->end, 869 (unsigned long long)res->end,
936 (unsigned int)res->flags); 870 (unsigned int)res->flags);
937
938 fixup_resource(res, dev);
939
940 pr_debug("PCI:%s %016llx-%016llx\n",
941 pci_name(dev),
942 (unsigned long long)res->start,
943 (unsigned long long)res->end);
944 } 871 }
945} 872}
946DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); 873DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
@@ -959,10 +886,6 @@ static int __devinit pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
959 u16 command; 886 u16 command;
960 int i; 887 int i;
961 888
962 /* We don't do anything if PCI_PROBE_ONLY is set */
963 if (pci_flags & PCI_PROBE_ONLY)
964 return 0;
965
966 /* Job is a bit different between memory and IO */ 889 /* Job is a bit different between memory and IO */
967 if (res->flags & IORESOURCE_MEM) { 890 if (res->flags & IORESOURCE_MEM) {
968 /* If the BAR is non-0 (res != pci_mem_offset) then it's 891 /* If the BAR is non-0 (res != pci_mem_offset) then it's
@@ -1037,9 +960,6 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
1037 (unsigned long long)res->end, 960 (unsigned long long)res->end,
1038 (unsigned int)res->flags); 961 (unsigned int)res->flags);
1039 962
1040 /* Perform fixup */
1041 fixup_resource(res, dev);
1042
1043 /* Try to detect uninitialized P2P bridge resources, 963 /* Try to detect uninitialized P2P bridge resources,
1044 * and clear them out so they get re-assigned later 964 * and clear them out so they get re-assigned later
1045 */ 965 */
@@ -1107,9 +1027,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
1107 1027
1108static int skip_isa_ioresource_align(struct pci_dev *dev) 1028static int skip_isa_ioresource_align(struct pci_dev *dev)
1109{ 1029{
1110 if ((pci_flags & PCI_CAN_SKIP_ISA_ALIGN) &&
1111 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
1112 return 1;
1113 return 0; 1030 return 0;
1114} 1031}
1115 1032
@@ -1236,8 +1153,6 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
1236 * and as such ensure proper re-allocation 1153 * and as such ensure proper re-allocation
1237 * later. 1154 * later.
1238 */ 1155 */
1239 if (pci_flags & PCI_REASSIGN_ALL_RSRC)
1240 goto clear_resource;
1241 pr = pci_find_parent_resource(bus->self, res); 1156 pr = pci_find_parent_resource(bus->self, res);
1242 if (pr == res) { 1157 if (pr == res) {
1243 /* this happens when the generic PCI 1158 /* this happens when the generic PCI
@@ -1422,27 +1337,19 @@ void __init pcibios_resource_survey(void)
1422 list_for_each_entry(b, &pci_root_buses, node) 1337 list_for_each_entry(b, &pci_root_buses, node)
1423 pcibios_allocate_bus_resources(b); 1338 pcibios_allocate_bus_resources(b);
1424 1339
1425 if (!(pci_flags & PCI_REASSIGN_ALL_RSRC)) { 1340 pcibios_allocate_resources(0);
1426 pcibios_allocate_resources(0); 1341 pcibios_allocate_resources(1);
1427 pcibios_allocate_resources(1);
1428 }
1429 1342
1430 /* Before we start assigning unassigned resource, we try to reserve 1343 /* Before we start assigning unassigned resource, we try to reserve
1431 * the low IO area and the VGA memory area if they intersect the 1344 * the low IO area and the VGA memory area if they intersect the
1432 * bus available resources to avoid allocating things on top of them 1345 * bus available resources to avoid allocating things on top of them
1433 */ 1346 */
1434 if (!(pci_flags & PCI_PROBE_ONLY)) { 1347 list_for_each_entry(b, &pci_root_buses, node)
1435 list_for_each_entry(b, &pci_root_buses, node) 1348 pcibios_reserve_legacy_regions(b);
1436 pcibios_reserve_legacy_regions(b);
1437 }
1438 1349
1439 /* Now, if the platform didn't decide to blindly trust the firmware, 1350 /* Now proceed to assigning things that were left unassigned */
1440 * we proceed to assigning things that were left unassigned 1351 pr_debug("PCI: Assigning unassigned resources...\n");
1441 */ 1352 pci_assign_unassigned_resources();
1442 if (!(pci_flags & PCI_PROBE_ONLY)) {
1443 pr_debug("PCI: Assigning unassigned resources...\n");
1444 pci_assign_unassigned_resources();
1445 }
1446} 1353}
1447 1354
1448#ifdef CONFIG_HOTPLUG 1355#ifdef CONFIG_HOTPLUG
@@ -1535,7 +1442,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
1535 res->end = res->start + IO_SPACE_LIMIT; 1442 res->end = res->start + IO_SPACE_LIMIT;
1536 res->flags = IORESOURCE_IO; 1443 res->flags = IORESOURCE_IO;
1537 } 1444 }
1538 pci_add_resource(resources, res); 1445 pci_add_resource_offset(resources, res, hose->io_base_virt - _IO_BASE);
1539 1446
1540 pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n", 1447 pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n",
1541 (unsigned long long)res->start, 1448 (unsigned long long)res->start,
@@ -1558,7 +1465,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
1558 res->flags = IORESOURCE_MEM; 1465 res->flags = IORESOURCE_MEM;
1559 1466
1560 } 1467 }
1561 pci_add_resource(resources, res); 1468 pci_add_resource_offset(resources, res, hose->pci_mem_offset);
1562 1469
1563 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", 1470 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n",
1564 i, (unsigned long long)res->start, 1471 i, (unsigned long long)res->start,
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 576397c69920..fcd4060f6421 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -92,6 +92,7 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
92#include <asm/scatterlist.h> 92#include <asm/scatterlist.h>
93#include <linux/string.h> 93#include <linux/string.h>
94#include <asm/io.h> 94#include <asm/io.h>
95#include <asm-generic/pci-bridge.h>
95 96
96struct pci_dev; 97struct pci_dev;
97 98
@@ -112,12 +113,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
112} 113}
113#endif 114#endif
114 115
115extern void pcibios_resource_to_bus(struct pci_dev *dev,
116 struct pci_bus_region *region, struct resource *res);
117
118extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
119 struct pci_bus_region *region);
120
121#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 116#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
122 117
123static inline int pci_proc_domain(struct pci_bus *bus) 118static inline int pci_proc_domain(struct pci_bus *bus)
@@ -145,8 +140,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
145#define arch_setup_msi_irqs arch_setup_msi_irqs 140#define arch_setup_msi_irqs arch_setup_msi_irqs
146#endif 141#endif
147 142
148extern int pci_probe_only;
149
150extern char * (*pcibios_plat_setup)(char *str); 143extern char * (*pcibios_plat_setup)(char *str);
151 144
152#endif /* _ASM_PCI_H */ 145#endif /* _ASM_PCI_H */
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index acacd1407c63..9553b14002dd 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -51,67 +51,6 @@ static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
51DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, 51DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
52 qube_raq_galileo_early_fixup); 52 qube_raq_galileo_early_fixup);
53 53
54static void __devinit cobalt_legacy_ide_resource_fixup(struct pci_dev *dev,
55 struct resource *res)
56{
57 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
58 unsigned long offset = hose->io_offset;
59 struct resource orig = *res;
60
61 if (!(res->flags & IORESOURCE_IO) ||
62 !(res->flags & IORESOURCE_PCI_FIXED))
63 return;
64
65 res->start -= offset;
66 res->end -= offset;
67 dev_printk(KERN_DEBUG, &dev->dev, "converted legacy %pR to bus %pR\n",
68 &orig, res);
69}
70
71static void __devinit cobalt_legacy_ide_fixup(struct pci_dev *dev)
72{
73 u32 class;
74 u8 progif;
75
76 /*
77 * If the IDE controller is in legacy mode, pci_setup_device() fills in
78 * the resources with the legacy addresses that normally appear on the
79 * PCI bus, just as if we had read them from a BAR.
80 *
81 * However, with the GT-64111, those legacy addresses, e.g., 0x1f0,
82 * will never appear on the PCI bus because it converts memory accesses
83 * in the PCI I/O region (which is never at address zero) into I/O port
84 * accesses with no address translation.
85 *
86 * For example, if GT_DEF_PCI0_IO_BASE is 0x10000000, a load or store
87 * to physical address 0x100001f0 will become a PCI access to I/O port
88 * 0x100001f0. There's no way to generate an access to I/O port 0x1f0,
89 * but the VT82C586 IDE controller does respond at 0x100001f0 because
90 * it only decodes the low 24 bits of the address.
91 *
92 * When this quirk runs, the pci_dev resources should contain bus
93 * addresses, not Linux I/O port numbers, so convert legacy addresses
94 * like 0x1f0 to bus addresses like 0x100001f0. Later, we'll convert
95 * them back with pcibios_fixup_bus() or pcibios_bus_to_resource().
96 */
97 class = dev->class >> 8;
98 if (class != PCI_CLASS_STORAGE_IDE)
99 return;
100
101 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
102 if ((progif & 1) == 0) {
103 cobalt_legacy_ide_resource_fixup(dev, &dev->resource[0]);
104 cobalt_legacy_ide_resource_fixup(dev, &dev->resource[1]);
105 }
106 if ((progif & 4) == 0) {
107 cobalt_legacy_ide_resource_fixup(dev, &dev->resource[2]);
108 cobalt_legacy_ide_resource_fixup(dev, &dev->resource[3]);
109 }
110}
111
112DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
113 cobalt_legacy_ide_fixup);
114
115static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev) 54static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
116{ 55{
117 unsigned short cfgword; 56 unsigned short cfgword;
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index af8c31996965..37b52dc3d27e 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -204,7 +204,7 @@ static int __init bcm1480_pcibios_init(void)
204 uint64_t reg; 204 uint64_t reg;
205 205
206 /* CFE will assign PCI resources */ 206 /* CFE will assign PCI resources */
207 pci_probe_only = 1; 207 pci_set_flags(PCI_PROBE_ONLY);
208 208
209 /* Avoid ISA compat ranges. */ 209 /* Avoid ISA compat ranges. */
210 PCIBIOS_MIN_IO = 0x00008000UL; 210 PCIBIOS_MIN_IO = 0x00008000UL;
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 193e9494f98e..0fbe4c0c170a 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -50,7 +50,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
50 bridge_t *bridge; 50 bridge_t *bridge;
51 int slot; 51 int slot;
52 52
53 pci_probe_only = 1; 53 pci_set_flags(PCI_PROBE_ONLY);
54 54
55 printk("a bridge\n"); 55 printk("a bridge\n");
56 56
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index be1e1afe12c3..030c77e7926e 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -270,7 +270,8 @@ static int __devinit ltq_pci_probe(struct platform_device *pdev)
270{ 270{
271 struct ltq_pci_data *ltq_pci_data = 271 struct ltq_pci_data *ltq_pci_data =
272 (struct ltq_pci_data *) pdev->dev.platform_data; 272 (struct ltq_pci_data *) pdev->dev.platform_data;
273 pci_probe_only = 0; 273
274 pci_clear_flags(PCI_PROBE_ONLY);
274 ltq_pci_irq_map = ltq_pci_data->irq; 275 ltq_pci_irq_map = ltq_pci_data->irq;
275 ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE); 276 ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE);
276 ltq_pci_mapped_cfg = 277 ltq_pci_mapped_cfg =
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 1711e8e101bc..dd97f3a83baa 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -213,7 +213,7 @@ static int __init sb1250_pcibios_init(void)
213 uint64_t reg; 213 uint64_t reg;
214 214
215 /* CFE will assign PCI resources */ 215 /* CFE will assign PCI resources */
216 pci_probe_only = 1; 216 pci_set_flags(PCI_PROBE_ONLY);
217 217
218 /* Avoid ISA compat ranges. */ 218 /* Avoid ISA compat ranges. */
219 PCIBIOS_MIN_IO = 0x00008000UL; 219 PCIBIOS_MIN_IO = 0x00008000UL;
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 3d701a962ef4..1644805a6730 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -292,7 +292,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
292static int __init pcibios_init(void) 292static int __init pcibios_init(void)
293{ 293{
294 /* PSB assigns PCI resources */ 294 /* PSB assigns PCI resources */
295 pci_probe_only = 1; 295 pci_set_flags(PCI_PROBE_ONLY);
296 pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20); 296 pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20);
297 297
298 /* Extend IO port for memory mapped io */ 298 /* Extend IO port for memory mapped io */
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 15521505ebe8..0514866fa925 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -20,16 +20,9 @@
20#include <asm/cpu-info.h> 20#include <asm/cpu-info.h>
21 21
22/* 22/*
23 * Indicate whether we respect the PCI setup left by the firmware. 23 * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
24 * 24 * assignments.
25 * Make this long-lived so that we know when shutting down
26 * whether we probed only or not.
27 */ 25 */
28int pci_probe_only;
29
30#define PCI_ASSIGN_ALL_BUSSES 1
31
32unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
33 26
34/* 27/*
35 * The PCI controller list. 28 * The PCI controller list.
@@ -92,11 +85,12 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
92 if (!hose->iommu) 85 if (!hose->iommu)
93 PCI_DMA_BUS_IS_PHYS = 1; 86 PCI_DMA_BUS_IS_PHYS = 1;
94 87
95 if (hose->get_busno && pci_probe_only) 88 if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY))
96 next_busno = (*hose->get_busno)(); 89 next_busno = (*hose->get_busno)();
97 90
98 pci_add_resource(&resources, hose->mem_resource); 91 pci_add_resource_offset(&resources,
99 pci_add_resource(&resources, hose->io_resource); 92 hose->mem_resource, hose->mem_offset);
93 pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset);
100 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, 94 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
101 &resources); 95 &resources);
102 if (!bus) 96 if (!bus)
@@ -115,7 +109,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
115 need_domain_info = 1; 109 need_domain_info = 1;
116 } 110 }
117 111
118 if (!pci_probe_only) { 112 if (!pci_has_flag(PCI_PROBE_ONLY)) {
119 pci_bus_size_bridges(bus); 113 pci_bus_size_bridges(bus);
120 pci_bus_assign_resources(bus); 114 pci_bus_assign_resources(bus);
121 pci_enable_bridges(bus); 115 pci_enable_bridges(bus);
@@ -241,7 +235,7 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
241 235
242unsigned int pcibios_assign_all_busses(void) 236unsigned int pcibios_assign_all_busses(void)
243{ 237{
244 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 238 return 1;
245} 239}
246 240
247int pcibios_enable_device(struct pci_dev *dev, int mask) 241int pcibios_enable_device(struct pci_dev *dev, int mask)
@@ -254,42 +248,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
254 return pcibios_plat_dev_init(dev); 248 return pcibios_plat_dev_init(dev);
255} 249}
256 250
257static void pcibios_fixup_device_resources(struct pci_dev *dev,
258 struct pci_bus *bus)
259{
260 /* Update device resources. */
261 struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
262 unsigned long offset = 0;
263 int i;
264
265 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
266 if (!dev->resource[i].start)
267 continue;
268 if (dev->resource[i].flags & IORESOURCE_IO)
269 offset = hose->io_offset;
270 else if (dev->resource[i].flags & IORESOURCE_MEM)
271 offset = hose->mem_offset;
272
273 dev->resource[i].start += offset;
274 dev->resource[i].end += offset;
275 }
276}
277
278void __devinit pcibios_fixup_bus(struct pci_bus *bus) 251void __devinit pcibios_fixup_bus(struct pci_bus *bus)
279{ 252{
280 /* Propagate hose info into the subordinate devices. */
281
282 struct pci_dev *dev = bus->self; 253 struct pci_dev *dev = bus->self;
283 254
284 if (pci_probe_only && dev && 255 if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
285 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 256 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
286 pci_read_bridge_bases(bus); 257 pci_read_bridge_bases(bus);
287 pcibios_fixup_device_resources(dev, bus);
288 }
289
290 list_for_each_entry(dev, &bus->devices, bus_list) {
291 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
292 pcibios_fixup_device_resources(dev, bus);
293 } 258 }
294} 259}
295 260
@@ -299,40 +264,7 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
299 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 264 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
300} 265}
301 266
302void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
303 struct resource *res)
304{
305 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
306 unsigned long offset = 0;
307
308 if (res->flags & IORESOURCE_IO)
309 offset = hose->io_offset;
310 else if (res->flags & IORESOURCE_MEM)
311 offset = hose->mem_offset;
312
313 region->start = res->start - offset;
314 region->end = res->end - offset;
315}
316
317void __devinit
318pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
319 struct pci_bus_region *region)
320{
321 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
322 unsigned long offset = 0;
323
324 if (res->flags & IORESOURCE_IO)
325 offset = hose->io_offset;
326 else if (res->flags & IORESOURCE_MEM)
327 offset = hose->mem_offset;
328
329 res->start = region->start + offset;
330 res->end = region->end + offset;
331}
332
333#ifdef CONFIG_HOTPLUG 267#ifdef CONFIG_HOTPLUG
334EXPORT_SYMBOL(pcibios_resource_to_bus);
335EXPORT_SYMBOL(pcibios_bus_to_resource);
336EXPORT_SYMBOL(PCIBIOS_MIN_IO); 268EXPORT_SYMBOL(PCIBIOS_MIN_IO);
337EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 269EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
338#endif 270#endif
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index 6095a28561dd..8137c25c4e15 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -85,22 +85,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
85/* implement the pci_ DMA API in terms of the generic device dma_ one */ 85/* implement the pci_ DMA API in terms of the generic device dma_ one */
86#include <asm-generic/pci-dma-compat.h> 86#include <asm-generic/pci-dma-compat.h>
87 87
88/**
89 * pcibios_resource_to_bus - convert resource to PCI bus address
90 * @dev: device which owns this resource
91 * @region: converted bus-centric region (start,end)
92 * @res: resource to convert
93 *
94 * Convert a resource to a PCI device bus address or bus window.
95 */
96extern void pcibios_resource_to_bus(struct pci_dev *dev,
97 struct pci_bus_region *region,
98 struct resource *res);
99
100extern void pcibios_bus_to_resource(struct pci_dev *dev,
101 struct resource *res,
102 struct pci_bus_region *region);
103
104static inline struct resource * 88static inline struct resource *
105pcibios_select_root(struct pci_dev *pdev, struct resource *res) 89pcibios_select_root(struct pci_dev *pdev, struct resource *res)
106{ 90{
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index a7c5f08ca9f5..6dce9fc2cf3c 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -32,8 +32,7 @@ struct pci_ops *pci_root_ops;
32 * insert specific PCI bus resources instead of using the platform-level bus 32 * insert specific PCI bus resources instead of using the platform-level bus
33 * resources directly for the PCI root bus. 33 * resources directly for the PCI root bus.
34 * 34 *
35 * These are configured and inserted by pcibios_init() and are attached to the 35 * These are configured and inserted by pcibios_init().
36 * root bus by pcibios_fixup_bus().
37 */ 36 */
38static struct resource pci_ioport_resource = { 37static struct resource pci_ioport_resource = {
39 .name = "PCI IO", 38 .name = "PCI IO",
@@ -78,52 +77,6 @@ static inline int __query(const struct pci_bus *bus, unsigned int devfn)
78} 77}
79 78
80/* 79/*
81 * translate Linuxcentric addresses to PCI bus addresses
82 */
83void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
84 struct resource *res)
85{
86 if (res->flags & IORESOURCE_IO) {
87 region->start = (res->start & 0x00ffffff);
88 region->end = (res->end & 0x00ffffff);
89 }
90
91 if (res->flags & IORESOURCE_MEM) {
92 region->start = (res->start & 0x03ffffff) | MEM_PAGING_REG;
93 region->end = (res->end & 0x03ffffff) | MEM_PAGING_REG;
94 }
95
96#if 0
97 printk(KERN_DEBUG "RES->BUS: %lx-%lx => %lx-%lx\n",
98 res->start, res->end, region->start, region->end);
99#endif
100}
101EXPORT_SYMBOL(pcibios_resource_to_bus);
102
103/*
104 * translate PCI bus addresses to Linuxcentric addresses
105 */
106void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
107 struct pci_bus_region *region)
108{
109 if (res->flags & IORESOURCE_IO) {
110 res->start = (region->start & 0x00ffffff) | 0xbe000000;
111 res->end = (region->end & 0x00ffffff) | 0xbe000000;
112 }
113
114 if (res->flags & IORESOURCE_MEM) {
115 res->start = (region->start & 0x03ffffff) | 0xb8000000;
116 res->end = (region->end & 0x03ffffff) | 0xb8000000;
117 }
118
119#if 0
120 printk(KERN_INFO "BUS->RES: %lx-%lx => %lx-%lx\n",
121 region->start, region->end, res->start, res->end);
122#endif
123}
124EXPORT_SYMBOL(pcibios_bus_to_resource);
125
126/*
127 * 80 *
128 */ 81 */
129static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn, 82static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn,
@@ -364,9 +317,6 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
364 if (!dev->resource[i].flags) 317 if (!dev->resource[i].flags)
365 continue; 318 continue;
366 319
367 region.start = dev->resource[i].start;
368 region.end = dev->resource[i].end;
369 pcibios_bus_to_resource(dev, &dev->resource[i], &region);
370 if (is_valid_resource(dev, i)) 320 if (is_valid_resource(dev, i))
371 pci_claim_resource(dev, i); 321 pci_claim_resource(dev, i);
372 } 322 }
@@ -397,6 +347,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
397 */ 347 */
398static int __init pcibios_init(void) 348static int __init pcibios_init(void)
399{ 349{
350 resource_size_t io_offset, mem_offset;
400 LIST_HEAD(resources); 351 LIST_HEAD(resources);
401 352
402 ioport_resource.start = 0xA0000000; 353 ioport_resource.start = 0xA0000000;
@@ -420,8 +371,13 @@ static int __init pcibios_init(void)
420 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n", 371 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
421 MEM_PAGING_REG); 372 MEM_PAGING_REG);
422 373
423 pci_add_resource(&resources, &pci_ioport_resource); 374 io_offset = pci_ioport_resource.start -
424 pci_add_resource(&resources, &pci_iomem_resource); 375 (pci_ioport_resource.start & 0x00ffffff);
376 mem_offset = pci_iomem_resource.start -
377 ((pci_iomem_resource.start & 0x03ffffff) | MEM_PAGING_REG);
378
379 pci_add_resource_offset(&resources, &pci_ioport_resource, io_offset);
380 pci_add_resource_offset(&resources, &pci_iomem_resource, mem_offset);
425 pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL, 381 pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL,
426 &resources); 382 &resources);
427 383
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 2242a5c636c2..3234f492d575 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -82,38 +82,8 @@ struct pci_hba_data {
82 82
83#ifdef CONFIG_64BIT 83#ifdef CONFIG_64BIT
84#define PCI_F_EXTEND 0xffffffff00000000UL 84#define PCI_F_EXTEND 0xffffffff00000000UL
85#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
86
87/* We need to know if an address is LMMMIO or GMMIO.
88 * LMMIO requires mangling and GMMIO we must use as-is.
89 */
90static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
91{
92 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
93}
94
95/*
96** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
97** See pci.c for more conversions used by Generic PCI code.
98**
99** Platform characteristics/firmware guarantee that
100** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
101** (2) PA_VIEW == IO_VIEW for GMMIO
102*/
103#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
104 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
105 : (a)) /* GMMIO */
106#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
107 ? (a) + hba->lmmio_space_offset \
108 : (a))
109
110#else /* !CONFIG_64BIT */ 85#else /* !CONFIG_64BIT */
111
112#define PCI_BUS_ADDR(hba,a) (a)
113#define PCI_HOST_ADDR(hba,a) (a)
114#define PCI_F_EXTEND 0UL 86#define PCI_F_EXTEND 0UL
115#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
116
117#endif /* !CONFIG_64BIT */ 87#endif /* !CONFIG_64BIT */
118 88
119/* 89/*
@@ -245,14 +215,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
245} 215}
246#endif 216#endif
247 217
248extern void
249pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
250 struct resource *res);
251
252extern void
253pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
254 struct pci_bus_region *region);
255
256static inline void pcibios_penalize_isa_irq(int irq, int active) 218static inline void pcibios_penalize_isa_irq(int irq, int active)
257{ 219{
258 /* We don't need to penalize isa irq's */ 220 /* We don't need to penalize isa irq's */
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 9efd97405317..74d544b1cd22 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -195,58 +195,6 @@ void __init pcibios_init_bus(struct pci_bus *bus)
195 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl); 195 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl);
196} 196}
197 197
198/* called by drivers/pci/setup-bus.c:pci_setup_bridge(). */
199void __devinit pcibios_resource_to_bus(struct pci_dev *dev,
200 struct pci_bus_region *region, struct resource *res)
201{
202#ifdef CONFIG_64BIT
203 struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
204#endif
205
206 if (res->flags & IORESOURCE_IO) {
207 /*
208 ** I/O space may see busnumbers here. Something
209 ** in the form of 0xbbxxxx where bb is the bus num
210 ** and xxxx is the I/O port space address.
211 ** Remaining address translation are done in the
212 ** PCI Host adapter specific code - ie dino_out8.
213 */
214 region->start = PCI_PORT_ADDR(res->start);
215 region->end = PCI_PORT_ADDR(res->end);
216 } else if (res->flags & IORESOURCE_MEM) {
217 /* Convert MMIO addr to PCI addr (undo global virtualization) */
218 region->start = PCI_BUS_ADDR(hba, res->start);
219 region->end = PCI_BUS_ADDR(hba, res->end);
220 }
221
222 DBG_RES("pcibios_resource_to_bus(%02x %s [%lx,%lx])\n",
223 dev->bus->number, res->flags & IORESOURCE_IO ? "IO" : "MEM",
224 region->start, region->end);
225}
226
227void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
228 struct pci_bus_region *region)
229{
230#ifdef CONFIG_64BIT
231 struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
232#endif
233
234 if (res->flags & IORESOURCE_MEM) {
235 res->start = PCI_HOST_ADDR(hba, region->start);
236 res->end = PCI_HOST_ADDR(hba, region->end);
237 }
238
239 if (res->flags & IORESOURCE_IO) {
240 res->start = region->start;
241 res->end = region->end;
242 }
243}
244
245#ifdef CONFIG_HOTPLUG
246EXPORT_SYMBOL(pcibios_resource_to_bus);
247EXPORT_SYMBOL(pcibios_bus_to_resource);
248#endif
249
250/* 198/*
251 * pcibios align resources() is called every time generic PCI code 199 * pcibios align resources() is called every time generic PCI code
252 * wants to generate a new address. The process of looking for 200 * wants to generate a new address. The process of looking for
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index f54b3d26ce9d..6653f2743c4e 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -154,14 +154,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
154 154
155#endif /* CONFIG_PPC64 */ 155#endif /* CONFIG_PPC64 */
156 156
157extern void pcibios_resource_to_bus(struct pci_dev *dev,
158 struct pci_bus_region *region,
159 struct resource *res);
160
161extern void pcibios_bus_to_resource(struct pci_dev *dev,
162 struct resource *res,
163 struct pci_bus_region *region);
164
165extern void pcibios_claim_one_bus(struct pci_bus *b); 157extern void pcibios_claim_one_bus(struct pci_bus *b);
166 158
167extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); 159extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
@@ -190,6 +182,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
190 const struct resource *rsrc, 182 const struct resource *rsrc,
191 resource_size_t *start, resource_size_t *end); 183 resource_size_t *start, resource_size_t *end);
192 184
185extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
193extern void pcibios_setup_bus_devices(struct pci_bus *bus); 186extern void pcibios_setup_bus_devices(struct pci_bus *bus);
194extern void pcibios_setup_bus_self(struct pci_bus *bus); 187extern void pcibios_setup_bus_self(struct pci_bus *bus);
195extern void pcibios_setup_phb_io_space(struct pci_controller *hose); 188extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index e660b37aa7d0..80fa704d410f 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -45,8 +45,6 @@ extern void init_pci_config_tokens (void);
45extern unsigned long get_phb_buid (struct device_node *); 45extern unsigned long get_phb_buid (struct device_node *);
46extern int rtas_setup_phb(struct pci_controller *phb); 46extern int rtas_setup_phb(struct pci_controller *phb);
47 47
48extern unsigned long pci_probe_only;
49
50#ifdef CONFIG_EEH 48#ifdef CONFIG_EEH
51 49
52void pci_addr_cache_build(void); 50void pci_addr_cache_build(void);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index d0373bcb7c9d..8e78e93c8185 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -49,9 +49,6 @@ static int global_phb_number; /* Global phb counter */
49/* ISA Memory physical address */ 49/* ISA Memory physical address */
50resource_size_t isa_mem_base; 50resource_size_t isa_mem_base;
51 51
52/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
53unsigned int pci_flags = 0;
54
55 52
56static struct dma_map_ops *pci_dma_ops = &dma_direct_ops; 53static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
57 54
@@ -834,60 +831,6 @@ int pci_proc_domain(struct pci_bus *bus)
834 return 1; 831 return 1;
835} 832}
836 833
837void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
838 struct resource *res)
839{
840 resource_size_t offset = 0, mask = (resource_size_t)-1;
841 struct pci_controller *hose = pci_bus_to_host(dev->bus);
842
843 if (!hose)
844 return;
845 if (res->flags & IORESOURCE_IO) {
846 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
847 mask = 0xffffffffu;
848 } else if (res->flags & IORESOURCE_MEM)
849 offset = hose->pci_mem_offset;
850
851 region->start = (res->start - offset) & mask;
852 region->end = (res->end - offset) & mask;
853}
854EXPORT_SYMBOL(pcibios_resource_to_bus);
855
856void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
857 struct pci_bus_region *region)
858{
859 resource_size_t offset = 0, mask = (resource_size_t)-1;
860 struct pci_controller *hose = pci_bus_to_host(dev->bus);
861
862 if (!hose)
863 return;
864 if (res->flags & IORESOURCE_IO) {
865 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
866 mask = 0xffffffffu;
867 } else if (res->flags & IORESOURCE_MEM)
868 offset = hose->pci_mem_offset;
869 res->start = (region->start + offset) & mask;
870 res->end = (region->end + offset) & mask;
871}
872EXPORT_SYMBOL(pcibios_bus_to_resource);
873
874/* Fixup a bus resource into a linux resource */
875static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
876{
877 struct pci_controller *hose = pci_bus_to_host(dev->bus);
878 resource_size_t offset = 0, mask = (resource_size_t)-1;
879
880 if (res->flags & IORESOURCE_IO) {
881 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
882 mask = 0xffffffffu;
883 } else if (res->flags & IORESOURCE_MEM)
884 offset = hose->pci_mem_offset;
885
886 res->start = (res->start + offset) & mask;
887 res->end = (res->end + offset) & mask;
888}
889
890
891/* This header fixup will do the resource fixup for all devices as they are 834/* This header fixup will do the resource fixup for all devices as they are
892 * probed, but not for bridge ranges 835 * probed, but not for bridge ranges
893 */ 836 */
@@ -927,18 +870,11 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
927 continue; 870 continue;
928 } 871 }
929 872
930 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n", 873 pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]\n",
931 pci_name(dev), i, 874 pci_name(dev), i,
932 (unsigned long long)res->start,\ 875 (unsigned long long)res->start,\
933 (unsigned long long)res->end, 876 (unsigned long long)res->end,
934 (unsigned int)res->flags); 877 (unsigned int)res->flags);
935
936 fixup_resource(res, dev);
937
938 pr_debug("PCI:%s %016llx-%016llx\n",
939 pci_name(dev),
940 (unsigned long long)res->start,
941 (unsigned long long)res->end);
942 } 878 }
943 879
944 /* Call machine specific resource fixup */ 880 /* Call machine specific resource fixup */
@@ -1040,27 +976,18 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
1040 continue; 976 continue;
1041 } 977 }
1042 978
1043 pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n", 979 pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x]\n",
1044 pci_name(dev), i, 980 pci_name(dev), i,
1045 (unsigned long long)res->start,\ 981 (unsigned long long)res->start,\
1046 (unsigned long long)res->end, 982 (unsigned long long)res->end,
1047 (unsigned int)res->flags); 983 (unsigned int)res->flags);
1048 984
1049 /* Perform fixup */
1050 fixup_resource(res, dev);
1051
1052 /* Try to detect uninitialized P2P bridge resources, 985 /* Try to detect uninitialized P2P bridge resources,
1053 * and clear them out so they get re-assigned later 986 * and clear them out so they get re-assigned later
1054 */ 987 */
1055 if (pcibios_uninitialized_bridge_resource(bus, res)) { 988 if (pcibios_uninitialized_bridge_resource(bus, res)) {
1056 res->flags = 0; 989 res->flags = 0;
1057 pr_debug("PCI:%s (unassigned)\n", pci_name(dev)); 990 pr_debug("PCI:%s (unassigned)\n", pci_name(dev));
1058 } else {
1059
1060 pr_debug("PCI:%s %016llx-%016llx\n",
1061 pci_name(dev),
1062 (unsigned long long)res->start,
1063 (unsigned long long)res->end);
1064 } 991 }
1065 } 992 }
1066} 993}
@@ -1550,6 +1477,11 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
1550 return pci_enable_resources(dev, mask); 1477 return pci_enable_resources(dev, mask);
1551} 1478}
1552 1479
1480resource_size_t pcibios_io_space_offset(struct pci_controller *hose)
1481{
1482 return (unsigned long) hose->io_base_virt - _IO_BASE;
1483}
1484
1553static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources) 1485static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
1554{ 1486{
1555 struct resource *res; 1487 struct resource *res;
@@ -1574,7 +1506,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
1574 (unsigned long long)res->start, 1506 (unsigned long long)res->start,
1575 (unsigned long long)res->end, 1507 (unsigned long long)res->end,
1576 (unsigned long)res->flags); 1508 (unsigned long)res->flags);
1577 pci_add_resource(resources, res); 1509 pci_add_resource_offset(resources, res, pcibios_io_space_offset(hose));
1578 1510
1579 /* Hookup PHB Memory resources */ 1511 /* Hookup PHB Memory resources */
1580 for (i = 0; i < 3; ++i) { 1512 for (i = 0; i < 3; ++i) {
@@ -1597,7 +1529,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
1597 (unsigned long long)res->start, 1529 (unsigned long long)res->start,
1598 (unsigned long long)res->end, 1530 (unsigned long long)res->end,
1599 (unsigned long)res->flags); 1531 (unsigned long)res->flags);
1600 pci_add_resource(resources, res); 1532 pci_add_resource_offset(resources, res, hose->pci_mem_offset);
1601 } 1533 }
1602 1534
1603 pr_debug("PCI: PHB MEM offset = %016llx\n", 1535 pr_debug("PCI: PHB MEM offset = %016llx\n",
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index fdd1a3d951dc..4b06ec5a502e 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -219,9 +219,9 @@ void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
219 struct resource *res = &hose->io_resource; 219 struct resource *res = &hose->io_resource;
220 220
221 /* Fixup IO space offset */ 221 /* Fixup IO space offset */
222 io_offset = (unsigned long)hose->io_base_virt - isa_io_base; 222 io_offset = pcibios_io_space_offset(hose);
223 res->start = (res->start + io_offset) & 0xffffffffu; 223 res->start += io_offset;
224 res->end = (res->end + io_offset) & 0xffffffffu; 224 res->end += io_offset;
225} 225}
226 226
227static int __init pcibios_init(void) 227static int __init pcibios_init(void)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 3318d39b7d4c..94a54f61d341 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -33,8 +33,6 @@
33#include <asm/machdep.h> 33#include <asm/machdep.h>
34#include <asm/ppc-pci.h> 34#include <asm/ppc-pci.h>
35 35
36unsigned long pci_probe_only = 1;
37
38/* pci_io_base -- the base address from which io bars are offsets. 36/* pci_io_base -- the base address from which io bars are offsets.
39 * This is the lowest I/O base address (so bar values are always positive), 37 * This is the lowest I/O base address (so bar values are always positive),
40 * and it *must* be the start of ISA space if an ISA bus exists because 38 * and it *must* be the start of ISA space if an ISA bus exists because
@@ -55,9 +53,6 @@ static int __init pcibios_init(void)
55 */ 53 */
56 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot; 54 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
57 55
58 if (pci_probe_only)
59 pci_add_flags(PCI_PROBE_ONLY);
60
61 /* On ppc64, we always enable PCI domains and we keep domain 0 56 /* On ppc64, we always enable PCI domains and we keep domain 0
62 * backward compatible in /proc for video cards 57 * backward compatible in /proc for video cards
63 */ 58 */
@@ -173,7 +168,7 @@ static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose)
173 return -ENOMEM; 168 return -ENOMEM;
174 169
175 /* Fixup hose IO resource */ 170 /* Fixup hose IO resource */
176 io_virt_offset = (unsigned long)hose->io_base_virt - _IO_BASE; 171 io_virt_offset = pcibios_io_space_offset(hose);
177 hose->io_resource.start += io_virt_offset; 172 hose->io_resource.start += io_virt_offset;
178 hose->io_resource.end += io_virt_offset; 173 hose->io_resource.end += io_virt_offset;
179 174
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index b37d0b5a796e..89dde171a6fa 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -75,6 +75,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
75{ 75{
76 u64 base, size; 76 u64 base, size;
77 unsigned int flags; 77 unsigned int flags;
78 struct pci_bus_region region;
78 struct resource *res; 79 struct resource *res;
79 const u32 *addrs; 80 const u32 *addrs;
80 u32 i; 81 u32 i;
@@ -106,10 +107,11 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
106 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i); 107 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
107 continue; 108 continue;
108 } 109 }
109 res->start = base;
110 res->end = base + size - 1;
111 res->flags = flags; 110 res->flags = flags;
112 res->name = pci_name(dev); 111 res->name = pci_name(dev);
112 region.start = base;
113 region.end = base + size - 1;
114 pcibios_bus_to_resource(dev, res, &region);
113 } 115 }
114} 116}
115 117
@@ -209,6 +211,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
209 struct pci_bus *bus; 211 struct pci_bus *bus;
210 const u32 *busrange, *ranges; 212 const u32 *busrange, *ranges;
211 int len, i, mode; 213 int len, i, mode;
214 struct pci_bus_region region;
212 struct resource *res; 215 struct resource *res;
213 unsigned int flags; 216 unsigned int flags;
214 u64 size; 217 u64 size;
@@ -270,9 +273,10 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
270 res = bus->resource[i]; 273 res = bus->resource[i];
271 ++i; 274 ++i;
272 } 275 }
273 res->start = of_read_number(&ranges[1], 2);
274 res->end = res->start + size - 1;
275 res->flags = flags; 276 res->flags = flags;
277 region.start = of_read_number(&ranges[1], 2);
278 region.end = region.start + size - 1;
279 pcibios_bus_to_resource(dev, res, &region);
276 } 280 }
277 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus), 281 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
278 bus->number); 282 bus->number);
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 517bd86bc3f0..179af906dcda 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -279,7 +279,7 @@ void __init find_and_init_phbs(void)
279 eeh_dev_phb_init(); 279 eeh_dev_phb_init();
280 280
281 /* 281 /*
282 * pci_probe_only and pci_assign_all_buses can be set via properties 282 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
283 * in chosen. 283 * in chosen.
284 */ 284 */
285 if (of_chosen) { 285 if (of_chosen) {
@@ -287,8 +287,12 @@ void __init find_and_init_phbs(void)
287 287
288 prop = of_get_property(of_chosen, 288 prop = of_get_property(of_chosen,
289 "linux,pci-probe-only", NULL); 289 "linux,pci-probe-only", NULL);
290 if (prop) 290 if (prop) {
291 pci_probe_only = *prop; 291 if (*prop)
292 pci_add_flags(PCI_PROBE_ONLY);
293 else
294 pci_clear_flags(PCI_PROBE_ONLY);
295 }
292 296
293#ifdef CONFIG_PPC32 /* Will be made generic soon */ 297#ifdef CONFIG_PPC32 /* Will be made generic soon */
294 prop = of_get_property(of_chosen, 298 prop = of_get_property(of_chosen,
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 401e3f3f74c8..465ee8f5c086 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -620,7 +620,7 @@ void __init maple_pci_init(void)
620 } 620 }
621 621
622 /* Tell pci.c to not change any resource allocations. */ 622 /* Tell pci.c to not change any resource allocations. */
623 pci_probe_only = 1; 623 pci_add_flags(PCI_PROBE_ONLY);
624} 624}
625 625
626int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) 626int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel)
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index b6a0ec45c695..aa862713258c 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -229,9 +229,6 @@ void __init pas_pci_init(void)
229 229
230 /* Setup the linkage between OF nodes and PHBs */ 230 /* Setup the linkage between OF nodes and PHBs */
231 pci_devs_phb_init(); 231 pci_devs_phb_init();
232
233 /* Use the common resource allocation mechanism */
234 pci_probe_only = 1;
235} 232}
236 233
237void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset) 234void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 31a7d3a7ce25..43bbe1bda939 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -1059,9 +1059,6 @@ void __init pmac_pci_init(void)
1059 } 1059 }
1060 /* pmac_check_ht_link(); */ 1060 /* pmac_check_ht_link(); */
1061 1061
1062 /* We can allocate missing resources if any */
1063 pci_probe_only = 0;
1064
1065#else /* CONFIG_PPC64 */ 1062#else /* CONFIG_PPC64 */
1066 init_p2pbridge(); 1063 init_p2pbridge();
1067 init_second_ohare(); 1064 init_second_ohare();
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 5e155dfc4320..fbdd74dac3ac 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1299,15 +1299,14 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
1299 /* Setup MSI support */ 1299 /* Setup MSI support */
1300 pnv_pci_init_ioda_msis(phb); 1300 pnv_pci_init_ioda_msis(phb);
1301 1301
1302 /* We set both probe_only and PCI_REASSIGN_ALL_RSRC. This is an 1302 /* We set both PCI_PROBE_ONLY and PCI_REASSIGN_ALL_RSRC. This is an
1303 * odd combination which essentially means that we skip all resource 1303 * odd combination which essentially means that we skip all resource
1304 * fixups and assignments in the generic code, and do it all 1304 * fixups and assignments in the generic code, and do it all
1305 * ourselves here 1305 * ourselves here
1306 */ 1306 */
1307 pci_probe_only = 1;
1308 ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb; 1307 ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb;
1309 ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook; 1308 ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
1310 pci_add_flags(PCI_REASSIGN_ALL_RSRC); 1309 pci_add_flags(PCI_PROBE_ONLY | PCI_REASSIGN_ALL_RSRC);
1311 1310
1312 /* Reset IODA tables to a clean state */ 1311 /* Reset IODA tables to a clean state */
1313 rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET); 1312 rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 214478d781ae..be3cfc5ceabb 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -562,10 +562,7 @@ void __init pnv_pci_init(void)
562{ 562{
563 struct device_node *np; 563 struct device_node *np;
564 564
565 pci_set_flags(PCI_CAN_SKIP_ISA_ALIGN); 565 pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN);
566
567 /* We do not want to just probe */
568 pci_probe_only = 0;
569 566
570 /* OPAL absent, try POPAL first then RTAS detection of PHBs */ 567 /* OPAL absent, try POPAL first then RTAS detection of PHBs */
571 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 568 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index fbb21fc3080b..8b7bafa489c2 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -84,7 +84,7 @@ void pcibios_remove_pci_devices(struct pci_bus *bus)
84 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) { 84 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
85 pr_debug(" * Removing %s...\n", pci_name(dev)); 85 pr_debug(" * Removing %s...\n", pci_name(dev));
86 eeh_remove_bus_device(dev); 86 eeh_remove_bus_device(dev);
87 pci_remove_bus_device(dev); 87 pci_stop_and_remove_bus_device(dev);
88 } 88 }
89} 89}
90EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices); 90EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 8f137af616af..51ecac920dd8 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -383,6 +383,9 @@ static void __init pSeries_setup_arch(void)
383 383
384 fwnmi_init(); 384 fwnmi_init();
385 385
386 /* By default, only probe PCI (can be overriden by rtas_pci) */
387 pci_add_flags(PCI_PROBE_ONLY);
388
386 /* Find and initialize PCI host bridges */ 389 /* Find and initialize PCI host bridges */
387 init_pci_config_tokens(); 390 init_pci_config_tokens();
388 eeh_pseries_init(); 391 eeh_pseries_init();
diff --git a/arch/powerpc/platforms/wsp/wsp_pci.c b/arch/powerpc/platforms/wsp/wsp_pci.c
index d24b3acf858e..763014cd1e62 100644
--- a/arch/powerpc/platforms/wsp/wsp_pci.c
+++ b/arch/powerpc/platforms/wsp/wsp_pci.c
@@ -682,7 +682,6 @@ static int __init wsp_setup_one_phb(struct device_node *np)
682 /* XXX Force re-assigning of everything for now */ 682 /* XXX Force re-assigning of everything for now */
683 pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC | 683 pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC |
684 PCI_ENABLE_PROC_DOMAINS); 684 PCI_ENABLE_PROC_DOMAINS);
685 pci_probe_only = 0;
686 685
687 /* Calculate how the TCE space is divided */ 686 /* Calculate how the TCE space is divided */
688 phb->dma32_base = 0; 687 phb->dma32_base = 0;
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 1e7b0e2e764d..9d10a3cb8797 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -37,11 +37,20 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
37 static int next_busno; 37 static int next_busno;
38 static int need_domain_info; 38 static int need_domain_info;
39 LIST_HEAD(resources); 39 LIST_HEAD(resources);
40 struct resource *res;
41 resource_size_t offset;
40 int i; 42 int i;
41 struct pci_bus *bus; 43 struct pci_bus *bus;
42 44
43 for (i = 0; i < hose->nr_resources; i++) 45 for (i = 0; i < hose->nr_resources; i++) {
44 pci_add_resource(&resources, hose->resources + i); 46 res = hose->resources + i;
47 offset = 0;
48 if (res->flags & IORESOURCE_IO)
49 offset = hose->io_offset;
50 else if (res->flags & IORESOURCE_MEM)
51 offset = hose->mem_offset;
52 pci_add_resource_offset(&resources, res, offset);
53 }
45 54
46 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, 55 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
47 &resources); 56 &resources);
@@ -143,42 +152,12 @@ static int __init pcibios_init(void)
143} 152}
144subsys_initcall(pcibios_init); 153subsys_initcall(pcibios_init);
145 154
146static void pcibios_fixup_device_resources(struct pci_dev *dev,
147 struct pci_bus *bus)
148{
149 /* Update device resources. */
150 struct pci_channel *hose = bus->sysdata;
151 unsigned long offset = 0;
152 int i;
153
154 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
155 if (!dev->resource[i].start)
156 continue;
157 if (dev->resource[i].flags & IORESOURCE_IO)
158 offset = hose->io_offset;
159 else if (dev->resource[i].flags & IORESOURCE_MEM)
160 offset = hose->mem_offset;
161
162 dev->resource[i].start += offset;
163 dev->resource[i].end += offset;
164 }
165}
166
167/* 155/*
168 * Called after each bus is probed, but before its children 156 * Called after each bus is probed, but before its children
169 * are examined. 157 * are examined.
170 */ 158 */
171void __devinit pcibios_fixup_bus(struct pci_bus *bus) 159void __devinit pcibios_fixup_bus(struct pci_bus *bus)
172{ 160{
173 struct pci_dev *dev;
174 struct list_head *ln;
175
176 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
177 dev = pci_dev_b(ln);
178
179 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
180 pcibios_fixup_device_resources(dev, bus);
181 }
182} 161}
183 162
184/* 163/*
@@ -208,36 +187,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
208 return start; 187 return start;
209} 188}
210 189
211void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
212 struct resource *res)
213{
214 struct pci_channel *hose = dev->sysdata;
215 unsigned long offset = 0;
216
217 if (res->flags & IORESOURCE_IO)
218 offset = hose->io_offset;
219 else if (res->flags & IORESOURCE_MEM)
220 offset = hose->mem_offset;
221
222 region->start = res->start - offset;
223 region->end = res->end - offset;
224}
225
226void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
227 struct pci_bus_region *region)
228{
229 struct pci_channel *hose = dev->sysdata;
230 unsigned long offset = 0;
231
232 if (res->flags & IORESOURCE_IO)
233 offset = hose->io_offset;
234 else if (res->flags & IORESOURCE_MEM)
235 offset = hose->mem_offset;
236
237 res->start = region->start + offset;
238 res->end = region->end + offset;
239}
240
241int pcibios_enable_device(struct pci_dev *dev, int mask) 190int pcibios_enable_device(struct pci_dev *dev, int mask)
242{ 191{
243 return pci_enable_resources(dev, mask); 192 return pci_enable_resources(dev, mask);
@@ -381,8 +330,6 @@ EXPORT_SYMBOL(pci_iounmap);
381#endif /* CONFIG_GENERIC_IOMAP */ 330#endif /* CONFIG_GENERIC_IOMAP */
382 331
383#ifdef CONFIG_HOTPLUG 332#ifdef CONFIG_HOTPLUG
384EXPORT_SYMBOL(pcibios_resource_to_bus);
385EXPORT_SYMBOL(pcibios_bus_to_resource);
386EXPORT_SYMBOL(PCIBIOS_MIN_IO); 333EXPORT_SYMBOL(PCIBIOS_MIN_IO);
387EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 334EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
388#endif 335#endif
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index cb21e2399dc1..bff96c2e7d25 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -114,12 +114,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
114/* Board-specific fixup routines. */ 114/* Board-specific fixup routines. */
115int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin); 115int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
116 116
117extern void pcibios_resource_to_bus(struct pci_dev *dev,
118 struct pci_bus_region *region, struct resource *res);
119
120extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
121 struct pci_bus_region *region);
122
123#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index 117#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
124 118
125static inline int pci_proc_domain(struct pci_bus *bus) 119static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 6de7f7bf956a..dc503297481f 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -52,14 +52,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
52 * 64Kbytes by the Host controller. 52 * 64Kbytes by the Host controller.
53 */ 53 */
54 54
55extern void
56pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
57 struct resource *res);
58
59extern void
60pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
61 struct pci_bus_region *region);
62
63static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 55static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
64{ 56{
65 return PCI_IRQ_NONE; 57 return PCI_IRQ_NONE;
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 755a4bb6bcd3..1633b718d3bc 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -73,14 +73,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
73 enum pci_mmap_state mmap_state, 73 enum pci_mmap_state mmap_state,
74 int write_combine); 74 int write_combine);
75 75
76extern void
77pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
78 struct resource *res);
79
80extern void
81pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
82 struct pci_bus_region *region);
83
84static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 76static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
85{ 77{
86 return PCI_IRQ_NONE; 78 return PCI_IRQ_NONE;
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index c7bec25fdb1c..aba6b958b2a5 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -15,14 +15,19 @@
15 15
16/* The LEON architecture does not rely on a BIOS or bootloader to setup 16/* The LEON architecture does not rely on a BIOS or bootloader to setup
17 * PCI for us. The Linux generic routines are used to setup resources, 17 * PCI for us. The Linux generic routines are used to setup resources,
18 * reset values of confuration-space registers settings ae preseved. 18 * reset values of configuration-space register settings are preserved.
19 *
20 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
21 * accessed through a Window which is translated to low 64KB in PCI space, the
22 * first 4KB is not used so 60KB is available.
19 */ 23 */
20void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) 24void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
21{ 25{
22 LIST_HEAD(resources); 26 LIST_HEAD(resources);
23 struct pci_bus *root_bus; 27 struct pci_bus *root_bus;
24 28
25 pci_add_resource(&resources, &info->io_space); 29 pci_add_resource_offset(&resources, &info->io_space,
30 info->io_space.start - 0x1000);
26 pci_add_resource(&resources, &info->mem_space); 31 pci_add_resource(&resources, &info->mem_space);
27 32
28 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info, 33 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
@@ -38,44 +43,6 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
38 } 43 }
39} 44}
40 45
41/* PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
42 * accessed through a Window which is translated to low 64KB in PCI space, the
43 * first 4KB is not used so 60KB is available.
44 *
45 * This function is used by generic code to translate resource addresses into
46 * PCI addresses.
47 */
48void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
49 struct resource *res)
50{
51 struct leon_pci_info *info = dev->bus->sysdata;
52
53 region->start = res->start;
54 region->end = res->end;
55
56 if (res->flags & IORESOURCE_IO) {
57 region->start -= (info->io_space.start - 0x1000);
58 region->end -= (info->io_space.start - 0x1000);
59 }
60}
61EXPORT_SYMBOL(pcibios_resource_to_bus);
62
63/* see pcibios_resource_to_bus() comment */
64void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
65 struct pci_bus_region *region)
66{
67 struct leon_pci_info *info = dev->bus->sysdata;
68
69 res->start = region->start;
70 res->end = region->end;
71
72 if (res->flags & IORESOURCE_IO) {
73 res->start += (info->io_space.start - 0x1000);
74 res->end += (info->io_space.start - 0x1000);
75 }
76}
77EXPORT_SYMBOL(pcibios_bus_to_resource);
78
79void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 46void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
80{ 47{
81 struct leon_pci_info *info = pbus->sysdata; 48 struct leon_pci_info *info = pbus->sysdata;
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index bb8bc2e519ac..fdaf21811670 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -375,13 +375,6 @@ static void __devinit apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
375 *last_p = last; 375 *last_p = last;
376} 376}
377 377
378static void pci_resource_adjust(struct resource *res,
379 struct resource *root)
380{
381 res->start += root->start;
382 res->end += root->start;
383}
384
385/* For PCI bus devices which lack a 'ranges' property we interrogate 378/* For PCI bus devices which lack a 'ranges' property we interrogate
386 * the config space values to set the resources, just like the generic 379 * the config space values to set the resources, just like the generic
387 * Linux PCI probing code does. 380 * Linux PCI probing code does.
@@ -390,7 +383,8 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
390 struct pci_bus *bus, 383 struct pci_bus *bus,
391 struct pci_pbm_info *pbm) 384 struct pci_pbm_info *pbm)
392{ 385{
393 struct resource *res; 386 struct pci_bus_region region;
387 struct resource *res, res2;
394 u8 io_base_lo, io_limit_lo; 388 u8 io_base_lo, io_limit_lo;
395 u16 mem_base_lo, mem_limit_lo; 389 u16 mem_base_lo, mem_limit_lo;
396 unsigned long base, limit; 390 unsigned long base, limit;
@@ -412,11 +406,14 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
412 res = bus->resource[0]; 406 res = bus->resource[0];
413 if (base <= limit) { 407 if (base <= limit) {
414 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 408 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
409 res2.flags = res->flags;
410 region.start = base;
411 region.end = limit + 0xfff;
412 pcibios_bus_to_resource(dev, &res2, &region);
415 if (!res->start) 413 if (!res->start)
416 res->start = base; 414 res->start = res2.start;
417 if (!res->end) 415 if (!res->end)
418 res->end = limit + 0xfff; 416 res->end = res2.end;
419 pci_resource_adjust(res, &pbm->io_space);
420 } 417 }
421 418
422 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo); 419 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
@@ -428,9 +425,9 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
428 if (base <= limit) { 425 if (base <= limit) {
429 res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | 426 res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
430 IORESOURCE_MEM); 427 IORESOURCE_MEM);
431 res->start = base; 428 region.start = base;
432 res->end = limit + 0xfffff; 429 region.end = limit + 0xfffff;
433 pci_resource_adjust(res, &pbm->mem_space); 430 pcibios_bus_to_resource(dev, res, &region);
434 } 431 }
435 432
436 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo); 433 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
@@ -459,9 +456,9 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
459 if (base <= limit) { 456 if (base <= limit) {
460 res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | 457 res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
461 IORESOURCE_MEM | IORESOURCE_PREFETCH); 458 IORESOURCE_MEM | IORESOURCE_PREFETCH);
462 res->start = base; 459 region.start = base;
463 res->end = limit + 0xfffff; 460 region.end = limit + 0xfffff;
464 pci_resource_adjust(res, &pbm->mem_space); 461 pcibios_bus_to_resource(dev, res, &region);
465 } 462 }
466} 463}
467 464
@@ -472,6 +469,7 @@ static void __devinit apb_fake_ranges(struct pci_dev *dev,
472 struct pci_bus *bus, 469 struct pci_bus *bus,
473 struct pci_pbm_info *pbm) 470 struct pci_pbm_info *pbm)
474{ 471{
472 struct pci_bus_region region;
475 struct resource *res; 473 struct resource *res;
476 u32 first, last; 474 u32 first, last;
477 u8 map; 475 u8 map;
@@ -479,18 +477,18 @@ static void __devinit apb_fake_ranges(struct pci_dev *dev,
479 pci_read_config_byte(dev, APB_IO_ADDRESS_MAP, &map); 477 pci_read_config_byte(dev, APB_IO_ADDRESS_MAP, &map);
480 apb_calc_first_last(map, &first, &last); 478 apb_calc_first_last(map, &first, &last);
481 res = bus->resource[0]; 479 res = bus->resource[0];
482 res->start = (first << 21);
483 res->end = (last << 21) + ((1 << 21) - 1);
484 res->flags = IORESOURCE_IO; 480 res->flags = IORESOURCE_IO;
485 pci_resource_adjust(res, &pbm->io_space); 481 region.start = (first << 21);
482 region.end = (last << 21) + ((1 << 21) - 1);
483 pcibios_bus_to_resource(dev, res, &region);
486 484
487 pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map); 485 pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
488 apb_calc_first_last(map, &first, &last); 486 apb_calc_first_last(map, &first, &last);
489 res = bus->resource[1]; 487 res = bus->resource[1];
490 res->start = (first << 21);
491 res->end = (last << 21) + ((1 << 21) - 1);
492 res->flags = IORESOURCE_MEM; 488 res->flags = IORESOURCE_MEM;
493 pci_resource_adjust(res, &pbm->mem_space); 489 region.start = (first << 21);
490 region.end = (last << 21) + ((1 << 21) - 1);
491 pcibios_bus_to_resource(dev, res, &region);
494} 492}
495 493
496static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm, 494static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm,
@@ -506,6 +504,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
506 struct pci_bus *bus; 504 struct pci_bus *bus;
507 const u32 *busrange, *ranges; 505 const u32 *busrange, *ranges;
508 int len, i, simba; 506 int len, i, simba;
507 struct pci_bus_region region;
509 struct resource *res; 508 struct resource *res;
510 unsigned int flags; 509 unsigned int flags;
511 u64 size; 510 u64 size;
@@ -556,8 +555,6 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
556 } 555 }
557 i = 1; 556 i = 1;
558 for (; len >= 32; len -= 32, ranges += 8) { 557 for (; len >= 32; len -= 32, ranges += 8) {
559 struct resource *root;
560
561 flags = pci_parse_of_flags(ranges[0]); 558 flags = pci_parse_of_flags(ranges[0]);
562 size = GET_64BIT(ranges, 6); 559 size = GET_64BIT(ranges, 6);
563 if (flags == 0 || size == 0) 560 if (flags == 0 || size == 0)
@@ -569,7 +566,6 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
569 " for bridge %s\n", node->full_name); 566 " for bridge %s\n", node->full_name);
570 continue; 567 continue;
571 } 568 }
572 root = &pbm->io_space;
573 } else { 569 } else {
574 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) { 570 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
575 printk(KERN_ERR "PCI: too many memory ranges" 571 printk(KERN_ERR "PCI: too many memory ranges"
@@ -578,18 +574,12 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
578 } 574 }
579 res = bus->resource[i]; 575 res = bus->resource[i];
580 ++i; 576 ++i;
581 root = &pbm->mem_space;
582 } 577 }
583 578
584 res->start = GET_64BIT(ranges, 1);
585 res->end = res->start + size - 1;
586 res->flags = flags; 579 res->flags = flags;
587 580 region.start = GET_64BIT(ranges, 1);
588 /* Another way to implement this would be to add an of_device 581 region.end = region.start + size - 1;
589 * layer routine that can calculate a resource for a given 582 pcibios_bus_to_resource(dev, res, &region);
590 * range property value in a PCI device.
591 */
592 pci_resource_adjust(res, root);
593 } 583 }
594after_ranges: 584after_ranges:
595 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus), 585 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
@@ -691,8 +681,10 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
691 681
692 printk("PCI: Scanning PBM %s\n", node->full_name); 682 printk("PCI: Scanning PBM %s\n", node->full_name);
693 683
694 pci_add_resource(&resources, &pbm->io_space); 684 pci_add_resource_offset(&resources, &pbm->io_space,
695 pci_add_resource(&resources, &pbm->mem_space); 685 pbm->io_space.start);
686 pci_add_resource_offset(&resources, &pbm->mem_space,
687 pbm->mem_space.start);
696 bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops, 688 bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
697 pbm, &resources); 689 pbm, &resources);
698 if (!bus) { 690 if (!bus) {
@@ -755,46 +747,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
755 return 0; 747 return 0;
756} 748}
757 749
758void pcibios_resource_to_bus(struct pci_dev *pdev, struct pci_bus_region *region,
759 struct resource *res)
760{
761 struct pci_pbm_info *pbm = pdev->bus->sysdata;
762 struct resource zero_res, *root;
763
764 zero_res.start = 0;
765 zero_res.end = 0;
766 zero_res.flags = res->flags;
767
768 if (res->flags & IORESOURCE_IO)
769 root = &pbm->io_space;
770 else
771 root = &pbm->mem_space;
772
773 pci_resource_adjust(&zero_res, root);
774
775 region->start = res->start - zero_res.start;
776 region->end = res->end - zero_res.start;
777}
778EXPORT_SYMBOL(pcibios_resource_to_bus);
779
780void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res,
781 struct pci_bus_region *region)
782{
783 struct pci_pbm_info *pbm = pdev->bus->sysdata;
784 struct resource *root;
785
786 res->start = region->start;
787 res->end = region->end;
788
789 if (res->flags & IORESOURCE_IO)
790 root = &pbm->io_space;
791 else
792 root = &pbm->mem_space;
793
794 pci_resource_adjust(res, root);
795}
796EXPORT_SYMBOL(pcibios_bus_to_resource);
797
798char * __devinit pcibios_setup(char *str) 750char * __devinit pcibios_setup(char *str)
799{ 751{
800 return str; 752 return str;
diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h
index dd3867727c35..f5e108f4a151 100644
--- a/arch/unicore32/include/asm/pci.h
+++ b/arch/unicore32/include/asm/pci.h
@@ -14,6 +14,7 @@
14 14
15#ifdef __KERNEL__ 15#ifdef __KERNEL__
16#include <asm-generic/pci-dma-compat.h> 16#include <asm-generic/pci-dma-compat.h>
17#include <asm-generic/pci-bridge.h>
17#include <asm-generic/pci.h> 18#include <asm-generic/pci.h>
18#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 19#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
19 20
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index a8f07fe10cad..2fc2b1ba825e 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -21,7 +21,6 @@
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23static int debug_pci; 23static int debug_pci;
24static int use_firmware;
25 24
26#define CONFIG_CMD(bus, devfn, where) \ 25#define CONFIG_CMD(bus, devfn, where) \
27 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) 26 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
@@ -276,7 +275,7 @@ static int __init pci_common_init(void)
276 275
277 pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq); 276 pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq);
278 277
279 if (!use_firmware) { 278 if (!pci_has_flag(PCI_PROBE_ONLY)) {
280 /* 279 /*
281 * Size the bridge windows. 280 * Size the bridge windows.
282 */ 281 */
@@ -303,7 +302,7 @@ char * __devinit pcibios_setup(char *str)
303 debug_pci = 1; 302 debug_pci = 1;
304 return NULL; 303 return NULL;
305 } else if (!strcmp(str, "firmware")) { 304 } else if (!strcmp(str, "firmware")) {
306 use_firmware = 1; 305 pci_add_flags(PCI_PROBE_ONLY);
307 return NULL; 306 return NULL;
308 } 307 }
309 return str; 308 return str;
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 1c4d769e21ea..28e5e06fcba4 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -262,10 +262,11 @@ rootfs_initcall(pci_iommu_init);
262 262
263static __devinit void via_no_dac(struct pci_dev *dev) 263static __devinit void via_no_dac(struct pci_dev *dev)
264{ 264{
265 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) { 265 if (forbid_dac == 0) {
266 dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n"); 266 dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
267 forbid_dac = 1; 267 forbid_dac = 1;
268 } 268 }
269} 269}
270DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac); 270DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
271 PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);
271#endif 272#endif
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 49a5cb55429b..ed2835e148b5 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -416,7 +416,12 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
416 kfree(sd); 416 kfree(sd);
417 } else { 417 } else {
418 get_current_resources(device, busnum, domain, &resources); 418 get_current_resources(device, busnum, domain, &resources);
419 if (list_empty(&resources)) 419
420 /*
421 * _CRS with no apertures is normal, so only fall back to
422 * defaults or native bridge info if we're ignoring _CRS.
423 */
424 if (!pci_use_crs)
420 x86_pci_root_bus_resources(busnum, &resources); 425 x86_pci_root_bus_resources(busnum, &resources);
421 bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, 426 bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
422 &resources); 427 &resources);
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 6dd89555fbfa..d0e6e403b4f6 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -164,11 +164,11 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8367_0, pci_fixup_
164 */ 164 */
165static void __devinit pci_fixup_transparent_bridge(struct pci_dev *dev) 165static void __devinit pci_fixup_transparent_bridge(struct pci_dev *dev)
166{ 166{
167 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && 167 if ((dev->device & 0xff00) == 0x2400)
168 (dev->device & 0xff00) == 0x2400)
169 dev->transparent = 1; 168 dev->transparent = 1;
170} 169}
171DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_fixup_transparent_bridge); 170DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
171 PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_transparent_bridge);
172 172
173/* 173/*
174 * Fixup for C1 Halt Disconnect problem on nForce2 systems. 174 * Fixup for C1 Halt Disconnect problem on nForce2 systems.
@@ -322,9 +322,6 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
322 struct pci_bus *bus; 322 struct pci_bus *bus;
323 u16 config; 323 u16 config;
324 324
325 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
326 return;
327
328 /* Is VGA routed to us? */ 325 /* Is VGA routed to us? */
329 bus = pdev->bus; 326 bus = pdev->bus;
330 while (bus) { 327 while (bus) {
@@ -353,7 +350,8 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
353 dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n"); 350 dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
354 } 351 }
355} 352}
356DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); 353DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
354 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
357 355
358 356
359static const struct dmi_system_id __devinitconst msi_k8t_dmi_table[] = { 357static const struct dmi_system_id __devinitconst msi_k8t_dmi_table[] = {
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 91821a1a0c3a..831971e731f7 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -39,6 +39,87 @@
39#include <asm/io_apic.h> 39#include <asm/io_apic.h>
40 40
41 41
42/*
43 * This list of dynamic mappings is for temporarily maintaining
44 * original BIOS BAR addresses for possible reinstatement.
45 */
46struct pcibios_fwaddrmap {
47 struct list_head list;
48 struct pci_dev *dev;
49 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE];
50};
51
52static LIST_HEAD(pcibios_fwaddrmappings);
53static DEFINE_SPINLOCK(pcibios_fwaddrmap_lock);
54
55/* Must be called with 'pcibios_fwaddrmap_lock' lock held. */
56static struct pcibios_fwaddrmap *pcibios_fwaddrmap_lookup(struct pci_dev *dev)
57{
58 struct pcibios_fwaddrmap *map;
59
60 WARN_ON(!spin_is_locked(&pcibios_fwaddrmap_lock));
61
62 list_for_each_entry(map, &pcibios_fwaddrmappings, list)
63 if (map->dev == dev)
64 return map;
65
66 return NULL;
67}
68
69static void
70pcibios_save_fw_addr(struct pci_dev *dev, int idx, resource_size_t fw_addr)
71{
72 unsigned long flags;
73 struct pcibios_fwaddrmap *map;
74
75 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
76 map = pcibios_fwaddrmap_lookup(dev);
77 if (!map) {
78 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
79 map = kzalloc(sizeof(*map), GFP_KERNEL);
80 if (!map)
81 return;
82
83 map->dev = pci_dev_get(dev);
84 map->fw_addr[idx] = fw_addr;
85 INIT_LIST_HEAD(&map->list);
86
87 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
88 list_add_tail(&map->list, &pcibios_fwaddrmappings);
89 } else
90 map->fw_addr[idx] = fw_addr;
91 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
92}
93
94resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
95{
96 unsigned long flags;
97 struct pcibios_fwaddrmap *map;
98 resource_size_t fw_addr = 0;
99
100 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
101 map = pcibios_fwaddrmap_lookup(dev);
102 if (map)
103 fw_addr = map->fw_addr[idx];
104 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
105
106 return fw_addr;
107}
108
109static void pcibios_fw_addr_list_del(void)
110{
111 unsigned long flags;
112 struct pcibios_fwaddrmap *entry, *next;
113
114 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
115 list_for_each_entry_safe(entry, next, &pcibios_fwaddrmappings, list) {
116 list_del(&entry->list);
117 pci_dev_put(entry->dev);
118 kfree(entry);
119 }
120 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
121}
122
42static int 123static int
43skip_isa_ioresource_align(struct pci_dev *dev) { 124skip_isa_ioresource_align(struct pci_dev *dev) {
44 125
@@ -182,7 +263,8 @@ static void __init pcibios_allocate_resources(int pass)
182 idx, r, disabled, pass); 263 idx, r, disabled, pass);
183 if (pci_claim_resource(dev, idx) < 0) { 264 if (pci_claim_resource(dev, idx) < 0) {
184 /* We'll assign a new address later */ 265 /* We'll assign a new address later */
185 dev->fw_addr[idx] = r->start; 266 pcibios_save_fw_addr(dev,
267 idx, r->start);
186 r->end -= r->start; 268 r->end -= r->start;
187 r->start = 0; 269 r->start = 0;
188 } 270 }
@@ -228,6 +310,7 @@ static int __init pcibios_assign_resources(void)
228 } 310 }
229 311
230 pci_assign_unassigned_resources(); 312 pci_assign_unassigned_resources();
313 pcibios_fw_addr_list_del();
231 314
232 return 0; 315 return 0;
233} 316}
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index cb29191cee58..140942f66b31 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -43,6 +43,8 @@
43#define PCI_FIXED_BAR_4_SIZE 0x14 43#define PCI_FIXED_BAR_4_SIZE 0x14
44#define PCI_FIXED_BAR_5_SIZE 0x1c 44#define PCI_FIXED_BAR_5_SIZE 0x1c
45 45
46static int pci_soc_mode = 0;
47
46/** 48/**
47 * fixed_bar_cap - return the offset of the fixed BAR cap if found 49 * fixed_bar_cap - return the offset of the fixed BAR cap if found
48 * @bus: PCI bus 50 * @bus: PCI bus
@@ -148,7 +150,9 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
148 */ 150 */
149 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE) 151 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
150 return 0; 152 return 0;
151 if (bus == 0 && (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(0, 0))) 153 if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
154 || devfn == PCI_DEVFN(0, 0)
155 || devfn == PCI_DEVFN(3, 0)))
152 return 1; 156 return 1;
153 return 0; /* langwell on others */ 157 return 0; /* langwell on others */
154} 158}
@@ -231,14 +235,43 @@ struct pci_ops pci_mrst_ops = {
231 */ 235 */
232int __init pci_mrst_init(void) 236int __init pci_mrst_init(void)
233{ 237{
234 printk(KERN_INFO "Moorestown platform detected, using MRST PCI ops\n"); 238 printk(KERN_INFO "Intel MID platform detected, using MID PCI ops\n");
235 pci_mmcfg_late_init(); 239 pci_mmcfg_late_init();
236 pcibios_enable_irq = mrst_pci_irq_enable; 240 pcibios_enable_irq = mrst_pci_irq_enable;
237 pci_root_ops = pci_mrst_ops; 241 pci_root_ops = pci_mrst_ops;
242 pci_soc_mode = 1;
238 /* Continue with standard init */ 243 /* Continue with standard init */
239 return 1; 244 return 1;
240} 245}
241 246
247/* Langwell devices are not true pci devices, they are not subject to 10 ms
248 * d3 to d0 delay required by pci spec.
249 */
250static void __devinit pci_d3delay_fixup(struct pci_dev *dev)
251{
252 /* PCI fixups are effectively decided compile time. If we have a dual
253 SoC/non-SoC kernel we don't want to mangle d3 on non SoC devices */
254 if (!pci_soc_mode)
255 return;
256 /* true pci devices in lincroft should allow type 1 access, the rest
257 * are langwell fake pci devices.
258 */
259 if (type1_access_ok(dev->bus->number, dev->devfn, PCI_DEVICE_ID))
260 return;
261 dev->d3_delay = 0;
262}
263DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_d3delay_fixup);
264
265static void __devinit mrst_power_off_unused_dev(struct pci_dev *dev)
266{
267 pci_set_power_state(dev, PCI_D3cold);
268}
269DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0801, mrst_power_off_unused_dev);
270DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0809, mrst_power_off_unused_dev);
271DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x080C, mrst_power_off_unused_dev);
272DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0812, mrst_power_off_unused_dev);
273DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0815, mrst_power_off_unused_dev);
274
242/* 275/*
243 * Langwell devices reside at fixed offsets, don't try to move them. 276 * Langwell devices reside at fixed offsets, don't try to move them.
244 */ 277 */
@@ -248,6 +281,9 @@ static void __devinit pci_fixed_bar_fixup(struct pci_dev *dev)
248 u32 size; 281 u32 size;
249 int i; 282 int i;
250 283
284 if (!pci_soc_mode)
285 return;
286
251 /* Must have extended configuration space */ 287 /* Must have extended configuration space */
252 if (dev->cfg_size < PCIE_CAP_OFFSET + 4) 288 if (dev->cfg_size < PCIE_CAP_OFFSET + 4)
253 return; 289 return;
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index 61045c192e88..eb30e356f5be 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -153,7 +153,7 @@ static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
153 } 153 }
154 res->start += io_offset; 154 res->start += io_offset;
155 res->end += io_offset; 155 res->end += io_offset;
156 pci_add_resource(resources, res); 156 pci_add_resource_offset(resources, res, io_offset);
157 157
158 for (i = 0; i < 3; i++) { 158 for (i = 0; i < 3; i++) {
159 res = &pci_ctrl->mem_resources[i]; 159 res = &pci_ctrl->mem_resources[i];
@@ -200,24 +200,9 @@ subsys_initcall(pcibios_init);
200 200
201void __init pcibios_fixup_bus(struct pci_bus *bus) 201void __init pcibios_fixup_bus(struct pci_bus *bus)
202{ 202{
203 struct pci_controller *pci_ctrl = bus->sysdata;
204 struct resource *res;
205 unsigned long io_offset;
206 int i;
207
208 io_offset = (unsigned long)pci_ctrl->io_space.base;
209 if (bus->parent) { 203 if (bus->parent) {
210 /* This is a subordinate bridge */ 204 /* This is a subordinate bridge */
211 pci_read_bridge_bases(bus); 205 pci_read_bridge_bases(bus);
212
213 for (i = 0; i < 4; i++) {
214 if ((res = bus->resource[i]) == NULL || !res->flags)
215 continue;
216 if (io_offset && (res->flags & IORESOURCE_IO)) {
217 res->start += io_offset;
218 res->end += io_offset;
219 }
220 }
221 } 206 }
222} 207}
223 208