aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorVitaly Bordug <vbordug@ru.mvista.com>2006-04-25 12:26:43 -0400
committerPaul Mackerras <paulus@samba.org>2006-04-28 07:11:30 -0400
commit4427d6bf966379304f77b7cc8c92421e6bb95483 (patch)
tree9e881bd2123850d86d792c66bb94991ac11ecccd /arch
parente27987cddd8db3a72a0f4734b5d94d06c7677323 (diff)
[PATCH] ppc32: Update board-specific code of the CPM UART users
This has the relevant updates/additions to the BSP code so that proper platform_info struct well be passed to the CPM UART drivers. The changes covered mpc866ads, mpc885ads and mpc8272ads. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/ppc/platforms/mpc8272ads_setup.c114
-rw-r--r--arch/ppc/platforms/mpc866ads_setup.c140
-rw-r--r--arch/ppc/platforms/mpc885ads_setup.c131
-rw-r--r--arch/ppc/platforms/pq2ads.c31
4 files changed, 415 insertions, 1 deletions
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
index bc9b94f77e39..e62b75707f7a 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -26,11 +26,35 @@
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/ppc_sys.h> 27#include <asm/ppc_sys.h>
28#include <asm/ppcboot.h> 28#include <asm/ppcboot.h>
29#include <linux/fs_uart_pd.h>
29 30
30#include "pq2ads_pd.h" 31#include "pq2ads_pd.h"
31 32
32static void init_fcc1_ioports(void); 33static void init_fcc1_ioports(void);
33static void init_fcc2_ioports(void); 34static void init_fcc2_ioports(void);
35static void init_scc1_uart_ioports(void);
36static void init_scc4_uart_ioports(void);
37
38static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
39 [fsid_scc1_uart] = {
40 .init_ioports = init_scc1_uart_ioports,
41 .fs_no = fsid_scc1_uart,
42 .brg = 1,
43 .tx_num_fifo = 4,
44 .tx_buf_size = 32,
45 .rx_num_fifo = 4,
46 .rx_buf_size = 32,
47 },
48 [fsid_scc4_uart] = {
49 .init_ioports = init_scc4_uart_ioports,
50 .fs_no = fsid_scc4_uart,
51 .brg = 4,
52 .tx_num_fifo = 4,
53 .tx_buf_size = 32,
54 .rx_num_fifo = 4,
55 .rx_buf_size = 32,
56 },
57};
34 58
35static struct fs_mii_bus_info mii_bus_info = { 59static struct fs_mii_bus_info mii_bus_info = {
36 .method = fsmii_bitbang, 60 .method = fsmii_bitbang,
@@ -201,6 +225,55 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
201 } 225 }
202} 226}
203 227
228static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
229 int idx)
230{
231 bd_t *bd = (bd_t *) __res;
232 struct fs_uart_platform_info *pinfo;
233 int num = ARRAY_SIZE(mpc8272_uart_pdata);
234 int id = fs_uart_id_scc2fsid(idx);
235
236 /* no need to alter anything if console */
237 if ((id <= num) && (!pdev->dev.platform_data)) {
238 pinfo = &mpc8272_uart_pdata[id];
239 pinfo->uart_clk = bd->bi_intfreq;
240 pdev->dev.platform_data = pinfo;
241 }
242}
243
244static void init_scc1_uart_ioports(void)
245{
246 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
247
248 /* SCC1 is only on port D */
249 setbits32(&immap->im_ioport.iop_ppard,0x00000003);
250 clrbits32(&immap->im_ioport.iop_psord,0x00000001);
251 setbits32(&immap->im_ioport.iop_psord,0x00000002);
252 clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
253 setbits32(&immap->im_ioport.iop_pdird,0x00000002);
254
255 /* Wire BRG1 to SCC1 */
256 clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
257
258 iounmap(immap);
259}
260
261static void init_scc4_uart_ioports(void)
262{
263 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
264
265 setbits32(&immap->im_ioport.iop_ppard,0x00000600);
266 clrbits32(&immap->im_ioport.iop_psord,0x00000600);
267 clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
268 setbits32(&immap->im_ioport.iop_pdird,0x00000400);
269
270 /* Wire BRG4 to SCC4 */
271 clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
272 setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
273
274 iounmap(immap);
275}
276
204static int mpc8272ads_platform_notify(struct device *dev) 277static int mpc8272ads_platform_notify(struct device *dev)
205{ 278{
206 static const struct platform_notify_dev_map dev_map[] = { 279 static const struct platform_notify_dev_map dev_map[] = {
@@ -209,6 +282,10 @@ static int mpc8272ads_platform_notify(struct device *dev)
209 .rtn = mpc8272ads_fixup_enet_pdata 282 .rtn = mpc8272ads_fixup_enet_pdata
210 }, 283 },
211 { 284 {
285 .bus_id = "fsl-cpm-scc:uart",
286 .rtn = mpc
287 },
288 {
212 .bus_id = NULL 289 .bus_id = NULL
213 } 290 }
214 }; 291 };
@@ -230,7 +307,44 @@ int __init mpc8272ads_init(void)
230 ppc_sys_device_enable(MPC82xx_CPM_FCC1); 307 ppc_sys_device_enable(MPC82xx_CPM_FCC1);
231 ppc_sys_device_enable(MPC82xx_CPM_FCC2); 308 ppc_sys_device_enable(MPC82xx_CPM_FCC2);
232 309
310 /* to be ready for console, let's attach pdata here */
311#ifdef CONFIG_SERIAL_CPM_SCC1
312 ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
313 ppc_sys_device_enable(MPC82xx_CPM_SCC1);
314
315#endif
316
317#ifdef CONFIG_SERIAL_CPM_SCC4
318 ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
319 ppc_sys_device_enable(MPC82xx_CPM_SCC4);
320#endif
321
322
233 return 0; 323 return 0;
234} 324}
235 325
326/*
327 To prevent confusion, console selection is gross:
328 by 0 assumed SCC1 and by 1 assumed SCC4
329 */
330struct platform_device* early_uart_get_pdev(int index)
331{
332 bd_t *bd = (bd_t *) __res;
333 struct fs_uart_platform_info *pinfo;
334
335 struct platform_device* pdev = NULL;
336 if(index) { /*assume SCC4 here*/
337 pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
338 pinfo = &mpc8272<F12>_uart_pdata[1];
339 } else { /*over SCC1*/
340 pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
341 pinfo = &mpc8272_uart_pdata[0];
342 }
343
344 pinfo->uart_clk = bd->bi_intfreq;
345 pdev->dev.platform_data = pinfo;
346 ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
347 return NULL;
348}
349
236arch_initcall(mpc8272ads_init); 350arch_initcall(mpc8272ads_init);
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
index ac8fcc68afeb..6ce3b842defe 100644
--- a/arch/ppc/platforms/mpc866ads_setup.c
+++ b/arch/ppc/platforms/mpc866ads_setup.c
@@ -20,6 +20,7 @@
20#include <linux/device.h> 20#include <linux/device.h>
21 21
22#include <linux/fs_enet_pd.h> 22#include <linux/fs_enet_pd.h>
23#include <linux/fs_uart_pd.h>
23#include <linux/mii.h> 24#include <linux/mii.h>
24 25
25#include <asm/delay.h> 26#include <asm/delay.h>
@@ -37,6 +38,11 @@
37 38
38extern unsigned char __res[]; 39extern unsigned char __res[];
39 40
41static void setup_fec1_ioports(void);
42static void setup_scc1_ioports(void);
43static void setup_smc1_ioports(void);
44static void setup_smc2_ioports(void);
45
40static struct fs_mii_bus_info fec_mii_bus_info = { 46static struct fs_mii_bus_info fec_mii_bus_info = {
41 .method = fsmii_fec, 47 .method = fsmii_fec,
42 .id = 0, 48 .id = 0,
@@ -79,6 +85,28 @@ static struct fs_platform_info mpc8xx_scc_pdata = {
79 .phy_irq = -1, 85 .phy_irq = -1,
80 86
81 .bus_info = &scc_mii_bus_info, 87 .bus_info = &scc_mii_bus_info,
88
89};
90
91static struct fs_uart_platform_info mpc866_uart_pdata[] = {
92 [fsid_smc1_uart] = {
93 .brg = 1,
94 .fs_no = fsid_smc1_uart,
95 .init_ioports = setup_smc1_ioports,
96 .tx_num_fifo = 4,
97 .tx_buf_size = 32,
98 .rx_num_fifo = 4,
99 .rx_buf_size = 32,
100 },
101 [fsid_smc2_uart] = {
102 .brg = 2,
103 .fs_no = fsid_smc2_uart,
104 .init_ioports = setup_smc2_ioports,
105 .tx_num_fifo = 4,
106 .tx_buf_size = 32,
107 .rx_num_fifo = 4,
108 .rx_buf_size = 32,
109 },
82}; 110};
83 111
84void __init board_init(void) 112void __init board_init(void)
@@ -92,9 +120,12 @@ void __init board_init(void)
92 printk(KERN_CRIT "Could not remap BCSR1\n"); 120 printk(KERN_CRIT "Could not remap BCSR1\n");
93 return; 121 return;
94 } 122 }
123
95#ifdef CONFIG_SERIAL_CPM_SMC1 124#ifdef CONFIG_SERIAL_CPM_SMC1
96 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */ 125 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
97 clrbits32(bcsr_io,(0x80000000 >> 7)); 126 clrbits32(bcsr_io,(0x80000000 >> 7));
127 cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
128 cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
98#else 129#else
99 setbits32(bcsr_io,(0x80000000 >> 7)); 130 setbits32(bcsr_io,(0x80000000 >> 7));
100 131
@@ -108,6 +139,8 @@ void __init board_init(void)
108 cp->cp_simode &= ~(0xe0000000 >> 1); 139 cp->cp_simode &= ~(0xe0000000 >> 1);
109 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */ 140 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
110 clrbits32(bcsr_io,(0x80000000 >> 13)); 141 clrbits32(bcsr_io,(0x80000000 >> 13));
142 cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
143 cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
111#else 144#else
112 clrbits32(bcsr_io,(0x80000000 >> 13)); 145 clrbits32(bcsr_io,(0x80000000 >> 13));
113 cp->cp_pbpar &= ~(0x00000c00); 146 cp->cp_pbpar &= ~(0x00000c00);
@@ -232,6 +265,74 @@ static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
232 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); 265 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
233} 266}
234 267
268static void setup_smc1_ioports(void)
269{
270 immap_t *immap = (immap_t *) IMAP_ADDR;
271 unsigned *bcsr_io;
272 unsigned int iobits = 0x000000c0;
273
274 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
275
276 if (bcsr_io == NULL) {
277 printk(KERN_CRIT "Could not remap BCSR1\n");
278 return;
279 }
280
281 clrbits32(bcsr_io,BCSR1_RS232EN_1);
282 iounmap(bcsr_io);
283
284 setbits32(&immap->im_cpm.cp_pbpar, iobits);
285 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
286 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
287
288}
289
290static void setup_smc2_ioports(void)
291{
292 immap_t *immap = (immap_t *) IMAP_ADDR;
293 unsigned *bcsr_io;
294 unsigned int iobits = 0x00000c00;
295
296 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
297
298 if (bcsr_io == NULL) {
299 printk(KERN_CRIT "Could not remap BCSR1\n");
300 return;
301 }
302
303 clrbits32(bcsr_io,BCSR1_RS232EN_2);
304
305 iounmap(bcsr_io);
306
307#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
308 setbits32(&immap->im_cpm.cp_pbpar, iobits);
309 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
310 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
311#else
312 setbits16(&immap->im_ioport.iop_papar, iobits);
313 clrbits16(&immap->im_ioport.iop_padir, iobits);
314 clrbits16(&immap->im_ioport.iop_paodr, iobits);
315#endif
316
317}
318
319static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
320 int idx)
321{
322 bd_t *bd = (bd_t *) __res;
323 struct fs_uart_platform_info *pinfo;
324 int num = ARRAY_SIZE(mpc866_uart_pdata);
325
326 int id = fs_uart_id_smc2fsid(idx);
327
328 /* no need to alter anything if console */
329 if ((id <= num) && (!pdev->dev.platform_data)) {
330 pinfo = &mpc866_uart_pdata[id];
331 pinfo->uart_clk = bd->bi_intfreq;
332 pdev->dev.platform_data = pinfo;
333 }
334}
335
235static int mpc866ads_platform_notify(struct device *dev) 336static int mpc866ads_platform_notify(struct device *dev)
236{ 337{
237 static const struct platform_notify_dev_map dev_map[] = { 338 static const struct platform_notify_dev_map dev_map[] = {
@@ -244,6 +345,10 @@ static int mpc866ads_platform_notify(struct device *dev)
244 .rtn = mpc866ads_fixup_scc_enet_pdata, 345 .rtn = mpc866ads_fixup_scc_enet_pdata,
245 }, 346 },
246 { 347 {
348 .bus_id = "fsl-cpm-smc:uart",
349 .rtn = mpc866ads_fixup_uart_pdata
350 },
351 {
247 .bus_id = NULL 352 .bus_id = NULL
248 } 353 }
249 }; 354 };
@@ -267,7 +372,42 @@ int __init mpc866ads_init(void)
267#endif 372#endif
268 ppc_sys_device_enable(MPC8xx_CPM_FEC1); 373 ppc_sys_device_enable(MPC8xx_CPM_FEC1);
269 374
375/* Since either of the uarts could be used as console, they need to ready */
376#ifdef CONFIG_SERIAL_CPM_SMC1
377 ppc_sys_device_enable(MPC8xx_CPM_SMC1);
378 ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
379#endif
380
381#ifdef CONFIG_SERIAL_CPM_SMCer
382 ppc_sys_device_enable(MPC8xx_CPM_SMC2);
383 ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
384#endif
385
270 return 0; 386 return 0;
271} 387}
272 388
389/*
390 To prevent confusion, console selection is gross:
391 by 0 assumed SMC1 and by 1 assumed SMC2
392 */
393struct platform_device* early_uart_get_pdev(int index)
394{
395 bd_t *bd = (bd_t *) __res;
396 struct fs_uart_platform_info *pinfo;
397
398 struct platform_device* pdev = NULL;
399 if(index) { /*assume SMC2 here*/
400 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
401 pinfo = &mpc866_uart_pdata[1];
402 } else { /*over SMC1*/
403 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
404 pinfo = &mpc866_uart_pdata[0];
405 }
406
407 pinfo->uart_clk = bd->bi_intfreq;
408 pdev->dev.platform_data = pinfo;
409 ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
410 return NULL;
411}
412
273arch_initcall(mpc866ads_init); 413arch_initcall(mpc866ads_init);
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
index 50a99e5f7c68..4b88679cd31c 100644
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -20,6 +20,7 @@
20#include <linux/device.h> 20#include <linux/device.h>
21 21
22#include <linux/fs_enet_pd.h> 22#include <linux/fs_enet_pd.h>
23#include <linux/fs_uart_pd.h>
23#include <linux/mii.h> 24#include <linux/mii.h>
24 25
25#include <asm/delay.h> 26#include <asm/delay.h>
@@ -35,9 +36,32 @@
35#include <asm/ppc_sys.h> 36#include <asm/ppc_sys.h>
36 37
37extern unsigned char __res[]; 38extern unsigned char __res[];
39static void setup_smc1_ioports(void);
40static void setup_smc2_ioports(void);
38 41
39static void __init mpc885ads_scc_phy_init(char); 42static void __init mpc885ads_scc_phy_init(char);
40 43
44static struct fs_uart_platform_info mpc885_uart_pdata[] = {
45 [fsid_smc1_uart] = {
46 .brg = 1,
47 .fs_no = fsid_smc1_uart,
48 .init_ioports = setup_smc1_ioports,
49 .tx_num_fifo = 4,
50 .tx_buf_size = 32,
51 .rx_num_fifo = 4,
52 .rx_buf_size = 32,
53 },
54 [fsid_smc2_uart] = {
55 .brg = 2,
56 .fs_no = fsid_smc2_uart,
57 .init_ioports = setup_smc2_ioports,
58 .tx_num_fifo = 4,
59 .tx_buf_size = 32,
60 .rx_num_fifo = 4,
61 .rx_buf_size = 32,
62 },
63};
64
41static struct fs_mii_bus_info fec_mii_bus_info = { 65static struct fs_mii_bus_info fec_mii_bus_info = {
42 .method = fsmii_fec, 66 .method = fsmii_fec,
43 .id = 0, 67 .id = 0,
@@ -116,6 +140,8 @@ void __init board_init(void)
116#ifdef CONFIG_SERIAL_CPM_SMC1 140#ifdef CONFIG_SERIAL_CPM_SMC1
117 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */ 141 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
118 clrbits32(bcsr_io, BCSR1_RS232EN_1); 142 clrbits32(bcsr_io, BCSR1_RS232EN_1);
143 cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
144 cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
119#else 145#else
120 setbits32(bcsr_io,BCSR1_RS232EN_1); 146 setbits32(bcsr_io,BCSR1_RS232EN_1);
121 cp->cp_smc[0].smc_smcmr = 0; 147 cp->cp_smc[0].smc_smcmr = 0;
@@ -126,6 +152,8 @@ void __init board_init(void)
126 cp->cp_simode &= ~(0xe0000000 >> 1); 152 cp->cp_simode &= ~(0xe0000000 >> 1);
127 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */ 153 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
128 clrbits32(bcsr_io,BCSR1_RS232EN_2); 154 clrbits32(bcsr_io,BCSR1_RS232EN_2);
155 cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
156 cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
129#else 157#else
130 setbits32(bcsr_io,BCSR1_RS232EN_2); 158 setbits32(bcsr_io,BCSR1_RS232EN_2);
131 cp->cp_smc[1].smc_smcmr = 0; 159 cp->cp_smc[1].smc_smcmr = 0;
@@ -343,6 +371,70 @@ static void mpc885ads_scc_phy_init(char phy_addr)
343 out_be32(&fecp->fec_mii_speed, 0); 371 out_be32(&fecp->fec_mii_speed, 0);
344} 372}
345 373
374static void setup_smc1_ioports(void)
375{
376 immap_t *immap = (immap_t *) IMAP_ADDR;
377 unsigned *bcsr_io;
378 unsigned int iobits = 0x000000c0;
379
380 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
381
382 if (bcsr_io == NULL) {
383 printk(KERN_CRIT "Could not remap BCSR1\n");
384 return;
385 }
386 clrbits32(bcsr_io,BCSR1_RS232EN_1);
387 iounmap(bcsr_io);
388
389 setbits32(&immap->im_cpm.cp_pbpar, iobits);
390 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
391 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
392}
393
394static void setup_smc2_ioports(void)
395{
396 immap_t *immap = (immap_t *) IMAP_ADDR;
397 unsigned *bcsr_io;
398 unsigned int iobits = 0x00000c00;
399
400 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
401
402 if (bcsr_io == NULL) {
403 printk(KERN_CRIT "Could not remap BCSR1\n");
404 return;
405 }
406 clrbits32(bcsr_io,BCSR1_RS232EN_2);
407 iounmap(bcsr_io);
408
409#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
410 setbits32(&immap->im_cpm.cp_pbpar, iobits);
411 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
412 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
413#else
414 setbits16(&immap->im_ioport.iop_papar, iobits);
415 clrbits16(&immap->im_ioport.iop_padir, iobits);
416 clrbits16(&immap->im_ioport.iop_paodr, iobits);
417#endif
418}
419
420static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
421 int idx)
422{
423 bd_t *bd = (bd_t *) __res;
424 struct fs_uart_platform_info *pinfo;
425 int num = ARRAY_SIZE(mpc885_uart_pdata);
426
427 int id = fs_uart_id_smc2fsid(idx);
428
429 /* no need to alter anything if console */
430 if ((id <= num) && (!pdev->dev.platform_data)) {
431 pinfo = &mpc885_uart_pdata[id];
432 pinfo->uart_clk = bd->bi_intfreq;
433 pdev->dev.platform_data = pinfo;
434 }
435}
436
437
346static int mpc885ads_platform_notify(struct device *dev) 438static int mpc885ads_platform_notify(struct device *dev)
347{ 439{
348 440
@@ -356,12 +448,17 @@ static int mpc885ads_platform_notify(struct device *dev)
356 .rtn = mpc885ads_fixup_scc_enet_pdata, 448 .rtn = mpc885ads_fixup_scc_enet_pdata,
357 }, 449 },
358 { 450 {
451 .bus_id = "fsl-cpm-smc:uart",
452 .rtn = mpc885ads_fixup_uart_pdata
453 },
454 {
359 .bus_id = NULL 455 .bus_id = NULL
360 } 456 }
361 }; 457 };
362 458
363 platform_notify_map(dev_map,dev); 459 platform_notify_map(dev_map,dev);
364 460
461 return 0;
365} 462}
366 463
367int __init mpc885ads_init(void) 464int __init mpc885ads_init(void)
@@ -383,7 +480,41 @@ int __init mpc885ads_init(void)
383 ppc_sys_device_enable(MPC8xx_CPM_FEC2); 480 ppc_sys_device_enable(MPC8xx_CPM_FEC2);
384#endif 481#endif
385 482
483#ifdef CONFIG_SERIAL_CPM_SMC1
484 ppc_sys_device_enable(MPC8xx_CPM_SMC1);
485 ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
486#endif
487
488#ifdef CONFIG_SERIAL_CPM_SMC2
489 ppc_sys_device_enable(MPC8xx_CPM_SMC2);
490 ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
491#endif
386 return 0; 492 return 0;
387} 493}
388 494
389arch_initcall(mpc885ads_init); 495arch_initcall(mpc885ads_init);
496
497/*
498 To prevent confusion, console selection is gross:
499 by 0 assumed SMC1 and by 1 assumed SMC2
500 */
501struct platform_device* early_uart_get_pdev(int index)
502{
503 bd_t *bd = (bd_t *) __res;
504 struct fs_uart_platform_info *pinfo;
505
506 struct platform_device* pdev = NULL;
507 if(index) { /*assume SMC2 here*/
508 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
509 pinfo = &mpc885_uart_pdata[1];
510 } else { /*over SMC1*/
511 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
512 pinfo = &mpc885_uart_pdata[0];
513 }
514
515 pinfo->uart_clk = bd->bi_intfreq;
516 pdev->dev.platform_data = pinfo;
517 ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
518 return NULL;
519}
520
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c
index 3365fd788a7a..7fc2e02f5246 100644
--- a/arch/ppc/platforms/pq2ads.c
+++ b/arch/ppc/platforms/pq2ads.c
@@ -14,11 +14,40 @@
14 14
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17#include <asm/io.h>
17#include <asm/mpc8260.h> 18#include <asm/mpc8260.h>
19#include <asm/cpm2.h>
20#include <asm/immap_cpm2.h>
18 21
19void __init 22void __init
20m82xx_board_setup(void) 23m82xx_board_setup(void)
21{ 24{
25 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
26 u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
27
22 /* Enable the 2nd UART port */ 28 /* Enable the 2nd UART port */
23 *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2; 29 clrbits32(bcsr, BCSR1_RS232_EN2);
30
31#ifdef CONFIG_SERIAL_CPM_SCC1
32 clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
33 clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
34#endif
35
36#ifdef CONFIG_SERIAL_CPM_SCC2
37 clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
38 clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
39#endif
40
41#ifdef CONFIG_SERIAL_CPM_SCC3
42 clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
43 clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
44#endif
45
46#ifdef CONFIG_SERIAL_CPM_SCC4
47 clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
48 clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
49#endif
50
51 iounmap(bcsr);
52 iounmap(immap);
24} 53}