diff options
author | Rob Herring <rob.herring@calxeda.com> | 2011-11-21 22:01:06 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-11-26 16:58:52 -0500 |
commit | 41dfaa934c5d866d626de9bea785e6168524a47e (patch) | |
tree | a4e7541f35763b1767b380d1b4cc526e76ed0d01 /arch | |
parent | 7334c6755eb7dbaa5d3112a33f5f2cb9826abe8c (diff) |
ARM: 7168/1: use cache type functions for arch_get_unmapped_area
There are already cache type decoding functions, so use those instead
of custom decode code which only works for ARMv6.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mm/mmap.c | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 74be05f3e03a..44b628e4d6ea 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c | |||
@@ -9,8 +9,7 @@ | |||
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/personality.h> | 10 | #include <linux/personality.h> |
11 | #include <linux/random.h> | 11 | #include <linux/random.h> |
12 | #include <asm/cputype.h> | 12 | #include <asm/cachetype.h> |
13 | #include <asm/system.h> | ||
14 | 13 | ||
15 | #define COLOUR_ALIGN(addr,pgoff) \ | 14 | #define COLOUR_ALIGN(addr,pgoff) \ |
16 | ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ | 15 | ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ |
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, | |||
32 | struct mm_struct *mm = current->mm; | 31 | struct mm_struct *mm = current->mm; |
33 | struct vm_area_struct *vma; | 32 | struct vm_area_struct *vma; |
34 | unsigned long start_addr; | 33 | unsigned long start_addr; |
35 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) | 34 | int do_align = 0; |
36 | unsigned int cache_type; | 35 | int aliasing = cache_is_vipt_aliasing(); |
37 | int do_align = 0, aliasing = 0; | ||
38 | 36 | ||
39 | /* | 37 | /* |
40 | * We only need to do colour alignment if either the I or D | 38 | * We only need to do colour alignment if either the I or D |
41 | * caches alias. This is indicated by bits 9 and 21 of the | 39 | * caches alias. |
42 | * cache type register. | ||
43 | */ | 40 | */ |
44 | cache_type = read_cpuid_cachetype(); | 41 | if (aliasing) |
45 | if (cache_type != read_cpuid_id()) { | 42 | do_align = filp || (flags & MAP_SHARED); |
46 | aliasing = (cache_type | cache_type >> 12) & (1 << 11); | ||
47 | if (aliasing) | ||
48 | do_align = filp || flags & MAP_SHARED; | ||
49 | } | ||
50 | #else | ||
51 | #define do_align 0 | ||
52 | #define aliasing 0 | ||
53 | #endif | ||
54 | 43 | ||
55 | /* | 44 | /* |
56 | * We enforce the MAP_FIXED case. | 45 | * We enforce the MAP_FIXED case. |