diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-08 03:36:21 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-09 06:28:53 -0400 |
commit | 4082cfa77680a70e407efdfb207c743107bd8fe4 (patch) | |
tree | 50220be137306502a61dfcc866c5482b14317783 /arch | |
parent | e467e104bb7482170b79f516d2025e7cfcaaa733 (diff) |
ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset
default values. Allow them to be overwritten with the aux_val/aux_mask
arguments passed to l2x0_init().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 9819869d2bc9..df4955885b21 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -218,6 +218,9 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
218 | cache_id = readl(l2x0_base + L2X0_CACHE_ID); | 218 | cache_id = readl(l2x0_base + L2X0_CACHE_ID); |
219 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 219 | aux = readl(l2x0_base + L2X0_AUX_CTRL); |
220 | 220 | ||
221 | aux &= aux_mask; | ||
222 | aux |= aux_val; | ||
223 | |||
221 | /* Determine the number of ways */ | 224 | /* Determine the number of ways */ |
222 | switch (cache_id & L2X0_CACHE_ID_PART_MASK) { | 225 | switch (cache_id & L2X0_CACHE_ID_PART_MASK) { |
223 | case L2X0_CACHE_ID_PART_L310: | 226 | case L2X0_CACHE_ID_PART_L310: |
@@ -248,8 +251,6 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
248 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | 251 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { |
249 | 252 | ||
250 | /* l2x0 controller is disabled */ | 253 | /* l2x0 controller is disabled */ |
251 | aux &= aux_mask; | ||
252 | aux |= aux_val; | ||
253 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | 254 | writel(aux, l2x0_base + L2X0_AUX_CTRL); |
254 | 255 | ||
255 | l2x0_inv_all(); | 256 | l2x0_inv_all(); |