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authorJiang Liu <jiang.liu@linux.intel.com>2014-06-09 04:19:39 -0400
committerThomas Gleixner <tglx@linutronix.de>2014-06-21 17:05:41 -0400
commit3eb2be5f49fdeac5ea2880aec90008f0a8250029 (patch)
tree013c2008477f2b3fa82f3b581d8dc4a1c80085ca /arch
parent2e0ad0e2c13534f1a0e7f63661e666c281e09b66 (diff)
x86, irq, trivial: Minor improvements of IRQ related code
1) Kill unused MAX_HARDIRQS_PER_CPU. 2) Improve function prototype declararions. 3) Simple typo fix, change "gsit" to "gsi". 4) Use macro VECTOR_UNDEFINED instead of hard-coded -1. 5) Kill redundant comments. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Jiri Kosina <trivial@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-11-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/hardirq.h3
-rw-r--r--arch/x86/include/asm/io_apic.h16
-rw-r--r--arch/x86/kernel/apic/io_apic.c21
3 files changed, 12 insertions, 28 deletions
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 230853da4ec0..0f5fb6b6567e 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -40,9 +40,6 @@ typedef struct {
40 40
41DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); 41DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
42 42
43/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
44#define MAX_HARDIRQS_PER_CPU NR_VECTORS
45
46#define __ARCH_IRQ_STAT 43#define __ARCH_IRQ_STAT
47 44
48#define inc_irq_stat(member) this_cpu_inc(irq_stat.member) 45#define inc_irq_stat(member) this_cpu_inc(irq_stat.member)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 9121abbc8c8f..8dd1e13f2989 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -144,22 +144,20 @@ struct io_apic_irq_attr;
144struct irq_cfg; 144struct irq_cfg;
145extern int io_apic_set_pci_routing(struct device *dev, int irq, 145extern int io_apic_set_pci_routing(struct device *dev, int irq,
146 struct io_apic_irq_attr *irq_attr); 146 struct io_apic_irq_attr *irq_attr);
147void setup_IO_APIC_irq_extra(u32 gsi); 147extern void setup_IO_APIC_irq_extra(u32 gsi);
148extern void ioapic_insert_resources(void); 148extern void ioapic_insert_resources(void);
149 149
150extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *, 150extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
151 unsigned int, int, 151 unsigned int, int,
152 struct io_apic_irq_attr *); 152 struct io_apic_irq_attr *);
153extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
154 unsigned int, int,
155 struct io_apic_irq_attr *);
156extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg); 153extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
157 154
158extern void native_compose_msi_msg(struct pci_dev *pdev, 155extern void native_compose_msi_msg(struct pci_dev *pdev,
159 unsigned int irq, unsigned int dest, 156 unsigned int irq, unsigned int dest,
160 struct msi_msg *msg, u8 hpet_id); 157 struct msi_msg *msg, u8 hpet_id);
161extern void native_eoi_ioapic_pin(int apic, int pin, int vector); 158extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
162int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); 159extern int io_apic_setup_irq_pin_once(unsigned int irq, int node,
160 struct io_apic_irq_attr *attr);
163 161
164extern int save_ioapic_entries(void); 162extern int save_ioapic_entries(void);
165extern void mask_ioapic_entries(void); 163extern void mask_ioapic_entries(void);
@@ -172,11 +170,11 @@ struct mp_ioapic_gsi{
172 u32 gsi_base; 170 u32 gsi_base;
173 u32 gsi_end; 171 u32 gsi_end;
174}; 172};
175extern struct mp_ioapic_gsi mp_gsi_routing[];
176extern u32 gsi_top; 173extern u32 gsi_top;
177int mp_find_ioapic(u32 gsi); 174
178int mp_find_ioapic_pin(int ioapic, u32 gsi); 175extern int mp_find_ioapic(u32 gsi);
179void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); 176extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
177extern void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
180extern void __init pre_init_apic_IRQ0(void); 178extern void __init pre_init_apic_IRQ0(void);
181 179
182extern void mp_save_irq(struct mpc_intsrc *m); 180extern void mp_save_irq(struct mpc_intsrc *m);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 81e08eff05ee..f3390424d86e 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1010,7 +1010,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
1010 break; 1010 break;
1011 1011
1012 if (!test_bit(lbus, mp_bus_not_pci) && 1012 if (!test_bit(lbus, mp_bus_not_pci) &&
1013 !mp_irqs[i].irqtype && 1013 mp_irqs[i].irqtype == mp_INT &&
1014 (bus == lbus) && 1014 (bus == lbus) &&
1015 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { 1015 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
1016 int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq); 1016 int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
@@ -1359,7 +1359,7 @@ static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
1359 1359
1360 irq = pin_2_irq(idx, ioapic_idx, pin); 1360 irq = pin_2_irq(idx, ioapic_idx, pin);
1361 1361
1362 if ((ioapic_idx > 0) && (irq > 16)) 1362 if ((ioapic_idx > 0) && (irq > NR_IRQS_LEGACY))
1363 continue; 1363 continue;
1364 1364
1365 /* 1365 /*
@@ -1388,7 +1388,7 @@ static void __init setup_IO_APIC_irqs(void)
1388} 1388}
1389 1389
1390/* 1390/*
1391 * for the gsit that is not in first ioapic 1391 * for the gsi that is not in first ioapic
1392 * but could not use acpi_register_gsi() 1392 * but could not use acpi_register_gsi()
1393 * like some special sci in IBM x3330 1393 * like some special sci in IBM x3330
1394 */ 1394 */
@@ -2225,7 +2225,7 @@ asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
2225 apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); 2225 apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);
2226 goto unlock; 2226 goto unlock;
2227 } 2227 }
2228 __this_cpu_write(vector_irq[vector], -1); 2228 __this_cpu_write(vector_irq[vector], VECTOR_UNDEFINED);
2229unlock: 2229unlock:
2230 raw_spin_unlock(&desc->lock); 2230 raw_spin_unlock(&desc->lock);
2231 } 2231 }
@@ -2514,17 +2514,6 @@ static inline void init_IO_APIC_traps(void)
2514 struct irq_cfg *cfg; 2514 struct irq_cfg *cfg;
2515 unsigned int irq; 2515 unsigned int irq;
2516 2516
2517 /*
2518 * NOTE! The local APIC isn't very good at handling
2519 * multiple interrupts at the same interrupt level.
2520 * As the interrupt level is determined by taking the
2521 * vector number and shifting that right by 4, we
2522 * want to spread these out a bit so that they don't
2523 * all fall in the same interrupt level.
2524 *
2525 * Also, we've got to be careful not to trash gate
2526 * 0x80, because int 0x80 is hm, kind of importantish. ;)
2527 */
2528 for_each_active_irq(irq) { 2517 for_each_active_irq(irq) {
2529 cfg = irq_get_chip_data(irq); 2518 cfg = irq_get_chip_data(irq);
2530 if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { 2519 if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) {
@@ -3550,7 +3539,7 @@ void __init setup_ioapic_dest(void)
3550 continue; 3539 continue;
3551 irq = pin_2_irq(irq_entry, ioapic, pin); 3540 irq = pin_2_irq(irq_entry, ioapic, pin);
3552 3541
3553 if ((ioapic > 0) && (irq > 16)) 3542 if ((ioapic > 0) && (irq > NR_IRQS_LEGACY))
3554 continue; 3543 continue;
3555 3544
3556 idata = irq_get_irq_data(irq); 3545 idata = irq_get_irq_data(irq);