diff options
author | John Crispin <blogic@openwrt.org> | 2013-04-13 09:37:37 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:11 -0400 |
commit | 38d5b81cde857a051efa73d56bf195fcf3f24a06 (patch) | |
tree | 90aa458c99457e436ab47b00a39c8373c2b2d801 /arch | |
parent | dafecee8bb4e56af4d3a5f47b5982e6eff5d60b0 (diff) |
MIPS: ralink: add memory definition for RT2880
Populate struct soc_info with the data that describes our RAM window.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5181/
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/mach-ralink/rt288x.h | 4 | ||||
-rw-r--r-- | arch/mips/ralink/rt288x.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h index ad8b42dd2fcc..03ad716acb42 100644 --- a/arch/mips/include/asm/mach-ralink/rt288x.h +++ b/arch/mips/include/asm/mach-ralink/rt288x.h | |||
@@ -46,4 +46,8 @@ | |||
46 | 46 | ||
47 | #define CLKCFG_SRAM_CS_N_WDT BIT(9) | 47 | #define CLKCFG_SRAM_CS_N_WDT BIT(9) |
48 | 48 | ||
49 | #define RT2880_SDRAM_BASE 0x08000000 | ||
50 | #define RT2880_MEM_SIZE_MIN 2 | ||
51 | #define RT2880_MEM_SIZE_MAX 128 | ||
52 | |||
49 | #endif | 53 | #endif |
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c index 1e0788e75af6..f87de1ab2198 100644 --- a/arch/mips/ralink/rt288x.c +++ b/arch/mips/ralink/rt288x.c | |||
@@ -136,4 +136,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info) | |||
136 | name, | 136 | name, |
137 | (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK, | 137 | (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK, |
138 | (id & CHIP_ID_REV_MASK)); | 138 | (id & CHIP_ID_REV_MASK)); |
139 | |||
140 | soc_info->mem_base = RT2880_SDRAM_BASE; | ||
141 | soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; | ||
142 | soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; | ||
139 | } | 143 | } |