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authorBen Dooks <ben-linux@fluff.org>2007-12-22 21:09:34 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-28 08:20:50 -0500
commit332349518f1958b0bc1ae3febc2e4f75f214d255 (patch)
tree5bbf5aa0c1ab02dbee30fdf46d0043dfc52a5ce3 /arch
parent0baada2742a42390a2ebed09e07e1fab518db884 (diff)
[ARM] 4731/1: S3C2412: Check for incomplete sleep
Check if the sleep command returns due to a pending interrupt in the standby unit. If this happens, try and ack the IRQ before re-trying the resume. It is currently unclear whether the resume can be backed out of at this stage as this could cause a problem with level based interrupts. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2412/Makefile2
-rw-r--r--arch/arm/mach-s3c2412/pm.c17
-rw-r--r--arch/arm/mach-s3c2412/sleep.S68
3 files changed, 72 insertions, 15 deletions
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index f8e011691b31..7b782c7df7b4 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
13obj-$(CONFIG_CPU_S3C2412) += irq.o 13obj-$(CONFIG_CPU_S3C2412) += irq.o
14obj-$(CONFIG_CPU_S3C2412) += clock.o 14obj-$(CONFIG_CPU_S3C2412) += clock.o
15obj-$(CONFIG_S3C2412_DMA) += dma.o 15obj-$(CONFIG_S3C2412_DMA) += dma.o
16obj-$(CONFIG_S3C2412_PM) += pm.o 16obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o
17 17
18# Machine support 18# Machine support
19 19
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index 974ffb130479..d4ffb2d98076 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -33,6 +33,8 @@
33 33
34#include <asm/plat-s3c24xx/s3c2412.h> 34#include <asm/plat-s3c24xx/s3c2412.h>
35 35
36extern void s3c2412_sleep_enter(void);
37
36static void s3c2412_cpu_suspend(void) 38static void s3c2412_cpu_suspend(void)
37{ 39{
38 unsigned long tmp; 40 unsigned long tmp;
@@ -43,20 +45,7 @@ static void s3c2412_cpu_suspend(void)
43 tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; 45 tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP;
44 __raw_writel(tmp, S3C2412_PWRCFG); 46 __raw_writel(tmp, S3C2412_PWRCFG);
45 47
46 /* issue the standby signal into the pm unit. Note, we 48 s3c2412_sleep_enter();
47 * issue a write-buffer drain just in case */
48
49 tmp = 0;
50
51 asm("b 1f\n\t"
52 ".align 5\n\t"
53 "1:\n\t"
54 "mcr p15, 0, %0, c7, c10, 4\n\t"
55 "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
56
57 /* we should never get past here */
58
59 panic("sleep resumed to originator?");
60} 49}
61 50
62static void s3c2412_pm_prepare(void) 51static void s3c2412_pm_prepare(void)
diff --git a/arch/arm/mach-s3c2412/sleep.S b/arch/arm/mach-s3c2412/sleep.S
new file mode 100644
index 000000000000..db32cac4199a
--- /dev/null
+++ b/arch/arm/mach-s3c2412/sleep.S
@@ -0,0 +1,68 @@
1/* linux/arch/arm/mach-s3c2412/sleep.S
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2412 Power Manager low-level sleep support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21*/
22
23#include <linux/linkage.h>
24#include <asm/assembler.h>
25#include <asm/hardware.h>
26#include <asm/arch/map.h>
27
28#include <asm/arch/regs-irq.h>
29
30 .text
31
32 .global s3c2412_sleep_enter
33
34s3c2412_sleep_enter:
35 mov r0, #0 /* argument for coprocessors */
36 ldr r1, =S3C2410_INTPND
37 ldr r2, =S3C2410_SRCPND
38 ldr r3, =S3C2410_EINTPEND
39
40 teq r0, r0
41 bl s3c2412_sleep_enter1
42 teq pc, r0
43 bl s3c2412_sleep_enter1
44
45 .align 5
46
47 /* this is called twice, first with the Z flag to ensure that the
48 * instructions have been loaded into the cache, and the second
49 * time to try and suspend the system.
50 */
51s3c2412_sleep_enter1:
52 mcr p15, 0, r0, c7, c10, 4
53 mcrne p15, 0, r0, c7, c0, 4
54
55 /* if we return from here, it is because an interrupt was
56 * active when we tried to shutdown. Try and ack the IRQ and
57 * retry, as simply returning causes the system to lock.
58 */
59
60 ldrne r9, [ r1 ]
61 strne r9, [ r1 ]
62 ldrne r9, [ r2 ]
63 strne r9, [ r2 ]
64 ldrne r9, [ r3 ]
65 strne r9, [ r3 ]
66 bne s3c2412_sleep_enter1
67
68 mov pc, r14