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authorLinus Walleij <linus.walleij@linaro.org>2013-02-08 17:02:33 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-03-03 17:54:11 -0500
commit30a1b5ef0c953a7ba82169c46f92f52fa11ee15e (patch)
tree1fc23566d74eae0209f907784d573fb5ae5661ea /arch
parent56a79b7b021bf1b08334e63c2c14b280e2dbf47a (diff)
ARM: 7642/1: netx: bump IRQ offset to 64
The Netx IRQs offset from zero, which is illegal, since Linux IRQ 0 is NO_IRQ. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-netx/include/mach/irqs.h64
2 files changed, 33 insertions, 33 deletions
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 27c2cb7ab813..1504b68f4c66 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
168{ 168{
169 int irq; 169 int irq;
170 170
171 vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0); 171 vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
172 172
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 irq_set_chip_and_handler(irq, &netx_hif_chip, 174 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/irqs.h b/arch/arm/mach-netx/include/mach/irqs.h
index 6ce914d54a30..8f74a844a775 100644
--- a/arch/arm/mach-netx/include/mach/irqs.h
+++ b/arch/arm/mach-netx/include/mach/irqs.h
@@ -17,42 +17,42 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20#define NETX_IRQ_VIC_START 0 20#define NETX_IRQ_VIC_START 64
21#define NETX_IRQ_SOFTINT 0 21#define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0)
22#define NETX_IRQ_TIMER0 1 22#define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1)
23#define NETX_IRQ_TIMER1 2 23#define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2)
24#define NETX_IRQ_TIMER2 3 24#define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3)
25#define NETX_IRQ_SYSTIME_NS 4 25#define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4)
26#define NETX_IRQ_SYSTIME_S 5 26#define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5)
27#define NETX_IRQ_GPIO_15 6 27#define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6)
28#define NETX_IRQ_WATCHDOG 7 28#define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7)
29#define NETX_IRQ_UART0 8 29#define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8)
30#define NETX_IRQ_UART1 9 30#define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9)
31#define NETX_IRQ_UART2 10 31#define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10)
32#define NETX_IRQ_USB 11 32#define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11)
33#define NETX_IRQ_SPI 12 33#define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12)
34#define NETX_IRQ_I2C 13 34#define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13)
35#define NETX_IRQ_LCD 14 35#define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14)
36#define NETX_IRQ_HIF 15 36#define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15)
37#define NETX_IRQ_GPIO_0_14 16 37#define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16)
38#define NETX_IRQ_XPEC0 17 38#define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17)
39#define NETX_IRQ_XPEC1 18 39#define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18)
40#define NETX_IRQ_XPEC2 19 40#define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19)
41#define NETX_IRQ_XPEC3 20 41#define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20)
42#define NETX_IRQ_XPEC(no) (17 + (no)) 42#define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no))
43#define NETX_IRQ_MSYNC0 21 43#define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21)
44#define NETX_IRQ_MSYNC1 22 44#define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22)
45#define NETX_IRQ_MSYNC2 23 45#define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23)
46#define NETX_IRQ_MSYNC3 24 46#define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24)
47#define NETX_IRQ_IRQ_PHY 25 47#define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25)
48#define NETX_IRQ_ISO_AREA 26 48#define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26)
49/* int 27 is reserved */ 49/* int 27 is reserved */
50/* int 28 is reserved */ 50/* int 28 is reserved */
51#define NETX_IRQ_TIMER3 29 51#define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29)
52#define NETX_IRQ_TIMER4 30 52#define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30)
53/* int 31 is reserved */ 53/* int 31 is reserved */
54 54
55#define NETX_IRQS 32 55#define NETX_IRQS (NETX_IRQ_VIC_START + 32)
56 56
57/* for multiplexed irqs on gpio 0..14 */ 57/* for multiplexed irqs on gpio 0..14 */
58#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) 58#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))