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authorThierry Reding <treding@nvidia.com>2014-07-11 03:52:41 -0400
committerThierry Reding <treding@nvidia.com>2014-07-17 07:36:41 -0400
commit304664eab93f9e95a8d28fbd9702ede88bb10cc5 (patch)
tree9ce11babe79ed88006a40ad994ef30e2f1a55d14 /arch
parenta0524acc94c91c72c2968a76eddc6f3afe82f9f2 (diff)
ARM: tegra: Use a function to get the chip ID
Instead of using a simple variable access to get at the Tegra chip ID, use a function so that we can run additional code. This can be used to determine where the chip ID is being accessed without being available. That in turn will be handy for resolving boot sequence dependencies in order to convert more code to regular initcalls rather than a sequence fixed by Tegra SoC setup code. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/cpuidle.c7
-rw-r--r--arch/arm/mach-tegra/flowctrl.c7
-rw-r--r--arch/arm/mach-tegra/fuse.c19
-rw-r--r--arch/arm/mach-tegra/fuse.h6
-rw-r--r--arch/arm/mach-tegra/hotplug.c11
-rw-r--r--arch/arm/mach-tegra/platsmp.c11
-rw-r--r--arch/arm/mach-tegra/pm.c11
-rw-r--r--arch/arm/mach-tegra/pmc.c4
-rw-r--r--arch/arm/mach-tegra/powergate.c8
-rw-r--r--arch/arm/mach-tegra/reset-handler.S3
-rw-r--r--arch/arm/mach-tegra/reset.c4
-rw-r--r--arch/arm/mach-tegra/sleep-tegra30.S3
-rw-r--r--arch/arm/mach-tegra/tegra.c4
13 files changed, 55 insertions, 43 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 7bc5d8d667fe..316563141add 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -24,12 +24,13 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26 26
27#include "fuse.h" 27#include <soc/tegra/fuse.h>
28
28#include "cpuidle.h" 29#include "cpuidle.h"
29 30
30void __init tegra_cpuidle_init(void) 31void __init tegra_cpuidle_init(void)
31{ 32{
32 switch (tegra_chip_id) { 33 switch (tegra_get_chip_id()) {
33 case TEGRA20: 34 case TEGRA20:
34 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) 35 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
35 tegra20_cpuidle_init(); 36 tegra20_cpuidle_init();
@@ -49,7 +50,7 @@ void __init tegra_cpuidle_init(void)
49 50
50void tegra_cpuidle_pcie_irqs_in_use(void) 51void tegra_cpuidle_pcie_irqs_in_use(void)
51{ 52{
52 switch (tegra_chip_id) { 53 switch (tegra_get_chip_id()) {
53 case TEGRA20: 54 case TEGRA20:
54 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) 55 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
55 tegra20_cpuidle_pcie_irqs_in_use(); 56 tegra20_cpuidle_pcie_irqs_in_use();
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index fde581d78398..ec55d1de1b55 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -23,9 +23,10 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25 25
26#include <soc/tegra/fuse.h>
27
26#include "flowctrl.h" 28#include "flowctrl.h"
27#include "iomap.h" 29#include "iomap.h"
28#include "fuse.h"
29 30
30static u8 flowctrl_offset_halt_cpu[] = { 31static u8 flowctrl_offset_halt_cpu[] = {
31 FLOW_CTRL_HALT_CPU0_EVENTS, 32 FLOW_CTRL_HALT_CPU0_EVENTS,
@@ -76,7 +77,7 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid)
76 int i; 77 int i;
77 78
78 reg = flowctrl_read_cpu_csr(cpuid); 79 reg = flowctrl_read_cpu_csr(cpuid);
79 switch (tegra_chip_id) { 80 switch (tegra_get_chip_id()) {
80 case TEGRA20: 81 case TEGRA20:
81 /* clear wfe bitmap */ 82 /* clear wfe bitmap */
82 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP; 83 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
@@ -117,7 +118,7 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid)
117 118
118 /* Disable powergating via flow controller for CPU0 */ 119 /* Disable powergating via flow controller for CPU0 */
119 reg = flowctrl_read_cpu_csr(cpuid); 120 reg = flowctrl_read_cpu_csr(cpuid);
120 switch (tegra_chip_id) { 121 switch (tegra_get_chip_id()) {
121 case TEGRA20: 122 case TEGRA20:
122 /* clear wfe bitmap */ 123 /* clear wfe bitmap */
123 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP; 124 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index af283039e37f..b22e76a40965 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -51,7 +51,6 @@
51int tegra_sku_id; 51int tegra_sku_id;
52int tegra_cpu_process_id; 52int tegra_cpu_process_id;
53int tegra_core_process_id; 53int tegra_core_process_id;
54int tegra_chip_id;
55int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ 54int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
56int tegra_soc_speedo_id; 55int tegra_soc_speedo_id;
57enum tegra_revision tegra_revision; 56enum tegra_revision tegra_revision;
@@ -124,7 +123,7 @@ static enum tegra_revision tegra_get_revision(u32 id)
124 case 2: 123 case 2:
125 return TEGRA_REVISION_A02; 124 return TEGRA_REVISION_A02;
126 case 3: 125 case 3:
127 if (tegra_chip_id == TEGRA20 && 126 if (tegra_get_chip_id() == TEGRA20 &&
128 (tegra_spare_fuse(18) || tegra_spare_fuse(19))) 127 (tegra_spare_fuse(18) || tegra_spare_fuse(19)))
129 return TEGRA_REVISION_A03p; 128 return TEGRA_REVISION_A03p;
130 else 129 else
@@ -155,6 +154,13 @@ u32 tegra_read_chipid(void)
155 return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); 154 return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
156} 155}
157 156
157u8 tegra_get_chip_id(void)
158{
159 u32 id = tegra_read_chipid();
160
161 return (id >> 8) & 0xff;
162}
163
158static void __init tegra20_fuse_init_randomness(void) 164static void __init tegra20_fuse_init_randomness(void)
159{ 165{
160 u32 randomness[2]; 166 u32 randomness[2];
@@ -185,6 +191,7 @@ void __init tegra_init_fuse(void)
185{ 191{
186 u32 id; 192 u32 id;
187 u32 randomness[5]; 193 u32 randomness[5];
194 u8 chip_id;
188 195
189 u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48)); 196 u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
190 reg |= 1 << 28; 197 reg |= 1 << 28;
@@ -209,9 +216,9 @@ void __init tegra_init_fuse(void)
209 216
210 id = tegra_read_chipid(); 217 id = tegra_read_chipid();
211 randomness[2] = id; 218 randomness[2] = id;
212 tegra_chip_id = (id >> 8) & 0xff; 219 chip_id = (id >> 8) & 0xff;
213 220
214 switch (tegra_chip_id) { 221 switch (chip_id) {
215 case TEGRA20: 222 case TEGRA20:
216 tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT; 223 tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
217 tegra_init_speedo_data = &tegra20_init_speedo_data; 224 tegra_init_speedo_data = &tegra20_init_speedo_data;
@@ -224,7 +231,7 @@ void __init tegra_init_fuse(void)
224 tegra_init_speedo_data = &tegra114_init_speedo_data; 231 tegra_init_speedo_data = &tegra114_init_speedo_data;
225 break; 232 break;
226 default: 233 default:
227 pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id); 234 pr_warn("Tegra: unknown chip id %d\n", chip_id);
228 tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT; 235 tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
229 tegra_init_speedo_data = &tegra_get_process_id; 236 tegra_init_speedo_data = &tegra_get_process_id;
230 } 237 }
@@ -235,7 +242,7 @@ void __init tegra_init_fuse(void)
235 randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id; 242 randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id;
236 243
237 add_device_randomness(randomness, sizeof(randomness)); 244 add_device_randomness(randomness, sizeof(randomness));
238 switch (tegra_chip_id) { 245 switch (chip_id) {
239 case TEGRA20: 246 case TEGRA20:
240 tegra20_fuse_init_randomness(); 247 tegra20_fuse_init_randomness();
241 break; 248 break;
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index c01d04785d67..7a08b4b70c8d 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -26,11 +26,6 @@
26#define SKU_ID_AP25E 27 26#define SKU_ID_AP25E 27
27#define SKU_ID_T25E 28 27#define SKU_ID_T25E 28
28 28
29#define TEGRA20 0x20
30#define TEGRA30 0x30
31#define TEGRA114 0x35
32#define TEGRA124 0x40
33
34#ifndef __ASSEMBLY__ 29#ifndef __ASSEMBLY__
35enum tegra_revision { 30enum tegra_revision {
36 TEGRA_REVISION_UNKNOWN = 0, 31 TEGRA_REVISION_UNKNOWN = 0,
@@ -45,7 +40,6 @@ enum tegra_revision {
45extern int tegra_sku_id; 40extern int tegra_sku_id;
46extern int tegra_cpu_process_id; 41extern int tegra_cpu_process_id;
47extern int tegra_core_process_id; 42extern int tegra_core_process_id;
48extern int tegra_chip_id;
49extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ 43extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
50extern int tegra_soc_speedo_id; 44extern int tegra_soc_speedo_id;
51extern enum tegra_revision tegra_revision; 45extern enum tegra_revision tegra_revision;
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c
index 7842b252dda5..d60339c996cb 100644
--- a/arch/arm/mach-tegra/hotplug.c
+++ b/arch/arm/mach-tegra/hotplug.c
@@ -12,9 +12,10 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/smp.h> 13#include <linux/smp.h>
14 14
15#include <soc/tegra/fuse.h>
16
15#include <asm/smp_plat.h> 17#include <asm/smp_plat.h>
16 18
17#include "fuse.h"
18#include "sleep.h" 19#include "sleep.h"
19 20
20static void (*tegra_hotplug_shutdown)(void); 21static void (*tegra_hotplug_shutdown)(void);
@@ -52,12 +53,12 @@ void __init tegra_hotplug_init(void)
52 if (!IS_ENABLED(CONFIG_HOTPLUG_CPU)) 53 if (!IS_ENABLED(CONFIG_HOTPLUG_CPU))
53 return; 54 return;
54 55
55 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20) 56 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)
56 tegra_hotplug_shutdown = tegra20_hotplug_shutdown; 57 tegra_hotplug_shutdown = tegra20_hotplug_shutdown;
57 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_chip_id == TEGRA30) 58 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)
58 tegra_hotplug_shutdown = tegra30_hotplug_shutdown; 59 tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
59 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114) 60 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)
60 tegra_hotplug_shutdown = tegra30_hotplug_shutdown; 61 tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
61 if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124) 62 if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)
62 tegra_hotplug_shutdown = tegra30_hotplug_shutdown; 63 tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
63} 64}
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index c403edd0fcc7..0466a145b500 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -21,6 +21,8 @@
21#include <linux/jiffies.h> 21#include <linux/jiffies.h>
22#include <linux/smp.h> 22#include <linux/smp.h>
23 23
24#include <soc/tegra/fuse.h>
25
24#include <asm/cacheflush.h> 26#include <asm/cacheflush.h>
25#include <asm/mach-types.h> 27#include <asm/mach-types.h>
26#include <asm/smp_plat.h> 28#include <asm/smp_plat.h>
@@ -28,7 +30,6 @@
28 30
29#include "common.h" 31#include "common.h"
30#include "flowctrl.h" 32#include "flowctrl.h"
31#include "fuse.h"
32#include "iomap.h" 33#include "iomap.h"
33#include "pmc.h" 34#include "pmc.h"
34#include "reset.h" 35#include "reset.h"
@@ -170,13 +171,13 @@ static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
170static int tegra_boot_secondary(unsigned int cpu, 171static int tegra_boot_secondary(unsigned int cpu,
171 struct task_struct *idle) 172 struct task_struct *idle)
172{ 173{
173 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20) 174 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)
174 return tegra20_boot_secondary(cpu, idle); 175 return tegra20_boot_secondary(cpu, idle);
175 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_chip_id == TEGRA30) 176 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)
176 return tegra30_boot_secondary(cpu, idle); 177 return tegra30_boot_secondary(cpu, idle);
177 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114) 178 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)
178 return tegra114_boot_secondary(cpu, idle); 179 return tegra114_boot_secondary(cpu, idle);
179 if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124) 180 if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)
180 return tegra114_boot_secondary(cpu, idle); 181 return tegra114_boot_secondary(cpu, idle);
181 182
182 return -EINVAL; 183 return -EINVAL;
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index ae4826e43171..94db3b6664df 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -27,6 +27,8 @@
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28#include <linux/suspend.h> 28#include <linux/suspend.h>
29 29
30#include <soc/tegra/fuse.h>
31
30#include <asm/cacheflush.h> 32#include <asm/cacheflush.h>
31#include <asm/idmap.h> 33#include <asm/idmap.h>
32#include <asm/proc-fns.h> 34#include <asm/proc-fns.h>
@@ -35,7 +37,6 @@
35#include <asm/tlbflush.h> 37#include <asm/tlbflush.h>
36 38
37#include "flowctrl.h" 39#include "flowctrl.h"
38#include "fuse.h"
39#include "iomap.h" 40#include "iomap.h"
40#include "pmc.h" 41#include "pmc.h"
41#include "pm.h" 42#include "pm.h"
@@ -53,7 +54,7 @@ static int (*tegra_sleep_func)(unsigned long v2p);
53 54
54static void tegra_tear_down_cpu_init(void) 55static void tegra_tear_down_cpu_init(void)
55{ 56{
56 switch (tegra_chip_id) { 57 switch (tegra_get_chip_id()) {
57 case TEGRA20: 58 case TEGRA20:
58 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) 59 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
59 tegra_tear_down_cpu = tegra20_tear_down_cpu; 60 tegra_tear_down_cpu = tegra20_tear_down_cpu;
@@ -143,7 +144,7 @@ bool tegra_set_cpu_in_lp2(void)
143 144
144 if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) 145 if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask))
145 last_cpu = true; 146 last_cpu = true;
146 else if (tegra_chip_id == TEGRA20 && phy_cpu_id == 1) 147 else if (tegra_get_chip_id() == TEGRA20 && phy_cpu_id == 1)
147 tegra20_cpu_set_resettable_soon(); 148 tegra20_cpu_set_resettable_soon();
148 149
149 spin_unlock(&tegra_lp2_lock); 150 spin_unlock(&tegra_lp2_lock);
@@ -212,7 +213,7 @@ static int tegra_sleep_core(unsigned long v2p)
212 */ 213 */
213static bool tegra_lp1_iram_hook(void) 214static bool tegra_lp1_iram_hook(void)
214{ 215{
215 switch (tegra_chip_id) { 216 switch (tegra_get_chip_id()) {
216 case TEGRA20: 217 case TEGRA20:
217 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) 218 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
218 tegra20_lp1_iram_hook(); 219 tegra20_lp1_iram_hook();
@@ -242,7 +243,7 @@ static bool tegra_lp1_iram_hook(void)
242 243
243static bool tegra_sleep_core_init(void) 244static bool tegra_sleep_core_init(void)
244{ 245{
245 switch (tegra_chip_id) { 246 switch (tegra_get_chip_id()) {
246 case TEGRA20: 247 case TEGRA20:
247 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) 248 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
248 tegra20_sleep_core_init(); 249 tegra20_sleep_core_init();
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index a602f6c76b10..69df18090c8b 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -21,10 +21,10 @@
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23 23
24#include <soc/tegra/fuse.h>
24#include <soc/tegra/powergate.h> 25#include <soc/tegra/powergate.h>
25 26
26#include "flowctrl.h" 27#include "flowctrl.h"
27#include "fuse.h"
28#include "pm.h" 28#include "pm.h"
29#include "pmc.h" 29#include "pmc.h"
30#include "sleep.h" 30#include "sleep.h"
@@ -252,7 +252,7 @@ void tegra_pmc_pm_set(enum tegra_suspend_mode mode)
252 reg |= TEGRA_POWER_CPU_PWRREQ_OE; 252 reg |= TEGRA_POWER_CPU_PWRREQ_OE;
253 reg &= ~TEGRA_POWER_EFFECT_LP0; 253 reg &= ~TEGRA_POWER_EFFECT_LP0;
254 254
255 switch (tegra_chip_id) { 255 switch (tegra_get_chip_id()) {
256 case TEGRA20: 256 case TEGRA20:
257 case TEGRA30: 257 case TEGRA30:
258 break; 258 break;
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index c12044de629b..0a14b8638437 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -30,9 +30,9 @@
30#include <linux/seq_file.h> 30#include <linux/seq_file.h>
31#include <linux/spinlock.h> 31#include <linux/spinlock.h>
32 32
33#include <soc/tegra/fuse.h>
33#include <soc/tegra/powergate.h> 34#include <soc/tegra/powergate.h>
34 35
35#include "fuse.h"
36#include "iomap.h" 36#include "iomap.h"
37 37
38#define DPD_SAMPLE 0x020 38#define DPD_SAMPLE 0x020
@@ -158,7 +158,7 @@ int tegra_powergate_remove_clamping(int id)
158 * The Tegra124 GPU has a separate register (with different semantics) 158 * The Tegra124 GPU has a separate register (with different semantics)
159 * to remove clamps. 159 * to remove clamps.
160 */ 160 */
161 if (tegra_chip_id == TEGRA124) { 161 if (tegra_get_chip_id() == TEGRA124) {
162 if (id == TEGRA_POWERGATE_3D) { 162 if (id == TEGRA_POWERGATE_3D) {
163 pmc_write(0, GPU_RG_CNTRL); 163 pmc_write(0, GPU_RG_CNTRL);
164 return 0; 164 return 0;
@@ -228,7 +228,7 @@ int tegra_cpu_powergate_id(int cpuid)
228 228
229int __init tegra_powergate_init(void) 229int __init tegra_powergate_init(void)
230{ 230{
231 switch (tegra_chip_id) { 231 switch (tegra_get_chip_id()) {
232 case TEGRA20: 232 case TEGRA20:
233 tegra_num_powerdomains = 7; 233 tegra_num_powerdomains = 7;
234 break; 234 break;
@@ -369,7 +369,7 @@ int __init tegra_powergate_debugfs_init(void)
369{ 369{
370 struct dentry *d; 370 struct dentry *d;
371 371
372 switch (tegra_chip_id) { 372 switch (tegra_get_chip_id()) {
373 case TEGRA20: 373 case TEGRA20:
374 powergate_name = powergate_name_t20; 374 powergate_name = powergate_name_t20;
375 break; 375 break;
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index d916c84487ae..7b2baab0f0bd 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -17,11 +17,12 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19 19
20#include <soc/tegra/fuse.h>
21
20#include <asm/asm-offsets.h> 22#include <asm/asm-offsets.h>
21#include <asm/cache.h> 23#include <asm/cache.h>
22 24
23#include "flowctrl.h" 25#include "flowctrl.h"
24#include "fuse.h"
25#include "iomap.h" 26#include "iomap.h"
26#include "reset.h" 27#include "reset.h"
27#include "sleep.h" 28#include "sleep.h"
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index b90507922a8c..f94fdf89d457 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -19,6 +19,8 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/io.h> 20#include <linux/io.h>
21 21
22#include <soc/tegra/fuse.h>
23
22#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
23#include <asm/firmware.h> 25#include <asm/firmware.h>
24#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
@@ -53,7 +55,7 @@ static void __init tegra_cpu_reset_handler_set(const u32 reset_address)
53 * Prevent further modifications to the physical reset vector. 55 * Prevent further modifications to the physical reset vector.
54 * NOTE: Has no effect on chips prior to Tegra30. 56 * NOTE: Has no effect on chips prior to Tegra30.
55 */ 57 */
56 if (tegra_chip_id != TEGRA20) { 58 if (tegra_get_chip_id() != TEGRA20) {
57 reg = readl(sb_ctrl); 59 reg = readl(sb_ctrl);
58 reg |= 2; 60 reg |= 2;
59 writel(reg, sb_ctrl); 61 writel(reg, sb_ctrl);
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index e240b875183b..8ea699b8e3cb 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -16,12 +16,13 @@
16 16
17#include <linux/linkage.h> 17#include <linux/linkage.h>
18 18
19#include <soc/tegra/fuse.h>
20
19#include <asm/asm-offsets.h> 21#include <asm/asm-offsets.h>
20#include <asm/assembler.h> 22#include <asm/assembler.h>
21#include <asm/cache.h> 23#include <asm/cache.h>
22 24
23#include "flowctrl.h" 25#include "flowctrl.h"
24#include "fuse.h"
25#include "irammap.h" 26#include "irammap.h"
26#include "sleep.h" 27#include "sleep.h"
27 28
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 7a9f30289049..8be25c41249a 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -35,6 +35,8 @@
35#include <linux/sys_soc.h> 35#include <linux/sys_soc.h>
36#include <linux/usb/tegra_usb_phy.h> 36#include <linux/usb/tegra_usb_phy.h>
37 37
38#include <soc/tegra/fuse.h>
39
38#include <asm/hardware/cache-l2x0.h> 40#include <asm/hardware/cache-l2x0.h>
39#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 42#include <asm/mach/time.h>
@@ -104,7 +106,7 @@ static void __init tegra_dt_init(void)
104 106
105 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra"); 107 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
106 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision); 108 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
107 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id); 109 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
108 110
109 soc_dev = soc_device_register(soc_dev_attr); 111 soc_dev = soc_device_register(soc_dev_attr);
110 if (IS_ERR(soc_dev)) { 112 if (IS_ERR(soc_dev)) {