Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6

* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (362 commits)
  V4L-DVB: cx88-dvb: remove extra attribution for core
  V4L/DVB: v4l: soc_camera: fix bound checking of mbus_fmt[] index
  V4L/DVB: Add support for SMT7020 to cx88
  V4L/DVB: radio-si470x: Use UTF-8 encoding on a comment
  V4L/DVB: MAINTAINERS: Telegent tlg2300 section fix
  V4L/DVB: gspca_stv06xx: Add support for camera button
  V4L/DVB: gspca_ov519: add support for the button on ov511 based cams
  V4L/DVB: gspca_ov519: Add support for the button on ov518 based cams
  V4L/DVB: gspca_ov519: add support for the button on ov519 based cams
  V4L/DVB: gspca_main: Fix a compile error when CONFIG_INPUT is not set
  V4L/DVB: gspca_main: some input error handling fixes
  V4L/DVB: gspca_main: Allow use of input device creation code for non int. inputs
  V4L/DVB: gspca_pac7302: much improved exposure control
  V4L/DVB: gspca_sonixb: Make sonixb driver handle pas106 and pas202 cameras
  V4L/DVB: gspca_sonixb: pas106: fixup bright ctrl and add gain and exposure ctrls
  V4L/DVB: Documentation: gspca.txt: update known mr97310a cams
  V4L/DVB: gspca_mr97310a: add support for the Sakar 1638x CyberPix
  V4L/DVB: gscpa_sonixb: limit ov7630 max framerate at 640x480
  V4L/DVB: gspca_sonixb: pas202: fixup brightness ctrl and add gain and exposure ctrls
  V4L/DVB: gscpa_sonixb: Differentiate between sensors with a coarse and fine expo ctrl
  ...

8 files changed, 227 insertions, 20 deletions

diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index b476395d2cd4..38e9033d2e86 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -37,6 +37,8 @@
 #include <mach/nand.h>
 #include <mach/keyscan.h>
 
+#include <media/tvp514x.h>
+
 static inline int have_imager(void)
 {
         /* REVISIT when it's supported, trigger via Kconfig */
@@ -306,6 +308,73 @@ static void dm365evm_mmc_configure(void)
         davinci_cfg_reg(DM365_SD1_DATA0);
 }
 
+static struct tvp514x_platform_data tvp5146_pdata = {
+        .clk_polarity = 0,
+        .hs_polarity = 1,
+        .vs_polarity = 1
+};
+
+#define TVP514X_STD_ALL        (V4L2_STD_NTSC | V4L2_STD_PAL)
+/* Inputs available at the TVP5146 */
+static struct v4l2_input tvp5146_inputs[] = {
+        {
+                .index = 0,
+                .name = "Composite",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+        {
+                .index = 1,
+                .name = "S-Video",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+};
+
+/*
+ * this is the route info for connecting each input to decoder
+ * ouput that goes to vpfe. There is a one to one correspondence
+ * with tvp5146_inputs
+ */
+static struct vpfe_route tvp5146_routes[] = {
+        {
+                .input = INPUT_CVBS_VI2B,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+{
+                .input = INPUT_SVIDEO_VI2C_VI1C,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+};
+
+static struct vpfe_subdev_info vpfe_sub_devs[] = {
+        {
+                .name = "tvp5146",
+                .grp_id = 0,
+                .num_inputs = ARRAY_SIZE(tvp5146_inputs),
+                .inputs = tvp5146_inputs,
+                .routes = tvp5146_routes,
+                .can_route = 1,
+                .ccdc_if_params = {
+                        .if_type = VPFE_BT656,
+                        .hdpol = VPFE_PINPOL_POSITIVE,
+                        .vdpol = VPFE_PINPOL_POSITIVE,
+                },
+                .board_info = {
+                        I2C_BOARD_INFO("tvp5146", 0x5d),
+                        .platform_data = &tvp5146_pdata,
+                },
+        },
+};
+
+static struct vpfe_config vpfe_cfg = {
+        .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+        .sub_devs = vpfe_sub_devs,
+        .i2c_adapter_id = 1,
+        .card_name = "DM365 EVM",
+        .ccdc = "ISIF",
+};
+
 static void __init evm_init_i2c(void)
 {
         davinci_init_i2c(&i2c_pdata);
@@ -497,6 +566,8 @@ static struct davinci_uart_config uart_config __initdata = {
 
 static void __init dm365_evm_map_io(void)
 {
+        /* setup input configuration for VPFE input devices */
+        dm365_set_vpfe_config(&vpfe_cfg);
         dm365_init();
 }
 
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index dedf4d4f3a27..d84e85414d20 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -125,7 +125,6 @@ static struct clk vpss_slave_clk = {
         .lpsc = DAVINCI_LPSC_VPSSSLV,
 };
 
-
 static struct clk clkout1_clk = {
         .name = "clkout1",
         .parent = &pll1_aux_clk,
@@ -665,6 +664,17 @@ static struct platform_device dm355_asp1_device = {
         .resource       = dm355_asp1_resources,
 };
 
+static void dm355_ccdc_setup_pinmux(void)
+{
+        davinci_cfg_reg(DM355_VIN_PCLK);
+        davinci_cfg_reg(DM355_VIN_CAM_WEN);
+        davinci_cfg_reg(DM355_VIN_CAM_VD);
+        davinci_cfg_reg(DM355_VIN_CAM_HD);
+        davinci_cfg_reg(DM355_VIN_YIN_EN);
+        davinci_cfg_reg(DM355_VIN_CINL_EN);
+        davinci_cfg_reg(DM355_VIN_CINH_EN);
+}
+
 static struct resource dm355_vpss_resources[] = {
         {
                 /* VPSS BL Base address */
@@ -701,6 +711,10 @@ static struct resource vpfe_resources[] = {
                 .end            = IRQ_VDINT1,
                 .flags          = IORESOURCE_IRQ,
         },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm355_ccdc_resource[] = {
         /* CCDC Base address */
         {
                 .flags          = IORESOURCE_MEM,
@@ -708,8 +722,18 @@ static struct resource vpfe_resources[] = {
                 .end            = 0x01c70600 + 0x1ff,
         },
 };
+static struct platform_device dm355_ccdc_dev = {
+        .name           = "dm355_ccdc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm355_ccdc_resource),
+        .resource       = dm355_ccdc_resource,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = dm355_ccdc_setup_pinmux,
+        },
+};
 
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
 static struct platform_device vpfe_capture_dev = {
         .name           = CAPTURE_DRV_NAME,
         .id             = -1,
@@ -857,20 +881,13 @@ static int __init dm355_init_devices(void)
         if (!cpu_is_davinci_dm355())
                 return 0;
 
+        /* Add ccdc clock aliases */
+        clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
+        clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
         davinci_cfg_reg(DM355_INT_EDMA_CC);
         platform_device_register(&dm355_edma_device);
         platform_device_register(&dm355_vpss_device);
-        /*
-         * setup Mux configuration for vpfe input and register
-         * vpfe capture platform device
-         */
-        davinci_cfg_reg(DM355_VIN_PCLK);
-        davinci_cfg_reg(DM355_VIN_CAM_WEN);
-        davinci_cfg_reg(DM355_VIN_CAM_VD);
-        davinci_cfg_reg(DM355_VIN_CAM_HD);
-        davinci_cfg_reg(DM355_VIN_YIN_EN);
-        davinci_cfg_reg(DM355_VIN_CINL_EN);
-        davinci_cfg_reg(DM355_VIN_CINH_EN);
+        platform_device_register(&dm355_ccdc_dev);
         platform_device_register(&vpfe_capture_dev);
 
         return 0;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f53735cb922e..ce9da43a628b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1008,6 +1008,97 @@ void __init dm365_init(void)
         davinci_common_init(&davinci_soc_info_dm365);
 }
 
+static struct resource dm365_vpss_resources[] = {
+        {
+                /* VPSS ISP5 Base address */
+                .name           = "isp5",
+                .start          = 0x01c70000,
+                .end            = 0x01c70000 + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* VPSS CLK Base address */
+                .name           = "vpss",
+                .start          = 0x01c70200,
+                .end            = 0x01c70200 + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device dm365_vpss_device = {
+       .name                   = "vpss",
+       .id                     = -1,
+       .dev.platform_data      = "dm365_vpss",
+       .num_resources          = ARRAY_SIZE(dm365_vpss_resources),
+       .resource               = dm365_vpss_resources,
+};
+
+static struct resource vpfe_resources[] = {
+        {
+                .start          = IRQ_VDINT0,
+                .end            = IRQ_VDINT0,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = IRQ_VDINT1,
+                .end            = IRQ_VDINT1,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device vpfe_capture_dev = {
+        .name           = CAPTURE_DRV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(vpfe_resources),
+        .resource       = vpfe_resources,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+static void dm365_isif_setup_pinmux(void)
+{
+        davinci_cfg_reg(DM365_VIN_CAM_WEN);
+        davinci_cfg_reg(DM365_VIN_CAM_VD);
+        davinci_cfg_reg(DM365_VIN_CAM_HD);
+        davinci_cfg_reg(DM365_VIN_YIN4_7_EN);
+        davinci_cfg_reg(DM365_VIN_YIN0_3_EN);
+}
+
+static struct resource isif_resource[] = {
+        /* ISIF Base address */
+        {
+                .start          = 0x01c71000,
+                .end            = 0x01c71000 + 0x1ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        /* ISIF Linearization table 0 */
+        {
+                .start          = 0x1C7C000,
+                .end            = 0x1C7C000 + 0x2ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        /* ISIF Linearization table 1 */
+        {
+                .start          = 0x1C7C400,
+                .end            = 0x1C7C400 + 0x2ff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+static struct platform_device dm365_isif_dev = {
+        .name           = "isif",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(isif_resource),
+        .resource       = isif_resource,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = dm365_isif_setup_pinmux,
+        },
+};
+
 static int __init dm365_init_devices(void)
 {
         if (!cpu_is_davinci_dm365())
@@ -1016,7 +1107,16 @@ static int __init dm365_init_devices(void)
         davinci_cfg_reg(DM365_INT_EDMA_CC);
         platform_device_register(&dm365_edma_device);
         platform_device_register(&dm365_emac_device);
-
+        /* Add isif clock alias */
+        clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
+        platform_device_register(&dm365_vpss_device);
+        platform_device_register(&dm365_isif_dev);
+        platform_device_register(&vpfe_capture_dev);
         return 0;
 }
 postcore_initcall(dm365_init_devices);
+
+void dm365_set_vpfe_config(struct vpfe_config *cfg)
+{
+       vpfe_capture_dev.dev.platform_data = cfg;
+}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2cd008156dea..92aeb5600680 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -612,6 +612,11 @@ static struct resource vpfe_resources[] = {
                 .end            = IRQ_VDINT1,
                 .flags          = IORESOURCE_IRQ,
         },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm644x_ccdc_resource[] = {
+        /* CCDC Base address */
         {
                 .start          = 0x01c70400,
                 .end            = 0x01c70400 + 0xff,
@@ -619,7 +624,17 @@ static struct resource vpfe_resources[] = {
         },
 };
 
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device dm644x_ccdc_dev = {
+        .name           = "dm644x_ccdc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm644x_ccdc_resource),
+        .resource       = dm644x_ccdc_resource,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
 static struct platform_device vpfe_capture_dev = {
         .name           = CAPTURE_DRV_NAME,
         .id             = -1,
@@ -769,9 +784,13 @@ static int __init dm644x_init_devices(void)
         if (!cpu_is_davinci_dm644x())
                 return 0;
 
+        /* Add ccdc clock aliases */
+        clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
+        clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
         platform_device_register(&dm644x_edma_device);
         platform_device_register(&dm644x_emac_device);
         platform_device_register(&dm644x_vpss_device);
+        platform_device_register(&dm644x_ccdc_dev);
         platform_device_register(&vpfe_capture_dev);
 
         return 0;
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index f1710a30e7ba..9fc5a64a5364 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -18,6 +18,7 @@
 #include <mach/emac.h>
 #include <mach/asp.h>
 #include <mach/keyscan.h>
+#include <media/davinci/vpfe_capture.h>
 
 #define DM365_EMAC_BASE                 (0x01D07000)
 #define DM365_EMAC_CNTRL_OFFSET         (0x0000)
@@ -36,4 +37,5 @@ void __init dm365_init_asp(struct snd_platform_data *pdata);
 void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
 void __init dm365_init_rtc(void);
 
+void dm365_set_vpfe_config(struct vpfe_config *cfg);
 #endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h
index 31abe6d514b8..6709b1cd7c77 100644
--- a/arch/arm/mach-pxa/include/mach/camera.h
+++ b/arch/arm/mach-pxa/include/mach/camera.h
@@ -35,8 +35,6 @@
 #define PXA_CAMERA_VSP          0x400
 
 struct pxacamera_platform_data {
-        int (*init)(struct device *);
-
         unsigned long flags;
         unsigned long mclk_10khz;
 };
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index b5980696abbe..57e37e284208 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -471,8 +471,8 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
 };
 
 static struct ov772x_camera_info ov7725_info = {
-        .buswidth       = SOCAM_DATAWIDTH_8,
-        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
+        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
+                          OV772X_FLAG_8BIT,
         .edgectrl       = OV772X_AUTO_EDGECTRL(0xf, 0),
 };
 
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index e08d5132bb1e..be300aaca6fe 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -431,7 +431,7 @@ static struct i2c_board_info migor_i2c_camera[] = {
 };
 
 static struct ov772x_camera_info ov7725_info = {
-        .buswidth       = SOCAM_DATAWIDTH_8,
+        .flags          = OV772X_FLAG_8BIT,
 };
 
 static struct soc_camera_link ov7725_link = {