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authorSascha Hauer <s.hauer@pengutronix.de>2010-11-24 02:24:29 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-11-24 02:24:29 -0500
commit2a85927c79634e89b9cd683dd2bae65966d9b216 (patch)
tree5e922b0f26e4099b6bcad65d2d5ea42e166ff068 /arch
parent3561d43fd289f590fdae672e5eb831b8d5cf0bf6 (diff)
parent124bf94a9f9b52341562628cd56b252e7d820ee8 (diff)
Merge branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/ukl/linux-2.6 into imx-for-2.6.38
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/configs/mx3_defconfig1
-rw-r--r--arch/arm/mach-imx/Kconfig128
-rw-r--r--arch/arm/mach-imx/Makefile8
-rw-r--r--arch/arm/mach-imx/Makefile.boot4
-rw-r--r--arch/arm/mach-imx/clock-imx25.c (renamed from arch/arm/mach-mx25/clock.c)0
-rw-r--r--arch/arm/mach-imx/devices-imx21.h24
-rw-r--r--arch/arm/mach-imx/devices-imx25.h (renamed from arch/arm/mach-mx25/devices-imx25.h)49
-rw-r--r--arch/arm/mach-imx/devices-imx27.h35
-rw-r--r--arch/arm/mach-imx/devices.c553
-rw-r--r--arch/arm/mach-imx/devices.h29
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c17
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c (renamed from arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c)8
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c21
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c (renamed from arch/arm/mach-mx25/mach-cpuimx25.c)17
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c12
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c1
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c20
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c (renamed from arch/arm/mach-mx25/mach-mx25_3ds.c)20
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c11
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c17
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c11
-rw-r--r--arch/arm/mach-imx/mach-pca100.c33
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c12
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c1
-rw-r--r--arch/arm/mach-imx/mm-imx1.c7
-rw-r--r--arch/arm/mach-imx/mm-imx21.c21
-rw-r--r--arch/arm/mach-imx/mm-imx25.c (renamed from arch/arm/mach-mx25/mm.c)27
-rw-r--r--arch/arm/mach-imx/mm-imx27.c21
-rw-r--r--arch/arm/mach-imx/pcm970-baseboard.c12
-rw-r--r--arch/arm/mach-mx25/Kconfig34
-rw-r--r--arch/arm/mach-mx25/Makefile5
-rw-r--r--arch/arm/mach-mx25/Makefile.boot3
-rw-r--r--arch/arm/mach-mx25/devices.c308
-rw-r--r--arch/arm/mach-mx25/devices.h13
-rw-r--r--arch/arm/mach-mx3/Kconfig79
-rw-r--r--arch/arm/mach-mx3/Makefile7
-rw-r--r--arch/arm/mach-mx3/devices-imx31.h27
-rw-r--r--arch/arm/mach-mx3/devices-imx35.h41
-rw-r--r--arch/arm/mach-mx3/devices.c271
-rw-r--r--arch/arm/mach-mx3/devices.h10
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c14
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c20
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c6
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c10
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c9
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c5
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c20
-rw-r--r--arch/arm/mach-mx3/mach-mx35_3ds.c13
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c23
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c2
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c18
-rw-r--r--arch/arm/mach-mx3/mm.c84
-rw-r--r--arch/arm/mach-mx3/mx31lilly-db.c5
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c8
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c20
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c21
-rw-r--r--arch/arm/mach-mx3/mx31moboard-smartbot.c16
-rw-r--r--arch/arm/mach-mx5/Kconfig6
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c4
-rw-r--r--arch/arm/mach-mx5/devices-imx51.h9
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c4
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx5/mm.c35
-rw-r--r--arch/arm/mach-mxc91231/mm.c53
-rw-r--r--arch/arm/plat-mxc/Kconfig5
-rw-r--r--arch/arm/plat-mxc/audmux-v2.c4
-rw-r--r--arch/arm/plat-mxc/devices.c23
-rw-r--r--arch/arm/plat-mxc/devices/Kconfig52
-rw-r--r--arch/arm/plat-mxc/devices/Makefile16
-rw-r--r--arch/arm/plat-mxc/devices/platform-esdhc.c71
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c6
-rw-r--r--arch/arm/plat-mxc/devices/platform-flexcan.c48
-rw-r--r--arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c56
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-dma.c18
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-fb.c52
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-i2c.c12
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-keypad.c62
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-ssi.c12
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-uart.c12
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx2-wdt.c56
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx21-hcd.c41
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx_udc.c75
-rw-r--r--arch/arm/plat-mxc/devices/platform-imxdi_rtc.c41
-rw-r--r--arch/arm/plat-mxc/devices/platform-mx1-camera.c42
-rw-r--r--arch/arm/plat-mxc/devices/platform-mx2-camera.c64
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc-ehci.c69
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc-mmc.c72
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_nand.c8
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_pwm.c60
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_rnga.c56
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_w1.c50
-rw-r--r--arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c74
-rw-r--r--arch/arm/plat-mxc/devices/platform-spi_imx.c12
-rw-r--r--arch/arm/plat-mxc/ehci.c8
-rw-r--r--arch/arm/plat-mxc/gpio.c97
-rw-r--r--arch/arm/plat-mxc/include/mach/debug-macro.S23
-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h173
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h87
-rw-r--r--arch/arm/plat-mxc/include/mach/imxfb.h3
-rw-r--r--arch/arm/plat-mxc/include/mach/mx1.h155
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h50
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h41
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h101
-rw-r--r--arch/arm/plat-mxc/include/mach/mx2x.h149
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h71
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h48
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3x.h182
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h42
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc91231.h23
112 files changed, 2101 insertions, 2651 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index b87aed028eef..057beb8ee203 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -154,7 +154,7 @@ machine-$(CONFIG_ARCH_MSM) := msm
154machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 154machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
155machine-$(CONFIG_ARCH_MX1) := imx 155machine-$(CONFIG_ARCH_MX1) := imx
156machine-$(CONFIG_ARCH_MX2) := imx 156machine-$(CONFIG_ARCH_MX2) := imx
157machine-$(CONFIG_ARCH_MX25) := mx25 157machine-$(CONFIG_ARCH_MX25) := imx
158machine-$(CONFIG_ARCH_MX3) := mx3 158machine-$(CONFIG_ARCH_MX3) := mx3
159machine-$(CONFIG_ARCH_MX5) := mx5 159machine-$(CONFIG_ARCH_MX5) := mx5
160machine-$(CONFIG_ARCH_MXC91231) := mxc91231 160machine-$(CONFIG_ARCH_MXC91231) := mxc91231
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
index f0c339fd5d21..e648ea3429be 100644
--- a/arch/arm/configs/mx3_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -84,6 +84,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y
84CONFIG_I2C=y 84CONFIG_I2C=y
85CONFIG_I2C_CHARDEV=y 85CONFIG_I2C_CHARDEV=y
86CONFIG_I2C_IMX=y 86CONFIG_I2C_IMX=y
87CONFIG_SPI=y
87CONFIG_W1=y 88CONFIG_W1=y
88CONFIG_W1_MASTER_MXC=y 89CONFIG_W1_MASTER_MXC=y
89CONFIG_W1_SLAVE_THERM=y 90CONFIG_W1_SLAVE_THERM=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 197f9e241cff..41b6450df810 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,13 +1,33 @@
1config IMX_HAVE_DMA_V1 1config IMX_HAVE_DMA_V1
2 bool 2 bool
3 3
4if ARCH_MX1
5
6config SOC_IMX1 4config SOC_IMX1
5 bool
7 select CPU_ARM920T 6 select CPU_ARM920T
8 select IMX_HAVE_DMA_V1 7 select IMX_HAVE_DMA_V1
9 select IMX_HAVE_IOMUX_V1 8 select IMX_HAVE_IOMUX_V1
9
10config SOC_IMX21
10 bool 11 bool
12 select CPU_ARM926T
13 select ARCH_MXC_AUDMUX_V1
14 select IMX_HAVE_DMA_V1
15 select IMX_HAVE_IOMUX_V1
16
17config SOC_IMX25
18 bool
19 select CPU_ARM926T
20 select ARCH_MXC_AUDMUX_V2
21 select ARCH_MXC_IOMUX_V3
22
23config SOC_IMX27
24 bool
25 select CPU_ARM926T
26 select ARCH_MXC_AUDMUX_V1
27 select IMX_HAVE_DMA_V1
28 select IMX_HAVE_IOMUX_V1
29
30if ARCH_MX1
11 31
12comment "MX1 platforms:" 32comment "MX1 platforms:"
13config MACH_MXLADS 33config MACH_MXLADS
@@ -31,33 +51,17 @@ endif
31 51
32if ARCH_MX2 52if ARCH_MX2
33 53
34config SOC_IMX21
35 select CPU_ARM926T
36 select ARCH_MXC_AUDMUX_V1
37 select IMX_HAVE_DMA_V1
38 select IMX_HAVE_IOMUX_V1
39 bool
40
41config SOC_IMX27
42 select CPU_ARM926T
43 select ARCH_MXC_AUDMUX_V1
44 select IMX_HAVE_DMA_V1
45 select IMX_HAVE_IOMUX_V1
46 bool
47
48choice 54choice
49 prompt "CPUs:" 55 prompt "CPUs:"
50 default MACH_MX21 56 default MACH_MX21
51 57
52config MACH_MX21 58config MACH_MX21
53 bool "i.MX21 support" 59 bool "i.MX21 support"
54 select SOC_IMX21
55 help 60 help
56 This enables support for Freescale's MX2 based i.MX21 processor. 61 This enables support for Freescale's MX2 based i.MX21 processor.
57 62
58config MACH_MX27 63config MACH_MX27
59 bool "i.MX27 support" 64 bool "i.MX27 support"
60 select SOC_IMX27
61 help 65 help
62 This enables support for Freescale's MX2 based i.MX27 processor. 66 This enables support for Freescale's MX2 based i.MX27 processor.
63 67
@@ -71,7 +75,10 @@ comment "MX21 platforms:"
71 75
72config MACH_MX21ADS 76config MACH_MX21ADS
73 bool "MX21ADS platform" 77 bool "MX21ADS platform"
78 select SOC_IMX21
79 select IMX_HAVE_PLATFORM_IMX_FB
74 select IMX_HAVE_PLATFORM_IMX_UART 80 select IMX_HAVE_PLATFORM_IMX_UART
81 select IMX_HAVE_PLATFORM_MXC_MMC
75 select IMX_HAVE_PLATFORM_MXC_NAND 82 select IMX_HAVE_PLATFORM_MXC_NAND
76 help 83 help
77 Include support for MX21ADS platform. This includes specific 84 Include support for MX21ADS platform. This includes specific
@@ -79,24 +86,78 @@ config MACH_MX21ADS
79 86
80endif 87endif
81 88
89if ARCH_MX25
90
91comment "MX25 platforms:"
92
93config MACH_MX25_3DS
94 bool "Support MX25PDK (3DS) Platform"
95 select SOC_IMX25
96 select IMX_HAVE_PLATFORM_IMX2_WDT
97 select IMX_HAVE_PLATFORM_IMXDI_RTC
98 select IMX_HAVE_PLATFORM_IMX_FB
99 select IMX_HAVE_PLATFORM_IMX_KEYPAD
100 select IMX_HAVE_PLATFORM_IMX_UART
101 select IMX_HAVE_PLATFORM_MXC_EHCI
102 select IMX_HAVE_PLATFORM_MXC_NAND
103 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
104
105config MACH_EUKREA_CPUIMX25
106 bool "Support Eukrea CPUIMX25 Platform"
107 select SOC_IMX25
108 select IMX_HAVE_PLATFORM_FLEXCAN
109 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
110 select IMX_HAVE_PLATFORM_IMXDI_RTC
111 select IMX_HAVE_PLATFORM_IMX_FB
112 select IMX_HAVE_PLATFORM_IMX_I2C
113 select IMX_HAVE_PLATFORM_IMX_UART
114 select IMX_HAVE_PLATFORM_MXC_EHCI
115 select IMX_HAVE_PLATFORM_MXC_NAND
116 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
117 select MXC_ULPI if USB_ULPI
118
119choice
120 prompt "Baseboard"
121 depends on MACH_EUKREA_CPUIMX25
122 default MACH_EUKREA_MBIMXSD25_BASEBOARD
123
124config MACH_EUKREA_MBIMXSD25_BASEBOARD
125 bool "Eukrea MBIMXSD development board"
126 select IMX_HAVE_PLATFORM_IMX_SSI
127 help
128 This adds board specific devices that can be found on Eukrea's
129 MBIMXSD evaluation board.
130
131endchoice
132
133endif
134
82if MACH_MX27 135if MACH_MX27
83 136
84comment "MX27 platforms:" 137comment "MX27 platforms:"
85 138
86config MACH_MX27ADS 139config MACH_MX27ADS
87 bool "MX27ADS platform" 140 bool "MX27ADS platform"
141 select SOC_IMX27
142 select IMX_HAVE_PLATFORM_IMX_FB
88 select IMX_HAVE_PLATFORM_IMX_I2C 143 select IMX_HAVE_PLATFORM_IMX_I2C
89 select IMX_HAVE_PLATFORM_IMX_UART 144 select IMX_HAVE_PLATFORM_IMX_UART
145 select IMX_HAVE_PLATFORM_MXC_MMC
90 select IMX_HAVE_PLATFORM_MXC_NAND 146 select IMX_HAVE_PLATFORM_MXC_NAND
147 select IMX_HAVE_PLATFORM_MXC_W1
91 help 148 help
92 Include support for MX27ADS platform. This includes specific 149 Include support for MX27ADS platform. This includes specific
93 configurations for the board and its peripherals. 150 configurations for the board and its peripherals.
94 151
95config MACH_PCM038 152config MACH_PCM038
96 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" 153 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
154 select SOC_IMX27
155 select IMX_HAVE_PLATFORM_IMX2_WDT
97 select IMX_HAVE_PLATFORM_IMX_I2C 156 select IMX_HAVE_PLATFORM_IMX_I2C
98 select IMX_HAVE_PLATFORM_IMX_UART 157 select IMX_HAVE_PLATFORM_IMX_UART
158 select IMX_HAVE_PLATFORM_MXC_EHCI
99 select IMX_HAVE_PLATFORM_MXC_NAND 159 select IMX_HAVE_PLATFORM_MXC_NAND
160 select IMX_HAVE_PLATFORM_MXC_W1
100 select IMX_HAVE_PLATFORM_SPI_IMX 161 select IMX_HAVE_PLATFORM_SPI_IMX
101 select MXC_ULPI if USB_ULPI 162 select MXC_ULPI if USB_ULPI
102 help 163 help
@@ -109,8 +170,9 @@ choice
109 default MACH_PCM970_BASEBOARD 170 default MACH_PCM970_BASEBOARD
110 171
111config MACH_PCM970_BASEBOARD 172config MACH_PCM970_BASEBOARD
112 prompt "PHYTEC PCM970 development board" 173 bool "PHYTEC PCM970 development board"
113 bool 174 select IMX_HAVE_PLATFORM_IMX_FB
175 select IMX_HAVE_PLATFORM_MXC_MMC
114 help 176 help
115 This adds board specific devices that can be found on Phytec's 177 This adds board specific devices that can be found on Phytec's
116 PCM970 evaluation board. 178 PCM970 evaluation board.
@@ -119,9 +181,14 @@ endchoice
119 181
120config MACH_CPUIMX27 182config MACH_CPUIMX27
121 bool "Eukrea CPUIMX27 module" 183 bool "Eukrea CPUIMX27 module"
184 select SOC_IMX27
185 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
186 select IMX_HAVE_PLATFORM_IMX2_WDT
122 select IMX_HAVE_PLATFORM_IMX_I2C 187 select IMX_HAVE_PLATFORM_IMX_I2C
123 select IMX_HAVE_PLATFORM_IMX_UART 188 select IMX_HAVE_PLATFORM_IMX_UART
189 select IMX_HAVE_PLATFORM_MXC_EHCI
124 select IMX_HAVE_PLATFORM_MXC_NAND 190 select IMX_HAVE_PLATFORM_MXC_NAND
191 select IMX_HAVE_PLATFORM_MXC_W1
125 select MXC_ULPI if USB_ULPI 192 select MXC_ULPI if USB_ULPI
126 help 193 help
127 Include support for Eukrea CPUIMX27 platform. This includes 194 Include support for Eukrea CPUIMX27 platform. This includes
@@ -130,6 +197,7 @@ config MACH_CPUIMX27
130config MACH_EUKREA_CPUIMX27_USESDHC2 197config MACH_EUKREA_CPUIMX27_USESDHC2
131 bool "CPUIMX27 integrates SDHC2 module" 198 bool "CPUIMX27 integrates SDHC2 module"
132 depends on MACH_CPUIMX27 199 depends on MACH_CPUIMX27
200 select IMX_HAVE_PLATFORM_MXC_MMC
133 help 201 help
134 This adds support for the internal SDHC2 used on CPUIMX27 202 This adds support for the internal SDHC2 used on CPUIMX27
135 for wifi or eMMC. 203 for wifi or eMMC.
@@ -148,8 +216,11 @@ choice
148 216
149config MACH_EUKREA_MBIMX27_BASEBOARD 217config MACH_EUKREA_MBIMX27_BASEBOARD
150 bool "Eukrea MBIMX27 development board" 218 bool "Eukrea MBIMX27 development board"
219 select IMX_HAVE_PLATFORM_IMX_FB
220 select IMX_HAVE_PLATFORM_IMX_KEYPAD
151 select IMX_HAVE_PLATFORM_IMX_SSI 221 select IMX_HAVE_PLATFORM_IMX_SSI
152 select IMX_HAVE_PLATFORM_IMX_UART 222 select IMX_HAVE_PLATFORM_IMX_UART
223 select IMX_HAVE_PLATFORM_MXC_MMC
153 select IMX_HAVE_PLATFORM_SPI_IMX 224 select IMX_HAVE_PLATFORM_SPI_IMX
154 help 225 help
155 This adds board specific devices that can be found on Eukrea's 226 This adds board specific devices that can be found on Eukrea's
@@ -159,15 +230,21 @@ endchoice
159 230
160config MACH_MX27_3DS 231config MACH_MX27_3DS
161 bool "MX27PDK platform" 232 bool "MX27PDK platform"
233 select SOC_IMX27
234 select IMX_HAVE_PLATFORM_IMX_KEYPAD
162 select IMX_HAVE_PLATFORM_IMX_UART 235 select IMX_HAVE_PLATFORM_IMX_UART
236 select IMX_HAVE_PLATFORM_MXC_MMC
163 help 237 help
164 Include support for MX27PDK platform. This includes specific 238 Include support for MX27PDK platform. This includes specific
165 configurations for the board and its peripherals. 239 configurations for the board and its peripherals.
166 240
167config MACH_IMX27_VISSTRIM_M10 241config MACH_IMX27_VISSTRIM_M10
168 bool "Vista Silicon i.MX27 Visstrim_m10" 242 bool "Vista Silicon i.MX27 Visstrim_m10"
243 select SOC_IMX27
169 select IMX_HAVE_PLATFORM_IMX_I2C 244 select IMX_HAVE_PLATFORM_IMX_I2C
170 select IMX_HAVE_PLATFORM_IMX_UART 245 select IMX_HAVE_PLATFORM_IMX_UART
246 select IMX_HAVE_PLATFORM_MXC_MMC
247 select IMX_HAVE_PLATFORM_MXC_EHCI
171 help 248 help
172 Include support for Visstrim_m10 platform and its different variants. 249 Include support for Visstrim_m10 platform and its different variants.
173 This includes specific configurations for the board and its 250 This includes specific configurations for the board and its
@@ -175,6 +252,7 @@ config MACH_IMX27_VISSTRIM_M10
175 252
176config MACH_IMX27LITE 253config MACH_IMX27LITE
177 bool "LogicPD MX27 LITEKIT platform" 254 bool "LogicPD MX27 LITEKIT platform"
255 select SOC_IMX27
178 select IMX_HAVE_PLATFORM_IMX_UART 256 select IMX_HAVE_PLATFORM_IMX_UART
179 help 257 help
180 Include support for MX27 LITEKIT platform. This includes specific 258 Include support for MX27 LITEKIT platform. This includes specific
@@ -182,10 +260,17 @@ config MACH_IMX27LITE
182 260
183config MACH_PCA100 261config MACH_PCA100
184 bool "Phytec phyCARD-s (pca100)" 262 bool "Phytec phyCARD-s (pca100)"
263 select SOC_IMX27
264 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
265 select IMX_HAVE_PLATFORM_IMX2_WDT
266 select IMX_HAVE_PLATFORM_IMX_FB
185 select IMX_HAVE_PLATFORM_IMX_I2C 267 select IMX_HAVE_PLATFORM_IMX_I2C
186 select IMX_HAVE_PLATFORM_IMX_SSI 268 select IMX_HAVE_PLATFORM_IMX_SSI
187 select IMX_HAVE_PLATFORM_IMX_UART 269 select IMX_HAVE_PLATFORM_IMX_UART
270 select IMX_HAVE_PLATFORM_MXC_EHCI
271 select IMX_HAVE_PLATFORM_MXC_MMC
188 select IMX_HAVE_PLATFORM_MXC_NAND 272 select IMX_HAVE_PLATFORM_MXC_NAND
273 select IMX_HAVE_PLATFORM_MXC_W1
189 select IMX_HAVE_PLATFORM_SPI_IMX 274 select IMX_HAVE_PLATFORM_SPI_IMX
190 select MXC_ULPI if USB_ULPI 275 select MXC_ULPI if USB_ULPI
191 help 276 help
@@ -194,8 +279,11 @@ config MACH_PCA100
194 279
195config MACH_MXT_TD60 280config MACH_MXT_TD60
196 bool "Maxtrack i-MXT TD60" 281 bool "Maxtrack i-MXT TD60"
282 select SOC_IMX27
283 select IMX_HAVE_PLATFORM_IMX_FB
197 select IMX_HAVE_PLATFORM_IMX_I2C 284 select IMX_HAVE_PLATFORM_IMX_I2C
198 select IMX_HAVE_PLATFORM_IMX_UART 285 select IMX_HAVE_PLATFORM_IMX_UART
286 select IMX_HAVE_PLATFORM_MXC_MMC
199 select IMX_HAVE_PLATFORM_MXC_NAND 287 select IMX_HAVE_PLATFORM_MXC_NAND
200 help 288 help
201 Include support for i-MXT (aka td60) platform. This 289 Include support for i-MXT (aka td60) platform. This
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 5582692bb176..77100bf26153 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -4,13 +4,13 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := devices.o
8
9obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o 7obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
10 8
11obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o 9obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
12obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o 10obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
13 11
12obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o
13
14obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o 14obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
15obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o 15obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o
16 16
@@ -22,6 +22,10 @@ obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
22 22
23obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o 23obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
24 24
25obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
26obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
27obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
28
25obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o 29obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
26obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o 30obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
27obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o 31obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 7988a85cf07d..3953d60bff0b 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -6,6 +6,10 @@ zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000
6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
8 8
9zreladdr-$(CONFIG_ARCH_MX25) := 0x80008000
10params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
11initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
12
9zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000 13zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000
10params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 14params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
11initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 15initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-imx/clock-imx25.c
index 9e4a5578c2fb..9e4a5578c2fb 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-imx/clock-imx25.c
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
index d189039749b0..16744d2d9b81 100644
--- a/arch/arm/mach-imx/devices-imx21.h
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -9,10 +9,26 @@
9#include <mach/mx21.h> 9#include <mach/mx21.h>
10#include <mach/devices-common.h> 10#include <mach/devices-common.h>
11 11
12extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst;
13#define imx21_add_imx21_hcd(pdata) \
14 imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata)
15
16extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst;
17#define imx21_add_imx2_wdt(pdata) \
18 imx_add_imx2_wdt(&imx21_imx2_wdt_data)
19
20extern const struct imx_imx_fb_data imx21_imx_fb_data __initconst;
21#define imx21_add_imx_fb(pdata) \
22 imx_add_imx_fb(&imx21_imx_fb_data, pdata)
23
12extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; 24extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst;
13#define imx21_add_imx_i2c(pdata) \ 25#define imx21_add_imx_i2c(pdata) \
14 imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) 26 imx_add_imx_i2c(&imx21_imx_i2c_data, pdata)
15 27
28extern const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst;
29#define imx21_add_imx_keypad(pdata) \
30 imx_add_imx_keypad(&imx21_imx_keypad_data, pdata)
31
16extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; 32extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst;
17#define imx21_add_imx_ssi(id, pdata) \ 33#define imx21_add_imx_ssi(id, pdata) \
18 imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata) 34 imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata)
@@ -25,10 +41,18 @@ extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst;
25#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata) 41#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
26#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata) 42#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
27 43
44extern const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst;
45#define imx21_add_mxc_mmc(id, pdata) \
46 imx_add_mxc_mmc(&imx21_mxc_mmc_data[id], pdata)
47
28extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst; 48extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst;
29#define imx21_add_mxc_nand(pdata) \ 49#define imx21_add_mxc_nand(pdata) \
30 imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) 50 imx_add_mxc_nand(&imx21_mxc_nand_data, pdata)
31 51
52extern const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst;
53#define imx21_add_mxc_w1(pdata) \
54 imx_add_mxc_w1(&imx21_mxc_w1_data)
55
32extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst; 56extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst;
33#define imx21_add_cspi(id, pdata) \ 57#define imx21_add_cspi(id, pdata) \
34 imx_add_spi_imx(&imx21_cspi_data[id], pdata) 58 imx_add_spi_imx(&imx21_cspi_data[id], pdata)
diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
index 93afa10b13cf..760e66c57c1b 100644
--- a/arch/arm/mach-mx25/devices-imx25.h
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -13,10 +13,27 @@ extern const struct imx_fec_data imx25_fec_data __initconst;
13#define imx25_add_fec(pdata) \ 13#define imx25_add_fec(pdata) \
14 imx_add_fec(&imx25_fec_data, pdata) 14 imx_add_fec(&imx25_fec_data, pdata)
15 15
16#define imx25_add_flexcan0(pdata) \ 16extern const struct imx_flexcan_data imx25_flexcan_data[] __initconst;
17 imx_add_flexcan(0, MX25_CAN1_BASE_ADDR, SZ_16K, MX25_INT_CAN1, pdata) 17#define imx25_add_flexcan(id, pdata) \
18#define imx25_add_flexcan1(pdata) \ 18 imx_add_flexcan(&imx25_flexcan_data[id], pdata)
19 imx_add_flexcan(1, MX25_CAN2_BASE_ADDR, SZ_16K, MX25_INT_CAN2, pdata) 19#define imx25_add_flexcan0(pdata) imx25_add_flexcan(0, pdata)
20#define imx25_add_flexcan1(pdata) imx25_add_flexcan(1, pdata)
21
22extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst;
23#define imx25_add_fsl_usb2_udc(pdata) \
24 imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata)
25
26extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data __initconst;
27#define imx25_add_imxdi_rtc(pdata) \
28 imx_add_imxdi_rtc(&imx25_imxdi_rtc_data)
29
30extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data __initconst;
31#define imx25_add_imx2_wdt(pdata) \
32 imx_add_imx2_wdt(&imx25_imx2_wdt_data)
33
34extern const struct imx_imx_fb_data imx25_imx_fb_data __initconst;
35#define imx25_add_imx_fb(pdata) \
36 imx_add_imx_fb(&imx25_imx_fb_data, pdata)
20 37
21extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst; 38extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst;
22#define imx25_add_imx_i2c(id, pdata) \ 39#define imx25_add_imx_i2c(id, pdata) \
@@ -25,6 +42,10 @@ extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst;
25#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata) 42#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata)
26#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata) 43#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata)
27 44
45extern const struct imx_imx_keypad_data imx25_imx_keypad_data __initconst;
46#define imx25_add_imx_keypad(pdata) \
47 imx_add_imx_keypad(&imx25_imx_keypad_data, pdata)
48
28extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst; 49extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst;
29#define imx25_add_imx_ssi(id, pdata) \ 50#define imx25_add_imx_ssi(id, pdata) \
30 imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata) 51 imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata)
@@ -38,17 +59,29 @@ extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst;
38#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata) 59#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
39#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata) 60#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
40 61
62extern const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst;
63#define imx25_add_mx2_camera(pdata) \
64 imx_add_mx2_camera(&imx25_mx2_camera_data, pdata)
65
66extern const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst;
67#define imx25_add_mxc_ehci_otg(pdata) \
68 imx_add_mxc_ehci(&imx25_mxc_ehci_otg_data, pdata)
69extern const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst;
70#define imx25_add_mxc_ehci_hs(pdata) \
71 imx_add_mxc_ehci(&imx25_mxc_ehci_hs_data, pdata)
72
41extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst; 73extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst;
42#define imx25_add_mxc_nand(pdata) \ 74#define imx25_add_mxc_nand(pdata) \
43 imx_add_mxc_nand(&imx25_mxc_nand_data, pdata) 75 imx_add_mxc_nand(&imx25_mxc_nand_data, pdata)
44 76
77extern const struct imx_sdhci_esdhc_imx_data
78imx25_sdhci_esdhc_imx_data[] __initconst;
79#define imx25_add_sdhci_esdhc_imx(id, pdata) \
80 imx_add_sdhci_esdhc_imx(&imx25_sdhci_esdhc_imx_data[id], pdata)
81
45extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst; 82extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst;
46#define imx25_add_spi_imx(id, pdata) \ 83#define imx25_add_spi_imx(id, pdata) \
47 imx_add_spi_imx(&imx25_spi_imx_data[id], pdata) 84 imx_add_spi_imx(&imx25_spi_imx_data[id], pdata)
48#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata) 85#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata)
49#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata) 86#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata)
50#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata) 87#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata)
51
52extern const struct imx_esdhc_imx_data imx25_esdhc_data[] __initconst;
53#define imx25_add_esdhc(id, pdata) \
54 imx_add_esdhc(&imx25_esdhc_data[id], pdata)
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 7011690364f2..f1272d4b5a33 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -13,10 +13,26 @@ extern const struct imx_fec_data imx27_fec_data __initconst;
13#define imx27_add_fec(pdata) \ 13#define imx27_add_fec(pdata) \
14 imx_add_fec(&imx27_fec_data, pdata) 14 imx_add_fec(&imx27_fec_data, pdata)
15 15
16extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst;
17#define imx27_add_fsl_usb2_udc(pdata) \
18 imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata)
19
20extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst;
21#define imx27_add_imx2_wdt(pdata) \
22 imx_add_imx2_wdt(&imx27_imx2_wdt_data)
23
24extern const struct imx_imx_fb_data imx27_imx_fb_data __initconst;
25#define imx27_add_imx_fb(pdata) \
26 imx_add_imx_fb(&imx27_imx_fb_data, pdata)
27
16extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; 28extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst;
17#define imx27_add_imx_i2c(id, pdata) \ 29#define imx27_add_imx_i2c(id, pdata) \
18 imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) 30 imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata)
19 31
32extern const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst;
33#define imx27_add_imx_keypad(pdata) \
34 imx_add_imx_keypad(&imx27_imx_keypad_data, pdata)
35
20extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; 36extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst;
21#define imx27_add_imx_ssi(id, pdata) \ 37#define imx27_add_imx_ssi(id, pdata) \
22 imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata) 38 imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata)
@@ -31,10 +47,29 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst;
31#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata) 47#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
32#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata) 48#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
33 49
50extern const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst;
51#define imx27_add_mx2_camera(pdata) \
52 imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
53
54extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst;
55#define imx27_add_mxc_ehci_otg(pdata) \
56 imx_add_mxc_ehci(&imx27_mxc_ehci_otg_data, pdata)
57extern const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst;
58#define imx27_add_mxc_ehci_hs(id, pdata) \
59 imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata)
60
61extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst;
62#define imx27_add_mxc_mmc(id, pdata) \
63 imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata)
64
34extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; 65extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst;
35#define imx27_add_mxc_nand(pdata) \ 66#define imx27_add_mxc_nand(pdata) \
36 imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) 67 imx_add_mxc_nand(&imx27_mxc_nand_data, pdata)
37 68
69extern const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst;
70#define imx27_add_mxc_w1(pdata) \
71 imx_add_mxc_w1(&imx27_mxc_w1_data)
72
38extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst; 73extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst;
39#define imx27_add_cspi(id, pdata) \ 74#define imx27_add_cspi(id, pdata) \
40 imx_add_spi_imx(&imx27_cspi_data[id], pdata) 75 imx_add_spi_imx(&imx27_cspi_data[id], pdata)
diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c
deleted file mode 100644
index fba5047de8b1..000000000000
--- a/arch/arm/mach-imx/devices.c
+++ /dev/null
@@ -1,553 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * <source@mvista.com>
4 *
5 * Based on the OMAP devices.c
6 *
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
14 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
15 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
16 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version 2
21 * of the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
30 * MA 02110-1301, USA.
31 */
32#include <linux/module.h>
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/platform_device.h>
36#include <linux/gpio.h>
37#include <linux/dma-mapping.h>
38#include <linux/serial.h>
39
40#include <mach/irqs.h>
41#include <mach/hardware.h>
42#include <mach/common.h>
43#include <mach/mmc.h>
44
45#include "devices.h"
46
47#if defined(CONFIG_ARCH_MX1)
48static struct resource imx1_camera_resources[] = {
49 {
50 .start = 0x00224000,
51 .end = 0x00224010,
52 .flags = IORESOURCE_MEM,
53 }, {
54 .start = MX1_CSI_INT,
55 .end = MX1_CSI_INT,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
61
62struct platform_device imx1_camera_device = {
63 .name = "mx1-camera",
64 .id = 0, /* This is used to put cameras on this interface */
65 .dev = {
66 .dma_mask = &imx1_camera_dmamask,
67 .coherent_dma_mask = DMA_BIT_MASK(32),
68 },
69 .resource = imx1_camera_resources,
70 .num_resources = ARRAY_SIZE(imx1_camera_resources),
71};
72
73static struct resource imx_rtc_resources[] = {
74 {
75 .start = 0x00204000,
76 .end = 0x00204024,
77 .flags = IORESOURCE_MEM,
78 }, {
79 .start = MX1_RTC_INT,
80 .end = MX1_RTC_INT,
81 .flags = IORESOURCE_IRQ,
82 }, {
83 .start = MX1_RTC_SAMINT,
84 .end = MX1_RTC_SAMINT,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89struct platform_device imx_rtc_device = {
90 .name = "rtc-imx",
91 .id = 0,
92 .resource = imx_rtc_resources,
93 .num_resources = ARRAY_SIZE(imx_rtc_resources),
94};
95
96static struct resource imx_wdt_resources[] = {
97 {
98 .start = 0x00201000,
99 .end = 0x00201008,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = MX1_WDT_INT,
103 .end = MX1_WDT_INT,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108struct platform_device imx_wdt_device = {
109 .name = "imx-wdt",
110 .id = 0,
111 .resource = imx_wdt_resources,
112 .num_resources = ARRAY_SIZE(imx_wdt_resources),
113};
114
115static struct resource imx_usb_resources[] = {
116 {
117 .start = 0x00212000,
118 .end = 0x00212148,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = MX1_USBD_INT0,
122 .end = MX1_USBD_INT0,
123 .flags = IORESOURCE_IRQ,
124 }, {
125 .start = MX1_USBD_INT1,
126 .end = MX1_USBD_INT1,
127 .flags = IORESOURCE_IRQ,
128 }, {
129 .start = MX1_USBD_INT2,
130 .end = MX1_USBD_INT2,
131 .flags = IORESOURCE_IRQ,
132 }, {
133 .start = MX1_USBD_INT3,
134 .end = MX1_USBD_INT3,
135 .flags = IORESOURCE_IRQ,
136 }, {
137 .start = MX1_USBD_INT4,
138 .end = MX1_USBD_INT4,
139 .flags = IORESOURCE_IRQ,
140 }, {
141 .start = MX1_USBD_INT5,
142 .end = MX1_USBD_INT5,
143 .flags = IORESOURCE_IRQ,
144 }, {
145 .start = MX1_USBD_INT6,
146 .end = MX1_USBD_INT6,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device imx_usb_device = {
152 .name = "imx_udc",
153 .id = 0,
154 .num_resources = ARRAY_SIZE(imx_usb_resources),
155 .resource = imx_usb_resources,
156};
157
158/* GPIO port description */
159static struct mxc_gpio_port imx_gpio_ports[] = {
160 {
161 .chip.label = "gpio-0",
162 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
163 .irq = MX1_GPIO_INT_PORTA,
164 .virtual_irq_start = MXC_GPIO_IRQ_START,
165 }, {
166 .chip.label = "gpio-1",
167 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
168 .irq = MX1_GPIO_INT_PORTB,
169 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
170 }, {
171 .chip.label = "gpio-2",
172 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
173 .irq = MX1_GPIO_INT_PORTC,
174 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
175 }, {
176 .chip.label = "gpio-3",
177 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
178 .irq = MX1_GPIO_INT_PORTD,
179 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
180 }
181};
182
183int __init imx1_register_gpios(void)
184{
185 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
186}
187#endif
188
189#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
190
191#ifdef CONFIG_MACH_MX27
192static struct resource mx27_camera_resources[] = {
193 {
194 .start = MX27_CSI_BASE_ADDR,
195 .end = MX27_CSI_BASE_ADDR + 0x1f,
196 .flags = IORESOURCE_MEM,
197 }, {
198 .start = MX27_EMMA_PRP_BASE_ADDR,
199 .end = MX27_EMMA_PRP_BASE_ADDR + 0x1f,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = MX27_INT_CSI,
203 .end = MX27_INT_CSI,
204 .flags = IORESOURCE_IRQ,
205 },{
206 .start = MX27_INT_EMMAPRP,
207 .end = MX27_INT_EMMAPRP,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211struct platform_device mx27_camera_device = {
212 .name = "mx2-camera",
213 .id = 0,
214 .num_resources = ARRAY_SIZE(mx27_camera_resources),
215 .resource = mx27_camera_resources,
216 .dev = {
217 .coherent_dma_mask = 0xffffffff,
218 },
219};
220#endif
221
222/*
223 * General Purpose Timer
224 * - i.MX21: 3 timers
225 * - i.MX27: 6 timers
226 */
227#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \
228 static struct resource timer ## n ##_resources[] = { \
229 { \
230 .start = baseaddr, \
231 .end = baseaddr + SZ_4K - 1, \
232 .flags = IORESOURCE_MEM, \
233 }, { \
234 .start = irq, \
235 .end = irq, \
236 .flags = IORESOURCE_IRQ, \
237 } \
238 }; \
239 \
240 struct platform_device mxc_gpt ## n = { \
241 .name = "imx_gpt", \
242 .id = n, \
243 .num_resources = ARRAY_SIZE(timer ## n ## _resources), \
244 .resource = timer ## n ## _resources, \
245 }
246
247/* We use gpt1 as system timer, so do not add a device for this one */
248DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
249DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
250
251#ifdef CONFIG_MACH_MX27
252DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
253DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
254DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
255#endif
256
257/* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */
258static struct resource mxc_wdt_resources[] = {
259 {
260 .start = MX2x_WDOG_BASE_ADDR,
261 .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
262 .flags = IORESOURCE_MEM,
263 },
264};
265
266struct platform_device mxc_wdt = {
267 .name = "imx2-wdt",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
270 .resource = mxc_wdt_resources,
271};
272
273static struct resource mxc_w1_master_resources[] = {
274 {
275 .start = MX2x_OWIRE_BASE_ADDR,
276 .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
277 .flags = IORESOURCE_MEM,
278 },
279};
280
281struct platform_device mxc_w1_master_device = {
282 .name = "mxc_w1",
283 .id = 0,
284 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
285 .resource = mxc_w1_master_resources,
286};
287
288/*
289 * lcdc:
290 * - i.MX1: the basic controller
291 * - i.MX21: to be checked
292 * - i.MX27: like i.MX1, with slightly variations
293 */
294static struct resource mxc_fb[] = {
295 {
296 .start = MX2x_LCDC_BASE_ADDR,
297 .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
298 .flags = IORESOURCE_MEM,
299 }, {
300 .start = MX2x_INT_LCDC,
301 .end = MX2x_INT_LCDC,
302 .flags = IORESOURCE_IRQ,
303 }
304};
305
306/* mxc lcd driver */
307struct platform_device mxc_fb_device = {
308 .name = "imx-fb",
309 .id = 0,
310 .num_resources = ARRAY_SIZE(mxc_fb),
311 .resource = mxc_fb,
312 .dev = {
313 .coherent_dma_mask = DMA_BIT_MASK(32),
314 },
315};
316
317static struct resource mxc_pwm_resources[] = {
318 {
319 .start = MX2x_PWM_BASE_ADDR,
320 .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
321 .flags = IORESOURCE_MEM,
322 }, {
323 .start = MX2x_INT_PWM,
324 .end = MX2x_INT_PWM,
325 .flags = IORESOURCE_IRQ,
326 }
327};
328
329struct platform_device mxc_pwm_device = {
330 .name = "mxc_pwm",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(mxc_pwm_resources),
333 .resource = mxc_pwm_resources,
334};
335
336#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \
337 static struct resource mxc_sdhc_resources ## n[] = { \
338 { \
339 .start = baseaddr, \
340 .end = baseaddr + SZ_4K - 1, \
341 .flags = IORESOURCE_MEM, \
342 }, { \
343 .start = irq, \
344 .end = irq, \
345 .flags = IORESOURCE_IRQ, \
346 }, { \
347 .start = dmareq, \
348 .end = dmareq, \
349 .flags = IORESOURCE_DMA, \
350 }, \
351 }; \
352 \
353 static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \
354 \
355 struct platform_device mxc_sdhc_device ## n = { \
356 .name = "mxc-mmc", \
357 .id = n, \
358 .dev = { \
359 .dma_mask = &mxc_sdhc ## n ## _dmamask, \
360 .coherent_dma_mask = DMA_BIT_MASK(32), \
361 }, \
362 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \
363 .resource = mxc_sdhc_resources ## n, \
364 }
365
366DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
367DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
368
369#ifdef CONFIG_MACH_MX27
370static struct resource otg_resources[] = {
371 {
372 .start = MX27_USBOTG_BASE_ADDR,
373 .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
374 .flags = IORESOURCE_MEM,
375 }, {
376 .start = MX27_INT_USB3,
377 .end = MX27_INT_USB3,
378 .flags = IORESOURCE_IRQ,
379 },
380};
381
382static u64 otg_dmamask = DMA_BIT_MASK(32);
383
384/* OTG gadget device */
385struct platform_device mxc_otg_udc_device = {
386 .name = "fsl-usb2-udc",
387 .id = -1,
388 .dev = {
389 .dma_mask = &otg_dmamask,
390 .coherent_dma_mask = DMA_BIT_MASK(32),
391 },
392 .resource = otg_resources,
393 .num_resources = ARRAY_SIZE(otg_resources),
394};
395
396/* OTG host */
397struct platform_device mxc_otg_host = {
398 .name = "mxc-ehci",
399 .id = 0,
400 .dev = {
401 .coherent_dma_mask = DMA_BIT_MASK(32),
402 .dma_mask = &otg_dmamask,
403 },
404 .resource = otg_resources,
405 .num_resources = ARRAY_SIZE(otg_resources),
406};
407
408/* USB host 1 */
409
410static u64 usbh1_dmamask = DMA_BIT_MASK(32);
411
412static struct resource mxc_usbh1_resources[] = {
413 {
414 .start = MX27_USBOTG_BASE_ADDR + 0x200,
415 .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
416 .flags = IORESOURCE_MEM,
417 }, {
418 .start = MX27_INT_USB1,
419 .end = MX27_INT_USB1,
420 .flags = IORESOURCE_IRQ,
421 },
422};
423
424struct platform_device mxc_usbh1 = {
425 .name = "mxc-ehci",
426 .id = 1,
427 .dev = {
428 .coherent_dma_mask = DMA_BIT_MASK(32),
429 .dma_mask = &usbh1_dmamask,
430 },
431 .resource = mxc_usbh1_resources,
432 .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
433};
434
435/* USB host 2 */
436static u64 usbh2_dmamask = DMA_BIT_MASK(32);
437
438static struct resource mxc_usbh2_resources[] = {
439 {
440 .start = MX27_USBOTG_BASE_ADDR + 0x400,
441 .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
442 .flags = IORESOURCE_MEM,
443 }, {
444 .start = MX27_INT_USB2,
445 .end = MX27_INT_USB2,
446 .flags = IORESOURCE_IRQ,
447 },
448};
449
450struct platform_device mxc_usbh2 = {
451 .name = "mxc-ehci",
452 .id = 2,
453 .dev = {
454 .coherent_dma_mask = DMA_BIT_MASK(32),
455 .dma_mask = &usbh2_dmamask,
456 },
457 .resource = mxc_usbh2_resources,
458 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
459};
460#endif
461
462/* GPIO port description */
463#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \
464 { \
465 .chip.label = "gpio-" #n, \
466 .irq = _irq, \
467 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
468 n * 0x100), \
469 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
470 }
471
472#define DEFINE_MXC_GPIO_PORT(SOC, n) \
473 { \
474 .chip.label = "gpio-" #n, \
475 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
476 n * 0x100), \
477 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
478 }
479
480#define DEFINE_MXC_GPIO_PORTS(SOC, pfx) \
481 static struct mxc_gpio_port pfx ## _gpio_ports[] = { \
482 DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO), \
483 DEFINE_MXC_GPIO_PORT(SOC, 1), \
484 DEFINE_MXC_GPIO_PORT(SOC, 2), \
485 DEFINE_MXC_GPIO_PORT(SOC, 3), \
486 DEFINE_MXC_GPIO_PORT(SOC, 4), \
487 DEFINE_MXC_GPIO_PORT(SOC, 5), \
488 }
489
490#ifdef CONFIG_MACH_MX21
491DEFINE_MXC_GPIO_PORTS(MX21, imx21);
492
493int __init imx21_register_gpios(void)
494{
495 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
496}
497#endif
498
499#ifdef CONFIG_MACH_MX27
500DEFINE_MXC_GPIO_PORTS(MX27, imx27);
501
502int __init imx27_register_gpios(void)
503{
504 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
505}
506#endif
507
508#ifdef CONFIG_MACH_MX21
509static struct resource mx21_usbhc_resources[] = {
510 {
511 .start = MX21_USBOTG_BASE_ADDR,
512 .end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1,
513 .flags = IORESOURCE_MEM,
514 },
515 {
516 .start = MX21_INT_USBHOST,
517 .end = MX21_INT_USBHOST,
518 .flags = IORESOURCE_IRQ,
519 },
520};
521
522struct platform_device mx21_usbhc_device = {
523 .name = "imx21-hcd",
524 .id = 0,
525 .dev = {
526 .dma_mask = &mx21_usbhc_device.dev.coherent_dma_mask,
527 .coherent_dma_mask = DMA_BIT_MASK(32),
528 },
529 .num_resources = ARRAY_SIZE(mx21_usbhc_resources),
530 .resource = mx21_usbhc_resources,
531};
532#endif
533
534static struct resource imx_kpp_resources[] = {
535 {
536 .start = MX2x_KPP_BASE_ADDR,
537 .end = MX2x_KPP_BASE_ADDR + 0xf,
538 .flags = IORESOURCE_MEM
539 }, {
540 .start = MX2x_INT_KPP,
541 .end = MX2x_INT_KPP,
542 .flags = IORESOURCE_IRQ,
543 },
544};
545
546struct platform_device imx_kpp_device = {
547 .name = "imx-keypad",
548 .id = -1,
549 .num_resources = ARRAY_SIZE(imx_kpp_resources),
550 .resource = imx_kpp_resources,
551};
552
553#endif
diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h
deleted file mode 100644
index 807f02a031c9..000000000000
--- a/arch/arm/mach-imx/devices.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifdef CONFIG_ARCH_MX1
2extern struct platform_device imx1_camera_device;
3extern struct platform_device imx_rtc_device;
4extern struct platform_device imx_wdt_device;
5extern struct platform_device imx_usb_device;
6#endif
7
8#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
9extern struct platform_device mxc_gpt1;
10extern struct platform_device mxc_gpt2;
11#ifdef CONFIG_MACH_MX27
12extern struct platform_device mxc_gpt3;
13extern struct platform_device mxc_gpt4;
14extern struct platform_device mxc_gpt5;
15#endif
16extern struct platform_device mxc_wdt;
17extern struct platform_device mxc_w1_master_device;
18extern struct platform_device mxc_fb_device;
19extern struct platform_device mxc_pwm_device;
20extern struct platform_device mxc_sdhc_device0;
21extern struct platform_device mxc_sdhc_device1;
22extern struct platform_device mxc_otg_udc_device;
23extern struct platform_device mx27_camera_device;
24extern struct platform_device mxc_otg_host;
25extern struct platform_device mxc_usbh1;
26extern struct platform_device mxc_usbh2;
27extern struct platform_device mx21_usbhc_device;
28extern struct platform_device imx_kpp_device;
29#endif
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 026263c665ca..7dce2510c6c6 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -26,20 +26,16 @@
26#include <linux/spi/ads7846.h> 26#include <linux/spi/ads7846.h>
27#include <linux/backlight.h> 27#include <linux/backlight.h>
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29#include <linux/input/matrix_keypad.h>
30 29
31#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
32 31
33#include <mach/common.h> 32#include <mach/common.h>
34#include <mach/iomux-mx27.h> 33#include <mach/iomux-mx27.h>
35#include <mach/imxfb.h>
36#include <mach/hardware.h> 34#include <mach/hardware.h>
37#include <mach/mmc.h>
38#include <mach/spi.h> 35#include <mach/spi.h>
39#include <mach/audmux.h> 36#include <mach/audmux.h>
40 37
41#include "devices-imx27.h" 38#include "devices-imx27.h"
42#include "devices.h"
43 39
44static const int eukrea_mbimx27_pins[] __initconst = { 40static const int eukrea_mbimx27_pins[] __initconst = {
45 /* UART2 */ 41 /* UART2 */
@@ -111,7 +107,8 @@ static const uint32_t eukrea_mbimx27_keymap[] = {
111 KEY(1, 1, KEY_LEFT), 107 KEY(1, 1, KEY_LEFT),
112}; 108};
113 109
114static struct matrix_keymap_data eukrea_mbimx27_keymap_data = { 110static const struct matrix_keymap_data
111eukrea_mbimx27_keymap_data __initconst = {
115 .keymap = eukrea_mbimx27_keymap, 112 .keymap = eukrea_mbimx27_keymap,
116 .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), 113 .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap),
117}; 114};
@@ -196,7 +193,7 @@ static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
196 }, 193 },
197}; 194};
198 195
199static struct imx_fb_platform_data eukrea_mbimx27_fb_data = { 196static const struct imx_fb_platform_data eukrea_mbimx27_fb_data __initconst = {
200 .mode = eukrea_mbimx27_modes, 197 .mode = eukrea_mbimx27_modes,
201 .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes), 198 .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes),
202 199
@@ -306,7 +303,7 @@ static struct platform_device *platform_devices[] __initdata = {
306 &leds_gpio, 303 &leds_gpio,
307}; 304};
308 305
309static struct imxmmc_platform_data sdhc_pdata = { 306static const struct imxmmc_platform_data sdhc_pdata __initconst = {
310 .dat3_card_detect = 1, 307 .dat3_card_detect = 1,
311}; 308};
312 309
@@ -351,8 +348,8 @@ void __init eukrea_mbimx27_baseboard_init(void)
351 imx27_add_imx_uart3(&uart_pdata); 348 imx27_add_imx_uart3(&uart_pdata);
352#endif 349#endif
353 350
354 mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data); 351 imx27_add_imx_fb(&eukrea_mbimx27_fb_data);
355 mxc_register_device(&mxc_sdhc_device0, &sdhc_pdata); 352 imx27_add_mxc_mmc(0, &sdhc_pdata);
356 353
357 i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, 354 i2c_register_board_info(0, eukrea_mbimx27_i2c_devices,
358 ARRAY_SIZE(eukrea_mbimx27_i2c_devices)); 355 ARRAY_SIZE(eukrea_mbimx27_i2c_devices));
@@ -386,7 +383,7 @@ void __init eukrea_mbimx27_baseboard_init(void)
386 gpio_request(GPIO_PORTA | 25, "lcd_enable"); 383 gpio_request(GPIO_PORTA | 25, "lcd_enable");
387 platform_device_register(&eukrea_mbimx27_lcd_powerdev); 384 platform_device_register(&eukrea_mbimx27_lcd_powerdev);
388 385
389 mxc_register_device(&imx_kpp_device, &eukrea_mbimx27_keymap_data); 386 imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
390 387
391 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 388 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
392} 389}
diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index e765ac5d9a08..7cab720519ee 100644
--- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -33,11 +33,9 @@
33#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
34#include <mach/mx25.h> 34#include <mach/mx25.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/imxfb.h>
37#include <mach/audmux.h> 36#include <mach/audmux.h>
38 37
39#include "devices-imx25.h" 38#include "devices-imx25.h"
40#include "devices.h"
41 39
42static struct pad_desc eukrea_mbimxsd_pads[] = { 40static struct pad_desc eukrea_mbimxsd_pads[] = {
43 /* LCD */ 41 /* LCD */
@@ -151,7 +149,7 @@ static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
151 }, 149 },
152}; 150};
153 151
154static struct imx_fb_platform_data eukrea_mximxsd_fb_pdata = { 152static const struct imx_fb_platform_data eukrea_mximxsd_fb_pdata __initconst = {
155 .mode = eukrea_mximxsd_modes, 153 .mode = eukrea_mximxsd_modes,
156 .num_modes = ARRAY_SIZE(eukrea_mximxsd_modes), 154 .num_modes = ARRAY_SIZE(eukrea_mximxsd_modes),
157 .pwmr = 0x00A903FF, 155 .pwmr = 0x00A903FF,
@@ -273,11 +271,11 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
273#endif 271#endif
274 272
275 imx25_add_imx_uart1(&uart_pdata); 273 imx25_add_imx_uart1(&uart_pdata);
276 mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata); 274 imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);
277 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 275 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
278 276
279 imx25_add_flexcan1(NULL); 277 imx25_add_flexcan1(NULL);
280 imx25_add_esdhc(0, NULL); 278 imx25_add_sdhci_esdhc_imx(0, NULL);
281 279
282 gpio_request(GPIO_LED1, "LED1"); 280 gpio_request(GPIO_LED1, "LED1");
283 gpio_direction_output(GPIO_LED1, 1); 281 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 745ee60fb068..6cf04da2456a 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -28,7 +28,6 @@
28#include <linux/serial_8250.h> 28#include <linux/serial_8250.h>
29#include <linux/usb/otg.h> 29#include <linux/usb/otg.h>
30#include <linux/usb/ulpi.h> 30#include <linux/usb/ulpi.h>
31#include <linux/fsl_devices.h>
32 31
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -40,11 +39,9 @@
40#include <mach/hardware.h> 39#include <mach/hardware.h>
41#include <mach/iomux-mx27.h> 40#include <mach/iomux-mx27.h>
42#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
43#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h> 42#include <mach/ulpi.h>
45 43
46#include "devices-imx27.h" 44#include "devices-imx27.h"
47#include "devices.h"
48 45
49static const int eukrea_cpuimx27_pins[] __initconst = { 46static const int eukrea_cpuimx27_pins[] __initconst = {
50 /* UART1 */ 47 /* UART1 */
@@ -157,8 +154,6 @@ cpuimx27_nand_board_info __initconst = {
157 154
158static struct platform_device *platform_devices[] __initdata = { 155static struct platform_device *platform_devices[] __initdata = {
159 &eukrea_cpuimx27_nor_mtd_device, 156 &eukrea_cpuimx27_nor_mtd_device,
160 &mxc_wdt,
161 &mxc_w1_master_device,
162}; 157};
163 158
164static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = { 159static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
@@ -215,18 +210,18 @@ static struct platform_device serial_device = {
215#endif 210#endif
216 211
217#if defined(CONFIG_USB_ULPI) 212#if defined(CONFIG_USB_ULPI)
218static struct mxc_usbh_platform_data otg_pdata = { 213static struct mxc_usbh_platform_data otg_pdata __initdata = {
219 .portsc = MXC_EHCI_MODE_ULPI, 214 .portsc = MXC_EHCI_MODE_ULPI,
220 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 215 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
221}; 216};
222 217
223static struct mxc_usbh_platform_data usbh2_pdata = { 218static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
224 .portsc = MXC_EHCI_MODE_ULPI, 219 .portsc = MXC_EHCI_MODE_ULPI,
225 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 220 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
226}; 221};
227#endif 222#endif
228 223
229static struct fsl_usb2_platform_data otg_device_pdata = { 224static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
230 .operating_mode = FSL_USB2_DR_DEVICE, 225 .operating_mode = FSL_USB2_DR_DEVICE,
231 .phy_mode = FSL_USB2_PHY_ULPI, 226 .phy_mode = FSL_USB2_PHY_ULPI,
232}; 227};
@@ -262,10 +257,12 @@ static void __init eukrea_cpuimx27_init(void)
262 257
263 imx27_add_fec(NULL); 258 imx27_add_fec(NULL);
264 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 259 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
260 imx27_add_imx2_wdt(NULL);
261 imx27_add_mxc_w1(NULL);
265 262
266#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) 263#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
267 /* SDHC2 can be used for Wifi */ 264 /* SDHC2 can be used for Wifi */
268 mxc_register_device(&mxc_sdhc_device1, NULL); 265 imx27_add_mxc_mmc(1, NULL);
269#endif 266#endif
270#if defined(MACH_EUKREA_CPUIMX27_USEUART4) 267#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
271 /* in which case UART4 is also used for Bluetooth */ 268 /* in which case UART4 is also used for Bluetooth */
@@ -281,16 +278,16 @@ static void __init eukrea_cpuimx27_init(void)
281 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 278 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
282 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 279 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
283 280
284 mxc_register_device(&mxc_otg_host, &otg_pdata); 281 imx27_add_mxc_ehci_otg(&otg_pdata);
285 } 282 }
286 283
287 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 284 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
288 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 285 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
289 286
290 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 287 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
291#endif 288#endif
292 if (!otg_mode_host) 289 if (!otg_mode_host)
293 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 290 imx27_add_fsl_usb2_udc(&otg_device_pdata);
294 291
295#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD 292#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
296 eukrea_mbimx27_baseboard_init(); 293 eukrea_mbimx27_baseboard_init();
diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index f6f9ad60c25e..67a7d55ad191 100644
--- a/arch/arm/mach-mx25/mach-cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -26,7 +26,6 @@
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/usb/otg.h> 27#include <linux/usb/otg.h>
28#include <linux/usb/ulpi.h> 28#include <linux/usb/ulpi.h>
29#include <linux/fsl_devices.h>
30 29
31#include <mach/eukrea-baseboards.h> 30#include <mach/eukrea-baseboards.h>
32#include <mach/hardware.h> 31#include <mach/hardware.h>
@@ -39,11 +38,9 @@
39#include <mach/mx25.h> 38#include <mach/mx25.h>
40#include <mach/mxc_nand.h> 39#include <mach/mxc_nand.h>
41#include <mach/imxfb.h> 40#include <mach/imxfb.h>
42#include <mach/mxc_ehci.h>
43#include <mach/iomux-mx25.h> 41#include <mach/iomux-mx25.h>
44 42
45#include "devices-imx25.h" 43#include "devices-imx25.h"
46#include "devices.h"
47 44
48static const struct imxuart_platform_data uart_pdata __initconst = { 45static const struct imxuart_platform_data uart_pdata __initconst = {
49 .flags = IMXUART_HAVE_RTSCTS, 46 .flags = IMXUART_HAVE_RTSCTS,
@@ -87,18 +84,18 @@ static struct i2c_board_info eukrea_cpuimx25_i2c_devices[] = {
87 }, 84 },
88}; 85};
89 86
90static struct mxc_usbh_platform_data otg_pdata = { 87static const struct mxc_usbh_platform_data otg_pdata __initconst = {
91 .portsc = MXC_EHCI_MODE_UTMI, 88 .portsc = MXC_EHCI_MODE_UTMI,
92 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 89 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
93}; 90};
94 91
95static struct mxc_usbh_platform_data usbh2_pdata = { 92static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
96 .portsc = MXC_EHCI_MODE_SERIAL, 93 .portsc = MXC_EHCI_MODE_SERIAL,
97 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | 94 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
98 MXC_EHCI_IPPUE_DOWN, 95 MXC_EHCI_IPPUE_DOWN,
99}; 96};
100 97
101static struct fsl_usb2_platform_data otg_device_pdata = { 98static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
102 .operating_mode = FSL_USB2_DR_DEVICE, 99 .operating_mode = FSL_USB2_DR_DEVICE,
103 .phy_mode = FSL_USB2_PHY_UTMI, 100 .phy_mode = FSL_USB2_PHY_UTMI,
104}; 101};
@@ -126,7 +123,7 @@ static void __init eukrea_cpuimx25_init(void)
126 123
127 imx25_add_imx_uart0(&uart_pdata); 124 imx25_add_imx_uart0(&uart_pdata);
128 imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info); 125 imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
129 mxc_register_device(&mx25_rtc_device, NULL); 126 imx25_add_imxdi_rtc(NULL);
130 imx25_add_fec(&mx25_fec_pdata); 127 imx25_add_fec(&mx25_fec_pdata);
131 128
132 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, 129 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
@@ -134,11 +131,11 @@ static void __init eukrea_cpuimx25_init(void)
134 imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data); 131 imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
135 132
136 if (otg_mode_host) 133 if (otg_mode_host)
137 mxc_register_device(&mxc_otg, &otg_pdata); 134 imx25_add_mxc_ehci_otg(&otg_pdata);
138 else 135 else
139 mxc_register_device(&otg_udc_device, &otg_device_pdata); 136 imx25_add_fsl_usb2_udc(&otg_device_pdata);
140 137
141 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 138 imx25_add_mxc_ehci_hs(&usbh2_pdata);
142 139
143#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD 140#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
144 eukrea_mbimxsd25_baseboard_init(); 141 eukrea_mbimxsd25_baseboard_init();
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 59716fab586d..40a3666ea632 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -34,12 +34,9 @@
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/time.h> 35#include <asm/mach/time.h>
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/mmc.h>
38#include <mach/iomux.h> 37#include <mach/iomux.h>
39#include <mach/mxc_ehci.h>
40 38
41#include "devices-imx27.h" 39#include "devices-imx27.h"
42#include "devices.h"
43 40
44#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17) 41#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
45#define SDHC1_IRQ IRQ_GPIOB(25) 42#define SDHC1_IRQ IRQ_GPIOB(25)
@@ -156,7 +153,7 @@ static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
156 free_irq(SDHC1_IRQ, data); 153 free_irq(SDHC1_IRQ, data);
157} 154}
158 155
159static struct imxmmc_platform_data visstrim_m10_sdhc_pdata = { 156static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
160 .init = visstrim_m10_sdhc1_init, 157 .init = visstrim_m10_sdhc1_init,
161 .exit = visstrim_m10_sdhc1_exit, 158 .exit = visstrim_m10_sdhc1_exit,
162}; 159};
@@ -216,7 +213,8 @@ static int otg_phy_init(struct platform_device *pdev)
216 return 0; 213 return 0;
217} 214}
218 215
219static struct mxc_usbh_platform_data visstrim_m10_usbotg_pdata = { 216static const struct mxc_usbh_platform_data
217visstrim_m10_usbotg_pdata __initconst = {
220 .init = otg_phy_init, 218 .init = otg_phy_init,
221 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 219 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
222 .flags = MXC_EHCI_POWER_PINS_ENABLED, 220 .flags = MXC_EHCI_POWER_PINS_ENABLED,
@@ -237,8 +235,8 @@ static void __init visstrim_m10_board_init(void)
237 ARRAY_SIZE(visstrim_m10_i2c_devices)); 235 ARRAY_SIZE(visstrim_m10_i2c_devices));
238 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data); 236 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
239 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); 237 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
240 mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); 238 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
241 mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); 239 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
242 imx27_add_fec(NULL); 240 imx27_add_fec(NULL);
243 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 241 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
244} 242}
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index bbdbc75127d3..3a1202e47212 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -25,7 +25,6 @@
25#include <mach/iomux-mx27.h> 25#include <mach/iomux-mx27.h>
26 26
27#include "devices-imx27.h" 27#include "devices-imx27.h"
28#include "devices.h"
29 28
30static const int mx27lite_pins[] __initconst = { 29static const int mx27lite_pins[] __initconst = {
31 /* UART1 */ 30 /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 6187ce9ba7d5..1f446e5eb636 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -30,7 +30,6 @@
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31 31
32#include "devices-imx1.h" 32#include "devices-imx1.h"
33#include "devices.h"
34 33
35static const int mx1ads_pins[] __initconst = { 34static const int mx1ads_pins[] __initconst = {
36 /* UART1 */ 35 /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index e1282e9f50ff..0a372577c2ac 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -24,13 +24,10 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <mach/imxfb.h>
28#include <mach/iomux-mx21.h> 27#include <mach/iomux-mx21.h>
29#include <mach/mxc_nand.h> 28#include <mach/mxc_nand.h>
30#include <mach/mmc.h>
31 29
32#include "devices-imx21.h" 30#include "devices-imx21.h"
33#include "devices.h"
34 31
35/* 32/*
36 * Memory-mapped I/O on MX21ADS base board 33 * Memory-mapped I/O on MX21ADS base board
@@ -213,7 +210,7 @@ static struct imx_fb_videomode mx21ads_modes[] = {
213 }, 210 },
214}; 211};
215 212
216static struct imx_fb_platform_data mx21ads_fb_data = { 213static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
217 .mode = mx21ads_modes, 214 .mode = mx21ads_modes,
218 .num_modes = ARRAY_SIZE(mx21ads_modes), 215 .num_modes = ARRAY_SIZE(mx21ads_modes),
219 216
@@ -233,15 +230,8 @@ static int mx21ads_sdhc_get_ro(struct device *dev)
233static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq, 230static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
234 void *data) 231 void *data)
235{ 232{
236 int ret; 233 return request_irq(IRQ_GPIOD(25), detect_irq,
237
238 ret = request_irq(IRQ_GPIOD(25), detect_irq,
239 IRQF_TRIGGER_FALLING, "mmc-detect", data); 234 IRQF_TRIGGER_FALLING, "mmc-detect", data);
240 if (ret)
241 goto out;
242 return 0;
243out:
244 return ret;
245} 235}
246 236
247static void mx21ads_sdhc_exit(struct device *dev, void *data) 237static void mx21ads_sdhc_exit(struct device *dev, void *data)
@@ -249,7 +239,7 @@ static void mx21ads_sdhc_exit(struct device *dev, void *data)
249 free_irq(IRQ_GPIOD(25), data); 239 free_irq(IRQ_GPIOD(25), data);
250} 240}
251 241
252static struct imxmmc_platform_data mx21ads_sdhc_pdata = { 242static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
253 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */ 243 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
254 .get_ro = mx21ads_sdhc_get_ro, 244 .get_ro = mx21ads_sdhc_get_ro,
255 .init = mx21ads_sdhc_init, 245 .init = mx21ads_sdhc_init,
@@ -296,8 +286,8 @@ static void __init mx21ads_board_init(void)
296 imx21_add_imx_uart0(&uart_pdata_rts); 286 imx21_add_imx_uart0(&uart_pdata_rts);
297 imx21_add_imx_uart2(&uart_pdata_norts); 287 imx21_add_imx_uart2(&uart_pdata_norts);
298 imx21_add_imx_uart3(&uart_pdata_rts); 288 imx21_add_imx_uart3(&uart_pdata_rts);
299 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); 289 imx21_add_imx_fb(&mx21ads_fb_data);
300 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); 290 imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
301 imx21_add_mxc_nand(&mx21ads_nand_board_info); 291 imx21_add_mxc_nand(&mx21ads_nand_board_info);
302 292
303 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 293 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
diff --git a/arch/arm/mach-mx25/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index f8be1eb0c062..52b4d9b3717d 100644
--- a/arch/arm/mach-mx25/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -39,11 +39,9 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40#include <mach/common.h> 40#include <mach/common.h>
41#include <mach/mx25.h> 41#include <mach/mx25.h>
42#include <mach/imxfb.h>
43#include <mach/iomux-mx25.h> 42#include <mach/iomux-mx25.h>
44 43
45#include "devices-imx25.h" 44#include "devices-imx25.h"
46#include "devices.h"
47 45
48static const struct imxuart_platform_data uart_pdata __initconst = { 46static const struct imxuart_platform_data uart_pdata __initconst = {
49 .flags = IMXUART_HAVE_RTSCTS, 47 .flags = IMXUART_HAVE_RTSCTS,
@@ -107,7 +105,7 @@ static struct pad_desc mx25pdk_pads[] = {
107}; 105};
108 106
109static const struct fec_platform_data mx25_fec_pdata __initconst = { 107static const struct fec_platform_data mx25_fec_pdata __initconst = {
110 .phy = PHY_INTERFACE_MODE_RMII, 108 .phy = PHY_INTERFACE_MODE_RMII,
111}; 109};
112 110
113#define FEC_ENABLE_GPIO 35 111#define FEC_ENABLE_GPIO 35
@@ -154,7 +152,7 @@ static struct imx_fb_videomode mx25pdk_modes[] = {
154 }, 152 },
155}; 153};
156 154
157static struct imx_fb_platform_data mx25pdk_fb_pdata = { 155static const struct imx_fb_platform_data mx25pdk_fb_pdata __initconst = {
158 .mode = mx25pdk_modes, 156 .mode = mx25pdk_modes,
159 .num_modes = ARRAY_SIZE(mx25pdk_modes), 157 .num_modes = ARRAY_SIZE(mx25pdk_modes),
160 .pwmr = 0x00A903FF, 158 .pwmr = 0x00A903FF,
@@ -181,7 +179,7 @@ static const uint32_t mx25pdk_keymap[] = {
181 KEY(3, 3, KEY_POWER), 179 KEY(3, 3, KEY_POWER),
182}; 180};
183 181
184static struct matrix_keymap_data mx25pdk_keymap_data = { 182static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
185 .keymap = mx25pdk_keymap, 183 .keymap = mx25pdk_keymap,
186 .keymap_size = ARRAY_SIZE(mx25pdk_keymap), 184 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
187}; 185};
@@ -192,17 +190,17 @@ static void __init mx25pdk_init(void)
192 ARRAY_SIZE(mx25pdk_pads)); 190 ARRAY_SIZE(mx25pdk_pads));
193 191
194 imx25_add_imx_uart0(&uart_pdata); 192 imx25_add_imx_uart0(&uart_pdata);
195 mxc_register_device(&mxc_usbh2, NULL); 193 imx25_add_mxc_ehci_hs(NULL);
196 imx25_add_mxc_nand(&mx25pdk_nand_board_info); 194 imx25_add_mxc_nand(&mx25pdk_nand_board_info);
197 mxc_register_device(&mx25_rtc_device, NULL); 195 imx25_add_imxdi_rtc(NULL);
198 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata); 196 imx25_add_imx_fb(&mx25pdk_fb_pdata);
199 mxc_register_device(&mxc_wdt, NULL); 197 imx25_add_imx2_wdt(NULL);
200 198
201 mx25pdk_fec_reset(); 199 mx25pdk_fec_reset();
202 imx25_add_fec(&mx25_fec_pdata); 200 imx25_add_fec(&mx25_fec_pdata);
203 mxc_register_device(&mx25_kpp_device, &mx25pdk_keymap_data); 201 imx25_add_imx_keypad(&mx25pdk_keymap_data);
204 202
205 imx25_add_esdhc(0, NULL); 203 imx25_add_sdhci_esdhc_imx(0, NULL);
206} 204}
207 205
208static void __init mx25pdk_timer_init(void) 206static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 84a5ba03f1ba..3614e33f8b6f 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -22,7 +22,6 @@
22 22
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/input/matrix_keypad.h>
26#include <linux/irq.h> 25#include <linux/irq.h>
27#include <asm/mach-types.h> 26#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -30,10 +29,8 @@
30#include <mach/hardware.h> 29#include <mach/hardware.h>
31#include <mach/common.h> 30#include <mach/common.h>
32#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
33#include <mach/mmc.h>
34 32
35#include "devices-imx27.h" 33#include "devices-imx27.h"
36#include "devices.h"
37 34
38#define SD1_EN_GPIO (GPIO_PORTB + 25) 35#define SD1_EN_GPIO (GPIO_PORTB + 25)
39 36
@@ -92,7 +89,7 @@ static const uint32_t mx27_3ds_keymap[] = {
92 KEY(2, 3, KEY_F10), 89 KEY(2, 3, KEY_F10),
93}; 90};
94 91
95static struct matrix_keymap_data mx27_3ds_keymap_data = { 92static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
96 .keymap = mx27_3ds_keymap, 93 .keymap = mx27_3ds_keymap,
97 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), 94 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
98}; 95};
@@ -109,7 +106,7 @@ static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
109 free_irq(IRQ_GPIOB(26), data); 106 free_irq(IRQ_GPIOB(26), data);
110} 107}
111 108
112static struct imxmmc_platform_data sdhc1_pdata = { 109static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
113 .init = mx27_3ds_sdhc1_init, 110 .init = mx27_3ds_sdhc1_init,
114 .exit = mx27_3ds_sdhc1_exit, 111 .exit = mx27_3ds_sdhc1_exit,
115}; 112};
@@ -128,8 +125,8 @@ static void __init mx27pdk_init(void)
128 mx27_3ds_sdhc1_enable_level_translator(); 125 mx27_3ds_sdhc1_enable_level_translator();
129 imx27_add_imx_uart0(&uart_pdata); 126 imx27_add_imx_uart0(&uart_pdata);
130 imx27_add_fec(NULL); 127 imx27_add_fec(NULL);
131 mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data); 128 imx27_add_imx_keypad(&mx27_3ds_keymap_data);
132 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 129 imx27_add_mxc_mmc(0, &sdhc1_pdata);
133} 130}
134 131
135static void __init mx27pdk_timer_init(void) 132static void __init mx27pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index a1e4bc573afc..b832f960fec4 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -30,11 +30,8 @@
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
32#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
33#include <mach/imxfb.h>
34#include <mach/mmc.h>
35 33
36#include "devices-imx27.h" 34#include "devices-imx27.h"
37#include "devices.h"
38 35
39/* 36/*
40 * Base address of PBC controller, CS4 37 * Base address of PBC controller, CS4
@@ -228,7 +225,7 @@ static struct imx_fb_videomode mx27ads_modes[] = {
228 }, 225 },
229}; 226};
230 227
231static struct imx_fb_platform_data mx27ads_fb_data = { 228static const struct imx_fb_platform_data mx27ads_fb_data __initconst = {
232 .mode = mx27ads_modes, 229 .mode = mx27ads_modes,
233 .num_modes = ARRAY_SIZE(mx27ads_modes), 230 .num_modes = ARRAY_SIZE(mx27ads_modes),
234 231
@@ -272,19 +269,18 @@ static void mx27ads_sdhc2_exit(struct device *dev, void *data)
272 free_irq(IRQ_GPIOB(7), data); 269 free_irq(IRQ_GPIOB(7), data);
273} 270}
274 271
275static struct imxmmc_platform_data sdhc1_pdata = { 272static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
276 .init = mx27ads_sdhc1_init, 273 .init = mx27ads_sdhc1_init,
277 .exit = mx27ads_sdhc1_exit, 274 .exit = mx27ads_sdhc1_exit,
278}; 275};
279 276
280static struct imxmmc_platform_data sdhc2_pdata = { 277static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
281 .init = mx27ads_sdhc2_init, 278 .init = mx27ads_sdhc2_init,
282 .exit = mx27ads_sdhc2_exit, 279 .exit = mx27ads_sdhc2_exit,
283}; 280};
284 281
285static struct platform_device *platform_devices[] __initdata = { 282static struct platform_device *platform_devices[] __initdata = {
286 &mx27ads_nor_mtd_device, 283 &mx27ads_nor_mtd_device,
287 &mxc_w1_master_device,
288}; 284};
289 285
290static const struct imxuart_platform_data uart_pdata __initconst = { 286static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -308,12 +304,13 @@ static void __init mx27ads_board_init(void)
308 i2c_register_board_info(1, mx27ads_i2c_devices, 304 i2c_register_board_info(1, mx27ads_i2c_devices,
309 ARRAY_SIZE(mx27ads_i2c_devices)); 305 ARRAY_SIZE(mx27ads_i2c_devices));
310 imx27_add_imx_i2c(1, &mx27ads_i2c1_data); 306 imx27_add_imx_i2c(1, &mx27ads_i2c1_data);
311 mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); 307 imx27_add_imx_fb(&mx27ads_fb_data);
312 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 308 imx27_add_mxc_mmc(0, &sdhc1_pdata);
313 mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); 309 imx27_add_mxc_mmc(1, &sdhc2_pdata);
314 310
315 imx27_add_fec(NULL); 311 imx27_add_fec(NULL);
316 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 312 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
313 imx27_add_mxc_w1(NULL);
317} 314}
318 315
319static void __init mx27ads_timer_init(void) 316static void __init mx27ads_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 38d3a4ae17c7..4ce71b0401db 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -31,11 +31,8 @@
31#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
32#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
33#include <linux/i2c/pca953x.h> 33#include <linux/i2c/pca953x.h>
34#include <mach/imxfb.h>
35#include <mach/mmc.h>
36 34
37#include "devices-imx27.h" 35#include "devices-imx27.h"
38#include "devices.h"
39 36
40static const int mxt_td60_pins[] __initconst = { 37static const int mxt_td60_pins[] __initconst = {
41 /* UART0 */ 38 /* UART0 */
@@ -196,7 +193,7 @@ static struct imx_fb_videomode mxt_td60_modes[] = {
196 }, 193 },
197}; 194};
198 195
199static struct imx_fb_platform_data mxt_td60_fb_data = { 196static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
200 .mode = mxt_td60_modes, 197 .mode = mxt_td60_modes,
201 .num_modes = ARRAY_SIZE(mxt_td60_modes), 198 .num_modes = ARRAY_SIZE(mxt_td60_modes),
202 199
@@ -226,7 +223,7 @@ static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
226 free_irq(IRQ_GPIOF(8), data); 223 free_irq(IRQ_GPIOF(8), data);
227} 224}
228 225
229static struct imxmmc_platform_data sdhc1_pdata = { 226static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
230 .init = mxt_td60_sdhc1_init, 227 .init = mxt_td60_sdhc1_init,
231 .exit = mxt_td60_sdhc1_exit, 228 .exit = mxt_td60_sdhc1_exit,
232}; 229};
@@ -253,8 +250,8 @@ static void __init mxt_td60_board_init(void)
253 250
254 imx27_add_imx_i2c(0, &mxt_td60_i2c0_data); 251 imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
255 imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); 252 imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
256 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); 253 imx27_add_imx_fb(&mxt_td60_fb_data);
257 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 254 imx27_add_mxc_mmc(0, &sdhc1_pdata);
258 imx27_add_fec(NULL); 255 imx27_add_fec(NULL);
259} 256}
260 257
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 8c720d44602a..cccc0a0a9c72 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -29,7 +29,6 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/usb/otg.h> 30#include <linux/usb/otg.h>
31#include <linux/usb/ulpi.h> 31#include <linux/usb/ulpi.h>
32#include <linux/fsl_devices.h>
33 32
34#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
@@ -40,13 +39,9 @@
40#include <mach/audmux.h> 39#include <mach/audmux.h>
41#include <mach/mxc_nand.h> 40#include <mach/mxc_nand.h>
42#include <mach/irqs.h> 41#include <mach/irqs.h>
43#include <mach/mmc.h>
44#include <mach/mxc_ehci.h>
45#include <mach/ulpi.h> 42#include <mach/ulpi.h>
46#include <mach/imxfb.h>
47 43
48#include "devices-imx27.h" 44#include "devices-imx27.h"
49#include "devices.h"
50 45
51#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) 46#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
52#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24) 47#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
@@ -171,11 +166,6 @@ pca100_nand_board_info __initconst = {
171 .hw_ecc = 1, 166 .hw_ecc = 1,
172}; 167};
173 168
174static struct platform_device *platform_devices[] __initdata = {
175 &mxc_w1_master_device,
176 &mxc_wdt,
177};
178
179static const struct imxi2c_platform_data pca100_i2c1_data __initconst = { 169static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
180 .bitrate = 100000, 170 .bitrate = 100000,
181}; 171};
@@ -274,7 +264,7 @@ static void pca100_sdhc2_exit(struct device *dev, void *data)
274 free_irq(IRQ_GPIOC(29), data); 264 free_irq(IRQ_GPIOC(29), data);
275} 265}
276 266
277static struct imxmmc_platform_data sdhc_pdata = { 267static const struct imxmmc_platform_data sdhc_pdata __initconst = {
278 .init = pca100_sdhc2_init, 268 .init = pca100_sdhc2_init,
279 .exit = pca100_sdhc2_exit, 269 .exit = pca100_sdhc2_exit,
280}; 270};
@@ -286,7 +276,7 @@ static int otg_phy_init(struct platform_device *pdev)
286 return 0; 276 return 0;
287} 277}
288 278
289static struct mxc_usbh_platform_data otg_pdata = { 279static struct mxc_usbh_platform_data otg_pdata __initdata = {
290 .init = otg_phy_init, 280 .init = otg_phy_init,
291 .portsc = MXC_EHCI_MODE_ULPI, 281 .portsc = MXC_EHCI_MODE_ULPI,
292 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 282 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
@@ -298,14 +288,14 @@ static int usbh2_phy_init(struct platform_device *pdev)
298 return 0; 288 return 0;
299} 289}
300 290
301static struct mxc_usbh_platform_data usbh2_pdata = { 291static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
302 .init = usbh2_phy_init, 292 .init = usbh2_phy_init,
303 .portsc = MXC_EHCI_MODE_ULPI, 293 .portsc = MXC_EHCI_MODE_ULPI,
304 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 294 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
305}; 295};
306#endif 296#endif
307 297
308static struct fsl_usb2_platform_data otg_device_pdata = { 298static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
309 .operating_mode = FSL_USB2_DR_DEVICE, 299 .operating_mode = FSL_USB2_DR_DEVICE,
310 .phy_mode = FSL_USB2_PHY_ULPI, 300 .phy_mode = FSL_USB2_PHY_ULPI,
311}; 301};
@@ -355,7 +345,7 @@ static struct imx_fb_videomode pca100_fb_modes[] = {
355 }, 345 },
356}; 346};
357 347
358static struct imx_fb_platform_data pca100_fb_data = { 348static const struct imx_fb_platform_data pca100_fb_data __initconst = {
359 .mode = pca100_fb_modes, 349 .mode = pca100_fb_modes,
360 .num_modes = ARRAY_SIZE(pca100_fb_modes), 350 .num_modes = ARRAY_SIZE(pca100_fb_modes),
361 351
@@ -389,7 +379,7 @@ static void __init pca100_init(void)
389 379
390 imx27_add_imx_uart0(&uart_pdata); 380 imx27_add_imx_uart0(&uart_pdata);
391 381
392 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 382 imx27_add_mxc_mmc(1, &sdhc_pdata);
393 383
394 imx27_add_mxc_nand(&pca100_nand_board_info); 384 imx27_add_mxc_nand(&pca100_nand_board_info);
395 385
@@ -417,23 +407,24 @@ static void __init pca100_init(void)
417 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 407 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
418 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 408 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
419 409
420 mxc_register_device(&mxc_otg_host, &otg_pdata); 410 imx27_add_mxc_ehci_otg(&otg_pdata);
421 } 411 }
422 412
423 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 413 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
424 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 414 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
425 415
426 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 416 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
427#endif 417#endif
428 if (!otg_mode_host) { 418 if (!otg_mode_host) {
429 gpio_set_value(OTG_PHY_CS_GPIO, 0); 419 gpio_set_value(OTG_PHY_CS_GPIO, 0);
430 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 420 imx27_add_fsl_usb2_udc(&otg_device_pdata);
431 } 421 }
432 422
433 mxc_register_device(&mxc_fb_device, &pca100_fb_data); 423 imx27_add_imx_fb(&pca100_fb_data);
434 424
435 imx27_add_fec(NULL); 425 imx27_add_fec(NULL);
436 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 426 imx27_add_imx2_wdt(NULL);
427 imx27_add_mxc_w1(NULL);
437} 428}
438 429
439static void __init pca100_timer_init(void) 430static void __init pca100_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 49a97ce07426..f667a262dfc1 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -37,11 +37,9 @@
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/iomux-mx27.h> 38#include <mach/iomux-mx27.h>
39#include <mach/mxc_nand.h> 39#include <mach/mxc_nand.h>
40#include <mach/mxc_ehci.h>
41#include <mach/ulpi.h> 40#include <mach/ulpi.h>
42 41
43#include "devices-imx27.h" 42#include "devices-imx27.h"
44#include "devices.h"
45 43
46static const int pcm038_pins[] __initconst = { 44static const int pcm038_pins[] __initconst = {
47 /* UART1 */ 45 /* UART1 */
@@ -172,9 +170,7 @@ pcm038_nand_board_info __initconst = {
172 170
173static struct platform_device *platform_devices[] __initdata = { 171static struct platform_device *platform_devices[] __initdata = {
174 &pcm038_nor_mtd_device, 172 &pcm038_nor_mtd_device,
175 &mxc_w1_master_device,
176 &pcm038_sram_mtd_device, 173 &pcm038_sram_mtd_device,
177 &mxc_wdt,
178}; 174};
179 175
180/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and 176/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
@@ -214,7 +210,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = {
214 210
215static struct regulator_consumer_supply sdhc1_consumers[] = { 211static struct regulator_consumer_supply sdhc1_consumers[] = {
216 { 212 {
217 .dev = &mxc_sdhc_device1.dev, 213 .dev_name = "mxc-mmc.1",
218 .supply = "sdhc_vcc", 214 .supply = "sdhc_vcc",
219 }, 215 },
220}; 216};
@@ -285,7 +281,7 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
285 } 281 }
286}; 282};
287 283
288static struct mxc_usbh_platform_data usbh2_pdata = { 284static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
289 .portsc = MXC_EHCI_MODE_ULPI, 285 .portsc = MXC_EHCI_MODE_ULPI,
290 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, 286 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
291}; 287};
@@ -322,10 +318,12 @@ static void __init pcm038_init(void)
322 spi_register_board_info(pcm038_spi_board_info, 318 spi_register_board_info(pcm038_spi_board_info,
323 ARRAY_SIZE(pcm038_spi_board_info)); 319 ARRAY_SIZE(pcm038_spi_board_info));
324 320
325 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 321 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
326 322
327 imx27_add_fec(NULL); 323 imx27_add_fec(NULL);
328 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 324 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
325 imx27_add_imx2_wdt(NULL);
326 imx27_add_mxc_w1(NULL);
329 327
330#ifdef CONFIG_MACH_PCM970_BASEBOARD 328#ifdef CONFIG_MACH_PCM970_BASEBOARD
331 pcm970_baseboard_init(); 329 pcm970_baseboard_init();
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 1fbdd3faa7ab..eae878f306c6 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -25,7 +25,6 @@
25#include <mach/iomux-mx1.h> 25#include <mach/iomux-mx1.h>
26 26
27#include "devices-imx1.h" 27#include "devices-imx1.h"
28#include "devices.h"
29 28
30/* 29/*
31 * This scb9328 has a 32MiB flash 30 * This scb9328 has a 32MiB flash
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 9be92b96dc89..729ae0915af8 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -25,12 +25,7 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27static struct map_desc imx_io_desc[] __initdata = { 27static struct map_desc imx_io_desc[] __initdata = {
28 { 28 imx_map_entry(MX1, IO, MT_DEVICE),
29 .virtual = MX1_IO_BASE_ADDR_VIRT,
30 .pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
31 .length = MX1_IO_SIZE,
32 .type = MT_DEVICE
33 }
34}; 29};
35 30
36void __init mx1_map_io(void) 31void __init mx1_map_io(void)
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 12faeeaa0a97..e728af81d1b1 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX21, AIPI, MT_DEVICE),
39 .virtual = MX21_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
41 .length = MX21_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX21, SAHB1, MT_DEVICE),
50 .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
52 .length = MX21_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX21, X_MEMC, MT_DEVICE),
60 .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
62 .length = MX21_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-imx/mm-imx25.c
index bb677111fb0f..2edec6ce8fe7 100644
--- a/arch/arm/mach-mx25/mm.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -30,25 +30,12 @@
30 30
31/* 31/*
32 * This table defines static virtual address mappings for I/O regions. 32 * This table defines static virtual address mappings for I/O regions.
33 * These are the mappings common across all MX3 boards. 33 * These are the mappings common across all MX25 boards.
34 */ 34 */
35static struct map_desc mxc_io_desc[] __initdata = { 35static struct map_desc mx25_io_desc[] __initdata = {
36 { 36 imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
37 .virtual = MX25_AVIC_BASE_ADDR_VIRT, 37 imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
38 .pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR), 38 imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
39 .length = MX25_AVIC_SIZE,
40 .type = MT_DEVICE_NONSHARED
41 }, {
42 .virtual = MX25_AIPS1_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
44 .length = MX25_AIPS1_SIZE,
45 .type = MT_DEVICE_NONSHARED
46 }, {
47 .virtual = MX25_AIPS2_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
49 .length = MX25_AIPS2_SIZE,
50 .type = MT_DEVICE_NONSHARED
51 },
52}; 39};
53 40
54/* 41/*
@@ -62,14 +49,14 @@ void __init mx25_map_io(void)
62 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR)); 49 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
63 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); 50 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
64 51
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 52 iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
66} 53}
67 54
68int imx25_register_gpios(void); 55int imx25_register_gpios(void);
69 56
70void __init mx25_init_irq(void) 57void __init mx25_init_irq(void)
71{ 58{
72 mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT); 59 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
73 imx25_register_gpios(); 60 imx25_register_gpios();
74} 61}
75 62
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index a24622957ff2..374e48b7a412 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX27, AIPI, MT_DEVICE),
39 .virtual = MX27_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
41 .length = MX27_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX27, SAHB1, MT_DEVICE),
50 .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
52 .length = MX27_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX27, X_MEMC, MT_DEVICE),
60 .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
62 .length = MX27_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index 9110d9cca7a2..99afbc3f43a3 100644
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
@@ -25,11 +25,9 @@
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/iomux-mx27.h> 27#include <mach/iomux-mx27.h>
28#include <mach/imxfb.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/mmc.h>
31 29
32#include "devices.h" 30#include "devices-imx27.h"
33 31
34static const int pcm970_pins[] __initconst = { 32static const int pcm970_pins[] __initconst = {
35 /* SDHC */ 33 /* SDHC */
@@ -119,7 +117,7 @@ static void pcm970_sdhc2_exit(struct device *dev, void *data)
119 gpio_free(GPIO_PORTC + 28); 117 gpio_free(GPIO_PORTC + 28);
120} 118}
121 119
122static struct imxmmc_platform_data sdhc_pdata = { 120static const struct imxmmc_platform_data sdhc_pdata __initconst = {
123 .get_ro = pcm970_sdhc2_get_ro, 121 .get_ro = pcm970_sdhc2_get_ro,
124 .init = pcm970_sdhc2_init, 122 .init = pcm970_sdhc2_init,
125 .exit = pcm970_sdhc2_exit, 123 .exit = pcm970_sdhc2_exit,
@@ -179,7 +177,7 @@ static struct imx_fb_videomode pcm970_modes[] = {
179 }, 177 },
180}; 178};
181 179
182static struct imx_fb_platform_data pcm038_fb_data = { 180static const struct imx_fb_platform_data pcm038_fb_data __initconst = {
183 .mode = pcm970_modes, 181 .mode = pcm970_modes,
184 .num_modes = ARRAY_SIZE(pcm970_modes), 182 .num_modes = ARRAY_SIZE(pcm970_modes),
185 183
@@ -226,8 +224,8 @@ void __init pcm970_baseboard_init(void)
226 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins), 224 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins),
227 "PCM970"); 225 "PCM970");
228 226
229 mxc_register_device(&mxc_fb_device, &pcm038_fb_data); 227 imx27_add_imx_fb(&pcm038_fb_data);
230 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN); 228 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
231 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 229 imx27_add_mxc_mmc(1, &sdhc_pdata);
232 platform_device_register(&pcm970_sja1000); 230 platform_device_register(&pcm970_sja1000);
233} 231}
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
deleted file mode 100644
index 38ca09a5df9d..000000000000
--- a/arch/arm/mach-mx25/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
1if ARCH_MX25
2
3comment "MX25 platforms:"
4
5config MACH_MX25_3DS
6 bool "Support MX25PDK (3DS) Platform"
7 select IMX_HAVE_PLATFORM_IMX_UART
8 select IMX_HAVE_PLATFORM_MXC_NAND
9 select IMX_HAVE_PLATFORM_ESDHC
10
11config MACH_EUKREA_CPUIMX25
12 bool "Support Eukrea CPUIMX25 Platform"
13 select IMX_HAVE_PLATFORM_IMX_I2C
14 select IMX_HAVE_PLATFORM_IMX_UART
15 select IMX_HAVE_PLATFORM_MXC_NAND
16 select IMX_HAVE_PLATFORM_FLEXCAN
17 select IMX_HAVE_PLATFORM_ESDHC
18 select MXC_ULPI if USB_ULPI
19
20choice
21 prompt "Baseboard"
22 depends on MACH_EUKREA_CPUIMX25
23 default MACH_EUKREA_MBIMXSD25_BASEBOARD
24
25config MACH_EUKREA_MBIMXSD25_BASEBOARD
26 bool "Eukrea MBIMXSD development board"
27 select IMX_HAVE_PLATFORM_IMX_SSI
28 help
29 This adds board specific devices that can be found on Eukrea's
30 MBIMXSD evaluation board.
31
32endchoice
33
34endif
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
deleted file mode 100644
index d9e46ce00a4e..000000000000
--- a/arch/arm/mach-mx25/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1obj-y := mm.o devices.o
2obj-$(CONFIG_ARCH_MX25) += clock.o
3obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
4obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-cpuimx25.o
5obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd-baseboard.o
diff --git a/arch/arm/mach-mx25/Makefile.boot b/arch/arm/mach-mx25/Makefile.boot
deleted file mode 100644
index e1dd366f836b..000000000000
--- a/arch/arm/mach-mx25/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1 zreladdr-y := 0x80008000
2params_phys-y := 0x80000100
3initrd_phys-y := 0x80800000
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
deleted file mode 100644
index 1d0eb3e85941..000000000000
--- a/arch/arm/mach-mx25/devices.c
+++ /dev/null
@@ -1,308 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19#include <linux/platform_device.h>
20#include <linux/dma-mapping.h>
21#include <linux/gpio.h>
22#include <mach/mx25.h>
23#include <mach/irqs.h>
24
25static u64 otg_dmamask = DMA_BIT_MASK(32);
26
27static struct resource mxc_otg_resources[] = {
28 {
29 .start = MX25_OTG_BASE_ADDR,
30 .end = MX25_OTG_BASE_ADDR + 0x1ff,
31 .flags = IORESOURCE_MEM,
32 }, {
33 .start = 37,
34 .end = 37,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39struct platform_device mxc_otg = {
40 .name = "mxc-ehci",
41 .id = 0,
42 .dev = {
43 .coherent_dma_mask = 0xffffffff,
44 .dma_mask = &otg_dmamask,
45 },
46 .resource = mxc_otg_resources,
47 .num_resources = ARRAY_SIZE(mxc_otg_resources),
48};
49
50/* OTG gadget device */
51struct platform_device otg_udc_device = {
52 .name = "fsl-usb2-udc",
53 .id = -1,
54 .dev = {
55 .dma_mask = &otg_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 },
58 .resource = mxc_otg_resources,
59 .num_resources = ARRAY_SIZE(mxc_otg_resources),
60};
61
62static u64 usbh2_dmamask = DMA_BIT_MASK(32);
63
64static struct resource mxc_usbh2_resources[] = {
65 {
66 .start = MX25_OTG_BASE_ADDR + 0x400,
67 .end = MX25_OTG_BASE_ADDR + 0x5ff,
68 .flags = IORESOURCE_MEM,
69 }, {
70 .start = 35,
71 .end = 35,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76struct platform_device mxc_usbh2 = {
77 .name = "mxc-ehci",
78 .id = 1,
79 .dev = {
80 .coherent_dma_mask = 0xffffffff,
81 .dma_mask = &usbh2_dmamask,
82 },
83 .resource = mxc_usbh2_resources,
84 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
85};
86
87static struct resource mxc_pwm_resources0[] = {
88 {
89 .start = 0x53fe0000,
90 .end = 0x53fe3fff,
91 .flags = IORESOURCE_MEM,
92 }, {
93 .start = 26,
94 .end = 26,
95 .flags = IORESOURCE_IRQ,
96 }
97};
98
99struct platform_device mxc_pwm_device0 = {
100 .name = "mxc_pwm",
101 .id = 0,
102 .num_resources = ARRAY_SIZE(mxc_pwm_resources0),
103 .resource = mxc_pwm_resources0,
104};
105
106static struct resource mxc_pwm_resources1[] = {
107 {
108 .start = 0x53fa0000,
109 .end = 0x53fa3fff,
110 .flags = IORESOURCE_MEM,
111 }, {
112 .start = 36,
113 .end = 36,
114 .flags = IORESOURCE_IRQ,
115 }
116};
117
118struct platform_device mxc_pwm_device1 = {
119 .name = "mxc_pwm",
120 .id = 1,
121 .num_resources = ARRAY_SIZE(mxc_pwm_resources1),
122 .resource = mxc_pwm_resources1,
123};
124
125static struct resource mxc_pwm_resources2[] = {
126 {
127 .start = 0x53fa8000,
128 .end = 0x53fabfff,
129 .flags = IORESOURCE_MEM,
130 }, {
131 .start = 41,
132 .end = 41,
133 .flags = IORESOURCE_IRQ,
134 }
135};
136
137struct platform_device mxc_pwm_device2 = {
138 .name = "mxc_pwm",
139 .id = 2,
140 .num_resources = ARRAY_SIZE(mxc_pwm_resources2),
141 .resource = mxc_pwm_resources2,
142};
143
144static struct resource mxc_keypad_resources[] = {
145 {
146 .start = 0x43fa8000,
147 .end = 0x43fabfff,
148 .flags = IORESOURCE_MEM,
149 }, {
150 .start = 24,
151 .end = 24,
152 .flags = IORESOURCE_IRQ,
153 }
154};
155
156struct platform_device mxc_keypad_device = {
157 .name = "mxc-keypad",
158 .id = -1,
159 .num_resources = ARRAY_SIZE(mxc_keypad_resources),
160 .resource = mxc_keypad_resources,
161};
162
163static struct resource mxc_pwm_resources3[] = {
164 {
165 .start = 0x53fc8000,
166 .end = 0x53fcbfff,
167 .flags = IORESOURCE_MEM,
168 }, {
169 .start = 42,
170 .end = 42,
171 .flags = IORESOURCE_IRQ,
172 }
173};
174
175struct platform_device mxc_pwm_device3 = {
176 .name = "mxc_pwm",
177 .id = 3,
178 .num_resources = ARRAY_SIZE(mxc_pwm_resources3),
179 .resource = mxc_pwm_resources3,
180};
181
182static struct mxc_gpio_port imx_gpio_ports[] = {
183 {
184 .chip.label = "gpio-0",
185 .base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT,
186 .irq = 52,
187 .virtual_irq_start = MXC_GPIO_IRQ_START,
188 }, {
189 .chip.label = "gpio-1",
190 .base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT,
191 .irq = 51,
192 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
193 }, {
194 .chip.label = "gpio-2",
195 .base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT,
196 .irq = 16,
197 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
198 }, {
199 .chip.label = "gpio-3",
200 .base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT,
201 .irq = 23,
202 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
203 }
204};
205
206int __init imx25_register_gpios(void)
207{
208 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
209}
210
211static struct resource mx25_rtc_resources[] = {
212 {
213 .start = MX25_DRYICE_BASE_ADDR,
214 .end = MX25_DRYICE_BASE_ADDR + 0x40,
215 .flags = IORESOURCE_MEM,
216 },
217 {
218 .start = MX25_INT_DRYICE,
219 .flags = IORESOURCE_IRQ
220 },
221};
222
223struct platform_device mx25_rtc_device = {
224 .name = "imxdi_rtc",
225 .id = 0,
226 .num_resources = ARRAY_SIZE(mx25_rtc_resources),
227 .resource = mx25_rtc_resources,
228};
229
230static struct resource mx25_fb_resources[] = {
231 {
232 .start = MX25_LCDC_BASE_ADDR,
233 .end = MX25_LCDC_BASE_ADDR + 0xfff,
234 .flags = IORESOURCE_MEM,
235 },
236 {
237 .start = MX25_INT_LCDC,
238 .end = MX25_INT_LCDC,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243struct platform_device mx25_fb_device = {
244 .name = "imx-fb",
245 .id = 0,
246 .resource = mx25_fb_resources,
247 .num_resources = ARRAY_SIZE(mx25_fb_resources),
248 .dev = {
249 .coherent_dma_mask = 0xFFFFFFFF,
250 },
251};
252
253static struct resource mxc_wdt_resources[] = {
254 {
255 .start = MX25_WDOG_BASE_ADDR,
256 .end = MX25_WDOG_BASE_ADDR + SZ_16K - 1,
257 .flags = IORESOURCE_MEM,
258 },
259};
260
261struct platform_device mxc_wdt = {
262 .name = "imx2-wdt",
263 .id = 0,
264 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
265 .resource = mxc_wdt_resources,
266};
267
268static struct resource mx25_kpp_resources[] = {
269 {
270 .start = MX25_KPP_BASE_ADDR,
271 .end = MX25_KPP_BASE_ADDR + 0xf,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .start = MX25_INT_KPP,
276 .end = MX25_INT_KPP,
277 .flags = IORESOURCE_IRQ,
278 },
279};
280
281struct platform_device mx25_kpp_device = {
282 .name = "imx-keypad",
283 .id = -1,
284 .num_resources = ARRAY_SIZE(mx25_kpp_resources),
285 .resource = mx25_kpp_resources,
286};
287
288static struct resource mx25_csi_resources[] = {
289 {
290 .start = MX25_CSI_BASE_ADDR,
291 .end = MX25_CSI_BASE_ADDR + 0xfff,
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = MX25_INT_CSI,
296 .flags = IORESOURCE_IRQ
297 },
298};
299
300struct platform_device mx25_csi_device = {
301 .name = "mx2-camera",
302 .id = 0,
303 .num_resources = ARRAY_SIZE(mx25_csi_resources),
304 .resource = mx25_csi_resources,
305 .dev = {
306 .coherent_dma_mask = 0xffffffff,
307 },
308};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
deleted file mode 100644
index 7b70a43c3a4b..000000000000
--- a/arch/arm/mach-mx25/devices.h
+++ /dev/null
@@ -1,13 +0,0 @@
1extern struct platform_device mxc_otg;
2extern struct platform_device otg_udc_device;
3extern struct platform_device mxc_usbh2;
4extern struct platform_device mxc_pwm_device0;
5extern struct platform_device mxc_pwm_device1;
6extern struct platform_device mxc_pwm_device2;
7extern struct platform_device mxc_pwm_device3;
8extern struct platform_device mxc_keypad_device;
9extern struct platform_device mx25_rtc_device;
10extern struct platform_device mx25_fb_device;
11extern struct platform_device mxc_wdt;
12extern struct platform_device mx25_kpp_device;
13extern struct platform_device mx25_csi_device;
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 5000ac1f93e3..a682c03a1f94 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -1,21 +1,33 @@
1if ARCH_MX3 1if ARCH_MX3
2 2
3# ARCH_MX31 and ARCH_MX35 are left for compatibility
4# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
5# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
6# more sensible) names are used: SOC_IMX31 and SOC_IMX35
3config ARCH_MX31 7config ARCH_MX31
4 select ARCH_HAS_RNGA
5 select ARCH_MXC_AUDMUX_V2
6 bool 8 bool
7 9
8config ARCH_MX35 10config ARCH_MX35
9 bool 11 bool
12
13config SOC_IMX31
14 bool
15 select IMX_HAVE_PLATFORM_MXC_RNGA
16 select ARCH_MXC_AUDMUX_V2
17 select ARCH_MX31
18
19config SOC_IMX35
20 bool
10 select ARCH_MXC_IOMUX_V3 21 select ARCH_MXC_IOMUX_V3
11 select ARCH_MXC_AUDMUX_V2 22 select ARCH_MXC_AUDMUX_V2
12 select HAVE_EPIT 23 select HAVE_EPIT
24 select ARCH_MX35
13 25
14comment "MX3 platforms:" 26comment "MX3 platforms:"
15 27
16config MACH_MX31ADS 28config MACH_MX31ADS
17 bool "Support MX31ADS platforms" 29 bool "Support MX31ADS platforms"
18 select ARCH_MX31 30 select SOC_IMX31
19 select IMX_HAVE_PLATFORM_IMX_I2C 31 select IMX_HAVE_PLATFORM_IMX_I2C
20 select IMX_HAVE_PLATFORM_IMX_SSI 32 select IMX_HAVE_PLATFORM_IMX_SSI
21 select IMX_HAVE_PLATFORM_IMX_UART 33 select IMX_HAVE_PLATFORM_IMX_UART
@@ -37,10 +49,15 @@ config MACH_MX31ADS_WM1133_EV1
37 49
38config MACH_PCM037 50config MACH_PCM037
39 bool "Support Phytec pcm037 (i.MX31) platforms" 51 bool "Support Phytec pcm037 (i.MX31) platforms"
40 select ARCH_MX31 52 select SOC_IMX31
53 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
54 select IMX_HAVE_PLATFORM_IMX2_WDT
41 select IMX_HAVE_PLATFORM_IMX_I2C 55 select IMX_HAVE_PLATFORM_IMX_I2C
42 select IMX_HAVE_PLATFORM_IMX_UART 56 select IMX_HAVE_PLATFORM_IMX_UART
57 select IMX_HAVE_PLATFORM_MXC_EHCI
58 select IMX_HAVE_PLATFORM_MXC_MMC
43 select IMX_HAVE_PLATFORM_MXC_NAND 59 select IMX_HAVE_PLATFORM_MXC_NAND
60 select IMX_HAVE_PLATFORM_MXC_W1
44 select MXC_ULPI if USB_ULPI 61 select MXC_ULPI if USB_ULPI
45 help 62 help
46 Include support for Phytec pcm037 platform. This includes 63 Include support for Phytec pcm037 platform. This includes
@@ -57,9 +74,12 @@ config MACH_PCM037_EET
57 74
58config MACH_MX31LITE 75config MACH_MX31LITE
59 bool "Support MX31 LITEKIT (LogicPD)" 76 bool "Support MX31 LITEKIT (LogicPD)"
60 select ARCH_MX31 77 select SOC_IMX31
61 select MXC_ULPI if USB_ULPI 78 select MXC_ULPI if USB_ULPI
79 select IMX_HAVE_PLATFORM_IMX2_WDT
62 select IMX_HAVE_PLATFORM_IMX_UART 80 select IMX_HAVE_PLATFORM_IMX_UART
81 select IMX_HAVE_PLATFORM_MXC_EHCI
82 select IMX_HAVE_PLATFORM_MXC_MMC
63 select IMX_HAVE_PLATFORM_MXC_NAND 83 select IMX_HAVE_PLATFORM_MXC_NAND
64 select IMX_HAVE_PLATFORM_SPI_IMX 84 select IMX_HAVE_PLATFORM_SPI_IMX
65 help 85 help
@@ -68,8 +88,10 @@ config MACH_MX31LITE
68 88
69config MACH_MX31_3DS 89config MACH_MX31_3DS
70 bool "Support MX31PDK (3DS)" 90 bool "Support MX31PDK (3DS)"
71 select ARCH_MX31 91 select SOC_IMX31
72 select MXC_DEBUG_BOARD 92 select MXC_DEBUG_BOARD
93 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
94 select IMX_HAVE_PLATFORM_IMX_KEYPAD
73 select IMX_HAVE_PLATFORM_IMX_UART 95 select IMX_HAVE_PLATFORM_IMX_UART
74 select IMX_HAVE_PLATFORM_MXC_NAND 96 select IMX_HAVE_PLATFORM_MXC_NAND
75 select IMX_HAVE_PLATFORM_SPI_IMX 97 select IMX_HAVE_PLATFORM_SPI_IMX
@@ -88,9 +110,12 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT
88 110
89config MACH_MX31MOBOARD 111config MACH_MX31MOBOARD
90 bool "Support mx31moboard platforms (EPFL Mobots group)" 112 bool "Support mx31moboard platforms (EPFL Mobots group)"
91 select ARCH_MX31 113 select SOC_IMX31
114 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
92 select IMX_HAVE_PLATFORM_IMX_I2C 115 select IMX_HAVE_PLATFORM_IMX_I2C
93 select IMX_HAVE_PLATFORM_IMX_UART 116 select IMX_HAVE_PLATFORM_IMX_UART
117 select IMX_HAVE_PLATFORM_MXC_EHCI
118 select IMX_HAVE_PLATFORM_MXC_MMC
94 select IMX_HAVE_PLATFORM_SPI_IMX 119 select IMX_HAVE_PLATFORM_SPI_IMX
95 select MXC_ULPI if USB_ULPI 120 select MXC_ULPI if USB_ULPI
96 help 121 help
@@ -99,8 +124,10 @@ config MACH_MX31MOBOARD
99 124
100config MACH_MX31LILLY 125config MACH_MX31LILLY
101 bool "Support MX31 LILLY-1131 platforms (INCO startec)" 126 bool "Support MX31 LILLY-1131 platforms (INCO startec)"
102 select ARCH_MX31 127 select SOC_IMX31
103 select IMX_HAVE_PLATFORM_IMX_UART 128 select IMX_HAVE_PLATFORM_IMX_UART
129 select IMX_HAVE_PLATFORM_MXC_EHCI
130 select IMX_HAVE_PLATFORM_MXC_MMC
104 select IMX_HAVE_PLATFORM_SPI_IMX 131 select IMX_HAVE_PLATFORM_SPI_IMX
105 select MXC_ULPI if USB_ULPI 132 select MXC_ULPI if USB_ULPI
106 help 133 help
@@ -109,7 +136,7 @@ config MACH_MX31LILLY
109 136
110config MACH_QONG 137config MACH_QONG
111 bool "Support Dave/DENX QongEVB-LITE platform" 138 bool "Support Dave/DENX QongEVB-LITE platform"
112 select ARCH_MX31 139 select SOC_IMX31
113 select IMX_HAVE_PLATFORM_IMX_UART 140 select IMX_HAVE_PLATFORM_IMX_UART
114 help 141 help
115 Include support for Dave/DENX QongEVB-LITE platform. This includes 142 Include support for Dave/DENX QongEVB-LITE platform. This includes
@@ -117,13 +144,16 @@ config MACH_QONG
117 144
118config MACH_PCM043 145config MACH_PCM043
119 bool "Support Phytec pcm043 (i.MX35) platforms" 146 bool "Support Phytec pcm043 (i.MX35) platforms"
120 select ARCH_MX35 147 select SOC_IMX35
148 select IMX_HAVE_PLATFORM_FLEXCAN
149 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
150 select IMX_HAVE_PLATFORM_IMX2_WDT
121 select IMX_HAVE_PLATFORM_IMX_I2C 151 select IMX_HAVE_PLATFORM_IMX_I2C
122 select IMX_HAVE_PLATFORM_IMX_SSI 152 select IMX_HAVE_PLATFORM_IMX_SSI
123 select IMX_HAVE_PLATFORM_IMX_UART 153 select IMX_HAVE_PLATFORM_IMX_UART
154 select IMX_HAVE_PLATFORM_MXC_EHCI
124 select IMX_HAVE_PLATFORM_MXC_NAND 155 select IMX_HAVE_PLATFORM_MXC_NAND
125 select IMX_HAVE_PLATFORM_FLEXCAN 156 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
126 select IMX_HAVE_PLATFORM_ESDHC
127 select MXC_ULPI if USB_ULPI 157 select MXC_ULPI if USB_ULPI
128 help 158 help
129 Include support for Phytec pcm043 platform. This includes 159 Include support for Phytec pcm043 platform. This includes
@@ -131,9 +161,11 @@ config MACH_PCM043
131 161
132config MACH_ARMADILLO5X0 162config MACH_ARMADILLO5X0
133 bool "Support Atmark Armadillo-500 Development Base Board" 163 bool "Support Atmark Armadillo-500 Development Base Board"
134 select ARCH_MX31 164 select SOC_IMX31
135 select IMX_HAVE_PLATFORM_IMX_I2C 165 select IMX_HAVE_PLATFORM_IMX_I2C
136 select IMX_HAVE_PLATFORM_IMX_UART 166 select IMX_HAVE_PLATFORM_IMX_UART
167 select IMX_HAVE_PLATFORM_MXC_EHCI
168 select IMX_HAVE_PLATFORM_MXC_MMC
137 select IMX_HAVE_PLATFORM_MXC_NAND 169 select IMX_HAVE_PLATFORM_MXC_NAND
138 select MXC_ULPI if USB_ULPI 170 select MXC_ULPI if USB_ULPI
139 help 171 help
@@ -142,19 +174,21 @@ config MACH_ARMADILLO5X0
142 174
143config MACH_MX35_3DS 175config MACH_MX35_3DS
144 bool "Support MX35PDK platform" 176 bool "Support MX35PDK platform"
145 select ARCH_MX35 177 select SOC_IMX35
146 select MXC_DEBUG_BOARD 178 select MXC_DEBUG_BOARD
179 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
180 select IMX_HAVE_PLATFORM_IMX2_WDT
147 select IMX_HAVE_PLATFORM_IMX_UART 181 select IMX_HAVE_PLATFORM_IMX_UART
182 select IMX_HAVE_PLATFORM_MXC_EHCI
148 select IMX_HAVE_PLATFORM_MXC_NAND 183 select IMX_HAVE_PLATFORM_MXC_NAND
149 select IMX_HAVE_PLATFORM_ESDHC 184 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
150 default n
151 help 185 help
152 Include support for MX35PDK platform. This includes specific 186 Include support for MX35PDK platform. This includes specific
153 configurations for the board and its peripherals. 187 configurations for the board and its peripherals.
154 188
155config MACH_KZM_ARM11_01 189config MACH_KZM_ARM11_01
156 bool "Support KZM-ARM11-01(Kyoto Microcomputer)" 190 bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
157 select ARCH_MX31 191 select SOC_IMX31
158 select IMX_HAVE_PLATFORM_IMX_UART 192 select IMX_HAVE_PLATFORM_IMX_UART
159 help 193 help
160 Include support for KZM-ARM11-01. This includes specific 194 Include support for KZM-ARM11-01. This includes specific
@@ -162,12 +196,15 @@ config MACH_KZM_ARM11_01
162 196
163config MACH_EUKREA_CPUIMX35 197config MACH_EUKREA_CPUIMX35
164 bool "Support Eukrea CPUIMX35 Platform" 198 bool "Support Eukrea CPUIMX35 Platform"
165 select ARCH_MX35 199 select SOC_IMX35
166 select IMX_HAVE_PLATFORM_IMX_UART 200 select IMX_HAVE_PLATFORM_FLEXCAN
201 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
202 select IMX_HAVE_PLATFORM_IMX2_WDT
167 select IMX_HAVE_PLATFORM_IMX_I2C 203 select IMX_HAVE_PLATFORM_IMX_I2C
204 select IMX_HAVE_PLATFORM_IMX_UART
205 select IMX_HAVE_PLATFORM_MXC_EHCI
168 select IMX_HAVE_PLATFORM_MXC_NAND 206 select IMX_HAVE_PLATFORM_MXC_NAND
169 select IMX_HAVE_PLATFORM_FLEXCAN 207 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
170 select IMX_HAVE_PLATFORM_ESDHC
171 select MXC_ULPI if USB_ULPI 208 select MXC_ULPI if USB_ULPI
172 help 209 help
173 Include support for Eukrea CPUIMX35 platform. This includes 210 Include support for Eukrea CPUIMX35 platform. This includes
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 8a182d0a3fcf..8db13294ad27 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,17 +5,14 @@
5# Object file lists. 5# Object file lists.
6 6
7obj-y := mm.o devices.o cpu.o 7obj-y := mm.o devices.o cpu.o
8CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS 8obj-$(CONFIG_SOC_IMX31) += clock-imx31.o iomux-imx31.o
9CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS 9obj-$(CONFIG_SOC_IMX35) += clock-imx35.o
10obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
11obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
12obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o 10obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
13obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o 11obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
14obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o 12obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
15obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o 13obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
16obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o 14obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
17obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o 15obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
18CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
19obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ 16obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
20 mx31moboard-marxbot.o mx31moboard-smartbot.o 17 mx31moboard-marxbot.o mx31moboard-smartbot.o
21obj-$(CONFIG_MACH_QONG) += mach-qong.o 18obj-$(CONFIG_MACH_QONG) += mach-qong.o
diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h
index de9598590eba..40f4e848a671 100644
--- a/arch/arm/mach-mx3/devices-imx31.h
+++ b/arch/arm/mach-mx3/devices-imx31.h
@@ -9,6 +9,14 @@
9#include <mach/mx31.h> 9#include <mach/mx31.h>
10#include <mach/devices-common.h> 10#include <mach/devices-common.h>
11 11
12extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst;
13#define imx31_add_fsl_usb2_udc(pdata) \
14 imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata)
15
16extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data __initconst;
17#define imx31_add_imx2_wdt(pdata) \
18 imx_add_imx2_wdt(&imx31_imx2_wdt_data)
19
12extern const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst; 20extern const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst;
13#define imx31_add_imx_i2c(id, pdata) \ 21#define imx31_add_imx_i2c(id, pdata) \
14 imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata) 22 imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata)
@@ -16,6 +24,10 @@ extern const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst;
16#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata) 24#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata)
17#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata) 25#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata)
18 26
27extern const struct imx_imx_keypad_data imx31_imx_keypad_data __initconst;
28#define imx31_add_imx_keypad(pdata) \
29 imx_add_imx_keypad(&imx31_imx_keypad_data, pdata)
30
19extern const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst; 31extern const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst;
20#define imx31_add_imx_ssi(id, pdata) \ 32#define imx31_add_imx_ssi(id, pdata) \
21 imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata) 33 imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata)
@@ -29,10 +41,25 @@ extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst;
29#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata) 41#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
30#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata) 42#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
31 43
44extern const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst;
45#define imx31_add_mxc_ehci_otg(pdata) \
46 imx_add_mxc_ehci(&imx31_mxc_ehci_otg_data, pdata)
47extern const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[] __initconst;
48#define imx31_add_mxc_ehci_hs(id, pdata) \
49 imx_add_mxc_ehci(&imx31_mxc_ehci_hs_data[id - 1], pdata)
50
51extern const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst;
52#define imx31_add_mxc_mmc(id, pdata) \
53 imx_add_mxc_mmc(&imx31_mxc_mmc_data[id], pdata)
54
32extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst; 55extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst;
33#define imx31_add_mxc_nand(pdata) \ 56#define imx31_add_mxc_nand(pdata) \
34 imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) 57 imx_add_mxc_nand(&imx31_mxc_nand_data, pdata)
35 58
59extern const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst;
60#define imx31_add_mxc_w1(pdata) \
61 imx_add_mxc_w1(&imx31_mxc_w1_data)
62
36extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst; 63extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst;
37#define imx31_add_cspi(id, pdata) \ 64#define imx31_add_cspi(id, pdata) \
38 imx_add_spi_imx(&imx31_cspi_data[id], pdata) 65 imx_add_spi_imx(&imx31_cspi_data[id], pdata)
diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h
index 5eb917b638d0..677b18aa7ae6 100644
--- a/arch/arm/mach-mx3/devices-imx35.h
+++ b/arch/arm/mach-mx3/devices-imx35.h
@@ -13,10 +13,19 @@ extern const struct imx_fec_data imx35_fec_data __initconst;
13#define imx35_add_fec(pdata) \ 13#define imx35_add_fec(pdata) \
14 imx_add_fec(&imx35_fec_data, pdata) 14 imx_add_fec(&imx35_fec_data, pdata)
15 15
16#define imx35_add_flexcan0(pdata) \ 16extern const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst;
17 imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata) 17#define imx35_add_fsl_usb2_udc(pdata) \
18#define imx35_add_flexcan1(pdata) \ 18 imx_add_fsl_usb2_udc(&imx35_fsl_usb2_udc_data, pdata)
19 imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata) 19
20extern const struct imx_flexcan_data imx35_flexcan_data[] __initconst;
21#define imx35_add_flexcan(id, pdata) \
22 imx_add_flexcan(&imx35_flexcan_data[id], pdata)
23#define imx35_add_flexcan0(pdata) imx35_add_flexcan(0, pdata)
24#define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata)
25
26extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data __initconst;
27#define imx35_add_imx2_wdt(pdata) \
28 imx_add_imx2_wdt(&imx35_imx2_wdt_data)
20 29
21extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst; 30extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst;
22#define imx35_add_imx_i2c(id, pdata) \ 31#define imx35_add_imx_i2c(id, pdata) \
@@ -25,6 +34,10 @@ extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst;
25#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata) 34#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata)
26#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata) 35#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata)
27 36
37extern const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst;
38#define imx31_add_imx_keypad(pdata) \
39 imx_add_imx_keypad(&imx35_imx_keypad_data, pdata)
40
28extern const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst; 41extern const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst;
29#define imx35_add_imx_ssi(id, pdata) \ 42#define imx35_add_imx_ssi(id, pdata) \
30 imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata) 43 imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata)
@@ -36,16 +49,28 @@ extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst;
36#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata) 49#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
37#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata) 50#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
38 51
52extern const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data __initconst;
53#define imx35_add_mxc_ehci_otg(pdata) \
54 imx_add_mxc_ehci(&imx35_mxc_ehci_otg_data, pdata)
55extern const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data __initconst;
56#define imx35_add_mxc_ehci_hs(pdata) \
57 imx_add_mxc_ehci(&imx35_mxc_ehci_hs_data, pdata)
58
39extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst; 59extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst;
40#define imx35_add_mxc_nand(pdata) \ 60#define imx35_add_mxc_nand(pdata) \
41 imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) 61 imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
42 62
63extern const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst;
64#define imx35_add_mxc_w1(pdata) \
65 imx_add_mxc_w1(&imx35_mxc_w1_data)
66
67extern const struct imx_sdhci_esdhc_imx_data
68imx35_sdhci_esdhc_imx_data[] __initconst;
69#define imx35_add_sdhci_esdhc_imx(id, pdata) \
70 imx_add_sdhci_esdhc_imx(&imx35_sdhci_esdhc_imx_data[id], pdata)
71
43extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; 72extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst;
44#define imx35_add_cspi(id, pdata) \ 73#define imx35_add_cspi(id, pdata) \
45 imx_add_spi_imx(&imx35_cspi_data[id], pdata) 74 imx_add_spi_imx(&imx35_cspi_data[id], pdata)
46#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata) 75#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
47#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata) 76#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
48
49extern const struct imx_esdhc_imx_data imx35_esdhc_data[] __initconst;
50#define imx35_add_esdhc(id, pdata) \
51 imx_add_esdhc(&imx35_esdhc_data[id], pdata)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index d4da9496089a..b6672db788fb 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -29,120 +29,25 @@
29 29
30#include "devices.h" 30#include "devices.h"
31 31
32/* GPIO port description */
33static struct mxc_gpio_port imx_gpio_ports[] = {
34 {
35 .chip.label = "gpio-0",
36 .base = IO_ADDRESS(GPIO1_BASE_ADDR),
37 .irq = MXC_INT_GPIO1,
38 .virtual_irq_start = MXC_GPIO_IRQ_START,
39 }, {
40 .chip.label = "gpio-1",
41 .base = IO_ADDRESS(GPIO2_BASE_ADDR),
42 .irq = MXC_INT_GPIO2,
43 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
44 }, {
45 .chip.label = "gpio-2",
46 .base = IO_ADDRESS(GPIO3_BASE_ADDR),
47 .irq = MXC_INT_GPIO3,
48 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
49 }
50};
51
52int __init imx3x_register_gpios(void)
53{
54 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
55}
56
57static struct resource mxc_w1_master_resources[] = {
58 {
59 .start = OWIRE_BASE_ADDR,
60 .end = OWIRE_BASE_ADDR + SZ_4K - 1,
61 .flags = IORESOURCE_MEM,
62 },
63};
64
65struct platform_device mxc_w1_master_device = {
66 .name = "mxc_w1",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
69 .resource = mxc_w1_master_resources,
70};
71
72#ifdef CONFIG_ARCH_MX31
73static struct resource mxcsdhc0_resources[] = {
74 {
75 .start = MX31_MMC_SDHC1_BASE_ADDR,
76 .end = MX31_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
77 .flags = IORESOURCE_MEM,
78 }, {
79 .start = MX31_INT_MMC_SDHC1,
80 .end = MX31_INT_MMC_SDHC1,
81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85static struct resource mxcsdhc1_resources[] = {
86 {
87 .start = MX31_MMC_SDHC2_BASE_ADDR,
88 .end = MX31_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
89 .flags = IORESOURCE_MEM,
90 }, {
91 .start = MX31_INT_MMC_SDHC2,
92 .end = MX31_INT_MMC_SDHC2,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97struct platform_device mxcsdhc_device0 = {
98 .name = "mxc-mmc",
99 .id = 0,
100 .num_resources = ARRAY_SIZE(mxcsdhc0_resources),
101 .resource = mxcsdhc0_resources,
102};
103
104struct platform_device mxcsdhc_device1 = {
105 .name = "mxc-mmc",
106 .id = 1,
107 .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
108 .resource = mxcsdhc1_resources,
109};
110
111static struct resource rnga_resources[] = {
112 {
113 .start = RNGA_BASE_ADDR,
114 .end = RNGA_BASE_ADDR + 0x28,
115 .flags = IORESOURCE_MEM,
116 },
117};
118
119struct platform_device mxc_rnga_device = {
120 .name = "mxc_rnga",
121 .id = -1,
122 .num_resources = 1,
123 .resource = rnga_resources,
124};
125#endif /* CONFIG_ARCH_MX31 */
126
127/* i.MX31 Image Processing Unit */ 32/* i.MX31 Image Processing Unit */
128 33
129/* The resource order is important! */ 34/* The resource order is important! */
130static struct resource mx3_ipu_rsrc[] = { 35static struct resource mx3_ipu_rsrc[] = {
131 { 36 {
132 .start = IPU_CTRL_BASE_ADDR, 37 .start = MX3x_IPU_CTRL_BASE_ADDR,
133 .end = IPU_CTRL_BASE_ADDR + 0x5F, 38 .end = MX3x_IPU_CTRL_BASE_ADDR + 0x5F,
134 .flags = IORESOURCE_MEM, 39 .flags = IORESOURCE_MEM,
135 }, { 40 }, {
136 .start = IPU_CTRL_BASE_ADDR + 0x88, 41 .start = MX3x_IPU_CTRL_BASE_ADDR + 0x88,
137 .end = IPU_CTRL_BASE_ADDR + 0xB3, 42 .end = MX3x_IPU_CTRL_BASE_ADDR + 0xB3,
138 .flags = IORESOURCE_MEM, 43 .flags = IORESOURCE_MEM,
139 }, { 44 }, {
140 .start = MXC_INT_IPU_SYN, 45 .start = MX3x_INT_IPU_SYN,
141 .end = MXC_INT_IPU_SYN, 46 .end = MX3x_INT_IPU_SYN,
142 .flags = IORESOURCE_IRQ, 47 .flags = IORESOURCE_IRQ,
143 }, { 48 }, {
144 .start = MXC_INT_IPU_ERR, 49 .start = MX3x_INT_IPU_ERR,
145 .end = MXC_INT_IPU_ERR, 50 .end = MX3x_INT_IPU_ERR,
146 .flags = IORESOURCE_IRQ, 51 .flags = IORESOURCE_IRQ,
147 }, 52 },
148}; 53};
@@ -156,8 +61,8 @@ struct platform_device mx3_ipu = {
156 61
157static struct resource fb_resources[] = { 62static struct resource fb_resources[] = {
158 { 63 {
159 .start = IPU_CTRL_BASE_ADDR + 0xB4, 64 .start = MX3x_IPU_CTRL_BASE_ADDR + 0xB4,
160 .end = IPU_CTRL_BASE_ADDR + 0x1BF, 65 .end = MX3x_IPU_CTRL_BASE_ADDR + 0x1BF,
161 .flags = IORESOURCE_MEM, 66 .flags = IORESOURCE_MEM,
162 }, 67 },
163}; 68};
@@ -174,8 +79,8 @@ struct platform_device mx3_fb = {
174 79
175static struct resource camera_resources[] = { 80static struct resource camera_resources[] = {
176 { 81 {
177 .start = IPU_CTRL_BASE_ADDR + 0x60, 82 .start = MX3x_IPU_CTRL_BASE_ADDR + 0x60,
178 .end = IPU_CTRL_BASE_ADDR + 0x87, 83 .end = MX3x_IPU_CTRL_BASE_ADDR + 0x87,
179 .flags = IORESOURCE_MEM, 84 .flags = IORESOURCE_MEM,
180 }, 85 },
181}; 86};
@@ -190,110 +95,6 @@ struct platform_device mx3_camera = {
190 }, 95 },
191}; 96};
192 97
193static struct resource otg_resources[] = {
194 {
195 .start = MX31_OTG_BASE_ADDR,
196 .end = MX31_OTG_BASE_ADDR + 0x1ff,
197 .flags = IORESOURCE_MEM,
198 }, {
199 .start = MXC_INT_USB3,
200 .end = MXC_INT_USB3,
201 .flags = IORESOURCE_IRQ,
202 },
203};
204
205static u64 otg_dmamask = DMA_BIT_MASK(32);
206
207/* OTG gadget device */
208struct platform_device mxc_otg_udc_device = {
209 .name = "fsl-usb2-udc",
210 .id = -1,
211 .dev = {
212 .dma_mask = &otg_dmamask,
213 .coherent_dma_mask = DMA_BIT_MASK(32),
214 },
215 .resource = otg_resources,
216 .num_resources = ARRAY_SIZE(otg_resources),
217};
218
219/* OTG host */
220struct platform_device mxc_otg_host = {
221 .name = "mxc-ehci",
222 .id = 0,
223 .dev = {
224 .coherent_dma_mask = 0xffffffff,
225 .dma_mask = &otg_dmamask,
226 },
227 .resource = otg_resources,
228 .num_resources = ARRAY_SIZE(otg_resources),
229};
230
231/* USB host 1 */
232
233static u64 usbh1_dmamask = ~(u32)0;
234
235static struct resource mxc_usbh1_resources[] = {
236 {
237 .start = MX31_OTG_BASE_ADDR + 0x200,
238 .end = MX31_OTG_BASE_ADDR + 0x3ff,
239 .flags = IORESOURCE_MEM,
240 }, {
241 .start = MXC_INT_USB1,
242 .end = MXC_INT_USB1,
243 .flags = IORESOURCE_IRQ,
244 },
245};
246
247struct platform_device mxc_usbh1 = {
248 .name = "mxc-ehci",
249 .id = 1,
250 .dev = {
251 .coherent_dma_mask = 0xffffffff,
252 .dma_mask = &usbh1_dmamask,
253 },
254 .resource = mxc_usbh1_resources,
255 .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
256};
257
258/* USB host 2 */
259static u64 usbh2_dmamask = ~(u32)0;
260
261static struct resource mxc_usbh2_resources[] = {
262 {
263 .start = MX31_OTG_BASE_ADDR + 0x400,
264 .end = MX31_OTG_BASE_ADDR + 0x5ff,
265 .flags = IORESOURCE_MEM,
266 }, {
267 .start = MXC_INT_USB2,
268 .end = MXC_INT_USB2,
269 .flags = IORESOURCE_IRQ,
270 },
271};
272
273struct platform_device mxc_usbh2 = {
274 .name = "mxc-ehci",
275 .id = 2,
276 .dev = {
277 .coherent_dma_mask = 0xffffffff,
278 .dma_mask = &usbh2_dmamask,
279 },
280 .resource = mxc_usbh2_resources,
281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
282};
283
284static struct resource imx_wdt_resources[] = {
285 {
286 .flags = IORESOURCE_MEM,
287 },
288};
289
290struct platform_device imx_wdt_device0 = {
291 .name = "imx2-wdt",
292 .id = 0,
293 .num_resources = ARRAY_SIZE(imx_wdt_resources),
294 .resource = imx_wdt_resources,
295};
296
297static struct resource imx_rtc_resources[] = { 98static struct resource imx_rtc_resources[] = {
298 { 99 {
299 .start = MX31_RTC_BASE_ADDR, 100 .start = MX31_RTC_BASE_ADDR,
@@ -312,51 +113,3 @@ struct platform_device imx_rtc_device0 = {
312 .num_resources = ARRAY_SIZE(imx_rtc_resources), 113 .num_resources = ARRAY_SIZE(imx_rtc_resources),
313 .resource = imx_rtc_resources, 114 .resource = imx_rtc_resources,
314}; 115};
315
316static struct resource imx_kpp_resources[] = {
317 {
318 .start = MX3x_KPP_BASE_ADDR,
319 .end = MX3x_KPP_BASE_ADDR + 0xf,
320 .flags = IORESOURCE_MEM
321 }, {
322 .start = MX3x_INT_KPP,
323 .end = MX3x_INT_KPP,
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
328struct platform_device imx_kpp_device = {
329 .name = "imx-keypad",
330 .id = -1,
331 .num_resources = ARRAY_SIZE(imx_kpp_resources),
332 .resource = imx_kpp_resources,
333};
334
335static int __init mx3_devices_init(void)
336{
337#if defined(CONFIG_ARCH_MX31)
338 if (cpu_is_mx31()) {
339 imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
340 imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
341 mxc_register_device(&mxc_rnga_device, NULL);
342 }
343#endif
344#if defined(CONFIG_ARCH_MX35)
345 if (cpu_is_mx35()) {
346 otg_resources[0].start = MX35_OTG_BASE_ADDR;
347 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
348 otg_resources[1].start = MXC_INT_USBOTG;
349 otg_resources[1].end = MXC_INT_USBOTG;
350 mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
351 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
352 mxc_usbh1_resources[1].start = MXC_INT_USBHS;
353 mxc_usbh1_resources[1].end = MXC_INT_USBHS;
354 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
355 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
356 }
357#endif
358
359 return 0;
360}
361
362subsys_initcall(mx3_devices_init);
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 585f814473d5..121962c568d1 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -1,14 +1,4 @@
1extern struct platform_device mxc_w1_master_device;
2extern struct platform_device mx3_ipu; 1extern struct platform_device mx3_ipu;
3extern struct platform_device mx3_fb; 2extern struct platform_device mx3_fb;
4extern struct platform_device mx3_camera; 3extern struct platform_device mx3_camera;
5extern struct platform_device mxcsdhc_device0;
6extern struct platform_device mxcsdhc_device1;
7extern struct platform_device mxc_otg_udc_device;
8extern struct platform_device mxc_otg_host;
9extern struct platform_device mxc_usbh1;
10extern struct platform_device mxc_usbh2;
11extern struct platform_device mxc_rnga_device;
12extern struct platform_device imx_wdt_device0;
13extern struct platform_device imx_rtc_device0; 4extern struct platform_device imx_rtc_device0;
14extern struct platform_device imx_kpp_device;
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 1abc10d52922..950dbb13b19b 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -289,7 +289,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
290 290
291 imx35_add_flexcan1(NULL); 291 imx35_add_flexcan1(NULL);
292 imx35_add_esdhc(0, NULL); 292 imx35_add_sdhci_esdhc_imx(0, NULL);
293 293
294 gpio_request(GPIO_LED1, "LED1"); 294 gpio_request(GPIO_LED1, "LED1");
295 gpio_direction_output(GPIO_LED1, 1); 295 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index aaa30fe18f85..28b6f414b5d5 100644
--- a/arch/arm/mach-mx3/mach-armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -49,10 +49,8 @@
49 49
50#include <mach/common.h> 50#include <mach/common.h>
51#include <mach/iomux-mx3.h> 51#include <mach/iomux-mx3.h>
52#include <mach/mmc.h>
53#include <mach/ipu.h> 52#include <mach/ipu.h>
54#include <mach/mx3fb.h> 53#include <mach/mx3fb.h>
55#include <mach/mxc_ehci.h>
56#include <mach/ulpi.h> 54#include <mach/ulpi.h>
57 55
58#include "devices-imx31.h" 56#include "devices-imx31.h"
@@ -245,13 +243,13 @@ h2_free_cs:
245 return err; 243 return err;
246} 244}
247 245
248static struct mxc_usbh_platform_data usbotg_pdata = { 246static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
249 .init = usbotg_init, 247 .init = usbotg_init,
250 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 248 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
251 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, 249 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
252}; 250};
253 251
254static struct mxc_usbh_platform_data usbh2_pdata = { 252static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
255 .init = usbh2_init, 253 .init = usbh2_init,
256 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 254 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
257 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, 255 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
@@ -453,7 +451,7 @@ static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
453 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B)); 451 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
454} 452}
455 453
456static struct imxmmc_platform_data sdhc_pdata = { 454static const struct imxmmc_platform_data sdhc_pdata __initconst = {
457 .get_ro = armadillo5x0_sdhc1_get_ro, 455 .get_ro = armadillo5x0_sdhc1_get_ro,
458 .init = armadillo5x0_sdhc1_init, 456 .init = armadillo5x0_sdhc1_init,
459 .exit = armadillo5x0_sdhc1_exit, 457 .exit = armadillo5x0_sdhc1_exit,
@@ -520,7 +518,7 @@ static void __init armadillo5x0_init(void)
520 gpio_direction_input(MX31_PIN_GPIO1_0); 518 gpio_direction_input(MX31_PIN_GPIO1_0);
521 519
522 /* Register SDHC */ 520 /* Register SDHC */
523 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 521 imx31_add_mxc_mmc(0, &sdhc_pdata);
524 522
525 /* Register FB */ 523 /* Register FB */
526 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 524 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
@@ -555,8 +553,8 @@ static void __init armadillo5x0_init(void)
555 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 553 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
556 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 554 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
557 555
558 mxc_register_device(&mxc_otg_host, &usbotg_pdata); 556 imx31_add_mxc_ehci_otg(&usbotg_pdata);
559 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 557 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
560#endif 558#endif
561} 559}
562 560
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 9fde873f5889..dda19883ffe2 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -30,7 +30,6 @@
30#include <linux/i2c/tsc2007.h> 30#include <linux/i2c/tsc2007.h>
31#include <linux/usb/otg.h> 31#include <linux/usb/otg.h>
32#include <linux/usb/ulpi.h> 32#include <linux/usb/ulpi.h>
33#include <linux/fsl_devices.h>
34#include <linux/i2c-gpio.h> 33#include <linux/i2c-gpio.h>
35 34
36#include <asm/mach-types.h> 35#include <asm/mach-types.h>
@@ -43,7 +42,6 @@
43#include <mach/common.h> 42#include <mach/common.h>
44#include <mach/iomux-mx35.h> 43#include <mach/iomux-mx35.h>
45#include <mach/mxc_nand.h> 44#include <mach/mxc_nand.h>
46#include <mach/mxc_ehci.h>
47 45
48#include "devices-imx35.h" 46#include "devices-imx35.h"
49#include "devices.h" 47#include "devices.h"
@@ -74,10 +72,6 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
74 }, 72 },
75}; 73};
76 74
77static struct platform_device *devices[] __initdata = {
78 &imx_wdt_device0,
79};
80
81static struct pad_desc eukrea_cpuimx35_pads[] = { 75static struct pad_desc eukrea_cpuimx35_pads[] = {
82 /* UART1 */ 76 /* UART1 */
83 MX35_PAD_CTS1__UART1_CTS, 77 MX35_PAD_CTS1__UART1_CTS,
@@ -117,18 +111,18 @@ static const struct mxc_nand_platform_data
117 .flash_bbt = 1, 111 .flash_bbt = 1,
118}; 112};
119 113
120static struct mxc_usbh_platform_data __maybe_unused otg_pdata = { 114static const struct mxc_usbh_platform_data otg_pdata __initconst = {
121 .portsc = MXC_EHCI_MODE_UTMI, 115 .portsc = MXC_EHCI_MODE_UTMI,
122 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 116 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
123}; 117};
124 118
125static struct mxc_usbh_platform_data __maybe_unused usbh1_pdata = { 119static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
126 .portsc = MXC_EHCI_MODE_SERIAL, 120 .portsc = MXC_EHCI_MODE_SERIAL,
127 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | 121 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
128 MXC_EHCI_IPPUE_DOWN, 122 MXC_EHCI_IPPUE_DOWN,
129}; 123};
130 124
131static struct fsl_usb2_platform_data otg_device_pdata = { 125static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
132 .operating_mode = FSL_USB2_DR_DEVICE, 126 .operating_mode = FSL_USB2_DR_DEVICE,
133 .phy_mode = FSL_USB2_PHY_UTMI, 127 .phy_mode = FSL_USB2_PHY_UTMI,
134 .workaround = FLS_USB2_WORKAROUND_ENGCM09152, 128 .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
@@ -158,7 +152,7 @@ static void __init mxc_board_init(void)
158 ARRAY_SIZE(eukrea_cpuimx35_pads)); 152 ARRAY_SIZE(eukrea_cpuimx35_pads));
159 153
160 imx35_add_fec(NULL); 154 imx35_add_fec(NULL);
161 platform_add_devices(devices, ARRAY_SIZE(devices)); 155 imx35_add_imx2_wdt(NULL);
162 156
163 imx35_add_imx_uart0(&uart_pdata); 157 imx35_add_imx_uart0(&uart_pdata);
164 imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info); 158 imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info);
@@ -168,11 +162,11 @@ static void __init mxc_board_init(void)
168 imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data); 162 imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data);
169 163
170 if (otg_mode_host) 164 if (otg_mode_host)
171 mxc_register_device(&mxc_otg_host, &otg_pdata); 165 imx35_add_mxc_ehci_otg(&otg_pdata);
172 else 166 else
173 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 167 imx35_add_fsl_usb2_udc(&otg_device_pdata);
174 168
175 mxc_register_device(&mxc_usbh1, &usbh1_pdata); 169 imx35_add_mxc_ehci_hs(&usbh1_pdata);
176 170
177#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD 171#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD
178 eukrea_mbimxsd35_baseboard_init(); 172 eukrea_mbimxsd35_baseboard_init();
diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 042cd5655e17..a5f3eb24e4d5 100644
--- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -41,9 +41,9 @@
41#include "devices-imx31.h" 41#include "devices-imx31.h"
42#include "devices.h" 42#include "devices.h"
43 43
44#define KZM_ARM11_IO_ADDRESS(x) ( \ 44#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
45 IMX_IO_ADDRESS(x, MX31_CS4) ?: \ 45 IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
46 IMX_IO_ADDRESS(x, MX31_CS5) ?: \ 46 IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
47 MX31_IO_ADDRESS(x)) 47 MX31_IO_ADDRESS(x))
48 48
49/* 49/*
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 0ad9e7821082..3dea40743f81 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -22,8 +22,6 @@
22#include <linux/mfd/mc13783.h> 22#include <linux/mfd/mc13783.h>
23#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
24#include <linux/regulator/machine.h> 24#include <linux/regulator/machine.h>
25#include <linux/fsl_devices.h>
26#include <linux/input/matrix_keypad.h>
27 25
28#include <mach/hardware.h> 26#include <mach/hardware.h>
29#include <asm/mach-types.h> 27#include <asm/mach-types.h>
@@ -102,7 +100,7 @@ static const uint32_t mx31_3ds_keymap[] = {
102 KEY(2, 3, KEY_F10), 100 KEY(2, 3, KEY_F10),
103}; 101};
104 102
105static struct matrix_keymap_data mx31_3ds_keymap_data = { 103static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
106 .keymap = mx31_3ds_keymap, 104 .keymap = mx31_3ds_keymap,
107 .keymap_size = ARRAY_SIZE(mx31_3ds_keymap), 105 .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
108}; 106};
@@ -214,7 +212,7 @@ usbotg_free_reset:
214 return err; 212 return err;
215} 213}
216 214
217static struct fsl_usb2_platform_data usbotg_pdata = { 215static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
218 .operating_mode = FSL_USB2_DR_DEVICE, 216 .operating_mode = FSL_USB2_DR_DEVICE,
219 .phy_mode = FSL_USB2_PHY_ULPI, 217 .phy_mode = FSL_USB2_PHY_ULPI,
220}; 218};
@@ -246,10 +244,10 @@ static void __init mxc_board_init(void)
246 spi_register_board_info(mx31_3ds_spi_devs, 244 spi_register_board_info(mx31_3ds_spi_devs,
247 ARRAY_SIZE(mx31_3ds_spi_devs)); 245 ARRAY_SIZE(mx31_3ds_spi_devs));
248 246
249 mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data); 247 imx31_add_imx_keypad(&mx31_3ds_keymap_data);
250 248
251 mx31_3ds_usbotg_init(); 249 mx31_3ds_usbotg_init();
252 mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata); 250 imx31_add_fsl_usb2_udc(&usbotg_pdata);
253 251
254 if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) 252 if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
255 printk(KERN_WARNING "Init of the debug board failed, all " 253 printk(KERN_WARNING "Init of the debug board failed, all "
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 42f47faa6fd6..2c595483f356 100644
--- a/arch/arm/mach-mx3/mach-mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -42,7 +42,6 @@
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/iomux-mx3.h> 43#include <mach/iomux-mx3.h>
44#include <mach/board-mx31lilly.h> 44#include <mach/board-mx31lilly.h>
45#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h> 45#include <mach/ulpi.h>
47 46
48#include "devices-imx31.h" 47#include "devices-imx31.h"
@@ -230,13 +229,13 @@ static struct mxc_usbh_platform_data usbotg_pdata = {
230 .flags = MXC_EHCI_POWER_PINS_ENABLED, 229 .flags = MXC_EHCI_POWER_PINS_ENABLED,
231}; 230};
232 231
233static struct mxc_usbh_platform_data usbh1_pdata = { 232static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
234 .init = usbh1_init, 233 .init = usbh1_init,
235 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, 234 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
236 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, 235 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
237}; 236};
238 237
239static struct mxc_usbh_platform_data usbh2_pdata = { 238static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
240 .init = usbh2_init, 239 .init = usbh2_init,
241 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 240 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
242 .flags = MXC_EHCI_POWER_PINS_ENABLED, 241 .flags = MXC_EHCI_POWER_PINS_ENABLED,
@@ -249,8 +248,8 @@ static void lilly1131_usb_init(void)
249 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 248 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
250 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 249 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
251 250
252 mxc_register_device(&mxc_usbh1, &usbh1_pdata); 251 imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
253 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 252 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
254} 253}
255 254
256#else 255#else
diff --git a/arch/arm/mach-mx3/mach-mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index b93895814cdf..9e64c66396e0 100644
--- a/arch/arm/mach-mx3/mach-mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -40,7 +40,6 @@
40#include <mach/board-mx31lite.h> 40#include <mach/board-mx31lite.h>
41#include <mach/iomux-mx3.h> 41#include <mach/iomux-mx3.h>
42#include <mach/irqs.h> 42#include <mach/irqs.h>
43#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h> 43#include <mach/ulpi.h>
45 44
46#include "devices-imx31.h" 45#include "devices-imx31.h"
@@ -171,7 +170,7 @@ static int usbh2_init(struct platform_device *pdev)
171 return 0; 170 return 0;
172} 171}
173 172
174static struct mxc_usbh_platform_data usbh2_pdata = { 173static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
175 .init = usbh2_init, 174 .init = usbh2_init,
176 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 175 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
177 .flags = MXC_EHCI_POWER_PINS_ENABLED, 176 .flags = MXC_EHCI_POWER_PINS_ENABLED,
@@ -258,7 +257,7 @@ static void __init mxc_board_init(void)
258 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 257 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
259 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 258 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
260 259
261 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 260 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
262#endif 261#endif
263 262
264 /* SMSC9117 IRQ pin */ 263 /* SMSC9117 IRQ pin */
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index eb5f426df224..203d21a510aa 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -40,8 +40,6 @@
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/iomux-mx3.h> 41#include <mach/iomux-mx3.h>
42#include <mach/ipu.h> 42#include <mach/ipu.h>
43#include <mach/mmc.h>
44#include <mach/mxc_ehci.h>
45#include <mach/mx3_camera.h> 43#include <mach/mx3_camera.h>
46#include <mach/spi.h> 44#include <mach/spi.h>
47#include <mach/ulpi.h> 45#include <mach/ulpi.h>
@@ -170,11 +168,11 @@ static const struct spi_imx_master moboard_spi1_pdata __initconst = {
170 168
171static struct regulator_consumer_supply sdhc_consumers[] = { 169static struct regulator_consumer_supply sdhc_consumers[] = {
172 { 170 {
173 .dev = &mxcsdhc_device0.dev, 171 .dev_name = "mxc-mmc.0",
174 .supply = "sdhc0_vcc", 172 .supply = "sdhc0_vcc",
175 }, 173 },
176 { 174 {
177 .dev = &mxcsdhc_device1.dev, 175 .dev_name = "mxc-mmc.1",
178 .supply = "sdhc1_vcc", 176 .supply = "sdhc1_vcc",
179 }, 177 },
180}; 178};
@@ -345,7 +343,7 @@ static void moboard_sdhc1_exit(struct device *dev, void *data)
345 gpio_free(SDHC1_CD); 343 gpio_free(SDHC1_CD);
346} 344}
347 345
348static struct imxmmc_platform_data sdhc1_pdata = { 346static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
349 .get_ro = moboard_sdhc1_get_ro, 347 .get_ro = moboard_sdhc1_get_ro,
350 .init = moboard_sdhc1_init, 348 .init = moboard_sdhc1_init,
351 .exit = moboard_sdhc1_exit, 349 .exit = moboard_sdhc1_exit,
@@ -404,17 +402,23 @@ static void usb_xcvr_reset(void)
404 402
405#if defined(CONFIG_USB_ULPI) 403#if defined(CONFIG_USB_ULPI)
406 404
407static struct mxc_usbh_platform_data usbh2_pdata = { 405static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
408 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 406 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
409 .flags = MXC_EHCI_POWER_PINS_ENABLED, 407 .flags = MXC_EHCI_POWER_PINS_ENABLED,
410}; 408};
411 409
412static int __init moboard_usbh2_init(void) 410static int __init moboard_usbh2_init(void)
413{ 411{
412 struct platform_device *pdev;
413
414 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 414 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
415 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 415 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
416 416
417 return mxc_register_device(&mxc_usbh2, &usbh2_pdata); 417 pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
418 if (IS_ERR(pdev))
419 return PTR_ERR(pdev);
420
421 return 0;
418} 422}
419#else 423#else
420static inline int moboard_usbh2_init(void) { return 0; } 424static inline int moboard_usbh2_init(void) { return 0; }
@@ -520,7 +524,7 @@ static void __init mxc_board_init(void)
520 spi_register_board_info(moboard_spi_board_info, 524 spi_register_board_info(moboard_spi_board_info,
521 ARRAY_SIZE(moboard_spi_board_info)); 525 ARRAY_SIZE(moboard_spi_board_info));
522 526
523 mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); 527 imx31_add_mxc_mmc(0, &sdhc1_pdata);
524 528
525 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 529 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
526 if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE)) 530 if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE))
diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c
index b66a75aa2e88..7e73153b2b6b 100644
--- a/arch/arm/mach-mx3/mach-mx35_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx35_3ds.c
@@ -26,7 +26,6 @@
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/memory.h> 27#include <linux/memory.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <linux/fsl_devices.h>
30 29
31#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
32 31
@@ -40,7 +39,6 @@
40#include <mach/iomux-mx35.h> 39#include <mach/iomux-mx35.h>
41#include <mach/irqs.h> 40#include <mach/irqs.h>
42#include <mach/3ds_debugboard.h> 41#include <mach/3ds_debugboard.h>
43#include <mach/mxc_ehci.h>
44 42
45#include "devices-imx35.h" 43#include "devices-imx35.h"
46#include "devices.h" 44#include "devices.h"
@@ -122,13 +120,13 @@ static struct pad_desc mx35pdk_pads[] = {
122}; 120};
123 121
124/* OTG config */ 122/* OTG config */
125static struct fsl_usb2_platform_data usb_otg_pdata = { 123static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
126 .operating_mode = FSL_USB2_DR_DEVICE, 124 .operating_mode = FSL_USB2_DR_DEVICE,
127 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 125 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
128}; 126};
129 127
130/* USB HOST config */ 128/* USB HOST config */
131static struct mxc_usbh_platform_data usb_host_pdata = { 129static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
132 .portsc = MXC_EHCI_MODE_SERIAL, 130 .portsc = MXC_EHCI_MODE_SERIAL,
133 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | 131 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI |
134 MXC_EHCI_INTERNAL_PHY, 132 MXC_EHCI_INTERNAL_PHY,
@@ -142,16 +140,17 @@ static void __init mxc_board_init(void)
142 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); 140 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
143 141
144 imx35_add_fec(NULL); 142 imx35_add_fec(NULL);
143 imx35_add_imx2_wdt(NULL);
145 platform_add_devices(devices, ARRAY_SIZE(devices)); 144 platform_add_devices(devices, ARRAY_SIZE(devices));
146 145
147 imx35_add_imx_uart0(&uart_pdata); 146 imx35_add_imx_uart0(&uart_pdata);
148 147
149 mxc_register_device(&mxc_otg_udc_device, &usb_otg_pdata); 148 imx35_add_fsl_usb2_udc(&usb_otg_pdata);
150 149
151 mxc_register_device(&mxc_usbh1, &usb_host_pdata); 150 imx35_add_mxc_ehci_hs(&usb_host_pdata);
152 151
153 imx35_add_mxc_nand(&mx35pdk_nand_board_info); 152 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
154 imx35_add_esdhc(0, NULL); 153 imx35_add_sdhci_esdhc_imx(0, NULL);
155 154
156 if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT)) 155 if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT))
157 pr_warn("Init of the debugboard failed, all " 156 pr_warn("Init of the debugboard failed, all "
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 2ff3f661a48e..b752f6bc20a2 100644
--- a/arch/arm/mach-mx3/mach-pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -27,7 +27,6 @@
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/irq.h> 29#include <linux/irq.h>
30#include <linux/fsl_devices.h>
31#include <linux/can/platform/sja1000.h> 30#include <linux/can/platform/sja1000.h>
32#include <linux/usb/otg.h> 31#include <linux/usb/otg.h>
33#include <linux/usb/ulpi.h> 32#include <linux/usb/ulpi.h>
@@ -43,10 +42,8 @@
43#include <mach/hardware.h> 42#include <mach/hardware.h>
44#include <mach/iomux-mx3.h> 43#include <mach/iomux-mx3.h>
45#include <mach/ipu.h> 44#include <mach/ipu.h>
46#include <mach/mmc.h>
47#include <mach/mx3_camera.h> 45#include <mach/mx3_camera.h>
48#include <mach/mx3fb.h> 46#include <mach/mx3fb.h>
49#include <mach/mxc_ehci.h>
50#include <mach/ulpi.h> 47#include <mach/ulpi.h>
51 48
52#include "devices-imx31.h" 49#include "devices-imx31.h"
@@ -399,7 +396,7 @@ static void pcm970_sdhc1_exit(struct device *dev, void *data)
399 gpio_free(SDHC1_GPIO_WP); 396 gpio_free(SDHC1_GPIO_WP);
400} 397}
401 398
402static struct imxmmc_platform_data sdhc_pdata = { 399static const struct imxmmc_platform_data sdhc_pdata __initconst = {
403#ifdef PCM970_SDHC_RW_SWITCH 400#ifdef PCM970_SDHC_RW_SWITCH
404 .get_ro = pcm970_sdhc1_get_ro, 401 .get_ro = pcm970_sdhc1_get_ro,
405#endif 402#endif
@@ -441,7 +438,6 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size)
441static struct platform_device *devices[] __initdata = { 438static struct platform_device *devices[] __initdata = {
442 &pcm037_flash, 439 &pcm037_flash,
443 &pcm037_sram_device, 440 &pcm037_sram_device,
444 &imx_wdt_device0,
445 &pcm037_mt9t031, 441 &pcm037_mt9t031,
446 &pcm037_mt9v022, 442 &pcm037_mt9v022,
447}; 443};
@@ -538,18 +534,18 @@ static struct platform_device pcm970_sja1000 = {
538}; 534};
539 535
540#if defined(CONFIG_USB_ULPI) 536#if defined(CONFIG_USB_ULPI)
541static struct mxc_usbh_platform_data otg_pdata = { 537static struct mxc_usbh_platform_data otg_pdata __initdata = {
542 .portsc = MXC_EHCI_MODE_ULPI, 538 .portsc = MXC_EHCI_MODE_ULPI,
543 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 539 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
544}; 540};
545 541
546static struct mxc_usbh_platform_data usbh2_pdata = { 542static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
547 .portsc = MXC_EHCI_MODE_ULPI, 543 .portsc = MXC_EHCI_MODE_ULPI,
548 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 544 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
549}; 545};
550#endif 546#endif
551 547
552static struct fsl_usb2_platform_data otg_device_pdata = { 548static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
553 .operating_mode = FSL_USB2_DR_DEVICE, 549 .operating_mode = FSL_USB2_DR_DEVICE,
554 .phy_mode = FSL_USB2_PHY_ULPI, 550 .phy_mode = FSL_USB2_PHY_ULPI,
555}; 551};
@@ -607,12 +603,13 @@ static void __init mxc_board_init(void)
607 603
608 platform_add_devices(devices, ARRAY_SIZE(devices)); 604 platform_add_devices(devices, ARRAY_SIZE(devices));
609 605
606 imx31_add_imx2_wdt(NULL);
610 imx31_add_imx_uart0(&uart_pdata); 607 imx31_add_imx_uart0(&uart_pdata);
611 /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */ 608 /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */
612 imx31_add_imx_uart1(&uart_pdata); 609 imx31_add_imx_uart1(&uart_pdata);
613 imx31_add_imx_uart2(&uart_pdata); 610 imx31_add_imx_uart2(&uart_pdata);
614 611
615 mxc_register_device(&mxc_w1_master_device, NULL); 612 imx31_add_mxc_w1(NULL);
616 613
617 /* LAN9217 IRQ pin */ 614 /* LAN9217 IRQ pin */
618 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); 615 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
@@ -632,7 +629,7 @@ static void __init mxc_board_init(void)
632 imx31_add_imx_i2c2(&pcm037_i2c2_data); 629 imx31_add_imx_i2c2(&pcm037_i2c2_data);
633 630
634 imx31_add_mxc_nand(&pcm037_nand_board_info); 631 imx31_add_mxc_nand(&pcm037_nand_board_info);
635 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 632 imx31_add_mxc_mmc(0, &sdhc_pdata);
636 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 633 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
637 mxc_register_device(&mx3_fb, &mx3fb_pdata); 634 mxc_register_device(&mx3_fb, &mx3fb_pdata);
638 635
@@ -654,16 +651,16 @@ static void __init mxc_board_init(void)
654 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 651 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
655 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 652 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
656 653
657 mxc_register_device(&mxc_otg_host, &otg_pdata); 654 imx31_add_mxc_ehci_otg(&otg_pdata);
658 } 655 }
659 656
660 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 657 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
661 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 658 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
662 659
663 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 660 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
664#endif 661#endif
665 if (!otg_mode_host) 662 if (!otg_mode_host)
666 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 663 imx31_add_fsl_usb2_udc(&otg_device_pdata);
667 664
668} 665}
669 666
diff --git a/arch/arm/mach-mx3/mach-pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 99e0894e07db..3392812a55f7 100644
--- a/arch/arm/mach-mx3/mach-pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
@@ -171,7 +171,7 @@ static struct platform_device pcm037_gpio_keys_device = {
171 }, 171 },
172}; 172};
173 173
174static int eet_init_devices(void) 174static int __init eet_init_devices(void)
175{ 175{
176 if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET) 176 if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET)
177 return 0; 177 return 0;
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index 4e1de87995d4..826c6dc2f4c8 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -27,7 +27,6 @@
27#include <linux/i2c/at24.h> 27#include <linux/i2c/at24.h>
28#include <linux/usb/otg.h> 28#include <linux/usb/otg.h>
29#include <linux/usb/ulpi.h> 29#include <linux/usb/ulpi.h>
30#include <linux/fsl_devices.h>
31 30
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -39,7 +38,6 @@
39#include <mach/iomux-mx35.h> 38#include <mach/iomux-mx35.h>
40#include <mach/ipu.h> 39#include <mach/ipu.h>
41#include <mach/mx3fb.h> 40#include <mach/mx3fb.h>
42#include <mach/mxc_ehci.h>
43#include <mach/ulpi.h> 41#include <mach/ulpi.h>
44#include <mach/audmux.h> 42#include <mach/audmux.h>
45 43
@@ -140,7 +138,6 @@ static struct i2c_board_info pcm043_i2c_devices[] = {
140 138
141static struct platform_device *devices[] __initdata = { 139static struct platform_device *devices[] __initdata = {
142 &pcm043_flash, 140 &pcm043_flash,
143 &imx_wdt_device0,
144}; 141};
145 142
146static struct pad_desc pcm043_pads[] = { 143static struct pad_desc pcm043_pads[] = {
@@ -311,19 +308,19 @@ pcm037_nand_board_info __initconst = {
311}; 308};
312 309
313#if defined(CONFIG_USB_ULPI) 310#if defined(CONFIG_USB_ULPI)
314static struct mxc_usbh_platform_data otg_pdata = { 311static struct mxc_usbh_platform_data otg_pdata __initdata = {
315 .portsc = MXC_EHCI_MODE_UTMI, 312 .portsc = MXC_EHCI_MODE_UTMI,
316 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 313 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
317}; 314};
318 315
319static struct mxc_usbh_platform_data usbh1_pdata = { 316static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
320 .portsc = MXC_EHCI_MODE_SERIAL, 317 .portsc = MXC_EHCI_MODE_SERIAL,
321 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | 318 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
322 MXC_EHCI_IPPUE_DOWN, 319 MXC_EHCI_IPPUE_DOWN,
323}; 320};
324#endif 321#endif
325 322
326static struct fsl_usb2_platform_data otg_device_pdata = { 323static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
327 .operating_mode = FSL_USB2_DR_DEVICE, 324 .operating_mode = FSL_USB2_DR_DEVICE,
328 .phy_mode = FSL_USB2_PHY_UTMI, 325 .phy_mode = FSL_USB2_PHY_UTMI,
329}; 326};
@@ -364,6 +361,7 @@ static void __init mxc_board_init(void)
364 361
365 imx35_add_fec(NULL); 362 imx35_add_fec(NULL);
366 platform_add_devices(devices, ARRAY_SIZE(devices)); 363 platform_add_devices(devices, ARRAY_SIZE(devices));
364 imx35_add_imx2_wdt(NULL);
367 365
368 imx35_add_imx_uart0(&uart_pdata); 366 imx35_add_imx_uart0(&uart_pdata);
369 imx35_add_mxc_nand(&pcm037_nand_board_info); 367 imx35_add_mxc_nand(&pcm037_nand_board_info);
@@ -386,16 +384,16 @@ static void __init mxc_board_init(void)
386 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 384 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
387 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 385 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
388 386
389 mxc_register_device(&mxc_otg_host, &otg_pdata); 387 imx35_add_mxc_ehci_otg(&otg_pdata);
390 } 388 }
391 389
392 mxc_register_device(&mxc_usbh1, &usbh1_pdata); 390 imx35_add_mxc_ehci_hs(&usbh1_pdata);
393#endif 391#endif
394 if (!otg_mode_host) 392 if (!otg_mode_host)
395 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 393 imx35_add_fsl_usb2_udc(&otg_device_pdata);
396 394
397 imx35_add_flexcan1(NULL); 395 imx35_add_flexcan1(NULL);
398 imx35_add_esdhc(0, NULL); 396 imx35_add_sdhci_esdhc_imx(0, NULL);
399} 397}
400 398
401static void __init pcm043_timer_init(void) 399static void __init pcm043_timer_init(void)
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index b4ffc531a82c..47118f760244 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -36,40 +36,16 @@
36 * @ingroup Memory 36 * @ingroup Memory
37 */ 37 */
38 38
39/*! 39#ifdef CONFIG_SOC_IMX31
40 * This table defines static virtual address mappings for I/O regions. 40static struct map_desc mx31_io_desc[] __initdata = {
41 * These are the mappings common across all MX3 boards. 41 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
42 */ 42 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
43static struct map_desc mxc_io_desc[] __initdata = { 43 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
44 { 44 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
45 .virtual = X_MEMC_BASE_ADDR_VIRT, 45 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
46 .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR),
47 .length = X_MEMC_SIZE,
48 .type = MT_DEVICE
49 }, {
50 .virtual = AVIC_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(AVIC_BASE_ADDR),
52 .length = AVIC_SIZE,
53 .type = MT_DEVICE_NONSHARED
54 }, {
55 .virtual = AIPS1_BASE_ADDR_VIRT,
56 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
57 .length = AIPS1_SIZE,
58 .type = MT_DEVICE_NONSHARED
59 }, {
60 .virtual = AIPS2_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
62 .length = AIPS2_SIZE,
63 .type = MT_DEVICE_NONSHARED
64 }, {
65 .virtual = SPBA0_BASE_ADDR_VIRT,
66 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
67 .length = SPBA0_SIZE,
68 .type = MT_DEVICE_NONSHARED
69 },
70}; 46};
71 47
72/*! 48/*
73 * This function initializes the memory map. It is called during the 49 * This function initializes the memory map. It is called during the
74 * system startup to create static physical to virtual memory mappings 50 * system startup to create static physical to virtual memory mappings
75 * for the IO modules. 51 * for the IO modules.
@@ -77,34 +53,44 @@ static struct map_desc mxc_io_desc[] __initdata = {
77void __init mx31_map_io(void) 53void __init mx31_map_io(void)
78{ 54{
79 mxc_set_cpu_type(MXC_CPU_MX31); 55 mxc_set_cpu_type(MXC_CPU_MX31);
80 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); 56 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
81 57
82 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 58 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
83} 59}
84 60
85#ifdef CONFIG_ARCH_MX35 61int imx31_register_gpios(void);
86void __init mx35_map_io(void) 62void __init mx31_init_irq(void)
87{ 63{
88 mxc_set_cpu_type(MXC_CPU_MX35); 64 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
89 mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); 65 imx31_register_gpios();
90 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
91
92 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
93} 66}
94#endif 67#endif /* ifdef CONFIG_SOC_IMX31 */
95 68
96int imx3x_register_gpios(void); 69#ifdef CONFIG_SOC_IMX35
70static struct map_desc mx35_io_desc[] __initdata = {
71 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
72 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
73 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
74 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
75 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
76};
97 77
98void __init mx31_init_irq(void) 78void __init mx35_map_io(void)
99{ 79{
100 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); 80 mxc_set_cpu_type(MXC_CPU_MX35);
101 imx3x_register_gpios(); 81 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
82 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
83
84 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
102} 85}
103 86
87int imx35_register_gpios(void);
104void __init mx35_init_irq(void) 88void __init mx35_init_irq(void)
105{ 89{
106 mx31_init_irq(); 90 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
91 imx35_register_gpios();
107} 92}
93#endif /* ifdef CONFIG_SOC_IMX35 */
108 94
109#ifdef CONFIG_CACHE_L2X0 95#ifdef CONFIG_CACHE_L2X0
110static int mxc_init_l2x0(void) 96static int mxc_init_l2x0(void)
@@ -129,7 +115,7 @@ static int mxc_init_l2x0(void)
129 pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); 115 pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
130 } 116 }
131 117
132 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); 118 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
133 if (IS_ERR(l2x0_base)) { 119 if (IS_ERR(l2x0_base)) {
134 printk(KERN_ERR "remapping L2 cache area failed with %ld\n", 120 printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
135 PTR_ERR(l2x0_base)); 121 PTR_ERR(l2x0_base));
diff --git a/arch/arm/mach-mx3/mx31lilly-db.c b/arch/arm/mach-mx3/mx31lilly-db.c
index 827fd3c80201..8f1a38ebf5c8 100644
--- a/arch/arm/mach-mx3/mx31lilly-db.c
+++ b/arch/arm/mach-mx3/mx31lilly-db.c
@@ -34,7 +34,6 @@
34#include <mach/common.h> 34#include <mach/common.h>
35#include <mach/iomux-mx3.h> 35#include <mach/iomux-mx3.h>
36#include <mach/board-mx31lilly.h> 36#include <mach/board-mx31lilly.h>
37#include <mach/mmc.h>
38#include <mach/mx3fb.h> 37#include <mach/mx3fb.h>
39#include <mach/ipu.h> 38#include <mach/ipu.h>
40 39
@@ -158,7 +157,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
158 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data); 157 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
159} 158}
160 159
161static struct imxmmc_platform_data mmc_pdata = { 160static const struct imxmmc_platform_data mmc_pdata __initconst = {
162 .get_ro = mxc_mmc1_get_ro, 161 .get_ro = mxc_mmc1_get_ro,
163 .init = mxc_mmc1_init, 162 .init = mxc_mmc1_init,
164 .exit = mxc_mmc1_exit, 163 .exit = mxc_mmc1_exit,
@@ -216,7 +215,7 @@ void __init mx31lilly_db_init(void)
216 imx31_add_imx_uart0(&uart_pdata); 215 imx31_add_imx_uart0(&uart_pdata);
217 imx31_add_imx_uart1(&uart_pdata); 216 imx31_add_imx_uart1(&uart_pdata);
218 imx31_add_imx_uart2(&uart_pdata); 217 imx31_add_imx_uart2(&uart_pdata);
219 mxc_register_device(&mxcsdhc_device0, &mmc_pdata); 218 imx31_add_mxc_mmc(0, &mmc_pdata);
220 mx31lilly_init_fb(); 219 mx31lilly_init_fb();
221} 220}
222 221
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 7b0e74e275ba..3124ea837ac7 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -35,7 +35,6 @@
35#include <mach/common.h> 35#include <mach/common.h>
36#include <mach/iomux-mx3.h> 36#include <mach/iomux-mx3.h>
37#include <mach/board-mx31lite.h> 37#include <mach/board-mx31lite.h>
38#include <mach/mmc.h>
39 38
40#include "devices-imx31.h" 39#include "devices-imx31.h"
41#include "devices.h" 40#include "devices.h"
@@ -142,7 +141,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
142 free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data); 141 free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
143} 142}
144 143
145static struct imxmmc_platform_data mmc_pdata = { 144static const struct imxmmc_platform_data mmc_pdata __initconst = {
146 .get_ro = mxc_mmc1_get_ro, 145 .get_ro = mxc_mmc1_get_ro,
147 .init = mxc_mmc1_init, 146 .init = mxc_mmc1_init,
148 .exit = mxc_mmc1_exit, 147 .exit = mxc_mmc1_exit,
@@ -197,10 +196,9 @@ void __init mx31lite_db_init(void)
197 ARRAY_SIZE(litekit_db_board_pins), 196 ARRAY_SIZE(litekit_db_board_pins),
198 "development board pins"); 197 "development board pins");
199 imx31_add_imx_uart0(&uart_pdata); 198 imx31_add_imx_uart0(&uart_pdata);
200 mxc_register_device(&mxcsdhc_device0, &mmc_pdata); 199 imx31_add_mxc_mmc(0, &mmc_pdata);
201 imx31_add_spi_imx0(&spi0_pdata); 200 imx31_add_spi_imx0(&spi0_pdata);
202 platform_device_register(&litekit_led_device); 201 platform_device_register(&litekit_led_device);
203 mxc_register_device(&imx_wdt_device0, NULL); 202 imx31_add_imx2_wdt(NULL);
204 mxc_register_device(&imx_rtc_device0, NULL); 203 mxc_register_device(&imx_rtc_device0, NULL);
205} 204}
206
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index fc395a7a8599..94a0b9e4b7f3 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -18,15 +18,12 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/types.h> 20#include <linux/types.h>
21#include <linux/fsl_devices.h>
22 21
23#include <linux/usb/otg.h> 22#include <linux/usb/otg.h>
24 23
25#include <mach/common.h> 24#include <mach/common.h>
26#include <mach/iomux-mx3.h> 25#include <mach/iomux-mx3.h>
27#include <mach/hardware.h> 26#include <mach/hardware.h>
28#include <mach/mmc.h>
29#include <mach/mxc_ehci.h>
30#include <mach/ulpi.h> 27#include <mach/ulpi.h>
31 28
32#include "devices-imx31.h" 29#include "devices-imx31.h"
@@ -103,7 +100,7 @@ static void devboard_sdhc2_exit(struct device *dev, void *data)
103 gpio_free(SDHC2_CD); 100 gpio_free(SDHC2_CD);
104} 101}
105 102
106static struct imxmmc_platform_data sdhc2_pdata = { 103static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
107 .get_ro = devboard_sdhc2_get_ro, 104 .get_ro = devboard_sdhc2_get_ro,
108 .init = devboard_sdhc2_init, 105 .init = devboard_sdhc2_init,
109 .exit = devboard_sdhc2_exit, 106 .exit = devboard_sdhc2_exit,
@@ -187,7 +184,7 @@ static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
187 return 0; 184 return 0;
188} 185}
189 186
190static struct mxc_usbh_platform_data usbh1_pdata = { 187static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
191 .init = devboard_usbh1_hw_init, 188 .init = devboard_usbh1_hw_init,
192 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, 189 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
193 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, 190 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
@@ -196,6 +193,7 @@ static struct mxc_usbh_platform_data usbh1_pdata = {
196static int __init devboard_usbh1_init(void) 193static int __init devboard_usbh1_init(void)
197{ 194{
198 struct otg_transceiver *otg; 195 struct otg_transceiver *otg;
196 struct platform_device *pdev;
199 197
200 otg = kzalloc(sizeof(*otg), GFP_KERNEL); 198 otg = kzalloc(sizeof(*otg), GFP_KERNEL);
201 if (!otg) 199 if (!otg)
@@ -207,11 +205,15 @@ static int __init devboard_usbh1_init(void)
207 205
208 usbh1_pdata.otg = otg; 206 usbh1_pdata.otg = otg;
209 207
210 return mxc_register_device(&mxc_usbh1, &usbh1_pdata); 208 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
209 if (IS_ERR(pdev))
210 return PTR_ERR(pdev);
211
212 return 0;
211} 213}
212 214
213 215
214static struct fsl_usb2_platform_data usb_pdata = { 216static const struct fsl_usb2_platform_data usb_pdata __initconst = {
215 .operating_mode = FSL_USB2_DR_DEVICE, 217 .operating_mode = FSL_USB2_DR_DEVICE,
216 .phy_mode = FSL_USB2_PHY_ULPI, 218 .phy_mode = FSL_USB2_PHY_ULPI,
217}; 219};
@@ -228,11 +230,11 @@ void __init mx31moboard_devboard_init(void)
228 230
229 imx31_add_imx_uart1(&uart_pdata); 231 imx31_add_imx_uart1(&uart_pdata);
230 232
231 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 233 imx31_add_mxc_mmc(1, &sdhc2_pdata);
232 234
233 devboard_init_sel_gpios(); 235 devboard_init_sel_gpios();
234 236
235 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 237 imx31_add_fsl_usb2_udc(&usb_pdata);
236 238
237 devboard_usbh1_init(); 239 devboard_usbh1_init();
238} 240}
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 18069cb7d068..f449a97ae1a2 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -21,7 +21,6 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/types.h> 23#include <linux/types.h>
24#include <linux/fsl_devices.h>
25 24
26#include <linux/usb/otg.h> 25#include <linux/usb/otg.h>
27 26
@@ -29,12 +28,11 @@
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
31#include <mach/iomux-mx3.h> 30#include <mach/iomux-mx3.h>
32#include <mach/mmc.h>
33#include <mach/mxc_ehci.h>
34#include <mach/ulpi.h> 31#include <mach/ulpi.h>
35 32
36#include <media/soc_camera.h> 33#include <media/soc_camera.h>
37 34
35#include "devices-imx31.h"
38#include "devices.h" 36#include "devices.h"
39 37
40static unsigned int marxbot_pins[] = { 38static unsigned int marxbot_pins[] = {
@@ -116,7 +114,7 @@ static void marxbot_sdhc2_exit(struct device *dev, void *data)
116 gpio_free(SDHC2_CD); 114 gpio_free(SDHC2_CD);
117} 115}
118 116
119static struct imxmmc_platform_data sdhc2_pdata = { 117static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
120 .get_ro = marxbot_sdhc2_get_ro, 118 .get_ro = marxbot_sdhc2_get_ro,
121 .init = marxbot_sdhc2_init, 119 .init = marxbot_sdhc2_init,
122 .exit = marxbot_sdhc2_exit, 120 .exit = marxbot_sdhc2_exit,
@@ -302,7 +300,7 @@ static int marxbot_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
302 return 0; 300 return 0;
303} 301}
304 302
305static struct mxc_usbh_platform_data usbh1_pdata = { 303static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
306 .init = marxbot_usbh1_hw_init, 304 .init = marxbot_usbh1_hw_init,
307 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, 305 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
308 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, 306 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
@@ -311,6 +309,7 @@ static struct mxc_usbh_platform_data usbh1_pdata = {
311static int __init marxbot_usbh1_init(void) 309static int __init marxbot_usbh1_init(void)
312{ 310{
313 struct otg_transceiver *otg; 311 struct otg_transceiver *otg;
312 struct platform_device *pdev;
314 313
315 otg = kzalloc(sizeof(*otg), GFP_KERNEL); 314 otg = kzalloc(sizeof(*otg), GFP_KERNEL);
316 if (!otg) 315 if (!otg)
@@ -322,10 +321,14 @@ static int __init marxbot_usbh1_init(void)
322 321
323 usbh1_pdata.otg = otg; 322 usbh1_pdata.otg = otg;
324 323
325 return mxc_register_device(&mxc_usbh1, &usbh1_pdata); 324 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
325 if (IS_ERR(pdev))
326 return PTR_ERR(pdev);
327
328 return 0;
326} 329}
327 330
328static struct fsl_usb2_platform_data usb_pdata = { 331static const struct fsl_usb2_platform_data usb_pdata __initconst = {
329 .operating_mode = FSL_USB2_DR_DEVICE, 332 .operating_mode = FSL_USB2_DR_DEVICE,
330 .phy_mode = FSL_USB2_PHY_ULPI, 333 .phy_mode = FSL_USB2_PHY_ULPI,
331}; 334};
@@ -344,7 +347,7 @@ void __init mx31moboard_marxbot_init(void)
344 347
345 dspics_resets_init(); 348 dspics_resets_init();
346 349
347 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 350 imx31_add_mxc_mmc(1, &sdhc2_pdata);
348 351
349 spi_register_board_info(marxbot_spi_board_info, 352 spi_register_board_info(marxbot_spi_board_info,
350 ARRAY_SIZE(marxbot_spi_board_info)); 353 ARRAY_SIZE(marxbot_spi_board_info));
@@ -357,7 +360,7 @@ void __init mx31moboard_marxbot_init(void)
357 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); 360 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0));
358 gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); 361 gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false);
359 362
360 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 363 imx31_add_fsl_usb2_udc(&usb_pdata);
361 364
362 marxbot_usbh1_init(); 365 marxbot_usbh1_init();
363} 366}
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
index 04760a53005a..bbec3c82264a 100644
--- a/arch/arm/mach-mx3/mx31moboard-smartbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -19,7 +19,6 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/types.h> 21#include <linux/types.h>
22#include <linux/fsl_devices.h>
23 22
24#include <linux/usb/otg.h> 23#include <linux/usb/otg.h>
25#include <linux/usb/ulpi.h> 24#include <linux/usb/ulpi.h>
@@ -28,7 +27,6 @@
28#include <mach/hardware.h> 27#include <mach/hardware.h>
29#include <mach/iomux-mx3.h> 28#include <mach/iomux-mx3.h>
30#include <mach/board-mx31moboard.h> 29#include <mach/board-mx31moboard.h>
31#include <mach/mxc_ehci.h>
32#include <mach/ulpi.h> 30#include <mach/ulpi.h>
33 31
34#include <media/soc_camera.h> 32#include <media/soc_camera.h>
@@ -118,24 +116,30 @@ static int __init smartbot_cam_init(void)
118 return 0; 116 return 0;
119} 117}
120 118
121static struct fsl_usb2_platform_data usb_pdata = { 119static const struct fsl_usb2_platform_data usb_pdata __initconst = {
122 .operating_mode = FSL_USB2_DR_DEVICE, 120 .operating_mode = FSL_USB2_DR_DEVICE,
123 .phy_mode = FSL_USB2_PHY_ULPI, 121 .phy_mode = FSL_USB2_PHY_ULPI,
124}; 122};
125 123
126#if defined(CONFIG_USB_ULPI) 124#if defined(CONFIG_USB_ULPI)
127 125
128static struct mxc_usbh_platform_data otg_host_pdata = { 126static struct mxc_usbh_platform_data otg_host_pdata __initdata = {
129 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 127 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
130 .flags = MXC_EHCI_POWER_PINS_ENABLED, 128 .flags = MXC_EHCI_POWER_PINS_ENABLED,
131}; 129};
132 130
133static int __init smartbot_otg_host_init(void) 131static int __init smartbot_otg_host_init(void)
134{ 132{
133 struct platform_device *pdev;
134
135 otg_host_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 135 otg_host_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
136 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 136 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
137 137
138 return mxc_register_device(&mxc_otg_host, &otg_host_pdata); 138 pdev = imx31_add_mxc_ehci_otg(&otg_host_pdata);
139 if (IS_ERR(pdev))
140 return PTR_ERR(pdev);
141
142 return 0;
139} 143}
140#else 144#else
141static inline int smartbot_otg_host_init(void) { return 0; } 145static inline int smartbot_otg_host_init(void) { return 0; }
@@ -182,7 +186,7 @@ void __init mx31moboard_smartbot_init(int board)
182 186
183 switch (board) { 187 switch (board) {
184 case MX31SMARTBOT: 188 case MX31SMARTBOT:
185 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 189 imx31_add_fsl_usb2_udc(&usb_pdata);
186 break; 190 break;
187 case MX31EYEBOT: 191 case MX31EYEBOT:
188 smartbot_otg_host_init(); 192 smartbot_otg_host_init();
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 3ec910a7a182..95cb0a831478 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -14,7 +14,7 @@ config MACH_MX51_BABBAGE
14 bool "Support MX51 BABBAGE platforms" 14 bool "Support MX51 BABBAGE platforms"
15 select IMX_HAVE_PLATFORM_IMX_I2C 15 select IMX_HAVE_PLATFORM_IMX_I2C
16 select IMX_HAVE_PLATFORM_IMX_UART 16 select IMX_HAVE_PLATFORM_IMX_UART
17 select IMX_HAVE_PLATFORM_ESDHC 17 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
18 help 18 help
19 Include support for MX51 Babbage platform, also known as MX51EVK in 19 Include support for MX51 Babbage platform, also known as MX51EVK in
20 u-boot. This includes specific configurations for the board and its 20 u-boot. This includes specific configurations for the board and its
@@ -47,7 +47,7 @@ choice
47config MACH_EUKREA_MBIMX51_BASEBOARD 47config MACH_EUKREA_MBIMX51_BASEBOARD
48 prompt "Eukrea MBIMX51 development board" 48 prompt "Eukrea MBIMX51 development board"
49 bool 49 bool
50 select IMX_HAVE_PLATFORM_ESDHC 50 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
51 help 51 help
52 This adds board specific devices that can be found on Eukrea's 52 This adds board specific devices that can be found on Eukrea's
53 MBIMX51 evaluation board. 53 MBIMX51 evaluation board.
@@ -72,7 +72,7 @@ choice
72config MACH_EUKREA_MBIMXSD51_BASEBOARD 72config MACH_EUKREA_MBIMXSD51_BASEBOARD
73 prompt "Eukrea MBIMXSD development board" 73 prompt "Eukrea MBIMXSD development board"
74 bool 74 bool
75 select IMX_HAVE_PLATFORM_ESDHC 75 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
76 help 76 help
77 This adds board specific devices that can be found on Eukrea's 77 This adds board specific devices that can be found on Eukrea's
78 MBIMXSD evaluation board. 78 MBIMXSD evaluation board.
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index acbe30df2e69..542f2b147dcc 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -349,8 +349,8 @@ static void __init mxc_board_init(void)
349 mxc_iomux_v3_setup_pad(&usbh1stp); 349 mxc_iomux_v3_setup_pad(&usbh1stp);
350 babbage_usbhub_reset(); 350 babbage_usbhub_reset();
351 351
352 imx51_add_esdhc(0, NULL); 352 imx51_add_sdhci_esdhc_imx(0, NULL);
353 imx51_add_esdhc(1, NULL); 353 imx51_add_sdhci_esdhc_imx(1, NULL);
354} 354}
355 355
356static void __init mx51_babbage_timer_init(void) 356static void __init mx51_babbage_timer_init(void)
diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h
index 8c50cb5d05f5..01b71ef4086c 100644
--- a/arch/arm/mach-mx5/devices-imx51.h
+++ b/arch/arm/mach-mx5/devices-imx51.h
@@ -31,6 +31,11 @@ extern const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst;
31#define imx51_add_mxc_nand(pdata) \ 31#define imx51_add_mxc_nand(pdata) \
32 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata) 32 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata)
33 33
34extern const struct imx_sdhci_esdhc_imx_data
35imx51_sdhci_esdhc_imx_data[] __initconst;
36#define imx51_add_sdhci_esdhc_imx(id, pdata) \
37 imx_add_sdhci_esdhc_imx(&imx51_sdhci_esdhc_imx_data[id], pdata)
38
34extern const struct imx_spi_imx_data imx51_cspi_data __initconst; 39extern const struct imx_spi_imx_data imx51_cspi_data __initconst;
35#define imx51_add_cspi(pdata) \ 40#define imx51_add_cspi(pdata) \
36 imx_add_spi_imx(&imx51_cspi_data, pdata) 41 imx_add_spi_imx(&imx51_cspi_data, pdata)
@@ -38,7 +43,3 @@ extern const struct imx_spi_imx_data imx51_cspi_data __initconst;
38extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst; 43extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst;
39#define imx51_add_ecspi(id, pdata) \ 44#define imx51_add_ecspi(id, pdata) \
40 imx_add_spi_imx(&imx51_ecspi_data[id], pdata) 45 imx_add_spi_imx(&imx51_ecspi_data[id], pdata)
41
42extern const struct imx_esdhc_imx_data imx51_esdhc_data[] __initconst;
43#define imx51_add_esdhc(id, pdata) \
44 imx_add_esdhc(&imx51_esdhc_data[id], pdata)
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index a2e6e8c39d25..4e74b9907b7c 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -217,6 +217,6 @@ void __init eukrea_mbimx51_baseboard_init(void)
217 i2c_register_board_info(1, mbimx51_i2c_devices, 217 i2c_register_board_info(1, mbimx51_i2c_devices,
218 ARRAY_SIZE(mbimx51_i2c_devices)); 218 ARRAY_SIZE(mbimx51_i2c_devices));
219 219
220 imx51_add_esdhc(0, NULL); 220 imx51_add_sdhci_esdhc_imx(0, NULL);
221 imx51_add_esdhc(1, NULL); 221 imx51_add_sdhci_esdhc_imx(1, NULL);
222} 222}
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index 2b48f5190830..038d8c94f79e 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -149,7 +149,7 @@ void __init eukrea_mbimxsd51_baseboard_init(void)
149 imx51_add_imx_uart(1, NULL); 149 imx51_add_imx_uart(1, NULL);
150 imx51_add_imx_uart(2, &uart_pdata); 150 imx51_add_imx_uart(2, &uart_pdata);
151 151
152 imx51_add_esdhc(0, NULL); 152 imx51_add_sdhci_esdhc_imx(0, NULL);
153 153
154 gpio_request(GPIO_LED1, "LED1"); 154 gpio_request(GPIO_LED1, "LED1");
155 gpio_direction_output(GPIO_LED1, 1); 155 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index bc3f30db8d9a..01dff26c1007 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,33 +23,12 @@
23/* 23/*
24 * Define the MX51 memory map. 24 * Define the MX51 memory map.
25 */ 25 */
26static struct map_desc mxc_io_desc[] __initdata = { 26static struct map_desc mx51_io_desc[] __initdata = {
27 { 27 imx_map_entry(MX51, IRAM, MT_DEVICE),
28 .virtual = MX51_IRAM_BASE_ADDR_VIRT, 28 imx_map_entry(MX51, DEBUG, MT_DEVICE),
29 .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR), 29 imx_map_entry(MX51, AIPS1, MT_DEVICE),
30 .length = MX51_IRAM_SIZE, 30 imx_map_entry(MX51, SPBA0, MT_DEVICE),
31 .type = MT_DEVICE 31 imx_map_entry(MX51, AIPS2, MT_DEVICE),
32 }, {
33 .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
34 .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
35 .length = MX51_DEBUG_SIZE,
36 .type = MT_DEVICE
37 }, {
38 .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
39 .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
40 .length = MX51_AIPS1_SIZE,
41 .type = MT_DEVICE
42 }, {
43 .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
44 .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
45 .length = MX51_SPBA0_SIZE,
46 .type = MT_DEVICE
47 }, {
48 .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
49 .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
50 .length = MX51_AIPS2_SIZE,
51 .type = MT_DEVICE
52 },
53}; 32};
54 33
55/* 34/*
@@ -62,7 +41,7 @@ void __init mx51_map_io(void)
62 mxc_set_cpu_type(MXC_CPU_MX51); 41 mxc_set_cpu_type(MXC_CPU_MX51);
63 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 42 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
64 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); 43 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 44 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
66} 45}
67 46
68int imx51_register_gpios(void); 47int imx51_register_gpios(void);
diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c
index aeccfd755fee..7652c301da88 100644
--- a/arch/arm/mach-mxc91231/mm.c
+++ b/arch/arm/mach-mxc91231/mm.c
@@ -27,48 +27,15 @@
27/* 27/*
28 * This structure defines the MXC memory map. 28 * This structure defines the MXC memory map.
29 */ 29 */
30static struct map_desc mxc_io_desc[] __initdata = { 30static struct map_desc mxc91231_io_desc[] __initdata = {
31 { 31 imx_map_entry(MXC91231, L2CC, MT_DEVICE),
32 .virtual = MXC91231_L2CC_BASE_ADDR_VIRT, 32 imx_map_entry(MXC91231, X_MEMC, MT_DEVICE),
33 .pfn = __phys_to_pfn(MXC91231_L2CC_BASE_ADDR), 33 imx_map_entry(MXC91231, ROMP, MT_DEVICE),
34 .length = MXC91231_L2CC_SIZE, 34 imx_map_entry(MXC91231, AVIC, MT_DEVICE),
35 .type = MT_DEVICE, 35 imx_map_entry(MXC91231, AIPS1, MT_DEVICE),
36 }, { 36 imx_map_entry(MXC91231, SPBA0, MT_DEVICE),
37 .virtual = MXC91231_X_MEMC_BASE_ADDR_VIRT, 37 imx_map_entry(MXC91231, SPBA1, MT_DEVICE),
38 .pfn = __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR), 38 imx_map_entry(MXC91231, AIPS2, MT_DEVICE),
39 .length = MXC91231_X_MEMC_SIZE,
40 .type = MT_DEVICE,
41 }, {
42 .virtual = MXC91231_ROMP_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MXC91231_ROMP_BASE_ADDR),
44 .length = MXC91231_ROMP_SIZE,
45 .type = MT_DEVICE,
46 }, {
47 .virtual = MXC91231_AVIC_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MXC91231_AVIC_BASE_ADDR),
49 .length = MXC91231_AVIC_SIZE,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = MXC91231_AIPS1_BASE_ADDR_VIRT,
53 .pfn = __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR),
54 .length = MXC91231_AIPS1_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = MXC91231_SPBA0_BASE_ADDR_VIRT,
58 .pfn = __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR),
59 .length = MXC91231_SPBA0_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = MXC91231_SPBA1_BASE_ADDR_VIRT,
63 .pfn = __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR),
64 .length = MXC91231_SPBA1_SIZE,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = MXC91231_AIPS2_BASE_ADDR_VIRT,
68 .pfn = __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR),
69 .length = MXC91231_AIPS2_SIZE,
70 .type = MT_DEVICE,
71 },
72}; 39};
73 40
74/* 41/*
@@ -80,7 +47,7 @@ void __init mxc91231_map_io(void)
80{ 47{
81 mxc_set_cpu_type(MXC_CPU_MXC91231); 48 mxc_set_cpu_type(MXC_CPU_MXC91231);
82 49
83 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 50 iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc));
84} 51}
85 52
86int mxc91231_register_gpios(void); 53int mxc91231_register_gpios(void);
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 64e3a64520e0..a31fa161bb6d 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -21,10 +21,6 @@ config ARCH_MX2
21 21
22config ARCH_MX25 22config ARCH_MX25
23 bool "MX25-based" 23 bool "MX25-based"
24 select CPU_ARM926T
25 select ARCH_MXC_IOMUX_V3
26 select HAVE_FB_IMX
27 select ARCH_MXC_AUDMUX_V2
28 help 24 help
29 This enables support for systems based on the Freescale i.MX25 family 25 This enables support for systems based on the Freescale i.MX25 family
30 26
@@ -51,7 +47,6 @@ endchoice
51 47
52source "arch/arm/mach-imx/Kconfig" 48source "arch/arm/mach-imx/Kconfig"
53source "arch/arm/mach-mx3/Kconfig" 49source "arch/arm/mach-mx3/Kconfig"
54source "arch/arm/mach-mx25/Kconfig"
55source "arch/arm/mach-mxc91231/Kconfig" 50source "arch/arm/mach-mxc91231/Kconfig"
56source "arch/arm/mach-mx5/Kconfig" 51source "arch/arm/mach-mx5/Kconfig"
57 52
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index 0be1ac7f421b..175e3647bb27 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -209,7 +209,7 @@ static int mxc_audmux_v2_init(void)
209 audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR); 209 audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
210 } 210 }
211#endif 211#endif
212#if defined(CONFIG_ARCH_MX25) 212#if defined(CONFIG_SOC_IMX25)
213 if (cpu_is_mx25()) { 213 if (cpu_is_mx25()) {
214 audmux_clk = clk_get(NULL, "audmux"); 214 audmux_clk = clk_get(NULL, "audmux");
215 if (IS_ERR(audmux_clk)) { 215 if (IS_ERR(audmux_clk)) {
@@ -220,7 +220,7 @@ static int mxc_audmux_v2_init(void)
220 } 220 }
221 audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR); 221 audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR);
222 } 222 }
223#endif 223#endif /* if defined(CONFIG_SOC_IMX25) */
224 audmux_debugfs_init(); 224 audmux_debugfs_init();
225 225
226 return 0; 226 return 0;
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c
index 735776d84956..e9bcefe79a43 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/plat-mxc/devices.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/slab.h>
20#include <linux/init.h> 21#include <linux/init.h>
21#include <linux/err.h> 22#include <linux/err.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
@@ -36,9 +37,10 @@ int __init mxc_register_device(struct platform_device *pdev, void *data)
36 return ret; 37 return ret;
37} 38}
38 39
39struct platform_device *__init imx_add_platform_device(const char *name, int id, 40struct platform_device *__init imx_add_platform_device_dmamask(
41 const char *name, int id,
40 const struct resource *res, unsigned int num_resources, 42 const struct resource *res, unsigned int num_resources,
41 const void *data, size_t size_data) 43 const void *data, size_t size_data, u64 dmamask)
42{ 44{
43 int ret = -ENOMEM; 45 int ret = -ENOMEM;
44 struct platform_device *pdev; 46 struct platform_device *pdev;
@@ -47,6 +49,23 @@ struct platform_device *__init imx_add_platform_device(const char *name, int id,
47 if (!pdev) 49 if (!pdev)
48 goto err; 50 goto err;
49 51
52 if (dmamask) {
53 /*
54 * This memory isn't freed when the device is put,
55 * I don't have a nice idea for that though. Conceptually
56 * dma_mask in struct device should not be a pointer.
57 * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
58 */
59 pdev->dev.dma_mask =
60 kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
61 if (!pdev->dev.dma_mask)
62 /* ret is still -ENOMEM; */
63 goto err;
64
65 *pdev->dev.dma_mask = dmamask;
66 pdev->dev.coherent_dma_mask = dmamask;
67 }
68
50 if (res) { 69 if (res) {
51 ret = platform_device_add_resources(pdev, res, num_resources); 70 ret = platform_device_add_resources(pdev, res, num_resources);
52 if (ret) 71 if (ret)
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 9aa6f3ea9012..b391f4dcfcc2 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -1,29 +1,73 @@
1config IMX_HAVE_PLATFORM_ESDHC
2 bool
3
4config IMX_HAVE_PLATFORM_FEC 1config IMX_HAVE_PLATFORM_FEC
5 bool 2 bool
6 default y if ARCH_MX25 || SOC_IMX27 || ARCH_MX35 || ARCH_MX51 3 default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || ARCH_MX51
7 4
8config IMX_HAVE_PLATFORM_FLEXCAN 5config IMX_HAVE_PLATFORM_FLEXCAN
9 select HAVE_CAN_FLEXCAN if CAN 6 select HAVE_CAN_FLEXCAN if CAN
10 bool 7 bool
11 8
9config IMX_HAVE_PLATFORM_FSL_USB2_UDC
10 bool
11
12config IMX_HAVE_PLATFORM_GPIO_KEYS 12config IMX_HAVE_PLATFORM_GPIO_KEYS
13 bool 13 bool
14 default y if ARCH_MX51 14 default y if ARCH_MX51
15
16config IMX_HAVE_PLATFORM_IMX21_HCD
17 bool
15 18
19config IMX_HAVE_PLATFORM_IMX2_WDT
20 bool
21
22config IMX_HAVE_PLATFORM_IMXDI_RTC
23 bool
24
25config IMX_HAVE_PLATFORM_IMX_FB
26 bool
27 select HAVE_FB_IMX
28
16config IMX_HAVE_PLATFORM_IMX_I2C 29config IMX_HAVE_PLATFORM_IMX_I2C
17 bool 30 bool
18 31
32config IMX_HAVE_PLATFORM_IMX_KEYPAD
33 bool
34
19config IMX_HAVE_PLATFORM_IMX_SSI 35config IMX_HAVE_PLATFORM_IMX_SSI
20 bool 36 bool
21 37
22config IMX_HAVE_PLATFORM_IMX_UART 38config IMX_HAVE_PLATFORM_IMX_UART
23 bool 39 bool
24 40
41config IMX_HAVE_PLATFORM_IMX_UDC
42 bool
43
44config IMX_HAVE_PLATFORM_MX1_CAMERA
45 bool
46
47config IMX_HAVE_PLATFORM_MX2_CAMERA
48 bool
49
50config IMX_HAVE_PLATFORM_MXC_EHCI
51 bool
52
53config IMX_HAVE_PLATFORM_MXC_MMC
54 bool
55
25config IMX_HAVE_PLATFORM_MXC_NAND 56config IMX_HAVE_PLATFORM_MXC_NAND
26 bool 57 bool
27 58
59config IMX_HAVE_PLATFORM_MXC_PWM
60 bool
61
62config IMX_HAVE_PLATFORM_MXC_RNGA
63 bool
64 select ARCH_HAS_RNGA
65
66config IMX_HAVE_PLATFORM_MXC_W1
67 bool
68
69config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
70 bool
71
28config IMX_HAVE_PLATFORM_SPI_IMX 72config IMX_HAVE_PLATFORM_SPI_IMX
29 bool 73 bool
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index 45aefeb283ba..75cd2ece9053 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -1,10 +1,24 @@
1obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o
2obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o 1obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
3obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o 2obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
3obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
4obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o 4obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o
5obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o
6obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o
7obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o
5obj-y += platform-imx-dma.o 8obj-y += platform-imx-dma.o
9obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o
6obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o 10obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
11obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_KEYPAD) += platform-imx-keypad.o
7obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o 12obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
8obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o 13obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
14obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o
15obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o
16obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o
17obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI) += platform-mxc-ehci.o
18obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o
9obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o 19obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o
20obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_PWM) += platform-mxc_pwm.o
21obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RNGA) += platform-mxc_rnga.o
22obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
23obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
10obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o 24obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
diff --git a/arch/arm/plat-mxc/devices/platform-esdhc.c b/arch/arm/plat-mxc/devices/platform-esdhc.c
deleted file mode 100644
index 2605bfa0dfb0..000000000000
--- a/arch/arm/plat-mxc/devices/platform-esdhc.c
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix, Wolfram Sang <w.sang@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11#include <mach/esdhc.h>
12
13#define imx_esdhc_imx_data_entry_single(soc, _id, hwid) \
14 { \
15 .id = _id, \
16 .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
17 .irq = soc ## _INT_ESDHC ## hwid, \
18 }
19
20#define imx_esdhc_imx_data_entry(soc, id, hwid) \
21 [id] = imx_esdhc_imx_data_entry_single(soc, id, hwid)
22
23#ifdef CONFIG_ARCH_MX25
24const struct imx_esdhc_imx_data imx25_esdhc_data[] __initconst = {
25#define imx25_esdhc_data_entry(_id, _hwid) \
26 imx_esdhc_imx_data_entry(MX25, _id, _hwid)
27 imx25_esdhc_data_entry(0, 1),
28 imx25_esdhc_data_entry(1, 2),
29};
30#endif /* ifdef CONFIG_ARCH_MX25 */
31
32#ifdef CONFIG_ARCH_MX35
33const struct imx_esdhc_imx_data imx35_esdhc_data[] __initconst = {
34#define imx35_esdhc_data_entry(_id, _hwid) \
35 imx_esdhc_imx_data_entry(MX35, _id, _hwid)
36 imx35_esdhc_data_entry(0, 1),
37 imx35_esdhc_data_entry(1, 2),
38 imx35_esdhc_data_entry(2, 3),
39};
40#endif /* ifdef CONFIG_ARCH_MX35 */
41
42#ifdef CONFIG_ARCH_MX51
43const struct imx_esdhc_imx_data imx51_esdhc_data[] __initconst = {
44#define imx51_esdhc_data_entry(_id, _hwid) \
45 imx_esdhc_imx_data_entry(MX51, _id, _hwid)
46 imx51_esdhc_data_entry(0, 1),
47 imx51_esdhc_data_entry(1, 2),
48 imx51_esdhc_data_entry(2, 3),
49 imx51_esdhc_data_entry(3, 4),
50};
51#endif /* ifdef CONFIG_ARCH_MX51 */
52
53struct platform_device *__init imx_add_esdhc(
54 const struct imx_esdhc_imx_data *data,
55 const struct esdhc_platform_data *pdata)
56{
57 struct resource res[] = {
58 {
59 .start = data->iobase,
60 .end = data->iobase + SZ_16K - 1,
61 .flags = IORESOURCE_MEM,
62 }, {
63 .start = data->irq,
64 .end = data->irq,
65 .flags = IORESOURCE_IRQ,
66 },
67 };
68
69 return imx_add_platform_device("sdhci-esdhc-imx", data->id, res,
70 ARRAY_SIZE(res), pdata, sizeof(*pdata));
71}
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 11d087f4e219..8d78aedf8a93 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -16,17 +16,17 @@
16 .irq = soc ## _INT_FEC, \ 16 .irq = soc ## _INT_FEC, \
17 } 17 }
18 18
19#ifdef CONFIG_ARCH_MX25 19#ifdef CONFIG_SOC_IMX25
20const struct imx_fec_data imx25_fec_data __initconst = 20const struct imx_fec_data imx25_fec_data __initconst =
21 imx_fec_data_entry_single(MX25); 21 imx_fec_data_entry_single(MX25);
22#endif /* ifdef CONFIG_ARCH_MX25 */ 22#endif /* ifdef CONFIG_SOC_IMX25 */
23 23
24#ifdef CONFIG_SOC_IMX27 24#ifdef CONFIG_SOC_IMX27
25const struct imx_fec_data imx27_fec_data __initconst = 25const struct imx_fec_data imx27_fec_data __initconst =
26 imx_fec_data_entry_single(MX27); 26 imx_fec_data_entry_single(MX27);
27#endif /* ifdef CONFIG_SOC_IMX27 */ 27#endif /* ifdef CONFIG_SOC_IMX27 */
28 28
29#ifdef CONFIG_ARCH_MX35 29#ifdef CONFIG_SOC_IMX35
30const struct imx_fec_data imx35_fec_data __initconst = 30const struct imx_fec_data imx35_fec_data __initconst =
31 imx_fec_data_entry_single(MX35); 31 imx_fec_data_entry_single(MX35);
32#endif 32#endif
diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/plat-mxc/devices/platform-flexcan.c
index 5e97a01f14f3..4e8497af2eb1 100644
--- a/arch/arm/plat-mxc/devices/platform-flexcan.c
+++ b/arch/arm/plat-mxc/devices/platform-flexcan.c
@@ -5,26 +5,54 @@
5 * the terms of the GNU General Public License version 2 as published by the 5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation. 6 * Free Software Foundation.
7 */ 7 */
8 8#include <mach/hardware.h>
9#include <mach/devices-common.h> 9#include <mach/devices-common.h>
10 10
11struct platform_device *__init imx_add_flexcan(int id, 11#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
12 resource_size_t iobase, resource_size_t iosize, 12 { \
13 resource_size_t irq, 13 .id = _id, \
14 .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
15 .iosize = _size, \
16 .irq = soc ## _INT_CAN ## _hwid, \
17 }
18
19#define imx_flexcan_data_entry(soc, _id, _hwid, _size) \
20 [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size)
21
22#ifdef CONFIG_SOC_IMX25
23const struct imx_flexcan_data imx25_flexcan_data[] __initconst = {
24#define imx25_flexcan_data_entry(_id, _hwid) \
25 imx_flexcan_data_entry(MX25, _id, _hwid, SZ_16K)
26 imx25_flexcan_data_entry(0, 1),
27 imx25_flexcan_data_entry(1, 2),
28};
29#endif /* ifdef CONFIG_SOC_IMX25 */
30
31#ifdef CONFIG_SOC_IMX35
32const struct imx_flexcan_data imx35_flexcan_data[] __initconst = {
33#define imx35_flexcan_data_entry(_id, _hwid) \
34 imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K)
35 imx35_flexcan_data_entry(0, 1),
36 imx35_flexcan_data_entry(1, 2),
37};
38#endif /* ifdef CONFIG_SOC_IMX35 */
39
40struct platform_device *__init imx_add_flexcan(
41 const struct imx_flexcan_data *data,
14 const struct flexcan_platform_data *pdata) 42 const struct flexcan_platform_data *pdata)
15{ 43{
16 struct resource res[] = { 44 struct resource res[] = {
17 { 45 {
18 .start = iobase, 46 .start = data->iobase,
19 .end = iobase + iosize - 1, 47 .end = data->iobase + data->iosize - 1,
20 .flags = IORESOURCE_MEM, 48 .flags = IORESOURCE_MEM,
21 }, { 49 }, {
22 .start = irq, 50 .start = data->irq,
23 .end = irq, 51 .end = data->irq,
24 .flags = IORESOURCE_IRQ, 52 .flags = IORESOURCE_IRQ,
25 }, 53 },
26 }; 54 };
27 55
28 return imx_add_platform_device("flexcan", id, res, ARRAY_SIZE(res), 56 return imx_add_platform_device("flexcan", data->id,
29 pdata, sizeof(*pdata)); 57 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
30} 58}
diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
new file mode 100644
index 000000000000..59c33f6e401c
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_fsl_usb2_udc_data_entry_single(soc) \
13 { \
14 .iobase = soc ## _USB_OTG_BASE_ADDR, \
15 .irq = soc ## _INT_USB_OTG, \
16 }
17
18#ifdef CONFIG_SOC_IMX25
19const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
20 imx_fsl_usb2_udc_data_entry_single(MX25);
21#endif /* ifdef CONFIG_SOC_IMX25 */
22
23#ifdef CONFIG_SOC_IMX27
24const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
25 imx_fsl_usb2_udc_data_entry_single(MX27);
26#endif /* ifdef CONFIG_SOC_IMX27 */
27
28#ifdef CONFIG_SOC_IMX31
29const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
30 imx_fsl_usb2_udc_data_entry_single(MX31);
31#endif /* ifdef CONFIG_SOC_IMX31 */
32
33#ifdef CONFIG_SOC_IMX35
34const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
35 imx_fsl_usb2_udc_data_entry_single(MX35);
36#endif /* ifdef CONFIG_SOC_IMX35 */
37
38struct platform_device *__init imx_add_fsl_usb2_udc(
39 const struct imx_fsl_usb2_udc_data *data,
40 const struct fsl_usb2_platform_data *pdata)
41{
42 struct resource res[] = {
43 {
44 .start = data->iobase,
45 .end = data->iobase + SZ_512 - 1,
46 .flags = IORESOURCE_MEM,
47 }, {
48 .start = data->irq,
49 .end = data->irq,
50 .flags = IORESOURCE_IRQ,
51 },
52 };
53 return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
54 res, ARRAY_SIZE(res),
55 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
56}
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
index 02d989018059..10f41ccf4146 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c
@@ -39,20 +39,20 @@ struct imx_imx_sdma_data {
39 }, \ 39 }, \
40 } 40 }
41 41
42#ifdef CONFIG_ARCH_MX25 42#ifdef CONFIG_SOC_IMX25
43const struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = 43const struct imx_imx_sdma_data imx25_imx_sdma_data __initconst =
44 imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); 44 imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0);
45#endif /* ifdef CONFIG_ARCH_MX25 */ 45#endif /* ifdef CONFIG_SOC_IMX25 */
46 46
47#ifdef CONFIG_ARCH_MX31 47#ifdef CONFIG_SOC_IMX31
48struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = 48struct imx_imx_sdma_data imx31_imx_sdma_data __initdata =
49 imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); 49 imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0);
50#endif /* ifdef CONFIG_ARCH_MX31 */ 50#endif /* ifdef CONFIG_SOC_IMX31 */
51 51
52#ifdef CONFIG_ARCH_MX35 52#ifdef CONFIG_SOC_IMX35
53struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = 53struct imx_imx_sdma_data imx35_imx_sdma_data __initdata =
54 imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); 54 imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0);
55#endif /* ifdef CONFIG_ARCH_MX35 */ 55#endif /* ifdef CONFIG_SOC_IMX35 */
56 56
57#ifdef CONFIG_ARCH_MX51 57#ifdef CONFIG_ARCH_MX51
58const struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = 58const struct imx_imx_sdma_data imx51_imx_sdma_data __initconst =
@@ -94,20 +94,20 @@ static int __init imxXX_add_imx_dma(void)
94 else 94 else
95#endif 95#endif
96 96
97#if defined(CONFIG_ARCH_MX25) 97#if defined(CONFIG_SOC_IMX25)
98 if (cpu_is_mx25()) 98 if (cpu_is_mx25())
99 ret = imx_add_imx_sdma(&imx25_imx_sdma_data); 99 ret = imx_add_imx_sdma(&imx25_imx_sdma_data);
100 else 100 else
101#endif 101#endif
102 102
103#if defined(CONFIG_ARCH_MX31) 103#if defined(CONFIG_SOC_IMX31)
104 if (cpu_is_mx31()) { 104 if (cpu_is_mx31()) {
105 imx31_imx_sdma_data.pdata.to_version = mx31_revision() >> 4; 105 imx31_imx_sdma_data.pdata.to_version = mx31_revision() >> 4;
106 ret = imx_add_imx_sdma(&imx31_imx_sdma_data); 106 ret = imx_add_imx_sdma(&imx31_imx_sdma_data);
107 } else 107 } else
108#endif 108#endif
109 109
110#if defined(CONFIG_ARCH_MX35) 110#if defined(CONFIG_SOC_IMX35)
111 if (cpu_is_mx35()) { 111 if (cpu_is_mx35()) {
112 imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4; 112 imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4;
113 ret = imx_add_imx_sdma(&imx35_imx_sdma_data); 113 ret = imx_add_imx_sdma(&imx35_imx_sdma_data);
diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/plat-mxc/devices/platform-imx-fb.c
new file mode 100644
index 000000000000..6100a7d824dd
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-fb.c
@@ -0,0 +1,52 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_imx_fb_data_entry_single(soc, _size) \
13 { \
14 .iobase = soc ## _LCDC_BASE_ADDR, \
15 .iosize = _size, \
16 .irq = soc ## _INT_LCDC, \
17 }
18
19#ifdef CONFIG_SOC_IMX21
20const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
21 imx_imx_fb_data_entry_single(MX21, SZ_4K);
22#endif /* ifdef CONFIG_SOC_IMX21 */
23
24#ifdef CONFIG_SOC_IMX25
25const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
26 imx_imx_fb_data_entry_single(MX25, SZ_16K);
27#endif /* ifdef CONFIG_SOC_IMX25 */
28
29#ifdef CONFIG_SOC_IMX27
30const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
31 imx_imx_fb_data_entry_single(MX27, SZ_4K);
32#endif /* ifdef CONFIG_SOC_IMX27 */
33
34struct platform_device *__init imx_add_imx_fb(
35 const struct imx_imx_fb_data *data,
36 const struct imx_fb_platform_data *pdata)
37{
38 struct resource res[] = {
39 {
40 .start = data->iobase,
41 .end = data->iobase + data->iosize - 1,
42 .flags = IORESOURCE_MEM,
43 }, {
44 .start = data->irq,
45 .end = data->irq,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49 return imx_add_platform_device_dmamask("imx-fb", 0,
50 res, ARRAY_SIZE(res),
51 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
52}
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
index 679588453aad..075bd8e337f8 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
@@ -30,7 +30,7 @@ const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
30 imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); 30 imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
31#endif /* ifdef CONFIG_SOC_IMX21 */ 31#endif /* ifdef CONFIG_SOC_IMX21 */
32 32
33#ifdef CONFIG_ARCH_MX25 33#ifdef CONFIG_SOC_IMX25
34const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { 34const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
35#define imx25_imx_i2c_data_entry(_id, _hwid) \ 35#define imx25_imx_i2c_data_entry(_id, _hwid) \
36 imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) 36 imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
@@ -38,7 +38,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
38 imx25_imx_i2c_data_entry(1, 2), 38 imx25_imx_i2c_data_entry(1, 2),
39 imx25_imx_i2c_data_entry(2, 3), 39 imx25_imx_i2c_data_entry(2, 3),
40}; 40};
41#endif /* ifdef CONFIG_ARCH_MX25 */ 41#endif /* ifdef CONFIG_SOC_IMX25 */
42 42
43#ifdef CONFIG_SOC_IMX27 43#ifdef CONFIG_SOC_IMX27
44const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { 44const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
@@ -49,7 +49,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
49}; 49};
50#endif /* ifdef CONFIG_SOC_IMX27 */ 50#endif /* ifdef CONFIG_SOC_IMX27 */
51 51
52#ifdef CONFIG_ARCH_MX31 52#ifdef CONFIG_SOC_IMX31
53const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { 53const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
54#define imx31_imx_i2c_data_entry(_id, _hwid) \ 54#define imx31_imx_i2c_data_entry(_id, _hwid) \
55 imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) 55 imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
@@ -57,9 +57,9 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
57 imx31_imx_i2c_data_entry(1, 2), 57 imx31_imx_i2c_data_entry(1, 2),
58 imx31_imx_i2c_data_entry(2, 3), 58 imx31_imx_i2c_data_entry(2, 3),
59}; 59};
60#endif /* ifdef CONFIG_ARCH_MX31 */ 60#endif /* ifdef CONFIG_SOC_IMX31 */
61 61
62#ifdef CONFIG_ARCH_MX35 62#ifdef CONFIG_SOC_IMX35
63const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { 63const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
64#define imx35_imx_i2c_data_entry(_id, _hwid) \ 64#define imx35_imx_i2c_data_entry(_id, _hwid) \
65 imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) 65 imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
@@ -67,7 +67,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
67 imx35_imx_i2c_data_entry(1, 2), 67 imx35_imx_i2c_data_entry(1, 2),
68 imx35_imx_i2c_data_entry(2, 3), 68 imx35_imx_i2c_data_entry(2, 3),
69}; 69};
70#endif /* ifdef CONFIG_ARCH_MX35 */ 70#endif /* ifdef CONFIG_SOC_IMX35 */
71 71
72#ifdef CONFIG_ARCH_MX51 72#ifdef CONFIG_ARCH_MX51
73const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { 73const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c
new file mode 100644
index 000000000000..40238f0b8643
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c
@@ -0,0 +1,62 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_imx_keypad_data_entry_single(soc, _size) \
13 { \
14 .iobase = soc ## _KPP_BASE_ADDR, \
15 .iosize = _size, \
16 .irq = soc ## _INT_KPP, \
17 }
18
19#ifdef CONFIG_SOC_IMX21
20const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst =
21 imx_imx_keypad_data_entry_single(MX21, SZ_16);
22#endif /* ifdef CONFIG_SOC_IMX21 */
23
24#ifdef CONFIG_SOC_IMX25
25const struct imx_imx_keypad_data imx25_imx_keypad_data __initconst =
26 imx_imx_keypad_data_entry_single(MX25, SZ_16K);
27#endif /* ifdef CONFIG_SOC_IMX25 */
28
29#ifdef CONFIG_SOC_IMX27
30const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst =
31 imx_imx_keypad_data_entry_single(MX27, SZ_16);
32#endif /* ifdef CONFIG_SOC_IMX27 */
33
34#ifdef CONFIG_SOC_IMX31
35const struct imx_imx_keypad_data imx31_imx_keypad_data __initconst =
36 imx_imx_keypad_data_entry_single(MX31, SZ_16);
37#endif /* ifdef CONFIG_SOC_IMX31 */
38
39#ifdef CONFIG_SOC_IMX35
40const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst =
41 imx_imx_keypad_data_entry_single(MX35, SZ_16);
42#endif /* ifdef CONFIG_SOC_IMX35 */
43
44struct platform_device *__init imx_add_imx_keypad(
45 const struct imx_imx_keypad_data *data,
46 const struct matrix_keymap_data *pdata)
47{
48 struct resource res[] = {
49 {
50 .start = data->iobase,
51 .end = data->iobase + data->iosize - 1,
52 .flags = IORESOURCE_MEM,
53 }, {
54 .start = data->irq,
55 .end = data->irq,
56 .flags = IORESOURCE_IRQ,
57 },
58 };
59
60 return imx_add_platform_device("imx-keypad", -1,
61 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
62}
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c
index 38a7a0b8f2f1..02002fc9ea24 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c
@@ -30,14 +30,14 @@ const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = {
30}; 30};
31#endif /* ifdef CONFIG_SOC_IMX21 */ 31#endif /* ifdef CONFIG_SOC_IMX21 */
32 32
33#ifdef CONFIG_ARCH_MX25 33#ifdef CONFIG_SOC_IMX25
34const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst = { 34const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst = {
35#define imx25_imx_ssi_data_entry(_id, _hwid) \ 35#define imx25_imx_ssi_data_entry(_id, _hwid) \
36 imx_imx_ssi_data_entry(MX25, _id, _hwid, SZ_4K) 36 imx_imx_ssi_data_entry(MX25, _id, _hwid, SZ_4K)
37 imx25_imx_ssi_data_entry(0, 1), 37 imx25_imx_ssi_data_entry(0, 1),
38 imx25_imx_ssi_data_entry(1, 2), 38 imx25_imx_ssi_data_entry(1, 2),
39}; 39};
40#endif /* ifdef CONFIG_ARCH_MX25 */ 40#endif /* ifdef CONFIG_SOC_IMX25 */
41 41
42#ifdef CONFIG_SOC_IMX27 42#ifdef CONFIG_SOC_IMX27
43const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = { 43const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = {
@@ -48,23 +48,23 @@ const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = {
48}; 48};
49#endif /* ifdef CONFIG_SOC_IMX27 */ 49#endif /* ifdef CONFIG_SOC_IMX27 */
50 50
51#ifdef CONFIG_ARCH_MX31 51#ifdef CONFIG_SOC_IMX31
52const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = { 52const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = {
53#define imx31_imx_ssi_data_entry(_id, _hwid) \ 53#define imx31_imx_ssi_data_entry(_id, _hwid) \
54 imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K) 54 imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K)
55 imx31_imx_ssi_data_entry(0, 1), 55 imx31_imx_ssi_data_entry(0, 1),
56 imx31_imx_ssi_data_entry(1, 2), 56 imx31_imx_ssi_data_entry(1, 2),
57}; 57};
58#endif /* ifdef CONFIG_ARCH_MX31 */ 58#endif /* ifdef CONFIG_SOC_IMX31 */
59 59
60#ifdef CONFIG_ARCH_MX35 60#ifdef CONFIG_SOC_IMX35
61const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { 61const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = {
62#define imx35_imx_ssi_data_entry(_id, _hwid) \ 62#define imx35_imx_ssi_data_entry(_id, _hwid) \
63 imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K) 63 imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K)
64 imx35_imx_ssi_data_entry(0, 1), 64 imx35_imx_ssi_data_entry(0, 1),
65 imx35_imx_ssi_data_entry(1, 2), 65 imx35_imx_ssi_data_entry(1, 2),
66}; 66};
67#endif /* ifdef CONFIG_ARCH_MX35 */ 67#endif /* ifdef CONFIG_SOC_IMX35 */
68 68
69#ifdef CONFIG_ARCH_MX51 69#ifdef CONFIG_ARCH_MX51
70const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { 70const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c
index 2039640adf27..08bbd65ee019 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c
@@ -47,7 +47,7 @@ const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
47}; 47};
48#endif 48#endif
49 49
50#ifdef CONFIG_ARCH_MX25 50#ifdef CONFIG_SOC_IMX25
51const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = { 51const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = {
52#define imx25_imx_uart_data_entry(_id, _hwid) \ 52#define imx25_imx_uart_data_entry(_id, _hwid) \
53 imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K) 53 imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K)
@@ -57,7 +57,7 @@ const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = {
57 imx25_imx_uart_data_entry(3, 4), 57 imx25_imx_uart_data_entry(3, 4),
58 imx25_imx_uart_data_entry(4, 5), 58 imx25_imx_uart_data_entry(4, 5),
59}; 59};
60#endif /* ifdef CONFIG_ARCH_MX25 */ 60#endif /* ifdef CONFIG_SOC_IMX25 */
61 61
62#ifdef CONFIG_SOC_IMX27 62#ifdef CONFIG_SOC_IMX27
63const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = { 63const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
@@ -72,7 +72,7 @@ const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
72}; 72};
73#endif /* ifdef CONFIG_SOC_IMX27 */ 73#endif /* ifdef CONFIG_SOC_IMX27 */
74 74
75#ifdef CONFIG_ARCH_MX31 75#ifdef CONFIG_SOC_IMX31
76const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = { 76const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
77#define imx31_imx_uart_data_entry(_id, _hwid) \ 77#define imx31_imx_uart_data_entry(_id, _hwid) \
78 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) 78 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
@@ -82,9 +82,9 @@ const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
82 imx31_imx_uart_data_entry(3, 4), 82 imx31_imx_uart_data_entry(3, 4),
83 imx31_imx_uart_data_entry(4, 5), 83 imx31_imx_uart_data_entry(4, 5),
84}; 84};
85#endif /* ifdef CONFIG_ARCH_MX31 */ 85#endif /* ifdef CONFIG_SOC_IMX31 */
86 86
87#ifdef CONFIG_ARCH_MX35 87#ifdef CONFIG_SOC_IMX35
88const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = { 88const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
89#define imx35_imx_uart_data_entry(_id, _hwid) \ 89#define imx35_imx_uart_data_entry(_id, _hwid) \
90 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K) 90 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K)
@@ -92,7 +92,7 @@ const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
92 imx35_imx_uart_data_entry(1, 2), 92 imx35_imx_uart_data_entry(1, 2),
93 imx35_imx_uart_data_entry(2, 3), 93 imx35_imx_uart_data_entry(2, 3),
94}; 94};
95#endif /* ifdef CONFIG_ARCH_MX35 */ 95#endif /* ifdef CONFIG_SOC_IMX35 */
96 96
97#ifdef CONFIG_ARCH_MX51 97#ifdef CONFIG_ARCH_MX51
98const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = { 98const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c
new file mode 100644
index 000000000000..c61bd4e63149
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/hardware.h>
11#include <mach/devices-common.h>
12
13#define imx_imx2_wdt_data_entry_single(soc, _size) \
14 { \
15 .iobase = soc ## _WDOG_BASE_ADDR, \
16 .iosize = _size, \
17 }
18
19#ifdef CONFIG_SOC_IMX21
20const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst =
21 imx_imx2_wdt_data_entry_single(MX21, SZ_4K);
22#endif /* ifdef CONFIG_SOC_IMX21 */
23
24#ifdef CONFIG_SOC_IMX25
25const struct imx_imx2_wdt_data imx25_imx2_wdt_data __initconst =
26 imx_imx2_wdt_data_entry_single(MX25, SZ_16K);
27#endif /* ifdef CONFIG_SOC_IMX25 */
28
29#ifdef CONFIG_SOC_IMX27
30const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst =
31 imx_imx2_wdt_data_entry_single(MX27, SZ_4K);
32#endif /* ifdef CONFIG_SOC_IMX27 */
33
34#ifdef CONFIG_SOC_IMX31
35const struct imx_imx2_wdt_data imx31_imx2_wdt_data __initconst =
36 imx_imx2_wdt_data_entry_single(MX31, SZ_16K);
37#endif /* ifdef CONFIG_SOC_IMX31 */
38
39#ifdef CONFIG_SOC_IMX35
40const struct imx_imx2_wdt_data imx35_imx2_wdt_data __initconst =
41 imx_imx2_wdt_data_entry_single(MX35, SZ_16K);
42#endif /* ifdef CONFIG_SOC_IMX35 */
43
44struct platform_device *__init imx_add_imx2_wdt(
45 const struct imx_imx2_wdt_data *data)
46{
47 struct resource res[] = {
48 {
49 .start = data->iobase,
50 .end = data->iobase + data->iosize - 1,
51 .flags = IORESOURCE_MEM,
52 },
53 };
54 return imx_add_platform_device("imx2-wdt", 0,
55 res, ARRAY_SIZE(res), NULL, 0);
56}
diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/plat-mxc/devices/platform-imx21-hcd.c
new file mode 100644
index 000000000000..5770a42f33bf
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx21-hcd.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_imx21_hcd_data_entry_single(soc) \
13 { \
14 .iobase = soc ## _USBOTG_BASE_ADDR, \
15 .irq = soc ## _INT_USBHOST, \
16 }
17
18#ifdef CONFIG_SOC_IMX21
19const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst =
20 imx_imx21_hcd_data_entry_single(MX21);
21#endif /* ifdef CONFIG_SOC_IMX21 */
22
23struct platform_device *__init imx_add_imx21_hcd(
24 const struct imx_imx21_hcd_data *data,
25 const struct mx21_usbh_platform_data *pdata)
26{
27 struct resource res[] = {
28 {
29 .start = data->iobase,
30 .end = data->iobase + SZ_8K - 1,
31 .flags = IORESOURCE_MEM,
32 }, {
33 .start = data->irq,
34 .end = data->irq,
35 .flags = IORESOURCE_IRQ,
36 },
37 };
38 return imx_add_platform_device_dmamask("imx21-hcd", 0,
39 res, ARRAY_SIZE(res),
40 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
41}
diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/plat-mxc/devices/platform-imx_udc.c
new file mode 100644
index 000000000000..6fd675dfce14
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx_udc.c
@@ -0,0 +1,75 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_imx_udc_data_entry_single(soc, _size) \
13 { \
14 .iobase = soc ## _USBD_BASE_ADDR, \
15 .iosize = _size, \
16 .irq0 = soc ## _INT_USBD0, \
17 .irq1 = soc ## _INT_USBD1, \
18 .irq2 = soc ## _INT_USBD2, \
19 .irq3 = soc ## _INT_USBD3, \
20 .irq4 = soc ## _INT_USBD4, \
21 .irq5 = soc ## _INT_USBD5, \
22 .irq6 = soc ## _INT_USBD6, \
23 }
24
25#define imx_imx_udc_data_entry(soc, _size) \
26 [_id] = imx_imx_udc_data_entry_single(soc, _size)
27
28#ifdef CONFIG_SOC_IMX1
29const struct imx_imx_udc_data imx1_imx_udc_data __initconst =
30 imx_imx_udc_data_entry_single(MX1, SZ_4K);
31#endif /* ifdef CONFIG_SOC_IMX1 */
32
33struct platform_device *__init imx_add_imx_udc(
34 const struct imx_imx_udc_data *data,
35 const struct imxusb_platform_data *pdata)
36{
37 struct resource res[] = {
38 {
39 .start = data->iobase,
40 .end = data->iobase + data->iosize - 1,
41 .flags = IORESOURCE_MEM,
42 }, {
43 .start = data->irq0,
44 .end = data->irq0,
45 .flags = IORESOURCE_IRQ,
46 }, {
47 .start = data->irq1,
48 .end = data->irq1,
49 .flags = IORESOURCE_IRQ,
50 }, {
51 .start = data->irq2,
52 .end = data->irq2,
53 .flags = IORESOURCE_IRQ,
54 }, {
55 .start = data->irq3,
56 .end = data->irq3,
57 .flags = IORESOURCE_IRQ,
58 }, {
59 .start = data->irq4,
60 .end = data->irq4,
61 .flags = IORESOURCE_IRQ,
62 }, {
63 .start = data->irq5,
64 .end = data->irq5,
65 .flags = IORESOURCE_IRQ,
66 }, {
67 .start = data->irq6,
68 .end = data->irq6,
69 .flags = IORESOURCE_IRQ,
70 },
71 };
72
73 return imx_add_platform_device("imx_udc", 0,
74 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
75}
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
new file mode 100644
index 000000000000..10653cc8d1fa
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/hardware.h>
11#include <mach/devices-common.h>
12
13#define imx_imxdi_rtc_data_entry_single(soc) \
14 { \
15 .iobase = soc ## _DRYICE_BASE_ADDR, \
16 .irq = soc ## _INT_DRYICE, \
17 }
18
19#ifdef CONFIG_SOC_IMX25
20const struct imx_imxdi_rtc_data imx25_imxdi_rtc_data __initconst =
21 imx_imxdi_rtc_data_entry_single(MX25);
22#endif /* ifdef CONFIG_SOC_IMX25 */
23
24struct platform_device *__init imx_add_imxdi_rtc(
25 const struct imx_imxdi_rtc_data *data)
26{
27 struct resource res[] = {
28 {
29 .start = data->iobase,
30 .end = data->iobase + SZ_16K,
31 .flags = IORESOURCE_MEM,
32 }, {
33 .start = data->irq,
34 .end = data->irq,
35 .flags = IORESOURCE_IRQ,
36 },
37 };
38
39 return imx_add_platform_device("imxdi_rtc", 0,
40 res, ARRAY_SIZE(res), NULL, 0);
41}
diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/plat-mxc/devices/platform-mx1-camera.c
new file mode 100644
index 000000000000..edcc581a30a9
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mx1-camera.c
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mx1_camera_data_entry_single(soc, _size) \
13 { \
14 .iobase = soc ## _CSI ## _BASE_ADDR, \
15 .iosize = _size, \
16 .irq = soc ## _INT_CSI, \
17 }
18
19#ifdef CONFIG_SOC_IMX1
20const struct imx_mx1_camera_data imx1_mx1_camera_data __initconst =
21 imx_mx1_camera_data_entry_single(MX1, 10);
22#endif /* ifdef CONFIG_SOC_IMX1 */
23
24struct platform_device *__init imx_add_mx1_camera(
25 const struct imx_mx1_camera_data *data,
26 const struct mx1_camera_pdata *pdata)
27{
28 struct resource res[] = {
29 {
30 .start = data->iobase,
31 .end = data->iobase + data->iosize - 1,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = data->irq,
35 .end = data->irq,
36 .flags = IORESOURCE_IRQ,
37 },
38 };
39 return imx_add_platform_device_dmamask("mx1-camera", 0,
40 res, ARRAY_SIZE(res),
41 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
42}
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/plat-mxc/devices/platform-mx2-camera.c
new file mode 100644
index 000000000000..b3f4828dc447
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mx2-camera.c
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mx2_camera_data_entry_single(soc) \
13 { \
14 .iobasecsi = soc ## _CSI_BASE_ADDR, \
15 .iosizecsi = SZ_4K, \
16 .irqcsi = soc ## _INT_CSI, \
17 }
18#define imx_mx2_camera_data_entry_single_emma(soc) \
19 { \
20 .iobasecsi = soc ## _CSI_BASE_ADDR, \
21 .iosizecsi = SZ_32, \
22 .irqcsi = soc ## _INT_CSI, \
23 .iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \
24 .iosizeemmaprp = SZ_32, \
25 .irqemmaprp = soc ## _INT_EMMAPRP, \
26 }
27
28#ifdef CONFIG_SOC_IMX25
29const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
30 imx_mx2_camera_data_entry_single(MX25);
31#endif /* ifdef CONFIG_SOC_IMX25 */
32
33#ifdef CONFIG_SOC_IMX27
34const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
35 imx_mx2_camera_data_entry_single_emma(MX27);
36#endif /* ifdef CONFIG_SOC_IMX27 */
37
38struct platform_device *__init imx_add_mx2_camera(
39 const struct imx_mx2_camera_data *data,
40 const struct mx2_camera_platform_data *pdata)
41{
42 struct resource res[] = {
43 {
44 .start = data->iobasecsi,
45 .end = data->iobasecsi + data->iosizecsi - 1,
46 .flags = IORESOURCE_MEM,
47 }, {
48 .start = data->irqcsi,
49 .end = data->irqcsi,
50 .flags = IORESOURCE_IRQ,
51 }, {
52 .start = data->iobaseemmaprp,
53 .end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = data->irqemmaprp,
57 .end = data->irqemmaprp,
58 .flags = IORESOURCE_IRQ,
59 },
60 };
61 return imx_add_platform_device_dmamask("mx2-camera", 0,
62 res, data->iobaseemmaprp ? 4 : 2,
63 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
64}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c
new file mode 100644
index 000000000000..cc488f4b6204
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c
@@ -0,0 +1,69 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
13 { \
14 .id = _id, \
15 .iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \
16 .irq = soc ## _INT_USB_ ## hs, \
17 }
18
19#ifdef CONFIG_SOC_IMX25
20const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst =
21 imx_mxc_ehci_data_entry_single(MX25, 0, OTG);
22const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst =
23 imx_mxc_ehci_data_entry_single(MX25, 1, HS);
24#endif /* ifdef CONFIG_SOC_IMX25 */
25
26#ifdef CONFIG_SOC_IMX27
27const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst =
28 imx_mxc_ehci_data_entry_single(MX27, 0, OTG);
29const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = {
30 imx_mxc_ehci_data_entry_single(MX27, 1, HS1),
31 imx_mxc_ehci_data_entry_single(MX27, 2, HS2),
32};
33#endif /* ifdef CONFIG_SOC_IMX27 */
34
35#ifdef CONFIG_SOC_IMX31
36const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst =
37 imx_mxc_ehci_data_entry_single(MX31, 0, OTG);
38const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[] __initconst = {
39 imx_mxc_ehci_data_entry_single(MX31, 1, HS1),
40 imx_mxc_ehci_data_entry_single(MX31, 2, HS2),
41};
42#endif /* ifdef CONFIG_SOC_IMX31 */
43
44#ifdef CONFIG_SOC_IMX35
45const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data __initconst =
46 imx_mxc_ehci_data_entry_single(MX35, 0, OTG);
47const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data __initconst =
48 imx_mxc_ehci_data_entry_single(MX35, 1, HS);
49#endif /* ifdef CONFIG_SOC_IMX35 */
50
51struct platform_device *__init imx_add_mxc_ehci(
52 const struct imx_mxc_ehci_data *data,
53 const struct mxc_usbh_platform_data *pdata)
54{
55 struct resource res[] = {
56 {
57 .start = data->iobase,
58 .end = data->iobase + SZ_512 - 1,
59 .flags = IORESOURCE_MEM,
60 }, {
61 .start = data->irq,
62 .end = data->irq,
63 .flags = IORESOURCE_IRQ,
64 },
65 };
66 return imx_add_platform_device_dmamask("mxc-ehci", data->id,
67 res, ARRAY_SIZE(res),
68 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
69}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
new file mode 100644
index 000000000000..90d762f6f93b
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
@@ -0,0 +1,72 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \
13 { \
14 .id = _id, \
15 .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
16 .iosize = _size, \
17 .irq = soc ## _INT_SDHC ## _hwid, \
18 .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
19 }
20#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \
21 [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
22
23#ifdef CONFIG_SOC_IMX21
24const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
25#define imx21_mxc_mmc_data_entry(_id, _hwid) \
26 imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
27 imx21_mxc_mmc_data_entry(0, 1),
28 imx21_mxc_mmc_data_entry(1, 2),
29};
30#endif /* ifdef CONFIG_SOC_IMX21 */
31
32#ifdef CONFIG_SOC_IMX27
33const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
34#define imx27_mxc_mmc_data_entry(_id, _hwid) \
35 imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
36 imx27_mxc_mmc_data_entry(0, 1),
37 imx27_mxc_mmc_data_entry(1, 2),
38};
39#endif /* ifdef CONFIG_SOC_IMX27 */
40
41#ifdef CONFIG_SOC_IMX31
42const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
43#define imx31_mxc_mmc_data_entry(_id, _hwid) \
44 imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
45 imx31_mxc_mmc_data_entry(0, 1),
46 imx31_mxc_mmc_data_entry(1, 2),
47};
48#endif /* ifdef CONFIG_SOC_IMX31 */
49
50struct platform_device *__init imx_add_mxc_mmc(
51 const struct imx_mxc_mmc_data *data,
52 const struct imxmmc_platform_data *pdata)
53{
54 struct resource res[] = {
55 {
56 .start = data->iobase,
57 .end = data->iobase + SZ_4K - 1,
58 .flags = IORESOURCE_MEM,
59 }, {
60 .start = data->irq,
61 .end = data->irq,
62 .flags = IORESOURCE_IRQ,
63 }, {
64 .start = data->dmareq,
65 .end = data->dmareq,
66 .flags = IORESOURCE_DMA,
67 },
68 };
69 return imx_add_platform_device_dmamask("mxc-mmc", data->id,
70 res, ARRAY_SIZE(res),
71 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
72}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
index 3fdcc32e3d67..f5beac0cdde7 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
@@ -31,22 +31,22 @@ const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
31 imx_mxc_nand_data_entry_single(MX21, SZ_4K); 31 imx_mxc_nand_data_entry_single(MX21, SZ_4K);
32#endif /* ifdef CONFIG_SOC_IMX21 */ 32#endif /* ifdef CONFIG_SOC_IMX21 */
33 33
34#ifdef CONFIG_ARCH_MX25 34#ifdef CONFIG_SOC_IMX25
35const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = 35const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
36 imx_mxc_nand_data_entry_single(MX25, SZ_8K); 36 imx_mxc_nand_data_entry_single(MX25, SZ_8K);
37#endif /* ifdef CONFIG_ARCH_MX25 */ 37#endif /* ifdef CONFIG_SOC_IMX25 */
38 38
39#ifdef CONFIG_SOC_IMX27 39#ifdef CONFIG_SOC_IMX27
40const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = 40const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
41 imx_mxc_nand_data_entry_single(MX27, SZ_4K); 41 imx_mxc_nand_data_entry_single(MX27, SZ_4K);
42#endif /* ifdef CONFIG_SOC_IMX27 */ 42#endif /* ifdef CONFIG_SOC_IMX27 */
43 43
44#ifdef CONFIG_ARCH_MX31 44#ifdef CONFIG_SOC_IMX31
45const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = 45const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
46 imx_mxc_nand_data_entry_single(MX31, SZ_4K); 46 imx_mxc_nand_data_entry_single(MX31, SZ_4K);
47#endif 47#endif
48 48
49#ifdef CONFIG_ARCH_MX35 49#ifdef CONFIG_SOC_IMX35
50const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = 50const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
51 imx_mxc_nand_data_entry_single(MX35, SZ_8K); 51 imx_mxc_nand_data_entry_single(MX35, SZ_8K);
52#endif 52#endif
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
new file mode 100644
index 000000000000..3d8ebdba38ee
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
@@ -0,0 +1,60 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \
13 { \
14 .id = _id, \
15 .iobase = soc ## _PWM ## _hwid ## _BASE_ADDR, \
16 .iosize = _size, \
17 .irq = soc ## _INT_PWM ## _hwid, \
18 }
19#define imx_mxc_pwm_data_entry(soc, _id, _hwid, _size) \
20 [_id] = imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size)
21
22#ifdef CONFIG_SOC_IMX21
23const struct imx_mxc_pwm_data imx21_mxc_pwm_data __initconst =
24 imx_mxc_pwm_data_entry_single(MX21, 0, , SZ_4K);
25#endif /* ifdef CONFIG_SOC_IMX21 */
26
27#ifdef CONFIG_SOC_IMX25
28const struct imx_mxc_pwm_data imx25_mxc_pwm_data[] __initconst = {
29#define imx25_mxc_pwm_data_entry(_id, _hwid) \
30 imx_mxc_pwm_data_entry(MX25, _id, _hwid, SZ_16K)
31 imx25_mxc_pwm_data_entry(0, 1),
32 imx25_mxc_pwm_data_entry(1, 2),
33 imx25_mxc_pwm_data_entry(2, 3),
34 imx25_mxc_pwm_data_entry(3, 4),
35};
36#endif /* ifdef CONFIG_SOC_IMX25 */
37
38#ifdef CONFIG_SOC_IMX27
39const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst =
40 imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K);
41#endif /* ifdef CONFIG_SOC_IMX27 */
42
43struct platform_device *__init imx_add_mxc_pwm(
44 const struct imx_mxc_pwm_data *data)
45{
46 struct resource res[] = {
47 {
48 .start = data->iobase,
49 .end = data->iobase + data->iosize - 1,
50 .flags = IORESOURCE_MEM,
51 }, {
52 .start = data->irq,
53 .end = data->irq,
54 .flags = IORESOURCE_IRQ,
55 },
56 };
57
58 return imx_add_platform_device("mxc_pwm", data->id,
59 res, ARRAY_SIZE(res), NULL, 0);
60}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/plat-mxc/devices/platform-mxc_rnga.c
new file mode 100644
index 000000000000..b4b7612b6e17
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc_rnga.c
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12struct imx_mxc_rnga_data {
13 resource_size_t iobase;
14};
15
16#define imx_mxc_rnga_data_entry_single(soc) \
17 { \
18 .iobase = soc ## _RNGA_BASE_ADDR, \
19 }
20
21#ifdef CONFIG_SOC_IMX31
22static const struct imx_mxc_rnga_data imx31_mxc_rnga_data __initconst =
23 imx_mxc_rnga_data_entry_single(MX31);
24#endif /* ifdef CONFIG_SOC_IMX31 */
25
26static struct platform_device *__init imx_add_mxc_rnga(
27 const struct imx_mxc_rnga_data *data)
28{
29 struct resource res[] = {
30 {
31 .start = data->iobase,
32 .end = data->iobase + SZ_16K - 1,
33 .flags = IORESOURCE_MEM,
34 },
35 };
36 return imx_add_platform_device("mxc_rnga", -1,
37 res, ARRAY_SIZE(res), NULL, 0);
38}
39
40static int __init imxXX_add_mxc_rnga(void)
41{
42 struct platform_device *ret;
43
44#if defined(CONFIG_SOC_IMX31)
45 if (cpu_is_mx31())
46 ret = imx_add_mxc_rnga(&imx31_mxc_rnga_data);
47 else
48#endif /* if defined(CONFIG_SOC_IMX31) */
49 ret = ERR_PTR(-ENODEV);
50
51 if (IS_ERR(ret))
52 return PTR_ERR(ret);
53
54 return 0;
55}
56arch_initcall(imxXX_add_mxc_rnga);
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/plat-mxc/devices/platform-mxc_w1.c
new file mode 100644
index 000000000000..96fa5ea91fe8
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc_w1.c
@@ -0,0 +1,50 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_mxc_w1_data_entry_single(soc) \
13 { \
14 .iobase = soc ## _OWIRE_BASE_ADDR, \
15 }
16
17#ifdef CONFIG_SOC_IMX21
18const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst =
19 imx_mxc_w1_data_entry_single(MX21);
20#endif /* ifdef CONFIG_SOC_IMX21 */
21
22#ifdef CONFIG_SOC_IMX27
23const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst =
24 imx_mxc_w1_data_entry_single(MX27);
25#endif /* ifdef CONFIG_SOC_IMX27 */
26
27#ifdef CONFIG_SOC_IMX31
28const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst =
29 imx_mxc_w1_data_entry_single(MX31);
30#endif /* ifdef CONFIG_SOC_IMX31 */
31
32#ifdef CONFIG_SOC_IMX35
33const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst =
34 imx_mxc_w1_data_entry_single(MX35);
35#endif /* ifdef CONFIG_SOC_IMX35 */
36
37struct platform_device *__init imx_add_mxc_w1(
38 const struct imx_mxc_w1_data *data)
39{
40 struct resource res[] = {
41 {
42 .start = data->iobase,
43 .end = data->iobase + SZ_4K - 1,
44 .flags = IORESOURCE_MEM,
45 },
46 };
47
48 return imx_add_platform_device("mxc_w1", 0,
49 res, ARRAY_SIZE(res), NULL, 0);
50}
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
new file mode 100644
index 000000000000..167cce89e7c7
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
@@ -0,0 +1,74 @@
1/*
2 * Copyright (C) 2010 Pengutronix, Wolfram Sang <w.sang@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8
9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11#include <mach/esdhc.h>
12
13#define imx_sdhci_esdhc_imx_data_entry_single(soc, _id, hwid) \
14 { \
15 .id = _id, \
16 .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
17 .irq = soc ## _INT_ESDHC ## hwid, \
18 }
19
20#define imx_sdhci_esdhc_imx_data_entry(soc, id, hwid) \
21 [id] = imx_sdhci_esdhc_imx_data_entry_single(soc, id, hwid)
22
23#ifdef CONFIG_SOC_IMX25
24const struct imx_sdhci_esdhc_imx_data
25imx25_sdhci_esdhc_imx_data[] __initconst = {
26#define imx25_sdhci_esdhc_imx_data_entry(_id, _hwid) \
27 imx_sdhci_esdhc_imx_data_entry(MX25, _id, _hwid)
28 imx25_sdhci_esdhc_imx_data_entry(0, 1),
29 imx25_sdhci_esdhc_imx_data_entry(1, 2),
30};
31#endif /* ifdef CONFIG_SOC_IMX25 */
32
33#ifdef CONFIG_SOC_IMX35
34const struct imx_sdhci_esdhc_imx_data
35imx35_sdhci_esdhc_imx_data[] __initconst = {
36#define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \
37 imx_sdhci_esdhc_imx_data_entry(MX35, _id, _hwid)
38 imx35_sdhci_esdhc_imx_data_entry(0, 1),
39 imx35_sdhci_esdhc_imx_data_entry(1, 2),
40 imx35_sdhci_esdhc_imx_data_entry(2, 3),
41};
42#endif /* ifdef CONFIG_SOC_IMX35 */
43
44#ifdef CONFIG_ARCH_MX51
45const struct imx_sdhci_esdhc_imx_data
46imx51_sdhci_esdhc_imx_data[] __initconst = {
47#define imx51_sdhci_esdhc_imx_data_entry(_id, _hwid) \
48 imx_sdhci_esdhc_imx_data_entry(MX51, _id, _hwid)
49 imx51_sdhci_esdhc_imx_data_entry(0, 1),
50 imx51_sdhci_esdhc_imx_data_entry(1, 2),
51 imx51_sdhci_esdhc_imx_data_entry(2, 3),
52 imx51_sdhci_esdhc_imx_data_entry(3, 4),
53};
54#endif /* ifdef CONFIG_ARCH_MX51 */
55
56struct platform_device *__init imx_add_sdhci_esdhc_imx(
57 const struct imx_sdhci_esdhc_imx_data *data,
58 const struct esdhc_platform_data *pdata)
59{
60 struct resource res[] = {
61 {
62 .start = data->iobase,
63 .end = data->iobase + SZ_16K - 1,
64 .flags = IORESOURCE_MEM,
65 }, {
66 .start = data->irq,
67 .end = data->irq,
68 .flags = IORESOURCE_IRQ,
69 },
70 };
71
72 return imx_add_platform_device("sdhci-esdhc-imx", data->id, res,
73 ARRAY_SIZE(res), pdata, sizeof(*pdata));
74}
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c
index e48340ec331e..8f2b60a6396e 100644
--- a/arch/arm/plat-mxc/devices/platform-spi_imx.c
+++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c
@@ -29,7 +29,7 @@ const struct imx_spi_imx_data imx21_cspi_data[] __initconst = {
29 imx21_cspi_data_entry(1, 2), 29 imx21_cspi_data_entry(1, 2),
30#endif 30#endif
31 31
32#ifdef CONFIG_ARCH_MX25 32#ifdef CONFIG_SOC_IMX25
33const struct imx_spi_imx_data imx25_cspi_data[] __initconst = { 33const struct imx_spi_imx_data imx25_cspi_data[] __initconst = {
34#define imx25_cspi_data_entry(_id, _hwid) \ 34#define imx25_cspi_data_entry(_id, _hwid) \
35 imx_spi_imx_data_entry(MX25, CSPI, "imx25-cspi", _id, _hwid, SZ_16K) 35 imx_spi_imx_data_entry(MX25, CSPI, "imx25-cspi", _id, _hwid, SZ_16K)
@@ -37,7 +37,7 @@ const struct imx_spi_imx_data imx25_cspi_data[] __initconst = {
37 imx25_cspi_data_entry(1, 2), 37 imx25_cspi_data_entry(1, 2),
38 imx25_cspi_data_entry(2, 3), 38 imx25_cspi_data_entry(2, 3),
39}; 39};
40#endif /* ifdef CONFIG_ARCH_MX25 */ 40#endif /* ifdef CONFIG_SOC_IMX25 */
41 41
42#ifdef CONFIG_SOC_IMX27 42#ifdef CONFIG_SOC_IMX27
43const struct imx_spi_imx_data imx27_cspi_data[] __initconst = { 43const struct imx_spi_imx_data imx27_cspi_data[] __initconst = {
@@ -49,7 +49,7 @@ const struct imx_spi_imx_data imx27_cspi_data[] __initconst = {
49}; 49};
50#endif /* ifdef CONFIG_SOC_IMX27 */ 50#endif /* ifdef CONFIG_SOC_IMX27 */
51 51
52#ifdef CONFIG_ARCH_MX31 52#ifdef CONFIG_SOC_IMX31
53const struct imx_spi_imx_data imx31_cspi_data[] __initconst = { 53const struct imx_spi_imx_data imx31_cspi_data[] __initconst = {
54#define imx31_cspi_data_entry(_id, _hwid) \ 54#define imx31_cspi_data_entry(_id, _hwid) \
55 imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K) 55 imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K)
@@ -57,16 +57,16 @@ const struct imx_spi_imx_data imx31_cspi_data[] __initconst = {
57 imx31_cspi_data_entry(1, 2), 57 imx31_cspi_data_entry(1, 2),
58 imx31_cspi_data_entry(2, 3), 58 imx31_cspi_data_entry(2, 3),
59}; 59};
60#endif /* ifdef CONFIG_ARCH_MX31 */ 60#endif /* ifdef CONFIG_SOC_IMX31 */
61 61
62#ifdef CONFIG_ARCH_MX35 62#ifdef CONFIG_SOC_IMX35
63const struct imx_spi_imx_data imx35_cspi_data[] __initconst = { 63const struct imx_spi_imx_data imx35_cspi_data[] __initconst = {
64#define imx35_cspi_data_entry(_id, _hwid) \ 64#define imx35_cspi_data_entry(_id, _hwid) \
65 imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K) 65 imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)
66 imx35_cspi_data_entry(0, 1), 66 imx35_cspi_data_entry(0, 1),
67 imx35_cspi_data_entry(1, 2), 67 imx35_cspi_data_entry(1, 2),
68}; 68};
69#endif /* ifdef CONFIG_ARCH_MX35 */ 69#endif /* ifdef CONFIG_SOC_IMX35 */
70 70
71#ifdef CONFIG_ARCH_MX51 71#ifdef CONFIG_ARCH_MX51
72const struct imx_spi_imx_data imx51_cspi_data __initconst = 72const struct imx_spi_imx_data imx51_cspi_data __initconst =
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 9915607683de..4bac3d5545d3 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -69,9 +69,9 @@
69int mxc_initialize_usb_hw(int port, unsigned int flags) 69int mxc_initialize_usb_hw(int port, unsigned int flags)
70{ 70{
71 unsigned int v; 71 unsigned int v;
72#if defined(CONFIG_ARCH_MX25) 72#if defined(CONFIG_SOC_IMX25)
73 if (cpu_is_mx25()) { 73 if (cpu_is_mx25()) {
74 v = readl(MX25_IO_ADDRESS(MX25_OTG_BASE_ADDR + 74 v = readl(MX25_IO_ADDRESS(MX25_USB_BASE_ADDR +
75 USBCTRL_OTGBASE_OFFSET)); 75 USBCTRL_OTGBASE_OFFSET));
76 76
77 switch (port) { 77 switch (port) {
@@ -108,11 +108,11 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
108 return -EINVAL; 108 return -EINVAL;
109 } 109 }
110 110
111 writel(v, MX25_IO_ADDRESS(MX25_OTG_BASE_ADDR + 111 writel(v, MX25_IO_ADDRESS(MX25_USB_BASE_ADDR +
112 USBCTRL_OTGBASE_OFFSET)); 112 USBCTRL_OTGBASE_OFFSET));
113 return 0; 113 return 0;
114 } 114 }
115#endif /* CONFIG_ARCH_MX25 */ 115#endif /* if defined(CONFIG_SOC_IMX25) */
116#if defined(CONFIG_ARCH_MX3) 116#if defined(CONFIG_ARCH_MX3)
117 if (cpu_is_mx31()) { 117 if (cpu_is_mx31()) {
118 v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR + 118 v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 9c3e36232b5b..93a8d93dcc2e 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -175,7 +175,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
175static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) 175static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
176{ 176{
177 u32 irq_stat; 177 u32 irq_stat;
178 struct mxc_gpio_port *port = (struct mxc_gpio_port *)get_irq_data(irq); 178 struct mxc_gpio_port *port = get_irq_data(irq);
179 179
180 irq_stat = __raw_readl(port->base + GPIO_ISR) & 180 irq_stat = __raw_readl(port->base + GPIO_ISR) &
181 __raw_readl(port->base + GPIO_IMR); 181 __raw_readl(port->base + GPIO_IMR);
@@ -188,7 +188,7 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
188{ 188{
189 int i; 189 int i;
190 u32 irq_msk, irq_stat; 190 u32 irq_msk, irq_stat;
191 struct mxc_gpio_port *port = (struct mxc_gpio_port *)get_irq_data(irq); 191 struct mxc_gpio_port *port = get_irq_data(irq);
192 192
193 /* walk through all interrupt status registers */ 193 /* walk through all interrupt status registers */
194 for (i = 0; i < gpio_table_size; i++) { 194 for (i = 0; i < gpio_table_size; i++) {
@@ -349,3 +349,96 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
349 349
350 return 0; 350 return 0;
351} 351}
352
353#define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \
354 { \
355 .chip.label = "gpio-" #_id, \
356 .irq = _irq, \
357 .base = soc ## _IO_ADDRESS( \
358 soc ## _GPIO ## _hwid ## _BASE_ADDR), \
359 .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \
360 }
361
362#define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \
363 DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0)
364
365#define DEFINE_REGISTER_FUNCTION(prefix) \
366int __init prefix ## _register_gpios(void) \
367{ \
368 return mxc_gpio_init(prefix ## _gpio_ports, \
369 ARRAY_SIZE(prefix ## _gpio_ports)); \
370}
371
372#if defined(CONFIG_SOC_IMX1)
373static struct mxc_gpio_port imx1_gpio_ports[] = {
374 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA),
375 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB),
376 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC),
377 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD),
378};
379
380DEFINE_REGISTER_FUNCTION(imx1)
381
382#endif /* if defined(CONFIG_SOC_IMX1) */
383
384#if defined(CONFIG_SOC_IMX21)
385static struct mxc_gpio_port imx21_gpio_ports[] = {
386 DEFINE_IMX_GPIO_PORT_IRQ(MX21, 0, 1, MX21_INT_GPIO),
387 DEFINE_IMX_GPIO_PORT(MX21, 1, 2),
388 DEFINE_IMX_GPIO_PORT(MX21, 2, 3),
389 DEFINE_IMX_GPIO_PORT(MX21, 3, 4),
390 DEFINE_IMX_GPIO_PORT(MX21, 4, 5),
391 DEFINE_IMX_GPIO_PORT(MX21, 5, 6),
392};
393
394DEFINE_REGISTER_FUNCTION(imx21)
395
396#endif /* if defined(CONFIG_SOC_IMX21) */
397
398#if defined(CONFIG_SOC_IMX25)
399static struct mxc_gpio_port imx25_gpio_ports[] = {
400 DEFINE_IMX_GPIO_PORT_IRQ(MX25, 0, 1, MX25_INT_GPIO1),
401 DEFINE_IMX_GPIO_PORT_IRQ(MX25, 1, 2, MX25_INT_GPIO2),
402 DEFINE_IMX_GPIO_PORT_IRQ(MX25, 2, 3, MX25_INT_GPIO3),
403 DEFINE_IMX_GPIO_PORT_IRQ(MX25, 3, 4, MX25_INT_GPIO4),
404};
405
406DEFINE_REGISTER_FUNCTION(imx25)
407
408#endif /* if defined(CONFIG_SOC_IMX25) */
409
410#if defined(CONFIG_SOC_IMX27)
411static struct mxc_gpio_port imx27_gpio_ports[] = {
412 DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO),
413 DEFINE_IMX_GPIO_PORT(MX27, 1, 2),
414 DEFINE_IMX_GPIO_PORT(MX27, 2, 3),
415 DEFINE_IMX_GPIO_PORT(MX27, 3, 4),
416 DEFINE_IMX_GPIO_PORT(MX27, 4, 5),
417 DEFINE_IMX_GPIO_PORT(MX27, 5, 6),
418};
419
420DEFINE_REGISTER_FUNCTION(imx27)
421
422#endif /* if defined(CONFIG_SOC_IMX27) */
423
424#if defined(CONFIG_SOC_IMX31)
425static struct mxc_gpio_port imx31_gpio_ports[] = {
426 DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1),
427 DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2),
428 DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3),
429};
430
431DEFINE_REGISTER_FUNCTION(imx31)
432
433#endif /* if defined(CONFIG_SOC_IMX31) */
434
435#if defined(CONFIG_SOC_IMX35)
436static struct mxc_gpio_port imx35_gpio_ports[] = {
437 DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1),
438 DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2),
439 DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3),
440};
441
442DEFINE_REGISTER_FUNCTION(imx35)
443
444#endif /* if defined(CONFIG_SOC_IMX35) */
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index d56213fb901b..3b3a37c25c56 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,58 +10,49 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 */ 12 */
13#define IMX_NEEDS_DEPRECATED_SYMBOLS 13#include <mach/hardware.h>
14 14
15#ifdef CONFIG_ARCH_MX1 15#ifdef CONFIG_ARCH_MX1
16#include <mach/mx1.h> 16#define UART_PADDR MX1_UART1_BASE_ADDR
17#define UART_PADDR UART1_BASE_ADDR
18#define UART_VADDR IO_ADDRESS(UART1_BASE_ADDR)
19#endif 17#endif
20 18
21#ifdef CONFIG_ARCH_MX25 19#ifdef CONFIG_ARCH_MX25
22#ifdef UART_PADDR 20#ifdef UART_PADDR
23#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 21#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
24#endif 22#endif
25#include <mach/mx25.h>
26#define UART_PADDR MX25_UART1_BASE_ADDR 23#define UART_PADDR MX25_UART1_BASE_ADDR
27#define UART_VADDR MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR)
28#endif 24#endif
29 25
30#ifdef CONFIG_ARCH_MX2 26#ifdef CONFIG_ARCH_MX2
31#ifdef UART_PADDR 27#ifdef UART_PADDR
32#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 28#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
33#endif 29#endif
34#include <mach/mx2x.h> 30#define UART_PADDR MX2x_UART1_BASE_ADDR
35#define UART_PADDR UART1_BASE_ADDR
36#define UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
37#endif 31#endif
38 32
39#ifdef CONFIG_ARCH_MX3 33#ifdef CONFIG_ARCH_MX3
40#ifdef UART_PADDR 34#ifdef UART_PADDR
41#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 35#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
42#endif 36#endif
43#include <mach/mx3x.h> 37#define UART_PADDR MX3x_UART1_BASE_ADDR
44#define UART_PADDR UART1_BASE_ADDR
45#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
46#endif 38#endif
47 39
48#ifdef CONFIG_ARCH_MX5 40#ifdef CONFIG_ARCH_MX5
49#ifdef UART_PADDR 41#ifdef UART_PADDR
50#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 42#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
51#endif 43#endif
52#include <mach/mx51.h>
53#define UART_PADDR MX51_UART1_BASE_ADDR 44#define UART_PADDR MX51_UART1_BASE_ADDR
54#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
55#endif 45#endif
56 46
57#ifdef CONFIG_ARCH_MXC91231 47#ifdef CONFIG_ARCH_MXC91231
58#ifdef UART_PADDR 48#ifdef UART_PADDR
59#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 49#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
60#endif 50#endif
61#include <mach/mxc91231.h>
62#define UART_PADDR MXC91231_UART2_BASE_ADDR 51#define UART_PADDR MXC91231_UART2_BASE_ADDR
63#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
64#endif 52#endif
53
54#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
55
65 .macro addruart, rp, rv 56 .macro addruart, rp, rv
66 ldr \rp, =UART_PADDR @ physical 57 ldr \rp, =UART_PADDR @ physical
67 ldr \rv, =UART_VADDR @ virtual 58 ldr \rv, =UART_VADDR @ virtual
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 8c6896fd1e5f..3640eaf88c02 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -10,9 +10,19 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/init.h> 11#include <linux/init.h>
12 12
13struct platform_device *imx_add_platform_device(const char *name, int id, 13struct platform_device *imx_add_platform_device_dmamask(
14 const char *name, int id,
14 const struct resource *res, unsigned int num_resources, 15 const struct resource *res, unsigned int num_resources,
15 const void *data, size_t size_data); 16 const void *data, size_t size_data, u64 dmamask);
17
18static inline struct platform_device *imx_add_platform_device(
19 const char *name, int id,
20 const struct resource *res, unsigned int num_resources,
21 const void *data, size_t size_data)
22{
23 return imx_add_platform_device_dmamask(
24 name, id, res, num_resources, data, size_data, 0);
25}
16 26
17#include <linux/fec.h> 27#include <linux/fec.h>
18struct imx_fec_data { 28struct imx_fec_data {
@@ -24,15 +34,62 @@ struct platform_device *__init imx_add_fec(
24 const struct fec_platform_data *pdata); 34 const struct fec_platform_data *pdata);
25 35
26#include <linux/can/platform/flexcan.h> 36#include <linux/can/platform/flexcan.h>
27struct platform_device *__init imx_add_flexcan(int id, 37struct imx_flexcan_data {
28 resource_size_t iobase, resource_size_t iosize, 38 int id;
29 resource_size_t irq, 39 resource_size_t iobase;
40 resource_size_t iosize;
41 resource_size_t irq;
42};
43struct platform_device *__init imx_add_flexcan(
44 const struct imx_flexcan_data *data,
30 const struct flexcan_platform_data *pdata); 45 const struct flexcan_platform_data *pdata);
31 46
47#include <linux/fsl_devices.h>
48struct imx_fsl_usb2_udc_data {
49 resource_size_t iobase;
50 resource_size_t irq;
51};
52struct platform_device *__init imx_add_fsl_usb2_udc(
53 const struct imx_fsl_usb2_udc_data *data,
54 const struct fsl_usb2_platform_data *pdata);
55
32#include <linux/gpio_keys.h> 56#include <linux/gpio_keys.h>
33struct platform_device *__init imx_add_gpio_keys( 57struct platform_device *__init imx_add_gpio_keys(
34 const struct gpio_keys_platform_data *pdata); 58 const struct gpio_keys_platform_data *pdata);
35 59
60#include <mach/mx21-usbhost.h>
61struct imx_imx21_hcd_data {
62 resource_size_t iobase;
63 resource_size_t irq;
64};
65struct platform_device *__init imx_add_imx21_hcd(
66 const struct imx_imx21_hcd_data *data,
67 const struct mx21_usbh_platform_data *pdata);
68
69struct imx_imx2_wdt_data {
70 resource_size_t iobase;
71 resource_size_t iosize;
72};
73struct platform_device *__init imx_add_imx2_wdt(
74 const struct imx_imx2_wdt_data *data);
75
76struct imx_imxdi_rtc_data {
77 resource_size_t iobase;
78 resource_size_t irq;
79};
80struct platform_device *__init imx_add_imxdi_rtc(
81 const struct imx_imxdi_rtc_data *data);
82
83#include <mach/imxfb.h>
84struct imx_imx_fb_data {
85 resource_size_t iobase;
86 resource_size_t iosize;
87 resource_size_t irq;
88};
89struct platform_device *__init imx_add_imx_fb(
90 const struct imx_imx_fb_data *data,
91 const struct imx_fb_platform_data *pdata);
92
36#include <mach/i2c.h> 93#include <mach/i2c.h>
37struct imx_imx_i2c_data { 94struct imx_imx_i2c_data {
38 int id; 95 int id;
@@ -44,6 +101,16 @@ struct platform_device *__init imx_add_imx_i2c(
44 const struct imx_imx_i2c_data *data, 101 const struct imx_imx_i2c_data *data,
45 const struct imxi2c_platform_data *pdata); 102 const struct imxi2c_platform_data *pdata);
46 103
104#include <linux/input/matrix_keypad.h>
105struct imx_imx_keypad_data {
106 resource_size_t iobase;
107 resource_size_t iosize;
108 resource_size_t irq;
109};
110struct platform_device *__init imx_add_imx_keypad(
111 const struct imx_imx_keypad_data *data,
112 const struct matrix_keymap_data *pdata);
113
47#include <mach/ssi.h> 114#include <mach/ssi.h>
48struct imx_imx_ssi_data { 115struct imx_imx_ssi_data {
49 int id; 116 int id;
@@ -82,6 +149,67 @@ struct platform_device *__init imx_add_imx_uart_1irq(
82 const struct imx_imx_uart_1irq_data *data, 149 const struct imx_imx_uart_1irq_data *data,
83 const struct imxuart_platform_data *pdata); 150 const struct imxuart_platform_data *pdata);
84 151
152#include <mach/usb.h>
153struct imx_imx_udc_data {
154 resource_size_t iobase;
155 resource_size_t iosize;
156 resource_size_t irq0;
157 resource_size_t irq1;
158 resource_size_t irq2;
159 resource_size_t irq3;
160 resource_size_t irq4;
161 resource_size_t irq5;
162 resource_size_t irq6;
163};
164struct platform_device *__init imx_add_imx_udc(
165 const struct imx_imx_udc_data *data,
166 const struct imxusb_platform_data *pdata);
167
168#include <mach/mx1_camera.h>
169struct imx_mx1_camera_data {
170 resource_size_t iobase;
171 resource_size_t iosize;
172 resource_size_t irq;
173};
174struct platform_device *__init imx_add_mx1_camera(
175 const struct imx_mx1_camera_data *data,
176 const struct mx1_camera_pdata *pdata);
177
178#include <mach/mx2_cam.h>
179struct imx_mx2_camera_data {
180 resource_size_t iobasecsi;
181 resource_size_t iosizecsi;
182 resource_size_t irqcsi;
183 resource_size_t iobaseemmaprp;
184 resource_size_t iosizeemmaprp;
185 resource_size_t irqemmaprp;
186};
187struct platform_device *__init imx_add_mx2_camera(
188 const struct imx_mx2_camera_data *data,
189 const struct mx2_camera_platform_data *pdata);
190
191#include <mach/mxc_ehci.h>
192struct imx_mxc_ehci_data {
193 int id;
194 resource_size_t iobase;
195 resource_size_t irq;
196};
197struct platform_device *__init imx_add_mxc_ehci(
198 const struct imx_mxc_ehci_data *data,
199 const struct mxc_usbh_platform_data *pdata);
200
201#include <mach/mmc.h>
202struct imx_mxc_mmc_data {
203 int id;
204 resource_size_t iobase;
205 resource_size_t iosize;
206 resource_size_t irq;
207 resource_size_t dmareq;
208};
209struct platform_device *__init imx_add_mxc_mmc(
210 const struct imx_mxc_mmc_data *data,
211 const struct imxmmc_platform_data *pdata);
212
85#include <mach/mxc_nand.h> 213#include <mach/mxc_nand.h>
86struct imx_mxc_nand_data { 214struct imx_mxc_nand_data {
87 /* 215 /*
@@ -99,24 +227,39 @@ struct platform_device *__init imx_add_mxc_nand(
99 const struct imx_mxc_nand_data *data, 227 const struct imx_mxc_nand_data *data,
100 const struct mxc_nand_platform_data *pdata); 228 const struct mxc_nand_platform_data *pdata);
101 229
102#include <mach/spi.h> 230struct imx_mxc_pwm_data {
103struct imx_spi_imx_data {
104 const char *devid;
105 int id; 231 int id;
106 resource_size_t iobase; 232 resource_size_t iobase;
107 resource_size_t iosize; 233 resource_size_t iosize;
108 int irq; 234 resource_size_t irq;
109}; 235};
110struct platform_device *__init imx_add_spi_imx( 236struct platform_device *__init imx_add_mxc_pwm(
111 const struct imx_spi_imx_data *data, 237 const struct imx_mxc_pwm_data *data);
112 const struct spi_imx_master *pdata); 238
239struct imx_mxc_w1_data {
240 resource_size_t iobase;
241};
242struct platform_device *__init imx_add_mxc_w1(
243 const struct imx_mxc_w1_data *data);
113 244
114#include <mach/esdhc.h> 245#include <mach/esdhc.h>
115struct imx_esdhc_imx_data { 246struct imx_sdhci_esdhc_imx_data {
116 int id; 247 int id;
117 resource_size_t iobase; 248 resource_size_t iobase;
118 resource_size_t irq; 249 resource_size_t irq;
119}; 250};
120struct platform_device *__init imx_add_esdhc( 251struct platform_device *__init imx_add_sdhci_esdhc_imx(
121 const struct imx_esdhc_imx_data *data, 252 const struct imx_sdhci_esdhc_imx_data *data,
122 const struct esdhc_platform_data *pdata); 253 const struct esdhc_platform_data *pdata);
254
255#include <mach/spi.h>
256struct imx_spi_imx_data {
257 const char *devid;
258 int id;
259 resource_size_t iobase;
260 resource_size_t iosize;
261 int irq;
262};
263struct platform_device *__init imx_add_spi_imx(
264 const struct imx_spi_imx_data *data,
265 const struct spi_imx_master *pdata);
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index ebadf4ac43fc..dde777c10176 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,10 +22,82 @@
22 22
23#include <asm/sizes.h> 23#include <asm/sizes.h>
24 24
25#define IMX_IO_ADDRESS(addr, module) \ 25#ifdef __ASSEMBLER__
26 ((void __force __iomem *) \ 26#define IOMEM(addr) (addr)
27 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\ 27#else
28 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)) 28#define IOMEM(addr) ((void __force __iomem *)(addr))
29#endif
30
31#define IMX_IO_P2V_MODULE(addr, module) \
32 (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
33 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
34
35/*
36 * This is rather complicated for humans and ugly to verify, but for a machine
37 * it's OK. Still more as it is usually only applied to constants. The upsides
38 * on using this approach are:
39 *
40 * - same mapping on all i.MX machines
41 * - works for assembler, too
42 * - no need to nurture #defines for virtual addresses
43 *
44 * The downside it, it's hard to verify (but I have a script for that).
45 *
46 * Obviously this needs to be injective for each SoC. In general it maps the
47 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
48 * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
49 *
50 * It applies the following mappings for the different SoCs:
51 *
52 * mx1:
53 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
54 * mx21:
55 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
56 * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000
57 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
58 * mx25:
59 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
60 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
61 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
62 * mx27:
63 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
64 * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000
65 * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000
66 * mx31:
67 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
68 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
69 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
70 * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
71 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
72 * mx35:
73 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
74 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
75 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
76 * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
77 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
78 * mx51:
79 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
80 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
81 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
82 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
83 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000
84 * mxc91231:
85 * L2CC 0x30000000+0x010000 -> 0xf4400000+0x010000
86 * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
87 * ROMP 0x60000000+0x010000 -> 0xf5000000+0x010000
88 * AVIC 0x68000000+0x010000 -> 0xf5800000+0x010000
89 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
90 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
91 * SPBA1 0x52000000+0x100000 -> 0xf5600000+0x100000
92 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
93 */
94#define IMX_IO_P2V(x) ( \
95 0xf4000000 + \
96 (((x) & 0x50000000) >> 6) + \
97 (((x) & 0x0b000000) >> 4) + \
98 (((x) & 0x000fffff)))
99
100#define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x))
29 101
30#ifdef CONFIG_ARCH_MX5 102#ifdef CONFIG_ARCH_MX5
31#include <mach/mx51.h> 103#include <mach/mx51.h>
@@ -61,4 +133,11 @@
61 133
62#include <mach/mxc.h> 134#include <mach/mxc.h>
63 135
136#define imx_map_entry(soc, name, _type) { \
137 .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
138 .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \
139 .length = soc ## _ ## name ## _SIZE, \
140 .type = _type, \
141}
142
64#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ 143#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/imxfb.h b/arch/arm/plat-mxc/include/mach/imxfb.h
index 5263506b7ddf..9de8f062ad5d 100644
--- a/arch/arm/plat-mxc/include/mach/imxfb.h
+++ b/arch/arm/plat-mxc/include/mach/imxfb.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * This structure describes the machine which we are running on. 2 * This structure describes the machine which we are running on.
3 */ 3 */
4#ifndef __MACH_IMXFB_H__
5#define __MACH_IMXFB_H__
4 6
5#include <linux/fb.h> 7#include <linux/fb.h>
6 8
@@ -79,3 +81,4 @@ struct imx_fb_platform_data {
79}; 81};
80 82
81void set_imx_fb_info(struct imx_fb_platform_data *); 83void set_imx_fb_info(struct imx_fb_platform_data *);
84#endif /* ifndef __MACH_IMXFB_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 641b24618239..75d96214b831 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -19,7 +19,6 @@
19 */ 19 */
20#define MX1_IO_BASE_ADDR 0x00200000 20#define MX1_IO_BASE_ADDR 0x00200000
21#define MX1_IO_SIZE SZ_1M 21#define MX1_IO_SIZE SZ_1M
22#define MX1_IO_BASE_ADDR_VIRT VMALLOC_END
23 22
24#define MX1_CS0_PHYS 0x10000000 23#define MX1_CS0_PHYS 0x10000000
25#define MX1_CS0_SIZE 0x02000000 24#define MX1_CS0_SIZE 0x02000000
@@ -66,6 +65,10 @@
66#define MX1_CCM_BASE_ADDR (0x1B000 + MX1_IO_BASE_ADDR) 65#define MX1_CCM_BASE_ADDR (0x1B000 + MX1_IO_BASE_ADDR)
67#define MX1_SCM_BASE_ADDR (0x1B804 + MX1_IO_BASE_ADDR) 66#define MX1_SCM_BASE_ADDR (0x1B804 + MX1_IO_BASE_ADDR)
68#define MX1_GPIO_BASE_ADDR (0x1C000 + MX1_IO_BASE_ADDR) 67#define MX1_GPIO_BASE_ADDR (0x1C000 + MX1_IO_BASE_ADDR)
68#define MX1_GPIO1_BASE_ADDR (0x1C000 + MX1_IO_BASE_ADDR)
69#define MX1_GPIO2_BASE_ADDR (0x1C100 + MX1_IO_BASE_ADDR)
70#define MX1_GPIO3_BASE_ADDR (0x1C200 + MX1_IO_BASE_ADDR)
71#define MX1_GPIO4_BASE_ADDR (0x1C300 + MX1_IO_BASE_ADDR)
69#define MX1_EIM_BASE_ADDR (0x20000 + MX1_IO_BASE_ADDR) 72#define MX1_EIM_BASE_ADDR (0x20000 + MX1_IO_BASE_ADDR)
70#define MX1_SDRAMC_BASE_ADDR (0x21000 + MX1_IO_BASE_ADDR) 73#define MX1_SDRAMC_BASE_ADDR (0x21000 + MX1_IO_BASE_ADDR)
71#define MX1_MMA_BASE_ADDR (0x22000 + MX1_IO_BASE_ADDR) 74#define MX1_MMA_BASE_ADDR (0x22000 + MX1_IO_BASE_ADDR)
@@ -73,12 +76,12 @@
73#define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR) 76#define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR)
74 77
75/* macro to get at IO space when running virtually */ 78/* macro to get at IO space when running virtually */
76#define MX1_IO_ADDRESS(x) ( \ 79#define MX1_IO_P2V(x) IMX_IO_P2V(x)
77 IMX_IO_ADDRESS(x, MX1_IO)) 80#define MX1_IO_ADDRESS(x) IOMEM(MX1_IO_P2V(x))
78 81
79/* fixed interrput numbers */ 82/* fixed interrput numbers */
80#define MX1_INT_SOFTINT 0 83#define MX1_INT_SOFTINT 0
81#define MX1_CSI_INT 6 84#define MX1_INT_CSI 6
82#define MX1_DSPA_MAC_INT 7 85#define MX1_DSPA_MAC_INT 7
83#define MX1_DSPA_INT 8 86#define MX1_DSPA_INT 8
84#define MX1_COMP_INT 9 87#define MX1_COMP_INT 9
@@ -115,13 +118,13 @@
115#define MX1_SSI_RX_INT 44 118#define MX1_SSI_RX_INT 44
116#define MX1_SSI_RX_ERR_INT 45 119#define MX1_SSI_RX_ERR_INT 45
117#define MX1_TOUCH_INT 46 120#define MX1_TOUCH_INT 46
118#define MX1_USBD_INT0 47 121#define MX1_INT_USBD0 47
119#define MX1_USBD_INT1 48 122#define MX1_INT_USBD1 48
120#define MX1_USBD_INT2 49 123#define MX1_INT_USBD2 49
121#define MX1_USBD_INT3 50 124#define MX1_INT_USBD3 50
122#define MX1_USBD_INT4 51 125#define MX1_INT_USBD4 51
123#define MX1_USBD_INT5 52 126#define MX1_INT_USBD5 52
124#define MX1_USBD_INT6 53 127#define MX1_INT_USBD6 53
125#define MX1_BTSYS_INT 55 128#define MX1_BTSYS_INT 55
126#define MX1_BTTIM_INT 56 129#define MX1_BTTIM_INT 56
127#define MX1_BTWUI_INT 57 130#define MX1_BTWUI_INT 57
@@ -164,134 +167,6 @@
164 * to not break drivers/usb/gadget/imx_udc. Should go 167 * to not break drivers/usb/gadget/imx_udc. Should go
165 * away after this driver uses the new name. 168 * away after this driver uses the new name.
166 */ 169 */
167#define USBD_INT0 MX1_USBD_INT0 170#define USBD_INT0 MX1_INT_USBD0
168
169#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
170/* these should go away */
171#define IMX_IO_PHYS MX1_IO_BASE_ADDR
172#define IMX_IO_SIZE MX1_IO_SIZE
173#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT
174#define IMX_CS0_PHYS MX1_CS0_PHYS
175#define IMX_CS0_SIZE MX1_CS0_SIZE
176#define IMX_CS1_PHYS MX1_CS1_PHYS
177#define IMX_CS1_SIZE MX1_CS1_SIZE
178#define IMX_CS2_PHYS MX1_CS2_PHYS
179#define IMX_CS2_SIZE MX1_CS2_SIZE
180#define IMX_CS3_PHYS MX1_CS3_PHYS
181#define IMX_CS3_SIZE MX1_CS3_SIZE
182#define IMX_CS4_PHYS MX1_CS4_PHYS
183#define IMX_CS4_SIZE MX1_CS4_SIZE
184#define IMX_CS5_PHYS MX1_CS5_PHYS
185#define IMX_CS5_SIZE MX1_CS5_SIZE
186#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR
187#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR
188#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR
189#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR
190#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR
191#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR
192#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR
193#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR
194#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR
195#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR
196#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR
197#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR
198#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR
199#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR
200#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR
201#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR
202#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR
203#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR
204#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR
205#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR
206#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR
207#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR
208#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR
209#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR
210#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR
211#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR
212#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR
213#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
214#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
215#define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
216#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
217#define INT_SOFTINT MX1_INT_SOFTINT
218#define CSI_INT MX1_CSI_INT
219#define DSPA_MAC_INT MX1_DSPA_MAC_INT
220#define DSPA_INT MX1_DSPA_INT
221#define COMP_INT MX1_COMP_INT
222#define MSHC_XINT MX1_MSHC_XINT
223#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA
224#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB
225#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC
226#define LCDC_INT MX1_LCDC_INT
227#define SIM_INT MX1_SIM_INT
228#define SIM_DATA_INT MX1_SIM_DATA_INT
229#define RTC_INT MX1_RTC_INT
230#define RTC_SAMINT MX1_RTC_SAMINT
231#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR
232#define UART2_MINT_RTS MX1_UART2_MINT_RTS
233#define UART2_MINT_DTR MX1_UART2_MINT_DTR
234#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC
235#define UART2_MINT_TX MX1_UART2_MINT_TX
236#define UART2_MINT_RX MX1_UART2_MINT_RX
237#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR
238#define UART1_MINT_RTS MX1_UART1_MINT_RTS
239#define UART1_MINT_DTR MX1_UART1_MINT_DTR
240#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC
241#define UART1_MINT_TX MX1_UART1_MINT_TX
242#define UART1_MINT_RX MX1_UART1_MINT_RX
243#define VOICE_DAC_INT MX1_VOICE_DAC_INT
244#define VOICE_ADC_INT MX1_VOICE_ADC_INT
245#define PEN_DATA_INT MX1_PEN_DATA_INT
246#define PWM_INT MX1_PWM_INT
247#define SDHC_INT MX1_SDHC_INT
248#define I2C_INT MX1_INT_I2C
249#define CSPI_INT MX1_CSPI_INT
250#define SSI_TX_INT MX1_SSI_TX_INT
251#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
252#define SSI_RX_INT MX1_SSI_RX_INT
253#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT
254#define TOUCH_INT MX1_TOUCH_INT
255#define USBD_INT1 MX1_USBD_INT1
256#define USBD_INT2 MX1_USBD_INT2
257#define USBD_INT3 MX1_USBD_INT3
258#define USBD_INT4 MX1_USBD_INT4
259#define USBD_INT5 MX1_USBD_INT5
260#define USBD_INT6 MX1_USBD_INT6
261#define BTSYS_INT MX1_BTSYS_INT
262#define BTTIM_INT MX1_BTTIM_INT
263#define BTWUI_INT MX1_BTWUI_INT
264#define TIM2_INT MX1_TIM2_INT
265#define TIM1_INT MX1_TIM1_INT
266#define DMA_ERR MX1_DMA_ERR
267#define DMA_INT MX1_DMA_INT
268#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD
269#define WDT_INT MX1_WDT_INT
270#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T
271#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R
272#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T
273#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R
274#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT
275#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R
276#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC
277#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT
278#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN
279#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC
280#define DMA_REQ_EXT MX1_DMA_REQ_EXT
281#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC
282#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R
283#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T
284#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T
285#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R
286#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC
287#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC
288#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x)
289#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R
290#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T
291#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T
292#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R
293#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T
294#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R
295#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */
296 171
297#endif /* ifndef __MACH_MX1_H__ */ 172#endif /* ifndef __MACH_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index 8bc59720b6e4..6cd049ebbd8d 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -26,7 +26,6 @@
26#define __MACH_MX21_H__ 26#define __MACH_MX21_H__
27 27
28#define MX21_AIPI_BASE_ADDR 0x10000000 28#define MX21_AIPI_BASE_ADDR 0x10000000
29#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000
30#define MX21_AIPI_SIZE SZ_1M 29#define MX21_AIPI_SIZE SZ_1M
31#define MX21_DMA_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x01000) 30#define MX21_DMA_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x01000)
32#define MX21_WDOG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x02000) 31#define MX21_WDOG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x02000)
@@ -49,6 +48,12 @@
49#define MX21_SDHC1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x13000) 48#define MX21_SDHC1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x13000)
50#define MX21_SDHC2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x14000) 49#define MX21_SDHC2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x14000)
51#define MX21_GPIO_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x15000) 50#define MX21_GPIO_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x15000)
51#define MX21_GPIO1_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x000)
52#define MX21_GPIO2_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x100)
53#define MX21_GPIO3_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x200)
54#define MX21_GPIO4_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x300)
55#define MX21_GPIO5_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x400)
56#define MX21_GPIO6_BASE_ADDR (MX21_GPIO_BASE_ADDR + 0x500)
52#define MX21_AUDMUX_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x16000) 57#define MX21_AUDMUX_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x16000)
53#define MX21_CSPI3_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x17000) 58#define MX21_CSPI3_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x17000)
54#define MX21_LCDC_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x21000) 59#define MX21_LCDC_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x21000)
@@ -64,7 +69,6 @@
64#define MX21_AVIC_BASE_ADDR 0x10040000 69#define MX21_AVIC_BASE_ADDR 0x10040000
65 70
66#define MX21_SAHB1_BASE_ADDR 0x80000000 71#define MX21_SAHB1_BASE_ADDR 0x80000000
67#define MX21_SAHB1_BASE_ADDR_VIRT 0xf4100000
68#define MX21_SAHB1_SIZE SZ_1M 72#define MX21_SAHB1_SIZE SZ_1M
69#define MX21_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) 73#define MX21_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000)
70 74
@@ -82,7 +86,6 @@
82 86
83/* NAND, SDRAM, WEIM etc controllers */ 87/* NAND, SDRAM, WEIM etc controllers */
84#define MX21_X_MEMC_BASE_ADDR 0xdf000000 88#define MX21_X_MEMC_BASE_ADDR 0xdf000000
85#define MX21_X_MEMC_BASE_ADDR_VIRT 0xf4200000
86#define MX21_X_MEMC_SIZE SZ_256K 89#define MX21_X_MEMC_SIZE SZ_256K
87 90
88#define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000) 91#define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000)
@@ -92,10 +95,8 @@
92 95
93#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ 96#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */
94 97
95#define MX21_IO_ADDRESS(x) ( \ 98#define MX21_IO_P2V(x) IMX_IO_P2V(x)
96 IMX_IO_ADDRESS(x, MX21_AIPI) ?: \ 99#define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x))
97 IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \
98 IMX_IO_ADDRESS(x, MX21_X_MEMC))
99 100
100/* fixed interrupt numbers */ 101/* fixed interrupt numbers */
101#define MX21_INT_CSPI3 6 102#define MX21_INT_CSPI3 6
@@ -184,39 +185,4 @@
184#define MX21_DMA_REQ_CSI_STAT 30 185#define MX21_DMA_REQ_CSI_STAT 30
185#define MX21_DMA_REQ_CSI_RX 31 186#define MX21_DMA_REQ_CSI_RX 31
186 187
187#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
188/* these should go away */
189#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
190#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
191#define CS0_BASE_ADDR MX21_CS0_BASE_ADDR
192#define CS1_BASE_ADDR MX21_CS1_BASE_ADDR
193#define CS2_BASE_ADDR MX21_CS2_BASE_ADDR
194#define CS3_BASE_ADDR MX21_CS3_BASE_ADDR
195#define CS4_BASE_ADDR MX21_CS4_BASE_ADDR
196#define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR
197#define CS5_BASE_ADDR MX21_CS5_BASE_ADDR
198#define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR
199#define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT
200#define X_MEMC_SIZE MX21_X_MEMC_SIZE
201#define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR
202#define EIM_BASE_ADDR MX21_EIM_BASE_ADDR
203#define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR
204#define NFC_BASE_ADDR MX21_NFC_BASE_ADDR
205#define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR
206#define MXC_INT_FIRI MX21_INT_FIRI
207#define MXC_INT_BMI MX21_INT_BMI
208#define MXC_INT_EMMAENC MX21_INT_EMMAENC
209#define MXC_INT_EMMADEC MX21_INT_EMMADEC
210#define MXC_INT_USBWKUP MX21_INT_USBWKUP
211#define MXC_INT_USBDMA MX21_INT_USBDMA
212#define MXC_INT_USBHOST MX21_INT_USBHOST
213#define MXC_INT_USBFUNC MX21_INT_USBFUNC
214#define MXC_INT_USBMNP MX21_INT_USBMNP
215#define MXC_INT_USBCTRL MX21_INT_USBCTRL
216#define MXC_INT_USBCTRL MX21_INT_USBCTRL
217#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
218#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
219#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
220#endif
221
222#endif /* ifndef __MACH_MX21_H__ */ 188#endif /* ifndef __MACH_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index cf46a45b0d4e..024bebe4da11 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,13 +2,10 @@
2#define __MACH_MX25_H__ 2#define __MACH_MX25_H__
3 3
4#define MX25_AIPS1_BASE_ADDR 0x43f00000 4#define MX25_AIPS1_BASE_ADDR 0x43f00000
5#define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000
6#define MX25_AIPS1_SIZE SZ_1M 5#define MX25_AIPS1_SIZE SZ_1M
7#define MX25_AIPS2_BASE_ADDR 0x53f00000 6#define MX25_AIPS2_BASE_ADDR 0x53f00000
8#define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000
9#define MX25_AIPS2_SIZE SZ_1M 7#define MX25_AIPS2_SIZE SZ_1M
10#define MX25_AVIC_BASE_ADDR 0x68000000 8#define MX25_AVIC_BASE_ADDR 0x68000000
11#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
12#define MX25_AVIC_SIZE SZ_1M 9#define MX25_AVIC_SIZE SZ_1M
13 10
14#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000) 11#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
@@ -21,20 +18,15 @@
21 18
22#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) 19#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
23#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000) 20#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
21#define MX25_GPIO4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x9c000)
22#define MX25_PWM2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa0000)
23#define MX25_GPIO3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa4000)
24#define MX25_PWM3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa8000)
25#define MX25_PWM4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xc8000)
26#define MX25_GPIO1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xcc000)
27#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000)
24#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) 28#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
25 29#define MX25_PWM1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xe0000)
26#define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
27#define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
28#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
29#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
30
31#define MX25_IO_ADDRESS(x) ( \
32 IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \
33 IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
34 IMX_IO_ADDRESS(x, MX25_AVIC))
35
36#define MX25_AIPS1_IO_ADDRESS(x) \
37 (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
38 30
39#define MX25_UART1_BASE_ADDR 0x43f90000 31#define MX25_UART1_BASE_ADDR 0x43f90000
40#define MX25_UART2_BASE_ADDR 0x43f94000 32#define MX25_UART2_BASE_ADDR 0x43f94000
@@ -55,9 +47,14 @@
55#define MX25_LCDC_BASE_ADDR 0x53fbc000 47#define MX25_LCDC_BASE_ADDR 0x53fbc000
56#define MX25_KPP_BASE_ADDR 0x43fa8000 48#define MX25_KPP_BASE_ADDR 0x43fa8000
57#define MX25_SDMA_BASE_ADDR 0x53fd4000 49#define MX25_SDMA_BASE_ADDR 0x53fd4000
58#define MX25_OTG_BASE_ADDR 0x53ff4000 50#define MX25_USB_BASE_ADDR 0x53ff4000
51#define MX25_USB_OTG_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0000)
52#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0200)
59#define MX25_CSI_BASE_ADDR 0x53ff8000 53#define MX25_CSI_BASE_ADDR 0x53ff8000
60 54
55#define MX25_IO_P2V(x) IMX_IO_P2V(x)
56#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x))
57
61#define MX25_INT_CSPI3 0 58#define MX25_INT_CSPI3 0
62#define MX25_INT_I2C1 3 59#define MX25_INT_I2C1 3
63#define MX25_INT_I2C2 4 60#define MX25_INT_I2C2 4
@@ -69,18 +66,28 @@
69#define MX25_INT_SSI1 12 66#define MX25_INT_SSI1 12
70#define MX25_INT_CSPI2 13 67#define MX25_INT_CSPI2 13
71#define MX25_INT_CSPI1 14 68#define MX25_INT_CSPI1 14
69#define MX25_INT_GPIO3 16
72#define MX25_INT_CSI 17 70#define MX25_INT_CSI 17
73#define MX25_INT_UART3 18 71#define MX25_INT_UART3 18
72#define MX25_INT_GPIO4 23
74#define MX25_INT_KPP 24 73#define MX25_INT_KPP 24
75#define MX25_INT_DRYICE 25 74#define MX25_INT_DRYICE 25
75#define MX25_INT_PWM1 26
76#define MX25_INT_UART2 32 76#define MX25_INT_UART2 32
77#define MX25_INT_NFC 33 77#define MX25_INT_NFC 33
78#define MX25_INT_SDMA 34 78#define MX25_INT_SDMA 34
79#define MX25_INT_USB_HS 35
80#define MX25_INT_PWM2 36
81#define MX25_INT_USB_OTG 37
79#define MX25_INT_LCDC 39 82#define MX25_INT_LCDC 39
80#define MX25_INT_UART5 40 83#define MX25_INT_UART5 40
84#define MX25_INT_PWM3 41
85#define MX25_INT_PWM4 42
81#define MX25_INT_CAN1 43 86#define MX25_INT_CAN1 43
82#define MX25_INT_CAN2 44 87#define MX25_INT_CAN2 44
83#define MX25_INT_UART1 45 88#define MX25_INT_UART1 45
89#define MX25_INT_GPIO2 51
90#define MX25_INT_GPIO1 52
84#define MX25_INT_FEC 57 91#define MX25_INT_FEC 57
85 92
86#define MX25_DMA_REQ_SSI2_RX1 22 93#define MX25_DMA_REQ_SSI2_RX1 22
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 2237ba2e5351..eb09ec09dbe5 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -29,7 +29,6 @@
29#endif 29#endif
30 30
31#define MX27_AIPI_BASE_ADDR 0x10000000 31#define MX27_AIPI_BASE_ADDR 0x10000000
32#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000
33#define MX27_AIPI_SIZE SZ_1M 32#define MX27_AIPI_SIZE SZ_1M
34#define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000) 33#define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000)
35#define MX27_WDOG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x02000) 34#define MX27_WDOG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x02000)
@@ -52,6 +51,12 @@
52#define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000) 51#define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000)
53#define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000) 52#define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000)
54#define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000) 53#define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000)
54#define MX27_GPIO1_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x000)
55#define MX27_GPIO2_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x100)
56#define MX27_GPIO3_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x200)
57#define MX27_GPIO4_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x300)
58#define MX27_GPIO5_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x400)
59#define MX27_GPIO6_BASE_ADDR (MX27_GPIO_BASE_ADDR + 0x500)
55#define MX27_AUDMUX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x16000) 60#define MX27_AUDMUX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x16000)
56#define MX27_CSPI3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x17000) 61#define MX27_CSPI3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x17000)
57#define MX27_MSHC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x18000) 62#define MX27_MSHC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x18000)
@@ -65,11 +70,13 @@
65#define MX27_LCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x21000) 70#define MX27_LCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x21000)
66#define MX27_SLCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x22000) 71#define MX27_SLCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x22000)
67#define MX27_VPU_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x23000) 72#define MX27_VPU_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x23000)
68#define MX27_USBOTG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000) 73#define MX27_USB_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000)
69#define MX27_OTG_BASE_ADDR MX27_USBOTG_BASE_ADDR 74#define MX27_USB_OTG_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0000)
75#define MX27_USB_HS1_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0200)
76#define MX27_USB_HS2_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0400)
70#define MX27_SAHARA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x25000) 77#define MX27_SAHARA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x25000)
71#define MX27_EMMA_PP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000) 78#define MX27_EMMAPP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000)
72#define MX27_EMMA_PRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400) 79#define MX27_EMMAPRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400)
73#define MX27_CCM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27000) 80#define MX27_CCM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27000)
74#define MX27_SYSCTRL_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27800) 81#define MX27_SYSCTRL_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27800)
75#define MX27_IIM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x28000) 82#define MX27_IIM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x28000)
@@ -87,7 +94,6 @@
87#define MX27_ROMP_BASE_ADDR 0x10041000 94#define MX27_ROMP_BASE_ADDR 0x10041000
88 95
89#define MX27_SAHB1_BASE_ADDR 0x80000000 96#define MX27_SAHB1_BASE_ADDR 0x80000000
90#define MX27_SAHB1_BASE_ADDR_VIRT 0xf4100000
91#define MX27_SAHB1_SIZE SZ_1M 97#define MX27_SAHB1_SIZE SZ_1M
92#define MX27_CSI_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x0000) 98#define MX27_CSI_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x0000)
93#define MX27_ATA_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x1000) 99#define MX27_ATA_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x1000)
@@ -105,7 +111,6 @@
105 111
106/* NAND, SDRAM, WEIM, M3IF, EMI controllers */ 112/* NAND, SDRAM, WEIM, M3IF, EMI controllers */
107#define MX27_X_MEMC_BASE_ADDR 0xd8000000 113#define MX27_X_MEMC_BASE_ADDR 0xd8000000
108#define MX27_X_MEMC_BASE_ADDR_VIRT 0xf4200000
109#define MX27_X_MEMC_SIZE SZ_1M 114#define MX27_X_MEMC_SIZE SZ_1M
110#define MX27_NFC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR) 115#define MX27_NFC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR)
111#define MX27_SDRAMC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x1000) 116#define MX27_SDRAMC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x1000)
@@ -123,10 +128,8 @@
123/* IRAM */ 128/* IRAM */
124#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */ 129#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */
125 130
126#define MX27_IO_ADDRESS(x) ( \ 131#define MX27_IO_P2V(x) IMX_IO_P2V(x)
127 IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ 132#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x))
128 IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \
129 IMX_IO_ADDRESS(x, MX27_X_MEMC))
130 133
131#ifndef __ASSEMBLER__ 134#ifndef __ASSEMBLER__
132static inline void mx27_setup_weimcs(size_t cs, 135static inline void mx27_setup_weimcs(size_t cs,
@@ -192,9 +195,9 @@ static inline void mx27_setup_weimcs(size_t cs,
192#define MX27_INT_EMMAPRP 51 195#define MX27_INT_EMMAPRP 51
193#define MX27_INT_EMMAPP 52 196#define MX27_INT_EMMAPP 52
194#define MX27_INT_VPU 53 197#define MX27_INT_VPU 53
195#define MX27_INT_USB1 54 198#define MX27_INT_USB_HS1 54
196#define MX27_INT_USB2 55 199#define MX27_INT_USB_HS2 55
197#define MX27_INT_USB3 56 200#define MX27_INT_USB_OTG 56
198#define MX27_INT_SCC_SMN 57 201#define MX27_INT_SCC_SMN 57
199#define MX27_INT_SCC_SCM 58 202#define MX27_INT_SCC_SCM 58
200#define MX27_INT_SAHARA 59 203#define MX27_INT_SAHARA 59
@@ -249,74 +252,4 @@ static inline void mx27_setup_weimcs(size_t cs,
249extern int mx27_revision(void); 252extern int mx27_revision(void);
250#endif 253#endif
251 254
252#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
253/* these should go away */
254#define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR
255#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
256#define GPT4_BASE_ADDR MX27_GPT4_BASE_ADDR
257#define UART5_BASE_ADDR MX27_UART5_BASE_ADDR
258#define UART6_BASE_ADDR MX27_UART6_BASE_ADDR
259#define I2C2_BASE_ADDR MX27_I2C2_BASE_ADDR
260#define SDHC3_BASE_ADDR MX27_SDHC3_BASE_ADDR
261#define GPT6_BASE_ADDR MX27_GPT6_BASE_ADDR
262#define VPU_BASE_ADDR MX27_VPU_BASE_ADDR
263#define OTG_BASE_ADDR MX27_OTG_BASE_ADDR
264#define SAHARA_BASE_ADDR MX27_SAHARA_BASE_ADDR
265#define IIM_BASE_ADDR MX27_IIM_BASE_ADDR
266#define RTIC_BASE_ADDR MX27_RTIC_BASE_ADDR
267#define FEC_BASE_ADDR MX27_FEC_BASE_ADDR
268#define SCC_BASE_ADDR MX27_SCC_BASE_ADDR
269#define ETB_BASE_ADDR MX27_ETB_BASE_ADDR
270#define ETB_RAM_BASE_ADDR MX27_ETB_RAM_BASE_ADDR
271#define ROMP_BASE_ADDR MX27_ROMP_BASE_ADDR
272#define ATA_BASE_ADDR MX27_ATA_BASE_ADDR
273#define SDRAM_BASE_ADDR MX27_SDRAM_BASE_ADDR
274#define CSD1_BASE_ADDR MX27_CSD1_BASE_ADDR
275#define CS0_BASE_ADDR MX27_CS0_BASE_ADDR
276#define CS1_BASE_ADDR MX27_CS1_BASE_ADDR
277#define CS2_BASE_ADDR MX27_CS2_BASE_ADDR
278#define CS3_BASE_ADDR MX27_CS3_BASE_ADDR
279#define CS4_BASE_ADDR MX27_CS4_BASE_ADDR
280#define CS5_BASE_ADDR MX27_CS5_BASE_ADDR
281#define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR
282#define X_MEMC_BASE_ADDR_VIRT MX27_X_MEMC_BASE_ADDR_VIRT
283#define X_MEMC_SIZE MX27_X_MEMC_SIZE
284#define NFC_BASE_ADDR MX27_NFC_BASE_ADDR
285#define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR
286#define WEIM_BASE_ADDR MX27_WEIM_BASE_ADDR
287#define M3IF_BASE_ADDR MX27_M3IF_BASE_ADDR
288#define PCMCIA_CTL_BASE_ADDR MX27_PCMCIA_CTL_BASE_ADDR
289#define PCMCIA_MEM_BASE_ADDR MX27_PCMCIA_MEM_BASE_ADDR
290#define IRAM_BASE_ADDR MX27_IRAM_BASE_ADDR
291#define MXC_INT_I2C2 MX27_INT_I2C2
292#define MXC_INT_GPT6 MX27_INT_GPT6
293#define MXC_INT_GPT5 MX27_INT_GPT5
294#define MXC_INT_GPT4 MX27_INT_GPT4
295#define MXC_INT_RTIC MX27_INT_RTIC
296#define MXC_INT_SDHC MX27_INT_SDHC
297#define MXC_INT_SDHC3 MX27_INT_SDHC3
298#define MXC_INT_ATA MX27_INT_ATA
299#define MXC_INT_UART6 MX27_INT_UART6
300#define MXC_INT_UART5 MX27_INT_UART5
301#define MXC_INT_FEC MX27_INT_FEC
302#define MXC_INT_VPU MX27_INT_VPU
303#define MXC_INT_USB1 MX27_INT_USB1
304#define MXC_INT_USB2 MX27_INT_USB2
305#define MXC_INT_USB3 MX27_INT_USB3
306#define MXC_INT_SCC_SMN MX27_INT_SCC_SMN
307#define MXC_INT_SCC_SCM MX27_INT_SCC_SCM
308#define MXC_INT_SAHARA MX27_INT_SAHARA
309#define MXC_INT_IIM MX27_INT_IIM
310#define MXC_INT_CCM MX27_INT_CCM
311#define DMA_REQ_MSHC MX27_DMA_REQ_MSHC
312#define DMA_REQ_ATA_TX MX27_DMA_REQ_ATA_TX
313#define DMA_REQ_ATA_RCV MX27_DMA_REQ_ATA_RCV
314#define DMA_REQ_UART5_TX MX27_DMA_REQ_UART5_TX
315#define DMA_REQ_UART5_RX MX27_DMA_REQ_UART5_RX
316#define DMA_REQ_UART6_TX MX27_DMA_REQ_UART6_TX
317#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX
318#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3
319#define DMA_REQ_NFC MX27_DMA_REQ_NFC
320#endif
321
322#endif /* ifndef __MACH_MX27_H__ */ 255#endif /* ifndef __MACH_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index afb895a0b5b8..6d07839fdec2 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -27,7 +27,6 @@
27 27
28/* Register offsets */ 28/* Register offsets */
29#define MX2x_AIPI_BASE_ADDR 0x10000000 29#define MX2x_AIPI_BASE_ADDR 0x10000000
30#define MX2x_AIPI_BASE_ADDR_VIRT 0xf4000000
31#define MX2x_AIPI_SIZE SZ_1M 30#define MX2x_AIPI_SIZE SZ_1M
32#define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) 31#define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000)
33#define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) 32#define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000)
@@ -65,43 +64,9 @@
65#define MX2x_AVIC_BASE_ADDR 0x10040000 64#define MX2x_AVIC_BASE_ADDR 0x10040000
66 65
67#define MX2x_SAHB1_BASE_ADDR 0x80000000 66#define MX2x_SAHB1_BASE_ADDR 0x80000000
68#define MX2x_SAHB1_BASE_ADDR_VIRT 0xf4100000
69#define MX2x_SAHB1_SIZE SZ_1M 67#define MX2x_SAHB1_SIZE SZ_1M
70#define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) 68#define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000)
71 69
72/*
73 * This macro defines the physical to virtual address mapping for all the
74 * peripheral modules. It is used by passing in the physical address as x
75 * and returning the virtual address. If the physical address is not mapped,
76 * it returns 0xDEADBEEF
77 */
78#define IO_ADDRESS(x) \
79 (void __force __iomem *) \
80 (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \
81 AIPI_IO_ADDRESS(x) : \
82 ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \
83 SAHB1_IO_ADDRESS(x) : \
84 ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \
85 X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF)
86
87/* define the address mapping macros: in physical address order */
88#define AIPI_IO_ADDRESS(x) \
89 (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT)
90
91#define AVIC_IO_ADDRESS(x) AIPI_IO_ADDRESS(x)
92
93#define SAHB1_IO_ADDRESS(x) \
94 (((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT)
95
96#define CS4_IO_ADDRESS(x) \
97 (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT)
98
99#define X_MEMC_IO_ADDRESS(x) \
100 (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
101
102#define PCMCIA_IO_ADDRESS(x) \
103 (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
104
105/* fixed interrupt numbers */ 70/* fixed interrupt numbers */
106#define MX2x_INT_CSPI3 6 71#define MX2x_INT_CSPI3 6
107#define MX2x_INT_GPIO 8 72#define MX2x_INT_GPIO 8
@@ -176,118 +141,4 @@
176#define MX2x_DMA_REQ_CSI_STAT 30 141#define MX2x_DMA_REQ_CSI_STAT 30
177#define MX2x_DMA_REQ_CSI_RX 31 142#define MX2x_DMA_REQ_CSI_RX 31
178 143
179#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
180/* these should go away */
181#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
182#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
183#define AIPI_SIZE MX2x_AIPI_SIZE
184#define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR
185#define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR
186#define GPT1_BASE_ADDR MX2x_GPT1_BASE_ADDR
187#define GPT2_BASE_ADDR MX2x_GPT2_BASE_ADDR
188#define GPT3_BASE_ADDR MX2x_GPT3_BASE_ADDR
189#define PWM_BASE_ADDR MX2x_PWM_BASE_ADDR
190#define RTC_BASE_ADDR MX2x_RTC_BASE_ADDR
191#define KPP_BASE_ADDR MX2x_KPP_BASE_ADDR
192#define OWIRE_BASE_ADDR MX2x_OWIRE_BASE_ADDR
193#define UART1_BASE_ADDR MX2x_UART1_BASE_ADDR
194#define UART2_BASE_ADDR MX2x_UART2_BASE_ADDR
195#define UART3_BASE_ADDR MX2x_UART3_BASE_ADDR
196#define UART4_BASE_ADDR MX2x_UART4_BASE_ADDR
197#define CSPI1_BASE_ADDR MX2x_CSPI1_BASE_ADDR
198#define CSPI2_BASE_ADDR MX2x_CSPI2_BASE_ADDR
199#define SSI1_BASE_ADDR MX2x_SSI1_BASE_ADDR
200#define SSI2_BASE_ADDR MX2x_SSI2_BASE_ADDR
201#define I2C_BASE_ADDR MX2x_I2C_BASE_ADDR
202#define SDHC1_BASE_ADDR MX2x_SDHC1_BASE_ADDR
203#define SDHC2_BASE_ADDR MX2x_SDHC2_BASE_ADDR
204#define GPIO_BASE_ADDR MX2x_GPIO_BASE_ADDR
205#define AUDMUX_BASE_ADDR MX2x_AUDMUX_BASE_ADDR
206#define CSPI3_BASE_ADDR MX2x_CSPI3_BASE_ADDR
207#define LCDC_BASE_ADDR MX2x_LCDC_BASE_ADDR
208#define SLCDC_BASE_ADDR MX2x_SLCDC_BASE_ADDR
209#define USBOTG_BASE_ADDR MX2x_USBOTG_BASE_ADDR
210#define EMMA_PP_BASE_ADDR MX2x_EMMA_PP_BASE_ADDR
211#define EMMA_PRP_BASE_ADDR MX2x_EMMA_PRP_BASE_ADDR
212#define CCM_BASE_ADDR MX2x_CCM_BASE_ADDR
213#define SYSCTRL_BASE_ADDR MX2x_SYSCTRL_BASE_ADDR
214#define JAM_BASE_ADDR MX2x_JAM_BASE_ADDR
215#define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR
216#define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR
217#define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR
218#define SAHB1_BASE_ADDR_VIRT MX2x_SAHB1_BASE_ADDR_VIRT
219#define SAHB1_SIZE MX2x_SAHB1_SIZE
220#define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR
221#define MXC_INT_CSPI3 MX2x_INT_CSPI3
222#define MXC_INT_GPIO MX2x_INT_GPIO
223#define MXC_INT_SDHC2 MX2x_INT_SDHC2
224#define MXC_INT_SDHC1 MX2x_INT_SDHC1
225#define MXC_INT_I2C MX2x_INT_I2C
226#define MXC_INT_SSI2 MX2x_INT_SSI2
227#define MXC_INT_SSI1 MX2x_INT_SSI1
228#define MXC_INT_CSPI2 MX2x_INT_CSPI2
229#define MXC_INT_CSPI1 MX2x_INT_CSPI1
230#define MXC_INT_UART4 MX2x_INT_UART4
231#define MXC_INT_UART3 MX2x_INT_UART3
232#define MXC_INT_UART2 MX2x_INT_UART2
233#define MXC_INT_UART1 MX2x_INT_UART1
234#define MXC_INT_KPP MX2x_INT_KPP
235#define MXC_INT_RTC MX2x_INT_RTC
236#define MXC_INT_PWM MX2x_INT_PWM
237#define MXC_INT_GPT3 MX2x_INT_GPT3
238#define MXC_INT_GPT2 MX2x_INT_GPT2
239#define MXC_INT_GPT1 MX2x_INT_GPT1
240#define MXC_INT_WDOG MX2x_INT_WDOG
241#define MXC_INT_PCMCIA MX2x_INT_PCMCIA
242#define MXC_INT_NANDFC MX2x_INT_NANDFC
243#define MXC_INT_CSI MX2x_INT_CSI
244#define MXC_INT_DMACH0 MX2x_INT_DMACH0
245#define MXC_INT_DMACH1 MX2x_INT_DMACH1
246#define MXC_INT_DMACH2 MX2x_INT_DMACH2
247#define MXC_INT_DMACH3 MX2x_INT_DMACH3
248#define MXC_INT_DMACH4 MX2x_INT_DMACH4
249#define MXC_INT_DMACH5 MX2x_INT_DMACH5
250#define MXC_INT_DMACH6 MX2x_INT_DMACH6
251#define MXC_INT_DMACH7 MX2x_INT_DMACH7
252#define MXC_INT_DMACH8 MX2x_INT_DMACH8
253#define MXC_INT_DMACH9 MX2x_INT_DMACH9
254#define MXC_INT_DMACH10 MX2x_INT_DMACH10
255#define MXC_INT_DMACH11 MX2x_INT_DMACH11
256#define MXC_INT_DMACH12 MX2x_INT_DMACH12
257#define MXC_INT_DMACH13 MX2x_INT_DMACH13
258#define MXC_INT_DMACH14 MX2x_INT_DMACH14
259#define MXC_INT_DMACH15 MX2x_INT_DMACH15
260#define MXC_INT_EMMAPRP MX2x_INT_EMMAPRP
261#define MXC_INT_EMMAPP MX2x_INT_EMMAPP
262#define MXC_INT_SLCDC MX2x_INT_SLCDC
263#define MXC_INT_LCDC MX2x_INT_LCDC
264#define DMA_REQ_CSPI3_RX MX2x_DMA_REQ_CSPI3_RX
265#define DMA_REQ_CSPI3_TX MX2x_DMA_REQ_CSPI3_TX
266#define DMA_REQ_EXT MX2x_DMA_REQ_EXT
267#define DMA_REQ_SDHC2 MX2x_DMA_REQ_SDHC2
268#define DMA_REQ_SDHC1 MX2x_DMA_REQ_SDHC1
269#define DMA_REQ_SSI2_RX0 MX2x_DMA_REQ_SSI2_RX0
270#define DMA_REQ_SSI2_TX0 MX2x_DMA_REQ_SSI2_TX0
271#define DMA_REQ_SSI2_RX1 MX2x_DMA_REQ_SSI2_RX1
272#define DMA_REQ_SSI2_TX1 MX2x_DMA_REQ_SSI2_TX1
273#define DMA_REQ_SSI1_RX0 MX2x_DMA_REQ_SSI1_RX0
274#define DMA_REQ_SSI1_TX0 MX2x_DMA_REQ_SSI1_TX0
275#define DMA_REQ_SSI1_RX1 MX2x_DMA_REQ_SSI1_RX1
276#define DMA_REQ_SSI1_TX1 MX2x_DMA_REQ_SSI1_TX1
277#define DMA_REQ_CSPI2_RX MX2x_DMA_REQ_CSPI2_RX
278#define DMA_REQ_CSPI2_TX MX2x_DMA_REQ_CSPI2_TX
279#define DMA_REQ_CSPI1_RX MX2x_DMA_REQ_CSPI1_RX
280#define DMA_REQ_CSPI1_TX MX2x_DMA_REQ_CSPI1_TX
281#define DMA_REQ_UART4_RX MX2x_DMA_REQ_UART4_RX
282#define DMA_REQ_UART4_TX MX2x_DMA_REQ_UART4_TX
283#define DMA_REQ_UART3_RX MX2x_DMA_REQ_UART3_RX
284#define DMA_REQ_UART3_TX MX2x_DMA_REQ_UART3_TX
285#define DMA_REQ_UART2_RX MX2x_DMA_REQ_UART2_RX
286#define DMA_REQ_UART2_TX MX2x_DMA_REQ_UART2_TX
287#define DMA_REQ_UART1_RX MX2x_DMA_REQ_UART1_RX
288#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX
289#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT
290#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX
291#endif
292
293#endif /* ifndef __MACH_MX2x_H__ */ 144#endif /* ifndef __MACH_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 61cfe827498b..092323144e2b 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -15,7 +15,6 @@
15#define MX31_L2CC_SIZE SZ_1M 15#define MX31_L2CC_SIZE SZ_1M
16 16
17#define MX31_AIPS1_BASE_ADDR 0x43f00000 17#define MX31_AIPS1_BASE_ADDR 0x43f00000
18#define MX31_AIPS1_BASE_ADDR_VIRT 0xfc000000
19#define MX31_AIPS1_SIZE SZ_1M 18#define MX31_AIPS1_SIZE SZ_1M
20#define MX31_MAX_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x04000) 19#define MX31_MAX_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x04000)
21#define MX31_EVTMON_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x08000) 20#define MX31_EVTMON_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x08000)
@@ -25,7 +24,10 @@
25#define MX31_ECT_CTIO_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x18000) 24#define MX31_ECT_CTIO_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x18000)
26#define MX31_I2C1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x80000) 25#define MX31_I2C1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x80000)
27#define MX31_I2C3_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x84000) 26#define MX31_I2C3_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x84000)
28#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) 27#define MX31_USB_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000)
28#define MX31_USB_OTG_BASE_ADDR (MX31_USB_BASE_ADDR + 0x0000)
29#define MX31_USB_HS1_BASE_ADDR (MX31_USB_BASE_ADDR + 0x0200)
30#define MX31_USB_HS2_BASE_ADDR (MX31_USB_BASE_ADDR + 0x0400)
29#define MX31_ATA_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x8c000) 31#define MX31_ATA_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x8c000)
30#define MX31_UART1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x90000) 32#define MX31_UART1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x90000)
31#define MX31_UART2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x94000) 33#define MX31_UART2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x94000)
@@ -41,10 +43,9 @@
41#define MX31_ECT_IP2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xbc000) 43#define MX31_ECT_IP2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xbc000)
42 44
43#define MX31_SPBA0_BASE_ADDR 0x50000000 45#define MX31_SPBA0_BASE_ADDR 0x50000000
44#define MX31_SPBA0_BASE_ADDR_VIRT 0xfc100000
45#define MX31_SPBA0_SIZE SZ_1M 46#define MX31_SPBA0_SIZE SZ_1M
46#define MX31_MMC_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000) 47#define MX31_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000)
47#define MX31_MMC_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000) 48#define MX31_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000)
48#define MX31_UART3_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x0c000) 49#define MX31_UART3_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x0c000)
49#define MX31_CSPI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x10000) 50#define MX31_CSPI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x10000)
50#define MX31_SSI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x14000) 51#define MX31_SSI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x14000)
@@ -55,7 +56,6 @@
55#define MX31_SPBA_CTRL_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x3c000) 56#define MX31_SPBA_CTRL_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x3c000)
56 57
57#define MX31_AIPS2_BASE_ADDR 0x53f00000 58#define MX31_AIPS2_BASE_ADDR 0x53f00000
58#define MX31_AIPS2_BASE_ADDR_VIRT 0xfc200000
59#define MX31_AIPS2_SIZE SZ_1M 59#define MX31_AIPS2_SIZE SZ_1M
60#define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000) 60#define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000)
61#define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000) 61#define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000)
@@ -84,7 +84,6 @@
84#define MX31_ROMP_SIZE SZ_1M 84#define MX31_ROMP_SIZE SZ_1M
85 85
86#define MX31_AVIC_BASE_ADDR 0x68000000 86#define MX31_AVIC_BASE_ADDR 0x68000000
87#define MX31_AVIC_BASE_ADDR_VIRT 0xfc400000
88#define MX31_AVIC_SIZE SZ_1M 87#define MX31_AVIC_SIZE SZ_1M
89 88
90#define MX31_IPU_MEM_BASE_ADDR 0x70000000 89#define MX31_IPU_MEM_BASE_ADDR 0x70000000
@@ -97,15 +96,14 @@
97#define MX31_CS3_BASE_ADDR 0xb2000000 96#define MX31_CS3_BASE_ADDR 0xb2000000
98 97
99#define MX31_CS4_BASE_ADDR 0xb4000000 98#define MX31_CS4_BASE_ADDR 0xb4000000
100#define MX31_CS4_BASE_ADDR_VIRT 0xf4000000 99#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000
101#define MX31_CS4_SIZE SZ_32M 100#define MX31_CS4_SIZE SZ_32M
102 101
103#define MX31_CS5_BASE_ADDR 0xb6000000 102#define MX31_CS5_BASE_ADDR 0xb6000000
104#define MX31_CS5_BASE_ADDR_VIRT 0xf6000000 103#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000
105#define MX31_CS5_SIZE SZ_32M 104#define MX31_CS5_SIZE SZ_32M
106 105
107#define MX31_X_MEMC_BASE_ADDR 0xb8000000 106#define MX31_X_MEMC_BASE_ADDR 0xb8000000
108#define MX31_X_MEMC_BASE_ADDR_VIRT 0xfc320000
109#define MX31_X_MEMC_SIZE SZ_64K 107#define MX31_X_MEMC_SIZE SZ_64K
110#define MX31_NFC_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x0000) 108#define MX31_NFC_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x0000)
111#define MX31_ESDCTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x1000) 109#define MX31_ESDCTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x1000)
@@ -121,12 +119,8 @@
121 119
122#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 120#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000
123 121
124#define MX31_IO_ADDRESS(x) ( \ 122#define MX31_IO_P2V(x) IMX_IO_P2V(x)
125 IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \ 123#define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x))
126 IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \
127 IMX_IO_ADDRESS(x, MX31_AVIC) ?: \
128 IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \
129 IMX_IO_ADDRESS(x, MX31_SPBA0))
130 124
131#ifndef __ASSEMBLER__ 125#ifndef __ASSEMBLER__
132static inline void mx31_setup_weimcs(size_t cs, 126static inline void mx31_setup_weimcs(size_t cs,
@@ -143,8 +137,8 @@ static inline void mx31_setup_weimcs(size_t cs,
143#define MX31_INT_MPEG4_ENCODER 5 137#define MX31_INT_MPEG4_ENCODER 5
144#define MX31_INT_RTIC 6 138#define MX31_INT_RTIC 6
145#define MX31_INT_FIRI 7 139#define MX31_INT_FIRI 7
146#define MX31_INT_MMC_SDHC2 8 140#define MX31_INT_SDHC2 8
147#define MX31_INT_MMC_SDHC1 9 141#define MX31_INT_SDHC1 9
148#define MX31_INT_I2C1 10 142#define MX31_INT_I2C1 10
149#define MX31_INT_SSI2 11 143#define MX31_INT_SSI2 11
150#define MX31_INT_SSI1 12 144#define MX31_INT_SSI1 12
@@ -170,10 +164,9 @@ static inline void mx31_setup_weimcs(size_t cs,
170#define MX31_INT_UART2 32 164#define MX31_INT_UART2 32
171#define MX31_INT_NFC 33 165#define MX31_INT_NFC 33
172#define MX31_INT_SDMA 34 166#define MX31_INT_SDMA 34
173#define MX31_INT_USB1 35 167#define MX31_INT_USB_HS1 35
174#define MX31_INT_USB2 36 168#define MX31_INT_USB_HS2 36
175#define MX31_INT_USB3 37 169#define MX31_INT_USB_OTG 37
176#define MX31_INT_USB4 38
177#define MX31_INT_MSHC1 39 170#define MX31_INT_MSHC1 39
178#define MX31_INT_MSHC2 40 171#define MX31_INT_MSHC2 40
179#define MX31_INT_IPU_ERR 41 172#define MX31_INT_IPU_ERR 41
@@ -197,6 +190,8 @@ static inline void mx31_setup_weimcs(size_t cs,
197#define MX31_INT_EXT_WDOG 62 190#define MX31_INT_EXT_WDOG 62
198#define MX31_INT_EXT_TV 63 191#define MX31_INT_EXT_TV 63
199 192
193#define MX31_DMA_REQ_SDHC1 20
194#define MX31_DMA_REQ_SDHC2 21
200#define MX31_DMA_REQ_SSI2_RX1 22 195#define MX31_DMA_REQ_SSI2_RX1 22
201#define MX31_DMA_REQ_SSI2_TX1 23 196#define MX31_DMA_REQ_SSI2_TX1 23
202#define MX31_DMA_REQ_SSI2_RX0 24 197#define MX31_DMA_REQ_SSI2_RX0 24
@@ -224,36 +219,4 @@ static inline void mx31_setup_weimcs(size_t cs,
224#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 219#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0
225#define MX31_SYSTEM_REV_NUM 3 220#define MX31_SYSTEM_REV_NUM 3
226 221
227#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
228/* these should go away */
229#define ATA_BASE_ADDR MX31_ATA_BASE_ADDR
230#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
231#define UART5_BASE_ADDR MX31_UART5_BASE_ADDR
232#define MMC_SDHC1_BASE_ADDR MX31_MMC_SDHC1_BASE_ADDR
233#define MMC_SDHC2_BASE_ADDR MX31_MMC_SDHC2_BASE_ADDR
234#define SIM1_BASE_ADDR MX31_SIM1_BASE_ADDR
235#define IIM_BASE_ADDR MX31_IIM_BASE_ADDR
236#define CSPI3_BASE_ADDR MX31_CSPI3_BASE_ADDR
237#define FIRI_BASE_ADDR MX31_FIRI_BASE_ADDR
238#define SCM_BASE_ADDR MX31_SCM_BASE_ADDR
239#define SMN_BASE_ADDR MX31_SMN_BASE_ADDR
240#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR
241#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER
242#define MXC_INT_FIRI MX31_INT_FIRI
243#define MXC_INT_MBX MX31_INT_MBX
244#define MXC_INT_CSPI3 MX31_INT_CSPI3
245#define MXC_INT_SIM2 MX31_INT_SIM2
246#define MXC_INT_SIM1 MX31_INT_SIM1
247#define MXC_INT_CCM_DVFS MX31_INT_CCM_DVFS
248#define MXC_INT_USB1 MX31_INT_USB1
249#define MXC_INT_USB2 MX31_INT_USB2
250#define MXC_INT_USB3 MX31_INT_USB3
251#define MXC_INT_USB4 MX31_INT_USB4
252#define MXC_INT_MSHC2 MX31_INT_MSHC2
253#define MXC_INT_UART4 MX31_INT_UART4
254#define MXC_INT_UART5 MX31_INT_UART5
255#define MXC_INT_CCM MX31_INT_CCM
256#define MXC_INT_PCMCIA MX31_INT_PCMCIA
257#endif
258
259#endif /* ifndef __MACH_MX31_H__ */ 222#endif /* ifndef __MACH_MX31_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 6267cff6035d..0fa3f6855349 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -11,7 +11,6 @@
11#define MX35_L2CC_SIZE SZ_1M 11#define MX35_L2CC_SIZE SZ_1M
12 12
13#define MX35_AIPS1_BASE_ADDR 0x43f00000 13#define MX35_AIPS1_BASE_ADDR 0x43f00000
14#define MX35_AIPS1_BASE_ADDR_VIRT 0xfc000000
15#define MX35_AIPS1_SIZE SZ_1M 14#define MX35_AIPS1_SIZE SZ_1M
16#define MX35_MAX_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x04000) 15#define MX35_MAX_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x04000)
17#define MX35_EVTMON_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x08000) 16#define MX35_EVTMON_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x08000)
@@ -33,7 +32,6 @@
33#define MX35_ECT_IP2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xbc000) 32#define MX35_ECT_IP2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xbc000)
34 33
35#define MX35_SPBA0_BASE_ADDR 0x50000000 34#define MX35_SPBA0_BASE_ADDR 0x50000000
36#define MX35_SPBA0_BASE_ADDR_VIRT 0xfc100000
37#define MX35_SPBA0_SIZE SZ_1M 35#define MX35_SPBA0_SIZE SZ_1M
38#define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000) 36#define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000)
39#define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000) 37#define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000)
@@ -44,7 +42,6 @@
44#define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000) 42#define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000)
45 43
46#define MX35_AIPS2_BASE_ADDR 0x53f00000 44#define MX35_AIPS2_BASE_ADDR 0x53f00000
47#define MX35_AIPS2_BASE_ADDR_VIRT 0xfc200000
48#define MX35_AIPS2_SIZE SZ_1M 45#define MX35_AIPS2_SIZE SZ_1M
49#define MX35_CCM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x80000) 46#define MX35_CCM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x80000)
50#define MX35_GPT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x90000) 47#define MX35_GPT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x90000)
@@ -68,15 +65,19 @@
68#define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000) 65#define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000)
69#define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000) 66#define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000)
70#define MX35_IIM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf0000) 67#define MX35_IIM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf0000)
71 68#define MX35_USB_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf4000)
72#define MX35_OTG_BASE_ADDR 0x53ff4000 69#define MX35_USB_OTG_BASE_ADDR (MX35_USB_BASE_ADDR + 0x0000)
70/*
71 * The Reference Manual (IMX35RM, Rev. 2, 3/2009) claims an offset of 0x200 for
72 * HS. When host support was implemented only a preliminary document was
73 * available, which told 0x400. This works fine.
74 */
75#define MX35_USB_HS_BASE_ADDR (MX35_USB_BASE_ADDR + 0x0400)
73 76
74#define MX35_ROMP_BASE_ADDR 0x60000000 77#define MX35_ROMP_BASE_ADDR 0x60000000
75#define MX35_ROMP_BASE_ADDR_VIRT 0xfc500000
76#define MX35_ROMP_SIZE SZ_1M 78#define MX35_ROMP_SIZE SZ_1M
77 79
78#define MX35_AVIC_BASE_ADDR 0x68000000 80#define MX35_AVIC_BASE_ADDR 0x68000000
79#define MX35_AVIC_BASE_ADDR_VIRT 0xfc400000
80#define MX35_AVIC_SIZE SZ_1M 81#define MX35_AVIC_SIZE SZ_1M
81 82
82/* 83/*
@@ -92,18 +93,17 @@
92#define MX35_CS3_BASE_ADDR 0xb2000000 93#define MX35_CS3_BASE_ADDR 0xb2000000
93 94
94#define MX35_CS4_BASE_ADDR 0xb4000000 95#define MX35_CS4_BASE_ADDR 0xb4000000
95#define MX35_CS4_BASE_ADDR_VIRT 0xf4000000 96#define MX35_CS4_BASE_ADDR_VIRT 0xf6000000
96#define MX35_CS4_SIZE SZ_32M 97#define MX35_CS4_SIZE SZ_32M
97 98
98#define MX35_CS5_BASE_ADDR 0xb6000000 99#define MX35_CS5_BASE_ADDR 0xb6000000
99#define MX35_CS5_BASE_ADDR_VIRT 0xf6000000 100#define MX35_CS5_BASE_ADDR_VIRT 0xf8000000
100#define MX35_CS5_SIZE SZ_32M 101#define MX35_CS5_SIZE SZ_32M
101 102
102/* 103/*
103 * NAND, SDRAM, WEIM, M3IF, EMI controllers 104 * NAND, SDRAM, WEIM, M3IF, EMI controllers
104 */ 105 */
105#define MX35_X_MEMC_BASE_ADDR 0xb8000000 106#define MX35_X_MEMC_BASE_ADDR 0xb8000000
106#define MX35_X_MEMC_BASE_ADDR_VIRT 0xfc320000
107#define MX35_X_MEMC_SIZE SZ_64K 107#define MX35_X_MEMC_SIZE SZ_64K
108#define MX35_ESDCTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x1000) 108#define MX35_ESDCTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x1000)
109#define MX35_WEIM_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x2000) 109#define MX35_WEIM_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x2000)
@@ -114,12 +114,8 @@
114#define MX35_NFC_BASE_ADDR 0xbb000000 114#define MX35_NFC_BASE_ADDR 0xbb000000
115#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 115#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000
116 116
117#define MX35_IO_ADDRESS(x) ( \ 117#define MX35_IO_P2V(x) IMX_IO_P2V(x)
118 IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \ 118#define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x))
119 IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \
120 IMX_IO_ADDRESS(x, MX35_AVIC) ?: \
121 IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \
122 IMX_IO_ADDRESS(x, MX35_SPBA0))
123 119
124/* 120/*
125 * Interrupt numbers 121 * Interrupt numbers
@@ -153,8 +149,8 @@
153#define MX35_INT_UART2 32 149#define MX35_INT_UART2 32
154#define MX35_INT_NFC 33 150#define MX35_INT_NFC 33
155#define MX35_INT_SDMA 34 151#define MX35_INT_SDMA 34
156#define MX35_INT_USBHS 35 152#define MX35_INT_USB_HS 35
157#define MX35_INT_USBOTG 37 153#define MX35_INT_USB_OTG 37
158#define MX35_INT_MSHC1 39 154#define MX35_INT_MSHC1 39
159#define MX35_INT_ESAI 40 155#define MX35_INT_ESAI 40
160#define MX35_INT_IPU_ERR 41 156#define MX35_INT_IPU_ERR 41
@@ -193,20 +189,4 @@
193#define MX35_SYSTEM_REV_MIN MX3x_CHIP_REV_1_0 189#define MX35_SYSTEM_REV_MIN MX3x_CHIP_REV_1_0
194#define MX35_SYSTEM_REV_NUM 3 190#define MX35_SYSTEM_REV_NUM 3
195 191
196#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
197/* these should go away */
198#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
199#define MXC_INT_OWIRE MX35_INT_OWIRE
200#define MXC_INT_GPU2D MX35_INT_GPU2D
201#define MXC_INT_ASRC MX35_INT_ASRC
202#define MXC_INT_USBHS MX35_INT_USBHS
203#define MXC_INT_USBOTG MX35_INT_USBOTG
204#define MXC_INT_ESAI MX35_INT_ESAI
205#define MXC_INT_CAN1 MX35_INT_CAN1
206#define MXC_INT_CAN2 MX35_INT_CAN2
207#define MXC_INT_MLB MX35_INT_MLB
208#define MXC_INT_SPDIF MX35_INT_SPDIF
209#define MXC_INT_FEC MX35_INT_FEC
210#endif
211
212#endif /* ifndef __MACH_MX35_H__ */ 192#endif /* ifndef __MACH_MX35_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index d1bd26d7b8a6..8c7f34e737d0 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -44,7 +44,6 @@
44 * AIPS 1 44 * AIPS 1
45 */ 45 */
46#define MX3x_AIPS1_BASE_ADDR 0x43f00000 46#define MX3x_AIPS1_BASE_ADDR 0x43f00000
47#define MX3x_AIPS1_BASE_ADDR_VIRT 0xfc000000
48#define MX3x_AIPS1_SIZE SZ_1M 47#define MX3x_AIPS1_SIZE SZ_1M
49#define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) 48#define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
50#define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) 49#define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
@@ -69,7 +68,6 @@
69 * SPBA global module enabled #0 68 * SPBA global module enabled #0
70 */ 69 */
71#define MX3x_SPBA0_BASE_ADDR 0x50000000 70#define MX3x_SPBA0_BASE_ADDR 0x50000000
72#define MX3x_SPBA0_BASE_ADDR_VIRT 0xfc100000
73#define MX3x_SPBA0_SIZE SZ_1M 71#define MX3x_SPBA0_SIZE SZ_1M
74#define MX3x_UART3_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x0c000) 72#define MX3x_UART3_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x0c000)
75#define MX3x_CSPI2_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x10000) 73#define MX3x_CSPI2_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x10000)
@@ -82,7 +80,6 @@
82 * AIPS 2 80 * AIPS 2
83 */ 81 */
84#define MX3x_AIPS2_BASE_ADDR 0x53f00000 82#define MX3x_AIPS2_BASE_ADDR 0x53f00000
85#define MX3x_AIPS2_BASE_ADDR_VIRT 0xfc200000
86#define MX3x_AIPS2_SIZE SZ_1M 83#define MX3x_AIPS2_SIZE SZ_1M
87#define MX3x_CCM_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x80000) 84#define MX3x_CCM_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x80000)
88#define MX3x_GPT1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x90000) 85#define MX3x_GPT1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x90000)
@@ -105,11 +102,9 @@
105 * ROMP and AVIC 102 * ROMP and AVIC
106 */ 103 */
107#define MX3x_ROMP_BASE_ADDR 0x60000000 104#define MX3x_ROMP_BASE_ADDR 0x60000000
108#define MX3x_ROMP_BASE_ADDR_VIRT 0xfc500000
109#define MX3x_ROMP_SIZE SZ_1M 105#define MX3x_ROMP_SIZE SZ_1M
110 106
111#define MX3x_AVIC_BASE_ADDR 0x68000000 107#define MX3x_AVIC_BASE_ADDR 0x68000000
112#define MX3x_AVIC_BASE_ADDR_VIRT 0xfc400000
113#define MX3x_AVIC_SIZE SZ_1M 108#define MX3x_AVIC_SIZE SZ_1M
114 109
115/* 110/*
@@ -125,18 +120,17 @@
125#define MX3x_CS3_BASE_ADDR 0xb2000000 120#define MX3x_CS3_BASE_ADDR 0xb2000000
126 121
127#define MX3x_CS4_BASE_ADDR 0xb4000000 122#define MX3x_CS4_BASE_ADDR 0xb4000000
128#define MX3x_CS4_BASE_ADDR_VIRT 0xf4000000 123#define MX3x_CS4_BASE_ADDR_VIRT 0xf6000000
129#define MX3x_CS4_SIZE SZ_32M 124#define MX3x_CS4_SIZE SZ_32M
130 125
131#define MX3x_CS5_BASE_ADDR 0xb6000000 126#define MX3x_CS5_BASE_ADDR 0xb6000000
132#define MX3x_CS5_BASE_ADDR_VIRT 0xf6000000 127#define MX3x_CS5_BASE_ADDR_VIRT 0xf8000000
133#define MX3x_CS5_SIZE SZ_32M 128#define MX3x_CS5_SIZE SZ_32M
134 129
135/* 130/*
136 * NAND, SDRAM, WEIM, M3IF, EMI controllers 131 * NAND, SDRAM, WEIM, M3IF, EMI controllers
137 */ 132 */
138#define MX3x_X_MEMC_BASE_ADDR 0xb8000000 133#define MX3x_X_MEMC_BASE_ADDR 0xb8000000
139#define MX3x_X_MEMC_BASE_ADDR_VIRT 0xfc320000
140#define MX3x_X_MEMC_SIZE SZ_64K 134#define MX3x_X_MEMC_SIZE SZ_64K
141#define MX3x_ESDCTL_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x1000) 135#define MX3x_ESDCTL_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x1000)
142#define MX3x_WEIM_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x2000) 136#define MX3x_WEIM_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x2000)
@@ -146,56 +140,6 @@
146 140
147#define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000 141#define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000
148 142
149/*!
150 * This macro defines the physical to virtual address mapping for all the
151 * peripheral modules. It is used by passing in the physical address as x
152 * and returning the virtual address. If the physical address is not mapped,
153 * it returns 0xDEADBEEF
154 */
155#define IO_ADDRESS(x) \
156 (void __force __iomem *) \
157 (((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\
158 ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\
159 ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\
160 ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\
161 ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\
162 ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\
163 ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\
164 0xDEADBEEF)
165
166/*
167 * define the address mapping macros: in physical address order
168 */
169#define L2CC_IO_ADDRESS(x) \
170 (((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT)
171
172#define AIPS1_IO_ADDRESS(x) \
173 (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT)
174
175#define SPBA0_IO_ADDRESS(x) \
176 (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT)
177
178#define AIPS2_IO_ADDRESS(x) \
179 (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT)
180
181#define ROMP_IO_ADDRESS(x) \
182 (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT)
183
184#define AVIC_IO_ADDRESS(x) \
185 (((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT)
186
187#define CS4_IO_ADDRESS(x) \
188 (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT)
189
190#define CS5_IO_ADDRESS(x) \
191 (((x) - CS5_BASE_ADDR) + CS5_BASE_ADDR_VIRT)
192
193#define X_MEMC_IO_ADDRESS(x) \
194 (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
195
196#define PCMCIA_IO_ADDRESS(x) \
197 (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
198
199/* 143/*
200 * Interrupt numbers 144 * Interrupt numbers
201 */ 145 */
@@ -277,126 +221,4 @@ static inline int mx35_revision(void)
277} 221}
278#endif 222#endif
279 223
280#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
281/* these should go away */
282#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
283#define L2CC_SIZE MX3x_L2CC_SIZE
284#define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR
285#define AIPS1_BASE_ADDR_VIRT MX3x_AIPS1_BASE_ADDR_VIRT
286#define AIPS1_SIZE MX3x_AIPS1_SIZE
287#define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR
288#define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR
289#define CLKCTL_BASE_ADDR MX3x_CLKCTL_BASE_ADDR
290#define ETB_SLOT4_BASE_ADDR MX3x_ETB_SLOT4_BASE_ADDR
291#define ETB_SLOT5_BASE_ADDR MX3x_ETB_SLOT5_BASE_ADDR
292#define ECT_CTIO_BASE_ADDR MX3x_ECT_CTIO_BASE_ADDR
293#define I2C_BASE_ADDR MX3x_I2C_BASE_ADDR
294#define I2C3_BASE_ADDR MX3x_I2C3_BASE_ADDR
295#define UART1_BASE_ADDR MX3x_UART1_BASE_ADDR
296#define UART2_BASE_ADDR MX3x_UART2_BASE_ADDR
297#define I2C2_BASE_ADDR MX3x_I2C2_BASE_ADDR
298#define OWIRE_BASE_ADDR MX3x_OWIRE_BASE_ADDR
299#define SSI1_BASE_ADDR MX3x_SSI1_BASE_ADDR
300#define CSPI1_BASE_ADDR MX3x_CSPI1_BASE_ADDR
301#define KPP_BASE_ADDR MX3x_KPP_BASE_ADDR
302#define IOMUXC_BASE_ADDR MX3x_IOMUXC_BASE_ADDR
303#define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR
304#define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR
305#define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR
306#define SPBA0_BASE_ADDR_VIRT MX3x_SPBA0_BASE_ADDR_VIRT
307#define SPBA0_SIZE MX3x_SPBA0_SIZE
308#define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR
309#define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR
310#define SSI2_BASE_ADDR MX3x_SSI2_BASE_ADDR
311#define ATA_DMA_BASE_ADDR MX3x_ATA_DMA_BASE_ADDR
312#define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR
313#define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR
314#define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR
315#define AIPS2_BASE_ADDR_VIRT MX3x_AIPS2_BASE_ADDR_VIRT
316#define AIPS2_SIZE MX3x_AIPS2_SIZE
317#define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR
318#define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR
319#define EPIT1_BASE_ADDR MX3x_EPIT1_BASE_ADDR
320#define EPIT2_BASE_ADDR MX3x_EPIT2_BASE_ADDR
321#define GPIO3_BASE_ADDR MX3x_GPIO3_BASE_ADDR
322#define SCC_BASE_ADDR MX3x_SCC_BASE_ADDR
323#define RNGA_BASE_ADDR MX3x_RNGA_BASE_ADDR
324#define IPU_CTRL_BASE_ADDR MX3x_IPU_CTRL_BASE_ADDR
325#define AUDMUX_BASE_ADDR MX3x_AUDMUX_BASE_ADDR
326#define GPIO1_BASE_ADDR MX3x_GPIO1_BASE_ADDR
327#define GPIO2_BASE_ADDR MX3x_GPIO2_BASE_ADDR
328#define SDMA_BASE_ADDR MX3x_SDMA_BASE_ADDR
329#define RTC_BASE_ADDR MX3x_RTC_BASE_ADDR
330#define WDOG_BASE_ADDR MX3x_WDOG_BASE_ADDR
331#define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR
332#define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR
333#define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR
334#define ROMP_BASE_ADDR_VIRT MX3x_ROMP_BASE_ADDR_VIRT
335#define ROMP_SIZE MX3x_ROMP_SIZE
336#define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR
337#define AVIC_BASE_ADDR_VIRT MX3x_AVIC_BASE_ADDR_VIRT
338#define AVIC_SIZE MX3x_AVIC_SIZE
339#define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR
340#define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR
341#define CSD1_BASE_ADDR MX3x_CSD1_BASE_ADDR
342#define CS0_BASE_ADDR MX3x_CS0_BASE_ADDR
343#define CS1_BASE_ADDR MX3x_CS1_BASE_ADDR
344#define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR
345#define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR
346#define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR
347#define CS4_BASE_ADDR_VIRT MX3x_CS4_BASE_ADDR_VIRT
348#define CS4_SIZE MX3x_CS4_SIZE
349#define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR
350#define CS5_BASE_ADDR_VIRT MX3x_CS5_BASE_ADDR_VIRT
351#define CS5_SIZE MX3x_CS5_SIZE
352#define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR
353#define X_MEMC_BASE_ADDR_VIRT MX3x_X_MEMC_BASE_ADDR_VIRT
354#define X_MEMC_SIZE MX3x_X_MEMC_SIZE
355#define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR
356#define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR
357#define M3IF_BASE_ADDR MX3x_M3IF_BASE_ADDR
358#define EMI_CTL_BASE_ADDR MX3x_EMI_CTL_BASE_ADDR
359#define PCMCIA_CTL_BASE_ADDR MX3x_PCMCIA_CTL_BASE_ADDR
360#define PCMCIA_MEM_BASE_ADDR MX3x_PCMCIA_MEM_BASE_ADDR
361#define MXC_INT_I2C3 MX3x_INT_I2C3
362#define MXC_INT_I2C2 MX3x_INT_I2C2
363#define MXC_INT_RTIC MX3x_INT_RTIC
364#define MXC_INT_I2C MX3x_INT_I2C
365#define MXC_INT_CSPI2 MX3x_INT_CSPI2
366#define MXC_INT_CSPI1 MX3x_INT_CSPI1
367#define MXC_INT_ATA MX3x_INT_ATA
368#define MXC_INT_UART3 MX3x_INT_UART3
369#define MXC_INT_IIM MX3x_INT_IIM
370#define MXC_INT_RNGA MX3x_INT_RNGA
371#define MXC_INT_EVTMON MX3x_INT_EVTMON
372#define MXC_INT_KPP MX3x_INT_KPP
373#define MXC_INT_RTC MX3x_INT_RTC
374#define MXC_INT_PWM MX3x_INT_PWM
375#define MXC_INT_EPIT2 MX3x_INT_EPIT2
376#define MXC_INT_EPIT1 MX3x_INT_EPIT1
377#define MXC_INT_GPT MX3x_INT_GPT
378#define MXC_INT_POWER_FAIL MX3x_INT_POWER_FAIL
379#define MXC_INT_UART2 MX3x_INT_UART2
380#define MXC_INT_NANDFC MX3x_INT_NANDFC
381#define MXC_INT_SDMA MX3x_INT_SDMA
382#define MXC_INT_MSHC1 MX3x_INT_MSHC1
383#define MXC_INT_IPU_ERR MX3x_INT_IPU_ERR
384#define MXC_INT_IPU_SYN MX3x_INT_IPU_SYN
385#define MXC_INT_UART1 MX3x_INT_UART1
386#define MXC_INT_ECT MX3x_INT_ECT
387#define MXC_INT_SCC_SCM MX3x_INT_SCC_SCM
388#define MXC_INT_SCC_SMN MX3x_INT_SCC_SMN
389#define MXC_INT_GPIO2 MX3x_INT_GPIO2
390#define MXC_INT_GPIO1 MX3x_INT_GPIO1
391#define MXC_INT_WDOG MX3x_INT_WDOG
392#define MXC_INT_GPIO3 MX3x_INT_GPIO3
393#define MXC_INT_EXT_POWER MX3x_INT_EXT_POWER
394#define MXC_INT_EXT_TEMPER MX3x_INT_EXT_TEMPER
395#define MXC_INT_EXT_SENSOR60 MX3x_INT_EXT_SENSOR60
396#define MXC_INT_EXT_SENSOR61 MX3x_INT_EXT_SENSOR61
397#define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
398#define MXC_INT_EXT_TV MX3x_INT_EXT_TV
399#define PROD_SIGNATURE MX3x_PROD_SIGNATURE
400#endif
401
402#endif /* ifndef __MACH_MX3x_H__ */ 224#endif /* ifndef __MACH_MX3x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 2af7a1056fc1..636347c3fa88 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -2,31 +2,6 @@
2#define __MACH_MX51_H__ 2#define __MACH_MX51_H__
3 3
4/* 4/*
5 * MX51 memory map:
6 *
7 *
8 * Virt Phys Size What
9 * ---------------------------------------------------------------------------
10 * fa3e0000 1ffe0000 128K IRAM (SCCv2 RAM)
11 * 30000000 256M GPU
12 * 40000000 512M IPU
13 * fa200000 60000000 1M DEBUG
14 * fb100000 70000000 1M SPBA 0
15 * fb000000 73f00000 1M AIPS 1
16 * fb200000 83f00000 1M AIPS 2
17 * 8fffc000 16K TZIC (interrupt controller)
18 * 90000000 256M CSD0 SDRAM/DDR
19 * a0000000 256M CSD1 SDRAM/DDR
20 * b0000000 128M CS0 Flash
21 * b8000000 128M CS1 Flash
22 * c0000000 128M CS2 Flash
23 * c8000000 64M CS3 Flash
24 * cc000000 32M CS4 SRAM
25 * ce000000 32M CS5 SRAM
26 * cfff0000 64K NFC (NAND Flash AXI)
27 */
28
29/*
30 * IROM 5 * IROM
31 */ 6 */
32#define MX51_IROM_BASE_ADDR 0x0 7#define MX51_IROM_BASE_ADDR 0x0
@@ -36,7 +11,6 @@
36 * IRAM 11 * IRAM
37 */ 12 */
38#define MX51_IRAM_BASE_ADDR 0x1ffe0000 /* internal ram */ 13#define MX51_IRAM_BASE_ADDR 0x1ffe0000 /* internal ram */
39#define MX51_IRAM_BASE_ADDR_VIRT 0xfa3e0000
40#define MX51_IRAM_PARTITIONS 16 14#define MX51_IRAM_PARTITIONS 16
41#define MX51_IRAM_SIZE (MX51_IRAM_PARTITIONS * SZ_8K) /* 128KB */ 15#define MX51_IRAM_SIZE (MX51_IRAM_PARTITIONS * SZ_8K) /* 128KB */
42 16
@@ -45,7 +19,6 @@
45#define MX51_IPU_CTRL_BASE_ADDR 0x40000000 19#define MX51_IPU_CTRL_BASE_ADDR 0x40000000
46 20
47#define MX51_DEBUG_BASE_ADDR 0x60000000 21#define MX51_DEBUG_BASE_ADDR 0x60000000
48#define MX51_DEBUG_BASE_ADDR_VIRT 0xfa200000
49#define MX51_DEBUG_SIZE SZ_1M 22#define MX51_DEBUG_SIZE SZ_1M
50 23
51#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000) 24#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000)
@@ -61,7 +34,6 @@
61 * SPBA global module enabled #0 34 * SPBA global module enabled #0
62 */ 35 */
63#define MX51_SPBA0_BASE_ADDR 0x70000000 36#define MX51_SPBA0_BASE_ADDR 0x70000000
64#define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000
65#define MX51_SPBA0_SIZE SZ_1M 37#define MX51_SPBA0_SIZE SZ_1M
66 38
67#define MX51_ESDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) 39#define MX51_ESDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000)
@@ -81,7 +53,6 @@
81 * AIPS 1 53 * AIPS 1
82 */ 54 */
83#define MX51_AIPS1_BASE_ADDR 0x73f00000 55#define MX51_AIPS1_BASE_ADDR 0x73f00000
84#define MX51_AIPS1_BASE_ADDR_VIRT 0xfb000000
85#define MX51_AIPS1_SIZE SZ_1M 56#define MX51_AIPS1_SIZE SZ_1M
86 57
87#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000) 58#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000)
@@ -109,7 +80,6 @@
109 * AIPS 2 80 * AIPS 2
110 */ 81 */
111#define MX51_AIPS2_BASE_ADDR 0x83f00000 82#define MX51_AIPS2_BASE_ADDR 0x83f00000
112#define MX51_AIPS2_BASE_ADDR_VIRT 0xfb200000
113#define MX51_AIPS2_SIZE SZ_1M 83#define MX51_AIPS2_SIZE SZ_1M
114 84
115#define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x80000) 85#define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x80000)
@@ -163,16 +133,8 @@
163#define MX51_GPU2D_BASE_ADDR 0xd0000000 133#define MX51_GPU2D_BASE_ADDR 0xd0000000
164#define MX51_TZIC_BASE_ADDR 0xe0000000 134#define MX51_TZIC_BASE_ADDR 0xe0000000
165 135
166#define MX51_IO_ADDRESS(x) ( \ 136#define MX51_IO_P2V(x) IMX_IO_P2V(x)
167 IMX_IO_ADDRESS(x, MX51_IRAM) ?: \ 137#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x))
168 IMX_IO_ADDRESS(x, MX51_DEBUG) ?: \
169 IMX_IO_ADDRESS(x, MX51_SPBA0) ?: \
170 IMX_IO_ADDRESS(x, MX51_AIPS1) ?: \
171 IMX_IO_ADDRESS(x, MX51_AIPS2))
172
173/* This is currently used in <mach/debug-macro.S>, but should go away */
174#define MX51_AIPS1_IO_ADDRESS(x) \
175 (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
176 138
177/* 139/*
178 * defines for SPBA modules 140 * defines for SPBA modules
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 0ca3101ebf36..765190fe6332 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -21,14 +21,12 @@
21 * L2CC 21 * L2CC
22 */ 22 */
23#define MXC91231_L2CC_BASE_ADDR 0x30000000 23#define MXC91231_L2CC_BASE_ADDR 0x30000000
24#define MXC91231_L2CC_BASE_ADDR_VIRT 0xF9000000
25#define MXC91231_L2CC_SIZE SZ_64K 24#define MXC91231_L2CC_SIZE SZ_64K
26 25
27/* 26/*
28 * AIPS 1 27 * AIPS 1
29 */ 28 */
30#define MXC91231_AIPS1_BASE_ADDR 0x43F00000 29#define MXC91231_AIPS1_BASE_ADDR 0x43F00000
31#define MXC91231_AIPS1_BASE_ADDR_VIRT 0xFC000000
32#define MXC91231_AIPS1_SIZE SZ_1M 30#define MXC91231_AIPS1_SIZE SZ_1M
33 31
34#define MXC91231_AIPS1_CTRL_BASE_ADDR MXC91231_AIPS1_BASE_ADDR 32#define MXC91231_AIPS1_CTRL_BASE_ADDR MXC91231_AIPS1_BASE_ADDR
@@ -53,7 +51,6 @@
53 * AIPS 2 51 * AIPS 2
54 */ 52 */
55#define MXC91231_AIPS2_BASE_ADDR 0x53F00000 53#define MXC91231_AIPS2_BASE_ADDR 0x53F00000
56#define MXC91231_AIPS2_BASE_ADDR_VIRT 0xFC100000
57#define MXC91231_AIPS2_SIZE SZ_1M 54#define MXC91231_AIPS2_SIZE SZ_1M
58 55
59#define MXC91231_GEMK_BASE_ADDR (MXC91231_AIPS2_BASE_ADDR + 0x8C000) 56#define MXC91231_GEMK_BASE_ADDR (MXC91231_AIPS2_BASE_ADDR + 0x8C000)
@@ -79,7 +76,6 @@
79 * SPBA global module 0 76 * SPBA global module 0
80 */ 77 */
81#define MXC91231_SPBA0_BASE_ADDR 0x50000000 78#define MXC91231_SPBA0_BASE_ADDR 0x50000000
82#define MXC91231_SPBA0_BASE_ADDR_VIRT 0xFC200000
83#define MXC91231_SPBA0_SIZE SZ_1M 79#define MXC91231_SPBA0_SIZE SZ_1M
84 80
85#define MXC91231_MMC_SDHC1_BASE_ADDR (MXC91231_SPBA0_BASE_ADDR + 0x04000) 81#define MXC91231_MMC_SDHC1_BASE_ADDR (MXC91231_SPBA0_BASE_ADDR + 0x04000)
@@ -109,7 +105,6 @@
109 * SPBA global module 1 105 * SPBA global module 1
110 */ 106 */
111#define MXC91231_SPBA1_BASE_ADDR 0x52000000 107#define MXC91231_SPBA1_BASE_ADDR 0x52000000
112#define MXC91231_SPBA1_BASE_ADDR_VIRT 0xFC300000
113#define MXC91231_SPBA1_SIZE SZ_1M 108#define MXC91231_SPBA1_SIZE SZ_1M
114 109
115#define MXC91231_MQSPI_BASE_ADDR (MXC91231_SPBA1_BASE_ADDR + 0x34000) 110#define MXC91231_MQSPI_BASE_ADDR (MXC91231_SPBA1_BASE_ADDR + 0x34000)
@@ -144,18 +139,15 @@
144 * ROMP and AVIC 139 * ROMP and AVIC
145 */ 140 */
146#define MXC91231_ROMP_BASE_ADDR 0x60000000 141#define MXC91231_ROMP_BASE_ADDR 0x60000000
147#define MXC91231_ROMP_BASE_ADDR_VIRT 0xFC400000
148#define MXC91231_ROMP_SIZE SZ_64K 142#define MXC91231_ROMP_SIZE SZ_64K
149 143
150#define MXC91231_AVIC_BASE_ADDR 0x68000000 144#define MXC91231_AVIC_BASE_ADDR 0x68000000
151#define MXC91231_AVIC_BASE_ADDR_VIRT 0xFC410000
152#define MXC91231_AVIC_SIZE SZ_64K 145#define MXC91231_AVIC_SIZE SZ_64K
153 146
154/* 147/*
155 * NAND, SDRAM, WEIM, M3IF, EMI controllers 148 * NAND, SDRAM, WEIM, M3IF, EMI controllers
156 */ 149 */
157#define MXC91231_X_MEMC_BASE_ADDR 0xB8000000 150#define MXC91231_X_MEMC_BASE_ADDR 0xB8000000
158#define MXC91231_X_MEMC_BASE_ADDR_VIRT 0xFC420000
159#define MXC91231_X_MEMC_SIZE SZ_64K 151#define MXC91231_X_MEMC_SIZE SZ_64K
160 152
161#define MXC91231_NFC_BASE_ADDR (MXC91231_X_MEMC_BASE_ADDR + 0x0000) 153#define MXC91231_NFC_BASE_ADDR (MXC91231_X_MEMC_BASE_ADDR + 0x0000)
@@ -183,19 +175,10 @@
183/* 175/*
184 * This macro defines the physical to virtual address mapping for all the 176 * This macro defines the physical to virtual address mapping for all the
185 * peripheral modules. It is used by passing in the physical address as x 177 * peripheral modules. It is used by passing in the physical address as x
186 * and returning the virtual address. If the physical address is not mapped, 178 * and returning the virtual address.
187 * it returns 0.
188 */ 179 */
189 180#define MXC91231_IO_P2V(x) IMX_IO_P2V(x)
190#define MXC91231_IO_ADDRESS(x) ( \ 181#define MXC91231_IO_ADDRESS(x) IOMEM(MXC91231_IO_P2V(x))
191 IMX_IO_ADDRESS(x, MXC91231_L2CC) ?: \
192 IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?: \
193 IMX_IO_ADDRESS(x, MXC91231_ROMP) ?: \
194 IMX_IO_ADDRESS(x, MXC91231_AVIC) ?: \
195 IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?: \
196 IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?: \
197 IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?: \
198 IMX_IO_ADDRESS(x, MXC91231_AIPS2))
199 182
200/* 183/*
201 * Interrupt numbers 184 * Interrupt numbers