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authorOlof Johansson <olof@lixom.net>2014-09-24 14:20:48 -0400
committerOlof Johansson <olof@lixom.net>2014-09-24 14:21:01 -0400
commit28fd837204236cf5b5533525e5b53c5176fa97a3 (patch)
treeac7dcad925950bc0bb53c5a55cb199e31e7aaee0 /arch
parentc82eb464879dd0ecbe0c4cb1b80ac4e82b634872 (diff)
parent64d14a31d5410ea34641c41795e0ba222bda740c (diff)
Merge tag 'imx-cleanup-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/cleanup
Merge "ARM: imx: cleanup for 3.18" from Shawn Guo: The i.MX cleanup for 3.18: - Reomve a few i.MX27 and i.MX1 board files - Remove imx_scu_standby_enable() since core code handles scu standby now - Remove unnecessary iomux declaration - Remove useless sound card property from vf610-twr dts * tag 'imx-cleanup-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: Remove mach-mxt_td60 board file ARM: i.MX: Remove i.MX1 ADS board support ARM: dts: vf610-twr: remove useless property for sound card. ARM: imx: remove imx_scu_standby_enable() ARM: i.MX: Remove Phytec i.MX27 PCM038/PCM970 board files ARM: i.MX: Remove mach-cpuimx27sd board file ARM: imx: iomux: Do not export symbol without public declaration Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/include/asm/io.h12
-rw-r--r--arch/alpha/include/asm/unistd.h2
-rw-r--r--arch/alpha/include/uapi/asm/unistd.h3
-rw-r--r--arch/alpha/kernel/systbls.S3
-rw-r--r--arch/arc/mm/cache_arc700.c1
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/dra7.dtsi16
-rw-r--r--arch/arm/boot/dts/imx53-qsrb.dts8
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts4
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi19
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts1
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts2
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts2
-rw-r--r--arch/arm/boot/dts/omap54xx-clocks.dtsi16
-rw-r--r--arch/arm/boot/dts/twl6030.dtsi4
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts1
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig5
-rw-r--r--arch/arm/include/asm/cacheflush.h1
-rw-r--r--arch/arm/include/asm/cputype.h3
-rw-r--r--arch/arm/include/asm/elf.h1
-rw-r--r--arch/arm/include/asm/smp_plat.h15
-rw-r--r--arch/arm/kernel/entry-header.S29
-rw-r--r--arch/arm/kernel/module.c1
-rw-r--r--arch/arm/mach-bcm/Makefile1
-rw-r--r--arch/arm/mach-bcm/brcmstb.h19
-rw-r--r--arch/arm/mach-bcm/headsmp-brcmstb.S33
-rw-r--r--arch/arm/mach-bcm/platsmp-brcmstb.c363
-rw-r--r--arch/arm/mach-exynos/mcpm-exynos.c1
-rw-r--r--arch/arm/mach-imx/Kconfig103
-rw-r--r--arch/arm/mach-imx/Makefile6
-rw-r--r--arch/arm/mach-imx/board-pcm038.h36
-rw-r--r--arch/arm/mach-imx/common.h2
-rw-r--r--arch/arm/mach-imx/cpuidle-imx6q.c4
-rw-r--r--arch/arm/mach-imx/eukrea-baseboards.h10
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c351
-rw-r--r--arch/arm/mach-imx/iomux-imx31.c7
-rw-r--r--arch/arm/mach-imx/iomux-v1.c2
-rw-r--r--arch/arm/mach-imx/iomux-v3.c2
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c321
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c154
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c273
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c358
-rw-r--r--arch/arm/mach-imx/pcm970-baseboard.c231
-rw-r--r--arch/arm/mach-imx/platsmp.c10
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c3
-rw-r--r--arch/arm/mach-omap2/gpmc.c7
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/omap_device.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c22
-rw-r--r--arch/arm/mach-omap2/soc.h6
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c4
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c2
-rw-r--r--arch/arm/mach-vexpress/spc.c14
-rw-r--r--arch/arm/mm/abort-ev6.S6
-rw-r--r--arch/arm/mm/abort-ev7.S6
-rw-r--r--arch/hexagon/mm/cache.c1
-rw-r--r--arch/ia64/Kconfig2
-rw-r--r--arch/m68k/Kconfig2
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/s390/Kconfig2
-rw-r--r--arch/s390/include/uapi/asm/unistd.h5
-rw-r--r--arch/s390/kernel/compat_wrapper.c3
-rw-r--r--arch/s390/kernel/ipl.c7
-rw-r--r--arch/s390/kernel/setup.c19
-rw-r--r--arch/s390/kernel/syscalls.S3
-rw-r--r--arch/sh/Kconfig2
-rw-r--r--arch/sh/mm/cache.c1
-rw-r--r--arch/tile/Kconfig2
-rw-r--r--arch/tile/kernel/smp.c1
-rw-r--r--arch/unicore32/kernel/signal.c9
-rw-r--r--arch/x86/Kbuild4
-rw-r--r--arch/x86/Kconfig18
-rw-r--r--arch/x86/Makefile6
-rw-r--r--arch/x86/include/asm/io_apic.h2
-rw-r--r--arch/x86/include/asm/pgtable.h9
-rw-r--r--arch/x86/kernel/Makefile2
-rw-r--r--arch/x86/kernel/apic/io_apic.c27
-rw-r--r--arch/x86/kernel/crash.c6
-rw-r--r--arch/x86/kernel/irqinit.c2
-rw-r--r--arch/x86/kernel/machine_kexec_64.c11
-rw-r--r--arch/x86/kernel/time.c2
-rw-r--r--arch/x86/pci/intel_mid_pci.c2
-rw-r--r--arch/x86/pci/irq.c2
-rw-r--r--arch/x86/purgatory/Makefile6
-rw-r--r--arch/xtensa/Kconfig92
-rw-r--r--arch/xtensa/Makefile7
-rw-r--r--arch/xtensa/boot/dts/kc705.dts5
-rw-r--r--arch/xtensa/configs/common_defconfig1
-rw-r--r--arch/xtensa/configs/iss_defconfig3
-rw-r--r--arch/xtensa/configs/s6105_defconfig1
-rw-r--r--arch/xtensa/include/asm/cacheflush.h2
-rw-r--r--arch/xtensa/include/asm/fixmap.h30
-rw-r--r--arch/xtensa/include/asm/highmem.h40
-rw-r--r--arch/xtensa/include/asm/page.h14
-rw-r--r--arch/xtensa/include/asm/pgtable.h7
-rw-r--r--arch/xtensa/include/asm/uaccess.h5
-rw-r--r--arch/xtensa/include/uapi/asm/ioctls.h19
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h5
-rw-r--r--arch/xtensa/kernel/align.S128
-rw-r--r--arch/xtensa/kernel/entry.S54
-rw-r--r--arch/xtensa/kernel/pci-dma.c12
-rw-r--r--arch/xtensa/kernel/smp.c1
-rw-r--r--arch/xtensa/kernel/traps.c5
-rw-r--r--arch/xtensa/kernel/vectors.S8
-rw-r--r--arch/xtensa/kernel/vmlinux.lds.S4
-rw-r--r--arch/xtensa/mm/cache.c77
-rw-r--r--arch/xtensa/mm/highmem.c41
-rw-r--r--arch/xtensa/mm/misc.S116
-rw-r--r--arch/xtensa/mm/mmu.c38
114 files changed, 771 insertions, 2631 deletions
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index 5ebab5895edb..f05bdb4b1cb9 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -500,10 +500,14 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
500#define outb_p outb 500#define outb_p outb
501#define outw_p outw 501#define outw_p outw
502#define outl_p outl 502#define outl_p outl
503#define readb_relaxed(addr) __raw_readb(addr) 503#define readb_relaxed(addr) __raw_readb(addr)
504#define readw_relaxed(addr) __raw_readw(addr) 504#define readw_relaxed(addr) __raw_readw(addr)
505#define readl_relaxed(addr) __raw_readl(addr) 505#define readl_relaxed(addr) __raw_readl(addr)
506#define readq_relaxed(addr) __raw_readq(addr) 506#define readq_relaxed(addr) __raw_readq(addr)
507#define writeb_relaxed(b, addr) __raw_writeb(b, addr)
508#define writew_relaxed(b, addr) __raw_writew(b, addr)
509#define writel_relaxed(b, addr) __raw_writel(b, addr)
510#define writeq_relaxed(b, addr) __raw_writeq(b, addr)
507 511
508#define mmiowb() 512#define mmiowb()
509 513
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index f2c94402e2c8..c509d306db45 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -3,7 +3,7 @@
3 3
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6#define NR_SYSCALLS 508 6#define NR_SYSCALLS 511
7 7
8#define __ARCH_WANT_OLD_READDIR 8#define __ARCH_WANT_OLD_READDIR
9#define __ARCH_WANT_STAT64 9#define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/uapi/asm/unistd.h b/arch/alpha/include/uapi/asm/unistd.h
index 53ae7bb1bfd1..d214a0358100 100644
--- a/arch/alpha/include/uapi/asm/unistd.h
+++ b/arch/alpha/include/uapi/asm/unistd.h
@@ -469,5 +469,8 @@
469#define __NR_process_vm_writev 505 469#define __NR_process_vm_writev 505
470#define __NR_kcmp 506 470#define __NR_kcmp 506
471#define __NR_finit_module 507 471#define __NR_finit_module 507
472#define __NR_sched_setattr 508
473#define __NR_sched_getattr 509
474#define __NR_renameat2 510
472 475
473#endif /* _UAPI_ALPHA_UNISTD_H */ 476#endif /* _UAPI_ALPHA_UNISTD_H */
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index dca9b3fb0071..24789713f1ea 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -526,6 +526,9 @@ sys_call_table:
526 .quad sys_process_vm_writev /* 505 */ 526 .quad sys_process_vm_writev /* 505 */
527 .quad sys_kcmp 527 .quad sys_kcmp
528 .quad sys_finit_module 528 .quad sys_finit_module
529 .quad sys_sched_setattr
530 .quad sys_sched_getattr
531 .quad sys_renameat2 /* 510 */
529 532
530 .size sys_call_table, . - sys_call_table 533 .size sys_call_table, . - sys_call_table
531 .type sys_call_table, @object 534 .type sys_call_table, @object
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 4670afc3b971..e88ddbf990e3 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -581,6 +581,7 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
581 tot_sz -= sz; 581 tot_sz -= sz;
582 } 582 }
583} 583}
584EXPORT_SYMBOL(flush_icache_range);
584 585
585/* 586/*
586 * General purpose helper to make I and D cache lines consistent. 587 * General purpose helper to make I and D cache lines consistent.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index bd8beaebf0ec..314bdf1163f9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1985,8 +1985,6 @@ config XIP_PHYS_ADDR
1985config KEXEC 1985config KEXEC
1986 bool "Kexec system call (EXPERIMENTAL)" 1986 bool "Kexec system call (EXPERIMENTAL)"
1987 depends on (!SMP || PM_SLEEP_SMP) 1987 depends on (!SMP || PM_SLEEP_SMP)
1988 select CRYPTO
1989 select CRYPTO_SHA256
1990 help 1988 help
1991 kexec is a system call that implements the ability to shutdown your 1989 kexec is a system call that implements the ability to shutdown your
1992 current kernel, and to start another kernel. It is like a reboot 1990 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 97f603c4483d..d678152db4cb 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -245,7 +245,7 @@
245 gpio-controller; 245 gpio-controller;
246 #gpio-cells = <2>; 246 #gpio-cells = <2>;
247 interrupt-controller; 247 interrupt-controller;
248 #interrupt-cells = <1>; 248 #interrupt-cells = <2>;
249 }; 249 };
250 250
251 gpio2: gpio@48055000 { 251 gpio2: gpio@48055000 {
@@ -256,7 +256,7 @@
256 gpio-controller; 256 gpio-controller;
257 #gpio-cells = <2>; 257 #gpio-cells = <2>;
258 interrupt-controller; 258 interrupt-controller;
259 #interrupt-cells = <1>; 259 #interrupt-cells = <2>;
260 }; 260 };
261 261
262 gpio3: gpio@48057000 { 262 gpio3: gpio@48057000 {
@@ -267,7 +267,7 @@
267 gpio-controller; 267 gpio-controller;
268 #gpio-cells = <2>; 268 #gpio-cells = <2>;
269 interrupt-controller; 269 interrupt-controller;
270 #interrupt-cells = <1>; 270 #interrupt-cells = <2>;
271 }; 271 };
272 272
273 gpio4: gpio@48059000 { 273 gpio4: gpio@48059000 {
@@ -278,7 +278,7 @@
278 gpio-controller; 278 gpio-controller;
279 #gpio-cells = <2>; 279 #gpio-cells = <2>;
280 interrupt-controller; 280 interrupt-controller;
281 #interrupt-cells = <1>; 281 #interrupt-cells = <2>;
282 }; 282 };
283 283
284 gpio5: gpio@4805b000 { 284 gpio5: gpio@4805b000 {
@@ -289,7 +289,7 @@
289 gpio-controller; 289 gpio-controller;
290 #gpio-cells = <2>; 290 #gpio-cells = <2>;
291 interrupt-controller; 291 interrupt-controller;
292 #interrupt-cells = <1>; 292 #interrupt-cells = <2>;
293 }; 293 };
294 294
295 gpio6: gpio@4805d000 { 295 gpio6: gpio@4805d000 {
@@ -300,7 +300,7 @@
300 gpio-controller; 300 gpio-controller;
301 #gpio-cells = <2>; 301 #gpio-cells = <2>;
302 interrupt-controller; 302 interrupt-controller;
303 #interrupt-cells = <1>; 303 #interrupt-cells = <2>;
304 }; 304 };
305 305
306 gpio7: gpio@48051000 { 306 gpio7: gpio@48051000 {
@@ -311,7 +311,7 @@
311 gpio-controller; 311 gpio-controller;
312 #gpio-cells = <2>; 312 #gpio-cells = <2>;
313 interrupt-controller; 313 interrupt-controller;
314 #interrupt-cells = <1>; 314 #interrupt-cells = <2>;
315 }; 315 };
316 316
317 gpio8: gpio@48053000 { 317 gpio8: gpio@48053000 {
@@ -322,7 +322,7 @@
322 gpio-controller; 322 gpio-controller;
323 #gpio-cells = <2>; 323 #gpio-cells = <2>;
324 interrupt-controller; 324 interrupt-controller;
325 #interrupt-cells = <1>; 325 #interrupt-cells = <2>;
326 }; 326 };
327 327
328 uart1: serial@4806a000 { 328 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts
index f1bbf9a32991..82d623d05915 100644
--- a/arch/arm/boot/dts/imx53-qsrb.dts
+++ b/arch/arm/boot/dts/imx53-qsrb.dts
@@ -28,6 +28,12 @@
28 MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec 28 MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec
29 >; 29 >;
30 }; 30 };
31
32 pinctrl_pmic: pmicgrp {
33 fsl,pins = <
34 MX53_PAD_CSI0_DAT5__GPIO5_23 0x1e4 /* IRQ */
35 >;
36 };
31 }; 37 };
32}; 38};
33 39
@@ -38,6 +44,8 @@
38 44
39 pmic: mc34708@8 { 45 pmic: mc34708@8 {
40 compatible = "fsl,mc34708"; 46 compatible = "fsl,mc34708";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_pmic>;
41 reg = <0x08>; 49 reg = <0x08>;
42 interrupt-parent = <&gpio5>; 50 interrupt-parent = <&gpio5>;
43 interrupts = <23 0x8>; 51 interrupts = <23 0x8>;
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index c8e51dd41b8f..71598546087f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -58,7 +58,7 @@
58 58
59 sound-spdif { 59 sound-spdif {
60 compatible = "fsl,imx-audio-spdif"; 60 compatible = "fsl,imx-audio-spdif";
61 model = "imx-spdif"; 61 model = "On-board SPDIF";
62 /* IMX6 doesn't implement this yet */ 62 /* IMX6 doesn't implement this yet */
63 spdif-controller = <&spdif>; 63 spdif-controller = <&spdif>;
64 spdif-out; 64 spdif-out;
@@ -181,11 +181,13 @@
181}; 181};
182 182
183&usbh1 { 183&usbh1 {
184 disable-over-current;
184 vbus-supply = <&reg_usbh1_vbus>; 185 vbus-supply = <&reg_usbh1_vbus>;
185 status = "okay"; 186 status = "okay";
186}; 187};
187 188
188&usbotg { 189&usbotg {
190 disable-over-current;
189 pinctrl-names = "default"; 191 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>; 192 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
191 vbus-supply = <&reg_usbotg_vbus>; 193 vbus-supply = <&reg_usbotg_vbus>;
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index e8e781656b3f..6a524ca011e7 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -61,7 +61,7 @@
61 61
62 sound-spdif { 62 sound-spdif {
63 compatible = "fsl,imx-audio-spdif"; 63 compatible = "fsl,imx-audio-spdif";
64 model = "imx-spdif"; 64 model = "Integrated SPDIF";
65 /* IMX6 doesn't implement this yet */ 65 /* IMX6 doesn't implement this yet */
66 spdif-controller = <&spdif>; 66 spdif-controller = <&spdif>;
67 spdif-out; 67 spdif-out;
@@ -130,16 +130,23 @@
130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; 130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
131 }; 131 };
132 132
133 pinctrl_cubox_i_usbh1: cubox-i-usbh1 {
134 fsl,pins = <MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0>;
135 };
136
133 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus { 137 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
134 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; 138 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
135 }; 139 };
136 140
137 pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id { 141 pinctrl_cubox_i_usbotg: cubox-i-usbotg {
138 /* 142 /*
139 * The Cubox-i pulls this low, but as it's pointless 143 * The Cubox-i pulls ID low, but as it's pointless
140 * leaving it as a pull-up, even if it is just 10uA. 144 * leaving it as a pull-up, even if it is just 10uA.
141 */ 145 */
142 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>; 146 fsl,pins = <
147 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
148 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
149 >;
143 }; 150 };
144 151
145 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { 152 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
@@ -173,13 +180,15 @@
173}; 180};
174 181
175&usbh1 { 182&usbh1 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
176 vbus-supply = <&reg_usbh1_vbus>; 185 vbus-supply = <&reg_usbh1_vbus>;
177 status = "okay"; 186 status = "okay";
178}; 187};
179 188
180&usbotg { 189&usbotg {
181 pinctrl-names = "default"; 190 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>; 191 pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
183 vbus-supply = <&reg_usbotg_vbus>; 192 vbus-supply = <&reg_usbotg_vbus>;
184 status = "okay"; 193 status = "okay";
185}; 194};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index d16066608e21..db9f45b2c573 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -17,7 +17,7 @@
17 enet { 17 enet {
18 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { 18 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
19 fsl,pins = < 19 fsl,pins = <
20 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 20 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
21 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 21 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
22 /* AR8035 reset */ 22 /* AR8035 reset */
23 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 23 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3c3e6da1deac..a9aae88b74f5 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -292,6 +292,7 @@
292&uart3 { 292&uart3 {
293 pinctrl-names = "default"; 293 pinctrl-names = "default";
294 pinctrl-0 = <&uart3_pins>; 294 pinctrl-0 = <&uart3_pins>;
295 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
295}; 296};
296 297
297&gpio1 { 298&gpio1 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index b15f1a77d684..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -353,7 +353,7 @@
353 }; 353 };
354 354
355 twl_power: power { 355 twl_power: power {
356 compatible = "ti,twl4030-power-n900"; 356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff; 357 ti,use_poweroff;
358 }; 358 };
359}; 359};
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 02f69f4a8fd3..9bad94efe1c8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -107,7 +107,7 @@
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <1>; 108 #size-cells = <1>;
109 reg = <1 0 0x08000000>; 109 reg = <1 0 0x08000000>;
110 ti,nand-ecc-opt = "ham1"; 110 ti,nand-ecc-opt = "sw";
111 nand-bus-width = <8>; 111 nand-bus-width = <8>;
112 gpmc,cs-on-ns = <0>; 112 gpmc,cs-on-ns = <0>;
113 gpmc,cs-rd-off-ns = <36>; 113 gpmc,cs-rd-off-ns = <36>;
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index e67a23b5d788..58c27466f012 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -367,10 +367,12 @@
367 367
368 l3_iclk_div: l3_iclk_div { 368 l3_iclk_div: l3_iclk_div {
369 #clock-cells = <0>; 369 #clock-cells = <0>;
370 compatible = "fixed-factor-clock"; 370 compatible = "ti,divider-clock";
371 ti,max-div = <2>;
372 ti,bit-shift = <4>;
373 reg = <0x100>;
371 clocks = <&dpll_core_h12x2_ck>; 374 clocks = <&dpll_core_h12x2_ck>;
372 clock-mult = <1>; 375 ti,index-power-of-two;
373 clock-div = <1>;
374 }; 376 };
375 377
376 gpu_l3_iclk: gpu_l3_iclk { 378 gpu_l3_iclk: gpu_l3_iclk {
@@ -383,10 +385,12 @@
383 385
384 l4_root_clk_div: l4_root_clk_div { 386 l4_root_clk_div: l4_root_clk_div {
385 #clock-cells = <0>; 387 #clock-cells = <0>;
386 compatible = "fixed-factor-clock"; 388 compatible = "ti,divider-clock";
389 ti,max-div = <2>;
390 ti,bit-shift = <8>;
391 reg = <0x100>;
387 clocks = <&l3_iclk_div>; 392 clocks = <&l3_iclk_div>;
388 clock-mult = <1>; 393 ti,index-power-of-two;
389 clock-div = <1>;
390 }; 394 };
391 395
392 slimbus1_slimbus_clk: slimbus1_slimbus_clk { 396 slimbus1_slimbus_clk: slimbus1_slimbus_clk {
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 2e3bd3172b23..55eb35f068fb 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -83,10 +83,6 @@
83 regulator-always-on; 83 regulator-always-on;
84 }; 84 };
85 85
86 clk32kg: regulator-clk32kg {
87 compatible = "ti,twl6030-clk32kg";
88 };
89
90 twl_usb_comparator: usb-comparator { 86 twl_usb_comparator: usb-comparator {
91 compatible = "ti,twl6030-usb"; 87 compatible = "ti,twl6030-usb";
92 interrupts = <4>, <10>; 88 interrupts = <4>, <10>;
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index b8a5e8c68f06..e4bffbae515f 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -76,7 +76,6 @@
76 76
77 simple-audio-card,cpu { 77 simple-audio-card,cpu {
78 sound-dai = <&sai2>; 78 sound-dai = <&sai2>;
79 master-clkdir-out;
80 frame-master; 79 frame-master;
81 bitclock-master; 80 bitclock-master;
82 }; 81 };
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 63bde0efc041..a3fb8662ff6c 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -22,7 +22,6 @@ CONFIG_ARCH_MULTI_V5=y
22# CONFIG_ARCH_MULTI_V7 is not set 22# CONFIG_ARCH_MULTI_V7 is not set
23CONFIG_ARCH_MXC=y 23CONFIG_ARCH_MXC=y
24CONFIG_MXC_IRQ_PRIOR=y 24CONFIG_MXC_IRQ_PRIOR=y
25CONFIG_ARCH_MX1ADS=y
26CONFIG_MACH_SCB9328=y 25CONFIG_MACH_SCB9328=y
27CONFIG_MACH_APF9328=y 26CONFIG_MACH_APF9328=y
28CONFIG_MACH_MX21ADS=y 27CONFIG_MACH_MX21ADS=y
@@ -30,10 +29,6 @@ CONFIG_MACH_MX25_3DS=y
30CONFIG_MACH_EUKREA_CPUIMX25SD=y 29CONFIG_MACH_EUKREA_CPUIMX25SD=y
31CONFIG_MACH_IMX25_DT=y 30CONFIG_MACH_IMX25_DT=y
32CONFIG_MACH_MX27ADS=y 31CONFIG_MACH_MX27ADS=y
33CONFIG_MACH_PCM038=y
34CONFIG_MACH_CPUIMX27=y
35CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2=y
36CONFIG_MACH_EUKREA_CPUIMX27_USEUART4=y
37CONFIG_MACH_MX27_3DS=y 32CONFIG_MACH_MX27_3DS=y
38CONFIG_MACH_IMX27_VISSTRIM_M10=y 33CONFIG_MACH_IMX27_VISSTRIM_M10=y
39CONFIG_MACH_PCA100=y 34CONFIG_MACH_PCA100=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index fd43f7f55b70..79ecb4f34ffb 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -472,7 +472,6 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
472 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \ 472 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \
473 "isb \n\t" \ 473 "isb \n\t" \
474 "bl v7_flush_dcache_"__stringify(level)" \n\t" \ 474 "bl v7_flush_dcache_"__stringify(level)" \n\t" \
475 "clrex \n\t" \
476 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \ 475 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \
477 "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \ 476 "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \
478 "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \ 477 "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 963a2515906d..819777d0e91f 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -74,6 +74,7 @@
74#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 74#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0
75#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 75#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0
76#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 76#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0
77#define ARM_CPU_PART_MASK 0xff00fff0
77 78
78#define ARM_CPU_XSCALE_ARCH_MASK 0xe000 79#define ARM_CPU_XSCALE_ARCH_MASK 0xe000
79#define ARM_CPU_XSCALE_ARCH_V1 0x2000 80#define ARM_CPU_XSCALE_ARCH_V1 0x2000
@@ -179,7 +180,7 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
179 */ 180 */
180static inline unsigned int __attribute_const__ read_cpuid_part(void) 181static inline unsigned int __attribute_const__ read_cpuid_part(void)
181{ 182{
182 return read_cpuid_id() & 0xff00fff0; 183 return read_cpuid_id() & ARM_CPU_PART_MASK;
183} 184}
184 185
185static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void) 186static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index f4b46d39b9cf..afb9cafd3786 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -50,6 +50,7 @@ typedef struct user_fp elf_fpregset_t;
50#define R_ARM_ABS32 2 50#define R_ARM_ABS32 2
51#define R_ARM_CALL 28 51#define R_ARM_CALL 28
52#define R_ARM_JUMP24 29 52#define R_ARM_JUMP24 29
53#define R_ARM_TARGET1 38
53#define R_ARM_V4BX 40 54#define R_ARM_V4BX 40
54#define R_ARM_PREL31 42 55#define R_ARM_PREL31 42
55#define R_ARM_MOVW_ABS_NC 43 56#define R_ARM_MOVW_ABS_NC 43
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index a252c0bfacf5..0ad7d490ee6f 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -8,6 +8,7 @@
8#include <linux/cpumask.h> 8#include <linux/cpumask.h>
9#include <linux/err.h> 9#include <linux/err.h>
10 10
11#include <asm/cpu.h>
11#include <asm/cputype.h> 12#include <asm/cputype.h>
12 13
13/* 14/*
@@ -25,6 +26,20 @@ static inline bool is_smp(void)
25#endif 26#endif
26} 27}
27 28
29/**
30 * smp_cpuid_part() - return part id for a given cpu
31 * @cpu: logical cpu id.
32 *
33 * Return: part id of logical cpu passed as argument.
34 */
35static inline unsigned int smp_cpuid_part(int cpu)
36{
37 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
38
39 return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
40 read_cpuid_part();
41}
42
28/* all SMP configurations have the extended CPUID registers */ 43/* all SMP configurations have the extended CPUID registers */
29#ifndef CONFIG_MMU 44#ifndef CONFIG_MMU
30#define tlb_ops_need_broadcast() 0 45#define tlb_ops_need_broadcast() 0
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 8db307d0954b..2fdf8679b46e 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -208,26 +208,21 @@
208#endif 208#endif
209 .endif 209 .endif
210 msr spsr_cxsf, \rpsr 210 msr spsr_cxsf, \rpsr
211#if defined(CONFIG_CPU_V6) 211#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
212 ldr r0, [sp] 212 @ We must avoid clrex due to Cortex-A15 erratum #830321
213 strex r1, r2, [sp] @ clear the exclusive monitor 213 sub r0, sp, #4 @ uninhabited address
214 ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr 214 strex r1, r2, [r0] @ clear the exclusive monitor
215#elif defined(CONFIG_CPU_32v6K)
216 clrex @ clear the exclusive monitor
217 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
218#else
219 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
220#endif 215#endif
216 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
221 .endm 217 .endm
222 218
223 .macro restore_user_regs, fast = 0, offset = 0 219 .macro restore_user_regs, fast = 0, offset = 0
224 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 220 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
225 ldr lr, [sp, #\offset + S_PC]! @ get pc 221 ldr lr, [sp, #\offset + S_PC]! @ get pc
226 msr spsr_cxsf, r1 @ save in spsr_svc 222 msr spsr_cxsf, r1 @ save in spsr_svc
227#if defined(CONFIG_CPU_V6) 223#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
224 @ We must avoid clrex due to Cortex-A15 erratum #830321
228 strex r1, r2, [sp] @ clear the exclusive monitor 225 strex r1, r2, [sp] @ clear the exclusive monitor
229#elif defined(CONFIG_CPU_32v6K)
230 clrex @ clear the exclusive monitor
231#endif 226#endif
232 .if \fast 227 .if \fast
233 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr 228 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
@@ -261,7 +256,10 @@
261 .endif 256 .endif
262 ldr lr, [sp, #S_SP] @ top of the stack 257 ldr lr, [sp, #S_SP] @ top of the stack
263 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc 258 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
264 clrex @ clear the exclusive monitor 259
260 @ We must avoid clrex due to Cortex-A15 erratum #830321
261 strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
262
265 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context 263 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
266 ldmia sp, {r0 - r12} 264 ldmia sp, {r0 - r12}
267 mov sp, lr 265 mov sp, lr
@@ -282,13 +280,16 @@
282 .endm 280 .endm
283#else /* ifdef CONFIG_CPU_V7M */ 281#else /* ifdef CONFIG_CPU_V7M */
284 .macro restore_user_regs, fast = 0, offset = 0 282 .macro restore_user_regs, fast = 0, offset = 0
285 clrex @ clear the exclusive monitor
286 mov r2, sp 283 mov r2, sp
287 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr 284 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
288 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 285 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
289 ldr lr, [sp, #\offset + S_PC] @ get pc 286 ldr lr, [sp, #\offset + S_PC] @ get pc
290 add sp, sp, #\offset + S_SP 287 add sp, sp, #\offset + S_SP
291 msr spsr_cxsf, r1 @ save in spsr_svc 288 msr spsr_cxsf, r1 @ save in spsr_svc
289
290 @ We must avoid clrex due to Cortex-A15 erratum #830321
291 strex r1, r2, [sp] @ clear the exclusive monitor
292
292 .if \fast 293 .if \fast
293 ldmdb sp, {r1 - r12} @ get calling r1 - r12 294 ldmdb sp, {r1 - r12} @ get calling r1 - r12
294 .else 295 .else
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 45e478157278..6a4dffefd357 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -91,6 +91,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
91 break; 91 break;
92 92
93 case R_ARM_ABS32: 93 case R_ARM_ABS32:
94 case R_ARM_TARGET1:
94 *(u32 *)loc += sym->st_value; 95 *(u32 *)loc += sym->st_value;
95 break; 96 break;
96 97
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 67c492aabf4d..b19a39652545 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -36,5 +36,4 @@ obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o
36 36
37ifeq ($(CONFIG_ARCH_BRCMSTB),y) 37ifeq ($(CONFIG_ARCH_BRCMSTB),y)
38obj-y += brcmstb.o 38obj-y += brcmstb.o
39obj-$(CONFIG_SMP) += headsmp-brcmstb.o platsmp-brcmstb.o
40endif 39endif
diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h
deleted file mode 100644
index ec0c3d112b36..000000000000
--- a/arch/arm/mach-bcm/brcmstb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Copyright (C) 2013-2014 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __BRCMSTB_H__
15#define __BRCMSTB_H__
16
17void brcmstb_secondary_startup(void);
18
19#endif /* __BRCMSTB_H__ */
diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S
deleted file mode 100644
index 199c1ea58248..000000000000
--- a/arch/arm/mach-bcm/headsmp-brcmstb.S
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * SMP boot code for secondary CPUs
3 * Based on arch/arm/mach-tegra/headsmp.S
4 *
5 * Copyright (C) 2010 NVIDIA, Inc.
6 * Copyright (C) 2013-2014 Broadcom Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <asm/assembler.h>
19#include <linux/linkage.h>
20#include <linux/init.h>
21
22 .section ".text.head", "ax"
23
24ENTRY(brcmstb_secondary_startup)
25 /*
26 * Ensure CPU is in a sane state by disabling all IRQs and switching
27 * into SVC mode.
28 */
29 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0
30
31 bl v7_invalidate_l1
32 b secondary_startup
33ENDPROC(brcmstb_secondary_startup)
diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c
deleted file mode 100644
index af780e9c23a6..000000000000
--- a/arch/arm/mach-bcm/platsmp-brcmstb.c
+++ /dev/null
@@ -1,363 +0,0 @@
1/*
2 * Broadcom STB CPU SMP and hotplug support for ARM
3 *
4 * Copyright (C) 2013-2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/errno.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/of_address.h>
21#include <linux/of_platform.h>
22#include <linux/printk.h>
23#include <linux/regmap.h>
24#include <linux/smp.h>
25#include <linux/mfd/syscon.h>
26#include <linux/spinlock.h>
27
28#include <asm/cacheflush.h>
29#include <asm/cp15.h>
30#include <asm/mach-types.h>
31#include <asm/smp_plat.h>
32
33#include "brcmstb.h"
34
35enum {
36 ZONE_MAN_CLKEN_MASK = BIT(0),
37 ZONE_MAN_RESET_CNTL_MASK = BIT(1),
38 ZONE_MAN_MEM_PWR_MASK = BIT(4),
39 ZONE_RESERVED_1_MASK = BIT(5),
40 ZONE_MAN_ISO_CNTL_MASK = BIT(6),
41 ZONE_MANUAL_CONTROL_MASK = BIT(7),
42 ZONE_PWR_DN_REQ_MASK = BIT(9),
43 ZONE_PWR_UP_REQ_MASK = BIT(10),
44 ZONE_BLK_RST_ASSERT_MASK = BIT(12),
45 ZONE_PWR_OFF_STATE_MASK = BIT(25),
46 ZONE_PWR_ON_STATE_MASK = BIT(26),
47 ZONE_DPG_PWR_STATE_MASK = BIT(28),
48 ZONE_MEM_PWR_STATE_MASK = BIT(29),
49 ZONE_RESET_STATE_MASK = BIT(31),
50 CPU0_PWR_ZONE_CTRL_REG = 1,
51 CPU_RESET_CONFIG_REG = 2,
52};
53
54static void __iomem *cpubiuctrl_block;
55static void __iomem *hif_cont_block;
56static u32 cpu0_pwr_zone_ctrl_reg;
57static u32 cpu_rst_cfg_reg;
58static u32 hif_cont_reg;
59
60#ifdef CONFIG_HOTPLUG_CPU
61static DEFINE_PER_CPU_ALIGNED(int, per_cpu_sw_state);
62
63static int per_cpu_sw_state_rd(u32 cpu)
64{
65 sync_cache_r(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
66 return per_cpu(per_cpu_sw_state, cpu);
67}
68
69static void per_cpu_sw_state_wr(u32 cpu, int val)
70{
71 per_cpu(per_cpu_sw_state, cpu) = val;
72 dmb();
73 sync_cache_w(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
74 dsb_sev();
75}
76#else
77static inline void per_cpu_sw_state_wr(u32 cpu, int val) { }
78#endif
79
80static void __iomem *pwr_ctrl_get_base(u32 cpu)
81{
82 void __iomem *base = cpubiuctrl_block + cpu0_pwr_zone_ctrl_reg;
83 base += (cpu_logical_map(cpu) * 4);
84 return base;
85}
86
87static u32 pwr_ctrl_rd(u32 cpu)
88{
89 void __iomem *base = pwr_ctrl_get_base(cpu);
90 return readl_relaxed(base);
91}
92
93static void pwr_ctrl_wr(u32 cpu, u32 val)
94{
95 void __iomem *base = pwr_ctrl_get_base(cpu);
96 writel(val, base);
97}
98
99static void cpu_rst_cfg_set(u32 cpu, int set)
100{
101 u32 val;
102 val = readl_relaxed(cpubiuctrl_block + cpu_rst_cfg_reg);
103 if (set)
104 val |= BIT(cpu_logical_map(cpu));
105 else
106 val &= ~BIT(cpu_logical_map(cpu));
107 writel_relaxed(val, cpubiuctrl_block + cpu_rst_cfg_reg);
108}
109
110static void cpu_set_boot_addr(u32 cpu, unsigned long boot_addr)
111{
112 const int reg_ofs = cpu_logical_map(cpu) * 8;
113 writel_relaxed(0, hif_cont_block + hif_cont_reg + reg_ofs);
114 writel_relaxed(boot_addr, hif_cont_block + hif_cont_reg + 4 + reg_ofs);
115}
116
117static void brcmstb_cpu_boot(u32 cpu)
118{
119 pr_info("SMP: Booting CPU%d...\n", cpu);
120
121 /*
122 * set the reset vector to point to the secondary_startup
123 * routine
124 */
125 cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup));
126
127 /* unhalt the cpu */
128 cpu_rst_cfg_set(cpu, 0);
129}
130
131static void brcmstb_cpu_power_on(u32 cpu)
132{
133 /*
134 * The secondary cores power was cut, so we must go through
135 * power-on initialization.
136 */
137 u32 tmp;
138
139 pr_info("SMP: Powering up CPU%d...\n", cpu);
140
141 /* Request zone power up */
142 pwr_ctrl_wr(cpu, ZONE_PWR_UP_REQ_MASK);
143
144 /* Wait for the power up FSM to complete */
145 do {
146 tmp = pwr_ctrl_rd(cpu);
147 } while (!(tmp & ZONE_PWR_ON_STATE_MASK));
148
149 per_cpu_sw_state_wr(cpu, 1);
150}
151
152static int brcmstb_cpu_get_power_state(u32 cpu)
153{
154 int tmp = pwr_ctrl_rd(cpu);
155 return (tmp & ZONE_RESET_STATE_MASK) ? 0 : 1;
156}
157
158#ifdef CONFIG_HOTPLUG_CPU
159
160static void brcmstb_cpu_die(u32 cpu)
161{
162 v7_exit_coherency_flush(all);
163
164 /* Prevent all interrupts from reaching this CPU. */
165 arch_local_irq_disable();
166
167 /*
168 * Final full barrier to ensure everything before this instruction has
169 * quiesced.
170 */
171 isb();
172 dsb();
173
174 per_cpu_sw_state_wr(cpu, 0);
175
176 /* Sit and wait to die */
177 wfi();
178
179 /* We should never get here... */
180 panic("Spurious interrupt on CPU %d received!\n", cpu);
181}
182
183static int brcmstb_cpu_kill(u32 cpu)
184{
185 u32 tmp;
186
187 pr_info("SMP: Powering down CPU%d...\n", cpu);
188
189 while (per_cpu_sw_state_rd(cpu))
190 ;
191
192 /* Program zone reset */
193 pwr_ctrl_wr(cpu, ZONE_RESET_STATE_MASK | ZONE_BLK_RST_ASSERT_MASK |
194 ZONE_PWR_DN_REQ_MASK);
195
196 /* Verify zone reset */
197 tmp = pwr_ctrl_rd(cpu);
198 if (!(tmp & ZONE_RESET_STATE_MASK))
199 pr_err("%s: Zone reset bit for CPU %d not asserted!\n",
200 __func__, cpu);
201
202 /* Wait for power down */
203 do {
204 tmp = pwr_ctrl_rd(cpu);
205 } while (!(tmp & ZONE_PWR_OFF_STATE_MASK));
206
207 /* Settle-time from Broadcom-internal DVT reference code */
208 udelay(7);
209
210 /* Assert reset on the CPU */
211 cpu_rst_cfg_set(cpu, 1);
212
213 return 1;
214}
215
216#endif /* CONFIG_HOTPLUG_CPU */
217
218static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
219{
220 int rc = 0;
221 char *name;
222 struct device_node *syscon_np = NULL;
223
224 name = "syscon-cpu";
225
226 syscon_np = of_parse_phandle(np, name, 0);
227 if (!syscon_np) {
228 pr_err("can't find phandle %s\n", name);
229 rc = -EINVAL;
230 goto cleanup;
231 }
232
233 cpubiuctrl_block = of_iomap(syscon_np, 0);
234 if (!cpubiuctrl_block) {
235 pr_err("iomap failed for cpubiuctrl_block\n");
236 rc = -EINVAL;
237 goto cleanup;
238 }
239
240 rc = of_property_read_u32_index(np, name, CPU0_PWR_ZONE_CTRL_REG,
241 &cpu0_pwr_zone_ctrl_reg);
242 if (rc) {
243 pr_err("failed to read 1st entry from %s property (%d)\n", name,
244 rc);
245 rc = -EINVAL;
246 goto cleanup;
247 }
248
249 rc = of_property_read_u32_index(np, name, CPU_RESET_CONFIG_REG,
250 &cpu_rst_cfg_reg);
251 if (rc) {
252 pr_err("failed to read 2nd entry from %s property (%d)\n", name,
253 rc);
254 rc = -EINVAL;
255 goto cleanup;
256 }
257
258cleanup:
259 if (syscon_np)
260 of_node_put(syscon_np);
261
262 return rc;
263}
264
265static int __init setup_hifcont_regs(struct device_node *np)
266{
267 int rc = 0;
268 char *name;
269 struct device_node *syscon_np = NULL;
270
271 name = "syscon-cont";
272
273 syscon_np = of_parse_phandle(np, name, 0);
274 if (!syscon_np) {
275 pr_err("can't find phandle %s\n", name);
276 rc = -EINVAL;
277 goto cleanup;
278 }
279
280 hif_cont_block = of_iomap(syscon_np, 0);
281 if (!hif_cont_block) {
282 pr_err("iomap failed for hif_cont_block\n");
283 rc = -EINVAL;
284 goto cleanup;
285 }
286
287 /* offset is at top of hif_cont_block */
288 hif_cont_reg = 0;
289
290cleanup:
291 if (syscon_np)
292 of_node_put(syscon_np);
293
294 return rc;
295}
296
297static void __init brcmstb_cpu_ctrl_setup(unsigned int max_cpus)
298{
299 int rc;
300 struct device_node *np;
301 char *name;
302
303 name = "brcm,brcmstb-smpboot";
304 np = of_find_compatible_node(NULL, NULL, name);
305 if (!np) {
306 pr_err("can't find compatible node %s\n", name);
307 return;
308 }
309
310 rc = setup_hifcpubiuctrl_regs(np);
311 if (rc)
312 return;
313
314 rc = setup_hifcont_regs(np);
315 if (rc)
316 return;
317}
318
319static DEFINE_SPINLOCK(boot_lock);
320
321static void brcmstb_secondary_init(unsigned int cpu)
322{
323 /*
324 * Synchronise with the boot thread.
325 */
326 spin_lock(&boot_lock);
327 spin_unlock(&boot_lock);
328}
329
330static int brcmstb_boot_secondary(unsigned int cpu, struct task_struct *idle)
331{
332 /*
333 * set synchronisation state between this boot processor
334 * and the secondary one
335 */
336 spin_lock(&boot_lock);
337
338 /* Bring up power to the core if necessary */
339 if (brcmstb_cpu_get_power_state(cpu) == 0)
340 brcmstb_cpu_power_on(cpu);
341
342 brcmstb_cpu_boot(cpu);
343
344 /*
345 * now the secondary core is starting up let it run its
346 * calibrations, then wait for it to finish
347 */
348 spin_unlock(&boot_lock);
349
350 return 0;
351}
352
353static struct smp_operations brcmstb_smp_ops __initdata = {
354 .smp_prepare_cpus = brcmstb_cpu_ctrl_setup,
355 .smp_secondary_init = brcmstb_secondary_init,
356 .smp_boot_secondary = brcmstb_boot_secondary,
357#ifdef CONFIG_HOTPLUG_CPU
358 .cpu_kill = brcmstb_cpu_kill,
359 .cpu_die = brcmstb_cpu_die,
360#endif
361};
362
363CPU_METHOD_OF_DECLARE(brcmstb_smp, "brcm,brahma-b15", &brcmstb_smp_ops);
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index b2f8b60cf0e9..dc9a764a7c37 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -43,7 +43,6 @@
43 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \ 43 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \
44 "isb\n\t"\ 44 "isb\n\t"\
45 "bl v7_flush_dcache_"__stringify(level)"\n\t" \ 45 "bl v7_flush_dcache_"__stringify(level)"\n\t" \
46 "clrex\n\t"\
47 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \ 46 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \
48 "bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \ 47 "bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \
49 /* Dummy Load of a device register to avoid Erratum 799270 */ \ 48 /* Dummy Load of a device register to avoid Erratum 799270 */ \
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index be9a51afe05a..4e9b4f63d42b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -108,17 +108,6 @@ config SOC_IMX35
108if ARCH_MULTI_V4T 108if ARCH_MULTI_V4T
109 109
110comment "MX1 platforms:" 110comment "MX1 platforms:"
111config MACH_MXLADS
112 bool
113
114config ARCH_MX1ADS
115 bool "MX1ADS platform"
116 select IMX_HAVE_PLATFORM_IMX_I2C
117 select IMX_HAVE_PLATFORM_IMX_UART
118 select MACH_MXLADS
119 select SOC_IMX1
120 help
121 Say Y here if you are using Motorola MX1ADS/MXLADS boards
122 111
123config MACH_SCB9328 112config MACH_SCB9328
124 bool "Synertronixx scb9328" 113 bool "Synertronixx scb9328"
@@ -223,86 +212,6 @@ config MACH_MX27ADS
223 Include support for MX27ADS platform. This includes specific 212 Include support for MX27ADS platform. This includes specific
224 configurations for the board and its peripherals. 213 configurations for the board and its peripherals.
225 214
226config MACH_PCM038
227 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
228 select IMX_HAVE_PLATFORM_IMX2_WDT
229 select IMX_HAVE_PLATFORM_IMX_I2C
230 select IMX_HAVE_PLATFORM_IMX_UART
231 select IMX_HAVE_PLATFORM_MXC_EHCI
232 select IMX_HAVE_PLATFORM_MXC_NAND
233 select IMX_HAVE_PLATFORM_MXC_W1
234 select IMX_HAVE_PLATFORM_SPI_IMX
235 select USB_ULPI_VIEWPORT if USB_ULPI
236 select SOC_IMX27
237 help
238 Include support for phyCORE-i.MX27 (aka pcm038) platform. This
239 includes specific configurations for the module and its peripherals.
240
241choice
242 prompt "Baseboard"
243 depends on MACH_PCM038
244 default MACH_PCM970_BASEBOARD
245
246config MACH_PCM970_BASEBOARD
247 bool "PHYTEC PCM970 development board"
248 select IMX_HAVE_PLATFORM_IMX_FB
249 select IMX_HAVE_PLATFORM_MXC_MMC
250 help
251 This adds board specific devices that can be found on Phytec's
252 PCM970 evaluation board.
253
254endchoice
255
256config MACH_CPUIMX27
257 bool "Eukrea CPUIMX27 module"
258 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
259 select IMX_HAVE_PLATFORM_IMX2_WDT
260 select IMX_HAVE_PLATFORM_IMX_I2C
261 select IMX_HAVE_PLATFORM_IMX_UART
262 select IMX_HAVE_PLATFORM_MXC_EHCI
263 select IMX_HAVE_PLATFORM_MXC_NAND
264 select IMX_HAVE_PLATFORM_MXC_W1
265 select USB_ULPI_VIEWPORT if USB_ULPI
266 select SOC_IMX27
267 help
268 Include support for Eukrea CPUIMX27 platform. This includes
269 specific configurations for the module and its peripherals.
270
271config MACH_EUKREA_CPUIMX27_USESDHC2
272 bool "CPUIMX27 integrates SDHC2 module"
273 depends on MACH_CPUIMX27
274 select IMX_HAVE_PLATFORM_MXC_MMC
275 help
276 This adds support for the internal SDHC2 used on CPUIMX27
277 for wifi or eMMC.
278
279config MACH_EUKREA_CPUIMX27_USEUART4
280 bool "CPUIMX27 integrates UART4 module"
281 depends on MACH_CPUIMX27
282 help
283 This adds support for the internal UART4 used on CPUIMX27
284 for bluetooth.
285
286choice
287 prompt "Baseboard"
288 depends on MACH_CPUIMX27
289 default MACH_EUKREA_MBIMX27_BASEBOARD
290
291config MACH_EUKREA_MBIMX27_BASEBOARD
292 bool "Eukrea MBIMX27 development board"
293 select IMX_HAVE_PLATFORM_IMX_FB
294 select IMX_HAVE_PLATFORM_IMX_KEYPAD
295 select IMX_HAVE_PLATFORM_IMX_SSI
296 select IMX_HAVE_PLATFORM_IMX_UART
297 select IMX_HAVE_PLATFORM_MXC_MMC
298 select IMX_HAVE_PLATFORM_SPI_IMX
299 select LEDS_GPIO_REGISTER
300 help
301 This adds board specific devices that can be found on Eukrea's
302 MBIMX27 evaluation board.
303
304endchoice
305
306config MACH_MX27_3DS 215config MACH_MX27_3DS
307 bool "MX27PDK platform" 216 bool "MX27PDK platform"
308 select IMX_HAVE_PLATFORM_FSL_USB2_UDC 217 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
@@ -359,18 +268,6 @@ config MACH_PCA100
359 Include support for phyCARD-s (aka pca100) platform. This 268 Include support for phyCARD-s (aka pca100) platform. This
360 includes specific configurations for the module and its peripherals. 269 includes specific configurations for the module and its peripherals.
361 270
362config MACH_MXT_TD60
363 bool "Maxtrack i-MXT TD60"
364 select IMX_HAVE_PLATFORM_IMX_FB
365 select IMX_HAVE_PLATFORM_IMX_I2C
366 select IMX_HAVE_PLATFORM_IMX_UART
367 select IMX_HAVE_PLATFORM_MXC_MMC
368 select IMX_HAVE_PLATFORM_MXC_NAND
369 select SOC_IMX27
370 help
371 Include support for i-MXT (aka td60) platform. This
372 includes specific configurations for the module and its peripherals.
373
374config MACH_IMX27_DT 271config MACH_IMX27_DT
375 bool "Support i.MX27 platforms from device tree" 272 bool "Support i.MX27 platforms from device tree"
376 select SOC_IMX27 273 select SOC_IMX27
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 23c02932bf84..4147729775d2 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -41,7 +41,6 @@ obj-y += ssi-fiq-ksym.o
41endif 41endif
42 42
43# i.MX1 based machines 43# i.MX1 based machines
44obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
45obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o 44obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
46obj-$(CONFIG_MACH_APF9328) += mach-apf9328.o 45obj-$(CONFIG_MACH_APF9328) += mach-apf9328.o
47 46
@@ -56,14 +55,9 @@ obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o
56 55
57# i.MX27 based machines 56# i.MX27 based machines
58obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o 57obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
59obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
60obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
61obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o 58obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
62obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o 59obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o
63obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o
64obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
65obj-$(CONFIG_MACH_PCA100) += mach-pca100.o 60obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
66obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
67obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o 61obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
68 62
69# i.MX31 based machines 63# i.MX31 based machines
diff --git a/arch/arm/mach-imx/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h
deleted file mode 100644
index 6f371e35753d..000000000000
--- a/arch/arm/mach-imx/board-pcm038.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16 * MA 02110-1301, USA.
17 */
18
19#ifndef __ASM_ARCH_MXC_BOARD_PCM038_H__
20#define __ASM_ARCH_MXC_BOARD_PCM038_H__
21
22#ifndef __ASSEMBLY__
23/*
24 * This CPU module needs a baseboard to work. After basic initializing
25 * its own devices, it calls the baseboard's init function.
26 * TODO: Add your own baseboard init function and call it from
27 * inside pcm038_init().
28 *
29 * This example here is for the development board. Refer pcm970-baseboard.c
30 */
31
32extern void pcm970_baseboard_init(void);
33
34#endif
35
36#endif /* __ASM_ARCH_MXC_BOARD_PCM038_H__ */
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 22ba8973bcb9..1dabf435c592 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -98,11 +98,9 @@ void imx_set_cpu_arg(int cpu, u32 arg);
98void v7_secondary_startup(void); 98void v7_secondary_startup(void);
99void imx_scu_map_io(void); 99void imx_scu_map_io(void);
100void imx_smp_prepare(void); 100void imx_smp_prepare(void);
101void imx_scu_standby_enable(void);
102#else 101#else
103static inline void imx_scu_map_io(void) {} 102static inline void imx_scu_map_io(void) {}
104static inline void imx_smp_prepare(void) {} 103static inline void imx_smp_prepare(void) {}
105static inline void imx_scu_standby_enable(void) {}
106#endif 104#endif
107void imx_src_init(void); 105void imx_src_init(void);
108void imx_gpc_init(void); 106void imx_gpc_init(void);
diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
index 10844d3bb926..aa935787b743 100644
--- a/arch/arm/mach-imx/cpuidle-imx6q.c
+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
@@ -66,10 +66,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = {
66 66
67int __init imx6q_cpuidle_init(void) 67int __init imx6q_cpuidle_init(void)
68{ 68{
69 /* Need to enable SCU standby for entering WAIT modes */
70 if (!cpu_is_imx6sx())
71 imx_scu_standby_enable();
72
73 /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ 69 /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */
74 imx6q_set_int_mem_clk_lpm(true); 70 imx6q_set_int_mem_clk_lpm(true);
75 71
diff --git a/arch/arm/mach-imx/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h
index a21d3313f994..bb2c90d65914 100644
--- a/arch/arm/mach-imx/eukrea-baseboards.h
+++ b/arch/arm/mach-imx/eukrea-baseboards.h
@@ -27,23 +27,15 @@
27 * This CPU module needs a baseboard to work. After basic initializing 27 * This CPU module needs a baseboard to work. After basic initializing
28 * its own devices, it calls baseboard's init function. 28 * its own devices, it calls baseboard's init function.
29 * TODO: Add your own baseboard init function and call it from 29 * TODO: Add your own baseboard init function and call it from
30 * inside eukrea_cpuimx25_init() eukrea_cpuimx27_init() 30 * inside eukrea_cpuimx25_init() or eukrea_cpuimx35_init()
31 * eukrea_cpuimx35_init() eukrea_cpuimx51_init()
32 * or eukrea_cpuimx51sd_init().
33 * 31 *
34 * This example here is for the development board. Refer 32 * This example here is for the development board. Refer
35 * mach-mx25/eukrea_mbimxsd-baseboard.c for cpuimx25 33 * mach-mx25/eukrea_mbimxsd-baseboard.c for cpuimx25
36 * mach-imx/eukrea_mbimx27-baseboard.c for cpuimx27
37 * mach-mx3/eukrea_mbimxsd-baseboard.c for cpuimx35 34 * mach-mx3/eukrea_mbimxsd-baseboard.c for cpuimx35
38 * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51
39 * mach-mx5/eukrea_mbimxsd-baseboard.c for cpuimx51sd
40 */ 35 */
41 36
42extern void eukrea_mbimxsd25_baseboard_init(void); 37extern void eukrea_mbimxsd25_baseboard_init(void);
43extern void eukrea_mbimx27_baseboard_init(void);
44extern void eukrea_mbimxsd35_baseboard_init(void); 38extern void eukrea_mbimxsd35_baseboard_init(void);
45extern void eukrea_mbimx51_baseboard_init(void);
46extern void eukrea_mbimxsd51_baseboard_init(void);
47 39
48#endif 40#endif
49 41
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
deleted file mode 100644
index b2f08bfbbdd3..000000000000
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ /dev/null
@@ -1,351 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/gpio.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/spi/spi.h>
26#include <linux/spi/ads7846.h>
27#include <linux/backlight.h>
28#include <video/platform_lcd.h>
29
30#include <asm/mach/arch.h>
31
32#include "common.h"
33#include "devices-imx27.h"
34#include "hardware.h"
35#include "iomux-mx27.h"
36
37static const int eukrea_mbimx27_pins[] __initconst = {
38 /* UART2 */
39 PE3_PF_UART2_CTS,
40 PE4_PF_UART2_RTS,
41 PE6_PF_UART2_TXD,
42 PE7_PF_UART2_RXD,
43 /* UART3 */
44 PE8_PF_UART3_TXD,
45 PE9_PF_UART3_RXD,
46 PE10_PF_UART3_CTS,
47 PE11_PF_UART3_RTS,
48 /* UART4 */
49#if !defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
50 PB26_AF_UART4_RTS,
51 PB28_AF_UART4_TXD,
52 PB29_AF_UART4_CTS,
53 PB31_AF_UART4_RXD,
54#endif
55 /* SDHC1*/
56 PE18_PF_SD1_D0,
57 PE19_PF_SD1_D1,
58 PE20_PF_SD1_D2,
59 PE21_PF_SD1_D3,
60 PE22_PF_SD1_CMD,
61 PE23_PF_SD1_CLK,
62 /* display */
63 PA5_PF_LSCLK,
64 PA6_PF_LD0,
65 PA7_PF_LD1,
66 PA8_PF_LD2,
67 PA9_PF_LD3,
68 PA10_PF_LD4,
69 PA11_PF_LD5,
70 PA12_PF_LD6,
71 PA13_PF_LD7,
72 PA14_PF_LD8,
73 PA15_PF_LD9,
74 PA16_PF_LD10,
75 PA17_PF_LD11,
76 PA18_PF_LD12,
77 PA19_PF_LD13,
78 PA20_PF_LD14,
79 PA21_PF_LD15,
80 PA22_PF_LD16,
81 PA23_PF_LD17,
82 PA28_PF_HSYNC,
83 PA29_PF_VSYNC,
84 PA30_PF_CONTRAST,
85 PA31_PF_OE_ACD,
86 /* SPI1 */
87 PD29_PF_CSPI1_SCLK,
88 PD30_PF_CSPI1_MISO,
89 PD31_PF_CSPI1_MOSI,
90 /* SSI4 */
91#if defined(CONFIG_SND_SOC_EUKREA_TLV320) \
92 || defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE)
93 PC16_PF_SSI4_FS,
94 PC17_PF_SSI4_RXD | GPIO_PUEN,
95 PC18_PF_SSI4_TXD | GPIO_PUEN,
96 PC19_PF_SSI4_CLK,
97#endif
98};
99
100static const uint32_t eukrea_mbimx27_keymap[] = {
101 KEY(0, 0, KEY_UP),
102 KEY(0, 1, KEY_DOWN),
103 KEY(1, 0, KEY_RIGHT),
104 KEY(1, 1, KEY_LEFT),
105};
106
107static const struct matrix_keymap_data
108eukrea_mbimx27_keymap_data __initconst = {
109 .keymap = eukrea_mbimx27_keymap,
110 .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap),
111};
112
113static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = {
114 {
115 .name = "led1",
116 .default_trigger = "heartbeat",
117 .active_low = 1,
118 .gpio = GPIO_PORTF | 16,
119 },
120 {
121 .name = "led2",
122 .default_trigger = "none",
123 .active_low = 1,
124 .gpio = GPIO_PORTF | 19,
125 },
126};
127
128static const struct gpio_led_platform_data
129 eukrea_mbimx27_gpio_led_info __initconst = {
130 .leds = eukrea_mbimx27_gpio_leds,
131 .num_leds = ARRAY_SIZE(eukrea_mbimx27_gpio_leds),
132};
133
134static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
135 {
136 .mode = {
137 .name = "CMO-QVGA",
138 .refresh = 60,
139 .xres = 320,
140 .yres = 240,
141 .pixclock = 156000,
142 .hsync_len = 30,
143 .left_margin = 38,
144 .right_margin = 20,
145 .vsync_len = 3,
146 .upper_margin = 15,
147 .lower_margin = 4,
148 },
149 .pcr = 0xFAD08B80,
150 .bpp = 16,
151 }, {
152 .mode = {
153 .name = "DVI-VGA",
154 .refresh = 60,
155 .xres = 640,
156 .yres = 480,
157 .pixclock = 32000,
158 .hsync_len = 1,
159 .left_margin = 35,
160 .right_margin = 0,
161 .vsync_len = 1,
162 .upper_margin = 7,
163 .lower_margin = 0,
164 },
165 .pcr = 0xFA208B80,
166 .bpp = 16,
167 }, {
168 .mode = {
169 .name = "DVI-SVGA",
170 .refresh = 60,
171 .xres = 800,
172 .yres = 600,
173 .pixclock = 25000,
174 .hsync_len = 1,
175 .left_margin = 35,
176 .right_margin = 0,
177 .vsync_len = 1,
178 .upper_margin = 7,
179 .lower_margin = 0,
180 },
181 .pcr = 0xFA208B80,
182 .bpp = 16,
183 },
184};
185
186static const struct imx_fb_platform_data eukrea_mbimx27_fb_data __initconst = {
187 .mode = eukrea_mbimx27_modes,
188 .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes),
189
190 .pwmr = 0x00A903FF,
191 .lscr1 = 0x00120300,
192 .dmacr = 0x00040060,
193};
194
195static void eukrea_mbimx27_bl_set_intensity(int intensity)
196{
197 if (intensity)
198 gpio_direction_output(GPIO_PORTE | 5, 1);
199 else
200 gpio_direction_output(GPIO_PORTE | 5, 0);
201}
202
203static struct generic_bl_info eukrea_mbimx27_bl_info = {
204 .name = "eukrea_mbimx27-bl",
205 .max_intensity = 0xff,
206 .default_intensity = 0xff,
207 .set_bl_intensity = eukrea_mbimx27_bl_set_intensity,
208};
209
210static struct platform_device eukrea_mbimx27_bl_dev = {
211 .name = "generic-bl",
212 .id = 1,
213 .dev = {
214 .platform_data = &eukrea_mbimx27_bl_info,
215 },
216};
217
218static void eukrea_mbimx27_lcd_power_set(struct plat_lcd_data *pd,
219 unsigned int power)
220{
221 if (power)
222 gpio_direction_output(GPIO_PORTA | 25, 1);
223 else
224 gpio_direction_output(GPIO_PORTA | 25, 0);
225}
226
227static struct plat_lcd_data eukrea_mbimx27_lcd_power_data = {
228 .set_power = eukrea_mbimx27_lcd_power_set,
229};
230
231static struct platform_device eukrea_mbimx27_lcd_powerdev = {
232 .name = "platform-lcd",
233 .dev.platform_data = &eukrea_mbimx27_lcd_power_data,
234};
235
236static const struct imxuart_platform_data uart_pdata __initconst = {
237 .flags = IMXUART_HAVE_RTSCTS,
238};
239
240#define ADS7846_PENDOWN (GPIO_PORTD | 25)
241
242static void __maybe_unused ads7846_dev_init(void)
243{
244 if (gpio_request(ADS7846_PENDOWN, "ADS7846 pendown") < 0) {
245 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
246 return;
247 }
248 gpio_direction_input(ADS7846_PENDOWN);
249}
250
251static int ads7846_get_pendown_state(void)
252{
253 return !gpio_get_value(ADS7846_PENDOWN);
254}
255
256static struct ads7846_platform_data ads7846_config __initdata = {
257 .get_pendown_state = ads7846_get_pendown_state,
258 .keep_vref_on = 1,
259};
260
261static struct spi_board_info __maybe_unused
262 eukrea_mbimx27_spi_board_info[] __initdata = {
263 [0] = {
264 .modalias = "ads7846",
265 .bus_num = 0,
266 .chip_select = 0,
267 .max_speed_hz = 1500000,
268 /* irq number is run-time assigned */
269 .platform_data = &ads7846_config,
270 .mode = SPI_MODE_2,
271 },
272};
273
274static int eukrea_mbimx27_spi_cs[] = {GPIO_PORTD | 28};
275
276static const struct spi_imx_master eukrea_mbimx27_spi0_data __initconst = {
277 .chipselect = eukrea_mbimx27_spi_cs,
278 .num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs),
279};
280
281static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = {
282 {
283 I2C_BOARD_INFO("tlv320aic23", 0x1a),
284 },
285};
286
287static const struct imxmmc_platform_data sdhc_pdata __initconst = {
288 .dat3_card_detect = 1,
289};
290
291static const
292struct imx_ssi_platform_data eukrea_mbimx27_ssi_pdata __initconst = {
293 .flags = IMX_SSI_DMA | IMX_SSI_USE_I2S_SLAVE,
294};
295
296/*
297 * system init for baseboard usage. Will be called by cpuimx27 init.
298 *
299 * Add platform devices present on this baseboard and init
300 * them from CPU side as far as required to use them later on
301 */
302void __init eukrea_mbimx27_baseboard_init(void)
303{
304 mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins,
305 ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27");
306
307 imx27_add_imx_uart1(&uart_pdata);
308 imx27_add_imx_uart2(&uart_pdata);
309#if !defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
310 imx27_add_imx_uart3(&uart_pdata);
311#endif
312
313 imx27_add_imx_fb(&eukrea_mbimx27_fb_data);
314 imx27_add_mxc_mmc(0, &sdhc_pdata);
315
316 i2c_register_board_info(0, eukrea_mbimx27_i2c_devices,
317 ARRAY_SIZE(eukrea_mbimx27_i2c_devices));
318
319 imx27_add_imx_ssi(0, &eukrea_mbimx27_ssi_pdata);
320
321#if defined(CONFIG_TOUCHSCREEN_ADS7846) \
322 || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
323 /* ADS7846 Touchscreen controller init */
324 mxc_gpio_mode(GPIO_PORTD | 25 | GPIO_GPIO | GPIO_IN);
325 ads7846_dev_init();
326#endif
327
328 /* SPI_CS0 init */
329 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
330 imx27_add_spi_imx0(&eukrea_mbimx27_spi0_data);
331 eukrea_mbimx27_spi_board_info[0].irq = gpio_to_irq(IMX_GPIO_NR(4, 25));
332 spi_register_board_info(eukrea_mbimx27_spi_board_info,
333 ARRAY_SIZE(eukrea_mbimx27_spi_board_info));
334
335 /* Leds configuration */
336 mxc_gpio_mode(GPIO_PORTF | 16 | GPIO_GPIO | GPIO_OUT);
337 mxc_gpio_mode(GPIO_PORTF | 19 | GPIO_GPIO | GPIO_OUT);
338 /* Backlight */
339 mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT);
340 gpio_request(GPIO_PORTE | 5, "backlight");
341 platform_device_register(&eukrea_mbimx27_bl_dev);
342 /* LCD Reset */
343 mxc_gpio_mode(GPIO_PORTA | 25 | GPIO_GPIO | GPIO_OUT);
344 gpio_request(GPIO_PORTA | 25, "lcd_enable");
345 platform_device_register(&eukrea_mbimx27_lcd_powerdev);
346
347 imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
348
349 gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info);
350 imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
351}
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index 7c66805d2cc0..1657fe64cd0f 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -64,7 +64,6 @@ int mxc_iomux_mode(unsigned int pin_mode)
64 64
65 return ret; 65 return ret;
66} 66}
67EXPORT_SYMBOL(mxc_iomux_mode);
68 67
69/* 68/*
70 * This function configures the pad value for a IOMUX pin. 69 * This function configures the pad value for a IOMUX pin.
@@ -90,7 +89,6 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
90 89
91 spin_unlock(&gpio_mux_lock); 90 spin_unlock(&gpio_mux_lock);
92} 91}
93EXPORT_SYMBOL(mxc_iomux_set_pad);
94 92
95/* 93/*
96 * allocs a single pin: 94 * allocs a single pin:
@@ -116,7 +114,6 @@ int mxc_iomux_alloc_pin(unsigned int pin, const char *label)
116 114
117 return 0; 115 return 0;
118} 116}
119EXPORT_SYMBOL(mxc_iomux_alloc_pin);
120 117
121int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count, 118int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count,
122 const char *label) 119 const char *label)
@@ -137,7 +134,6 @@ setup_error:
137 mxc_iomux_release_multiple_pins(pin_list, i); 134 mxc_iomux_release_multiple_pins(pin_list, i);
138 return ret; 135 return ret;
139} 136}
140EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins);
141 137
142void mxc_iomux_release_pin(unsigned int pin) 138void mxc_iomux_release_pin(unsigned int pin)
143{ 139{
@@ -146,7 +142,6 @@ void mxc_iomux_release_pin(unsigned int pin)
146 if (pad < (PIN_MAX + 1)) 142 if (pad < (PIN_MAX + 1))
147 clear_bit(pad, mxc_pin_alloc_map); 143 clear_bit(pad, mxc_pin_alloc_map);
148} 144}
149EXPORT_SYMBOL(mxc_iomux_release_pin);
150 145
151void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count) 146void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count)
152{ 147{
@@ -158,7 +153,6 @@ void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count)
158 p++; 153 p++;
159 } 154 }
160} 155}
161EXPORT_SYMBOL(mxc_iomux_release_multiple_pins);
162 156
163/* 157/*
164 * This function enables/disables the general purpose function for a particular 158 * This function enables/disables the general purpose function for a particular
@@ -178,4 +172,3 @@ void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en)
178 __raw_writel(l, IOMUXGPR); 172 __raw_writel(l, IOMUXGPR);
179 spin_unlock(&gpio_mux_lock); 173 spin_unlock(&gpio_mux_lock);
180} 174}
181EXPORT_SYMBOL(mxc_iomux_set_gpr);
diff --git a/arch/arm/mach-imx/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c
index 2b156d1d9e21..ecd543664644 100644
--- a/arch/arm/mach-imx/iomux-v1.c
+++ b/arch/arm/mach-imx/iomux-v1.c
@@ -153,7 +153,6 @@ int mxc_gpio_mode(int gpio_mode)
153 153
154 return 0; 154 return 0;
155} 155}
156EXPORT_SYMBOL(mxc_gpio_mode);
157 156
158static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) 157static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
159{ 158{
@@ -178,7 +177,6 @@ int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
178 ret = imx_iomuxv1_setup_multiple(pin_list, count); 177 ret = imx_iomuxv1_setup_multiple(pin_list, count);
179 return ret; 178 return ret;
180} 179}
181EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
182 180
183int __init imx_iomuxv1_init(void __iomem *base, int numports) 181int __init imx_iomuxv1_init(void __iomem *base, int numports)
184{ 182{
diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
index 9dae74bf47fc..d61f9606fc56 100644
--- a/arch/arm/mach-imx/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -55,7 +55,6 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
55 55
56 return 0; 56 return 0;
57} 57}
58EXPORT_SYMBOL(mxc_iomux_v3_setup_pad);
59 58
60int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count) 59int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count)
61{ 60{
@@ -71,7 +70,6 @@ int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count)
71 } 70 }
72 return 0; 71 return 0;
73} 72}
74EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads);
75 73
76void mxc_iomux_v3_init(void __iomem *iomux_v3_base) 74void mxc_iomux_v3_init(void __iomem *iomux_v3_base)
77{ 75{
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
deleted file mode 100644
index e6d4b9929571..000000000000
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ /dev/null
@@ -1,321 +0,0 @@
1/*
2 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm038.c which is :
5 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
6 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 * MA 02110-1301, USA.
21 */
22
23#include <linux/i2c.h>
24#include <linux/io.h>
25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/physmap.h>
27#include <linux/platform_device.h>
28#include <linux/serial_8250.h>
29#include <linux/usb/otg.h>
30#include <linux/usb/ulpi.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35#include <asm/mach/map.h>
36
37#include "common.h"
38#include "devices-imx27.h"
39#include "ehci.h"
40#include "eukrea-baseboards.h"
41#include "hardware.h"
42#include "iomux-mx27.h"
43#include "ulpi.h"
44
45static const int eukrea_cpuimx27_pins[] __initconst = {
46 /* UART1 */
47 PE12_PF_UART1_TXD,
48 PE13_PF_UART1_RXD,
49 PE14_PF_UART1_CTS,
50 PE15_PF_UART1_RTS,
51 /* UART4 */
52#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
53 PB26_AF_UART4_RTS,
54 PB28_AF_UART4_TXD,
55 PB29_AF_UART4_CTS,
56 PB31_AF_UART4_RXD,
57#endif
58 /* FEC */
59 PD0_AIN_FEC_TXD0,
60 PD1_AIN_FEC_TXD1,
61 PD2_AIN_FEC_TXD2,
62 PD3_AIN_FEC_TXD3,
63 PD4_AOUT_FEC_RX_ER,
64 PD5_AOUT_FEC_RXD1,
65 PD6_AOUT_FEC_RXD2,
66 PD7_AOUT_FEC_RXD3,
67 PD8_AF_FEC_MDIO,
68 PD9_AIN_FEC_MDC,
69 PD10_AOUT_FEC_CRS,
70 PD11_AOUT_FEC_TX_CLK,
71 PD12_AOUT_FEC_RXD0,
72 PD13_AOUT_FEC_RX_DV,
73 PD14_AOUT_FEC_RX_CLK,
74 PD15_AOUT_FEC_COL,
75 PD16_AIN_FEC_TX_ER,
76 PF23_AIN_FEC_TX_EN,
77 /* I2C1 */
78 PD17_PF_I2C_DATA,
79 PD18_PF_I2C_CLK,
80 /* SDHC2 */
81#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
82 PB4_PF_SD2_D0,
83 PB5_PF_SD2_D1,
84 PB6_PF_SD2_D2,
85 PB7_PF_SD2_D3,
86 PB8_PF_SD2_CMD,
87 PB9_PF_SD2_CLK,
88#endif
89#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
90 /* Quad UART's IRQ */
91 GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
92 GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
93 GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
94 GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
95#endif
96 /* OTG */
97 PC7_PF_USBOTG_DATA5,
98 PC8_PF_USBOTG_DATA6,
99 PC9_PF_USBOTG_DATA0,
100 PC10_PF_USBOTG_DATA2,
101 PC11_PF_USBOTG_DATA1,
102 PC12_PF_USBOTG_DATA4,
103 PC13_PF_USBOTG_DATA3,
104 PE0_PF_USBOTG_NXT,
105 PE1_PF_USBOTG_STP,
106 PE2_PF_USBOTG_DIR,
107 PE24_PF_USBOTG_CLK,
108 PE25_PF_USBOTG_DATA7,
109 /* USBH2 */
110 PA0_PF_USBH2_CLK,
111 PA1_PF_USBH2_DIR,
112 PA2_PF_USBH2_DATA7,
113 PA3_PF_USBH2_NXT,
114 PA4_PF_USBH2_STP,
115 PD19_AF_USBH2_DATA4,
116 PD20_AF_USBH2_DATA3,
117 PD21_AF_USBH2_DATA6,
118 PD22_AF_USBH2_DATA0,
119 PD23_AF_USBH2_DATA2,
120 PD24_AF_USBH2_DATA1,
121 PD26_AF_USBH2_DATA5,
122};
123
124static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
125 .width = 2,
126};
127
128static struct resource eukrea_cpuimx27_flash_resource = {
129 .start = 0xc0000000,
130 .end = 0xc3ffffff,
131 .flags = IORESOURCE_MEM,
132};
133
134static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
135 .name = "physmap-flash",
136 .id = 0,
137 .dev = {
138 .platform_data = &eukrea_cpuimx27_flash_data,
139 },
140 .num_resources = 1,
141 .resource = &eukrea_cpuimx27_flash_resource,
142};
143
144static const struct imxuart_platform_data uart_pdata __initconst = {
145 .flags = IMXUART_HAVE_RTSCTS,
146};
147
148static const struct mxc_nand_platform_data
149cpuimx27_nand_board_info __initconst = {
150 .width = 1,
151 .hw_ecc = 1,
152};
153
154static struct platform_device *platform_devices[] __initdata = {
155 &eukrea_cpuimx27_nor_mtd_device,
156};
157
158static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
159 .bitrate = 100000,
160};
161
162static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
163 {
164 I2C_BOARD_INFO("pcf8563", 0x51),
165 },
166};
167
168#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
169static struct plat_serial8250_port serial_platform_data[] = {
170 {
171 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
172 /* irq number is run-time assigned */
173 .uartclk = 14745600,
174 .regshift = 1,
175 .iotype = UPIO_MEM,
176 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
177 }, {
178 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
179 /* irq number is run-time assigned */
180 .uartclk = 14745600,
181 .regshift = 1,
182 .iotype = UPIO_MEM,
183 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
184 }, {
185 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
186 /* irq number is run-time assigned */
187 .uartclk = 14745600,
188 .regshift = 1,
189 .iotype = UPIO_MEM,
190 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
191 }, {
192 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
193 /* irq number is run-time assigned */
194 .uartclk = 14745600,
195 .regshift = 1,
196 .iotype = UPIO_MEM,
197 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
198 }, {
199 }
200};
201
202static struct platform_device serial_device = {
203 .name = "serial8250",
204 .id = 0,
205 .dev = {
206 .platform_data = serial_platform_data,
207 },
208};
209#endif
210
211static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
212{
213 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
214}
215
216static struct mxc_usbh_platform_data otg_pdata __initdata = {
217 .init = eukrea_cpuimx27_otg_init,
218 .portsc = MXC_EHCI_MODE_ULPI,
219};
220
221static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
222{
223 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
224}
225
226static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
227 .init = eukrea_cpuimx27_usbh2_init,
228 .portsc = MXC_EHCI_MODE_ULPI,
229};
230
231static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
232 .operating_mode = FSL_USB2_DR_DEVICE,
233 .phy_mode = FSL_USB2_PHY_ULPI,
234};
235
236static bool otg_mode_host __initdata;
237
238static int __init eukrea_cpuimx27_otg_mode(char *options)
239{
240 if (!strcmp(options, "host"))
241 otg_mode_host = true;
242 else if (!strcmp(options, "device"))
243 otg_mode_host = false;
244 else
245 pr_info("otg_mode neither \"host\" nor \"device\". "
246 "Defaulting to device\n");
247 return 1;
248}
249__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
250
251static void __init eukrea_cpuimx27_init(void)
252{
253 imx27_soc_init();
254
255 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
256 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
257
258 imx27_add_imx_uart0(&uart_pdata);
259
260 imx27_add_mxc_nand(&cpuimx27_nand_board_info);
261
262 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
263 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
264
265 imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
266
267 imx27_add_fec(NULL);
268 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
269 imx27_add_imx2_wdt();
270 imx27_add_mxc_w1();
271
272#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
273 /* SDHC2 can be used for Wifi */
274 imx27_add_mxc_mmc(1, NULL);
275#endif
276#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
277 /* in which case UART4 is also used for Bluetooth */
278 imx27_add_imx_uart3(&uart_pdata);
279#endif
280
281#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
282 serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
283 serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
284 serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
285 serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
286 platform_device_register(&serial_device);
287#endif
288
289 if (otg_mode_host) {
290 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
291 ULPI_OTG_DRVVBUS_EXT);
292 if (otg_pdata.otg)
293 imx27_add_mxc_ehci_otg(&otg_pdata);
294 } else {
295 imx27_add_fsl_usb2_udc(&otg_device_pdata);
296 }
297
298 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
299 ULPI_OTG_DRVVBUS_EXT);
300 if (usbh2_pdata.otg)
301 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
302
303#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
304 eukrea_mbimx27_baseboard_init();
305#endif
306}
307
308static void __init eukrea_cpuimx27_timer_init(void)
309{
310 mx27_clocks_init(26000000);
311}
312
313MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
314 .atag_offset = 0x100,
315 .map_io = mx27_map_io,
316 .init_early = imx27_init_early,
317 .init_irq = mx27_init_irq,
318 .init_time = eukrea_cpuimx27_timer_init,
319 .init_machine = eukrea_cpuimx27_init,
320 .restart = mxc_restart,
321MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
deleted file mode 100644
index 77fda3de4290..000000000000
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ /dev/null
@@ -1,154 +0,0 @@
1/*
2 * arch/arm/mach-imx/mach-mx1ads.c
3 *
4 * Initially based on:
5 * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
6 * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de>
7 *
8 * 2004 (c) MontaVista Software, Inc.
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <linux/i2c.h>
16#include <linux/i2c/pcf857x.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/mtd/physmap.h>
21
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/time.h>
25
26#include "common.h"
27#include "devices-imx1.h"
28#include "hardware.h"
29#include "iomux-mx1.h"
30
31static const int mx1ads_pins[] __initconst = {
32 /* UART1 */
33 PC9_PF_UART1_CTS,
34 PC10_PF_UART1_RTS,
35 PC11_PF_UART1_TXD,
36 PC12_PF_UART1_RXD,
37 /* UART2 */
38 PB28_PF_UART2_CTS,
39 PB29_PF_UART2_RTS,
40 PB30_PF_UART2_TXD,
41 PB31_PF_UART2_RXD,
42 /* I2C */
43 PA15_PF_I2C_SDA,
44 PA16_PF_I2C_SCL,
45 /* SPI */
46 PC13_PF_SPI1_SPI_RDY,
47 PC14_PF_SPI1_SCLK,
48 PC15_PF_SPI1_SS,
49 PC16_PF_SPI1_MISO,
50 PC17_PF_SPI1_MOSI,
51};
52
53/*
54 * UARTs platform data
55 */
56
57static const struct imxuart_platform_data uart0_pdata __initconst = {
58 .flags = IMXUART_HAVE_RTSCTS,
59};
60
61static const struct imxuart_platform_data uart1_pdata __initconst = {
62 .flags = IMXUART_HAVE_RTSCTS,
63};
64
65/*
66 * Physmap flash
67 */
68
69static const struct physmap_flash_data mx1ads_flash_data __initconst = {
70 .width = 4, /* bankwidth in bytes */
71};
72
73static const struct resource flash_resource __initconst = {
74 .start = MX1_CS0_PHYS,
75 .end = MX1_CS0_PHYS + SZ_32M - 1,
76 .flags = IORESOURCE_MEM,
77};
78
79/*
80 * I2C
81 */
82static struct pcf857x_platform_data pcf857x_data[] = {
83 {
84 .gpio_base = 4 * 32,
85 }, {
86 .gpio_base = 4 * 32 + 16,
87 }
88};
89
90static const struct imxi2c_platform_data mx1ads_i2c_data __initconst = {
91 .bitrate = 100000,
92};
93
94static struct i2c_board_info mx1ads_i2c_devices[] = {
95 {
96 I2C_BOARD_INFO("pcf8575", 0x22),
97 .platform_data = &pcf857x_data[0],
98 }, {
99 I2C_BOARD_INFO("pcf8575", 0x24),
100 .platform_data = &pcf857x_data[1],
101 },
102};
103
104/*
105 * Board init
106 */
107static void __init mx1ads_init(void)
108{
109 imx1_soc_init();
110
111 mxc_gpio_setup_multiple_pins(mx1ads_pins,
112 ARRAY_SIZE(mx1ads_pins), "mx1ads");
113
114 /* UART */
115 imx1_add_imx_uart0(&uart0_pdata);
116 imx1_add_imx_uart1(&uart1_pdata);
117
118 /* Physmap flash */
119 platform_device_register_resndata(NULL, "physmap-flash", 0,
120 &flash_resource, 1,
121 &mx1ads_flash_data, sizeof(mx1ads_flash_data));
122
123 /* I2C */
124 i2c_register_board_info(0, mx1ads_i2c_devices,
125 ARRAY_SIZE(mx1ads_i2c_devices));
126
127 imx1_add_imx_i2c(&mx1ads_i2c_data);
128}
129
130static void __init mx1ads_timer_init(void)
131{
132 mx1_clocks_init(32000);
133}
134
135MACHINE_START(MX1ADS, "Freescale MX1ADS")
136 /* Maintainer: Sascha Hauer, Pengutronix */
137 .atag_offset = 0x100,
138 .map_io = mx1_map_io,
139 .init_early = imx1_init_early,
140 .init_irq = mx1_init_irq,
141 .init_time = mx1ads_timer_init,
142 .init_machine = mx1ads_init,
143 .restart = mxc_restart,
144MACHINE_END
145
146MACHINE_START(MXLADS, "Freescale MXLADS")
147 .atag_offset = 0x100,
148 .map_io = mx1_map_io,
149 .init_early = imx1_init_early,
150 .init_irq = mx1_init_irq,
151 .init_time = mx1ads_timer_init,
152 .init_machine = mx1ads_init,
153 .restart = mxc_restart,
154MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
deleted file mode 100644
index 0b5d1ca31b9f..000000000000
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ /dev/null
@@ -1,273 +0,0 @@
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/platform_device.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/map.h>
20#include <linux/mtd/partitions.h>
21#include <linux/mtd/physmap.h>
22#include <linux/i2c.h>
23#include <linux/irq.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/time.h>
27#include <asm/mach/map.h>
28#include <linux/gpio.h>
29#include <linux/platform_data/pca953x.h>
30
31#include "common.h"
32#include "devices-imx27.h"
33#include "hardware.h"
34#include "iomux-mx27.h"
35
36static const int mxt_td60_pins[] __initconst = {
37 /* UART0 */
38 PE12_PF_UART1_TXD,
39 PE13_PF_UART1_RXD,
40 PE14_PF_UART1_CTS,
41 PE15_PF_UART1_RTS,
42 /* UART1 */
43 PE3_PF_UART2_CTS,
44 PE4_PF_UART2_RTS,
45 PE6_PF_UART2_TXD,
46 PE7_PF_UART2_RXD,
47 /* UART2 */
48 PE8_PF_UART3_TXD,
49 PE9_PF_UART3_RXD,
50 PE10_PF_UART3_CTS,
51 PE11_PF_UART3_RTS,
52 /* FEC */
53 PD0_AIN_FEC_TXD0,
54 PD1_AIN_FEC_TXD1,
55 PD2_AIN_FEC_TXD2,
56 PD3_AIN_FEC_TXD3,
57 PD4_AOUT_FEC_RX_ER,
58 PD5_AOUT_FEC_RXD1,
59 PD6_AOUT_FEC_RXD2,
60 PD7_AOUT_FEC_RXD3,
61 PD8_AF_FEC_MDIO,
62 PD9_AIN_FEC_MDC,
63 PD10_AOUT_FEC_CRS,
64 PD11_AOUT_FEC_TX_CLK,
65 PD12_AOUT_FEC_RXD0,
66 PD13_AOUT_FEC_RX_DV,
67 PD14_AOUT_FEC_RX_CLK,
68 PD15_AOUT_FEC_COL,
69 PD16_AIN_FEC_TX_ER,
70 PF23_AIN_FEC_TX_EN,
71 /* I2C1 */
72 PD17_PF_I2C_DATA,
73 PD18_PF_I2C_CLK,
74 /* I2C2 */
75 PC5_PF_I2C2_SDA,
76 PC6_PF_I2C2_SCL,
77 /* FB */
78 PA5_PF_LSCLK,
79 PA6_PF_LD0,
80 PA7_PF_LD1,
81 PA8_PF_LD2,
82 PA9_PF_LD3,
83 PA10_PF_LD4,
84 PA11_PF_LD5,
85 PA12_PF_LD6,
86 PA13_PF_LD7,
87 PA14_PF_LD8,
88 PA15_PF_LD9,
89 PA16_PF_LD10,
90 PA17_PF_LD11,
91 PA18_PF_LD12,
92 PA19_PF_LD13,
93 PA20_PF_LD14,
94 PA21_PF_LD15,
95 PA22_PF_LD16,
96 PA23_PF_LD17,
97 PA25_PF_CLS,
98 PA27_PF_SPL_SPR,
99 PA28_PF_HSYNC,
100 PA29_PF_VSYNC,
101 PA30_PF_CONTRAST,
102 PA31_PF_OE_ACD,
103 /* OWIRE */
104 PE16_AF_OWIRE,
105 /* SDHC1*/
106 PE18_PF_SD1_D0,
107 PE19_PF_SD1_D1,
108 PE20_PF_SD1_D2,
109 PE21_PF_SD1_D3,
110 PE22_PF_SD1_CMD,
111 PE23_PF_SD1_CLK,
112 PF8_AF_ATA_IORDY,
113 /* SDHC2*/
114 PB4_PF_SD2_D0,
115 PB5_PF_SD2_D1,
116 PB6_PF_SD2_D2,
117 PB7_PF_SD2_D3,
118 PB8_PF_SD2_CMD,
119 PB9_PF_SD2_CLK,
120};
121
122static const struct mxc_nand_platform_data
123mxt_td60_nand_board_info __initconst = {
124 .width = 1,
125 .hw_ecc = 1,
126};
127
128static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
129 .bitrate = 100000,
130};
131
132/* PCA9557 */
133static int mxt_td60_pca9557_setup(struct i2c_client *client,
134 unsigned gpio_base, unsigned ngpio,
135 void *context)
136{
137 static int mxt_td60_gpio_value[] = {
138 -1, -1, -1, -1, -1, -1, -1, 1
139 };
140 int n;
141
142 for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
143 gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
144 if (mxt_td60_gpio_value[n] < 0)
145 gpio_direction_input(gpio_base + n);
146 else
147 gpio_direction_output(gpio_base + n,
148 mxt_td60_gpio_value[n]);
149 gpio_export(gpio_base + n, 0);
150 }
151
152 return 0;
153}
154
155static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
156 .gpio_base = 240, /* place PCA9557 after all MX27 gpio pins */
157 .invert = 0, /* Do not invert */
158 .setup = mxt_td60_pca9557_setup,
159};
160
161static struct i2c_board_info mxt_td60_i2c_devices[] = {
162 {
163 I2C_BOARD_INFO("pca9557", 0x18),
164 .platform_data = &mxt_td60_pca9557_pdata,
165 },
166};
167
168static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
169 .bitrate = 100000,
170};
171
172static struct i2c_board_info mxt_td60_i2c2_devices[] = {
173};
174
175static struct imx_fb_videomode mxt_td60_modes[] = {
176 {
177 .mode = {
178 .name = "Chimei LW700AT9003",
179 .refresh = 60,
180 .xres = 800,
181 .yres = 480,
182 .pixclock = 30303,
183 .hsync_len = 64,
184 .left_margin = 0x67,
185 .right_margin = 0x68,
186 .vsync_len = 16,
187 .upper_margin = 0x0f,
188 .lower_margin = 0x0f,
189 },
190 .bpp = 16,
191 .pcr = 0xFA208B83,
192 },
193};
194
195static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
196 .mode = mxt_td60_modes,
197 .num_modes = ARRAY_SIZE(mxt_td60_modes),
198
199 /*
200 * - HSYNC active high
201 * - VSYNC active high
202 * - clk notenabled while idle
203 * - clock inverted
204 * - data not inverted
205 * - data enable low active
206 * - enable sharp mode
207 */
208 .pwmr = 0x00A903FF,
209 .lscr1 = 0x00120300,
210 .dmacr = 0x00020010,
211};
212
213static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
214 void *data)
215{
216 return request_irq(gpio_to_irq(IMX_GPIO_NR(6, 8)), detect_irq,
217 IRQF_TRIGGER_FALLING, "sdhc1-card-detect", data);
218}
219
220static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
221{
222 free_irq(gpio_to_irq(IMX_GPIO_NR(6, 8)), data);
223}
224
225static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
226 .init = mxt_td60_sdhc1_init,
227 .exit = mxt_td60_sdhc1_exit,
228};
229
230static const struct imxuart_platform_data uart_pdata __initconst = {
231 .flags = IMXUART_HAVE_RTSCTS,
232};
233
234static void __init mxt_td60_board_init(void)
235{
236 imx27_soc_init();
237
238 mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
239 "MXT_TD60");
240
241 imx27_add_imx_uart0(&uart_pdata);
242 imx27_add_imx_uart1(&uart_pdata);
243 imx27_add_imx_uart2(&uart_pdata);
244 imx27_add_mxc_nand(&mxt_td60_nand_board_info);
245
246 i2c_register_board_info(0, mxt_td60_i2c_devices,
247 ARRAY_SIZE(mxt_td60_i2c_devices));
248
249 i2c_register_board_info(1, mxt_td60_i2c2_devices,
250 ARRAY_SIZE(mxt_td60_i2c2_devices));
251
252 imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
253 imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
254 imx27_add_imx_fb(&mxt_td60_fb_data);
255 imx27_add_mxc_mmc(0, &sdhc1_pdata);
256 imx27_add_fec(NULL);
257}
258
259static void __init mxt_td60_timer_init(void)
260{
261 mx27_clocks_init(26000000);
262}
263
264MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
265 /* maintainer: Maxtrack Industrial */
266 .atag_offset = 0x100,
267 .map_io = mx27_map_io,
268 .init_early = imx27_init_early,
269 .init_irq = mx27_init_irq,
270 .init_time = mxt_td60_timer_init,
271 .init_machine = mxt_td60_board_init,
272 .restart = mxc_restart,
273MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
deleted file mode 100644
index ee862ad6b6fc..000000000000
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ /dev/null
@@ -1,358 +0,0 @@
1/*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#include <linux/i2c.h>
21#include <linux/platform_data/at24.h>
22#include <linux/io.h>
23#include <linux/mtd/plat-ram.h>
24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h>
26#include <linux/regulator/machine.h>
27#include <linux/mfd/mc13783.h>
28#include <linux/spi/spi.h>
29#include <linux/irq.h>
30#include <linux/gpio.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35
36#include "board-pcm038.h"
37#include "common.h"
38#include "devices-imx27.h"
39#include "ehci.h"
40#include "hardware.h"
41#include "iomux-mx27.h"
42#include "ulpi.h"
43
44static const int pcm038_pins[] __initconst = {
45 /* UART1 */
46 PE12_PF_UART1_TXD,
47 PE13_PF_UART1_RXD,
48 PE14_PF_UART1_CTS,
49 PE15_PF_UART1_RTS,
50 /* UART2 */
51 PE3_PF_UART2_CTS,
52 PE4_PF_UART2_RTS,
53 PE6_PF_UART2_TXD,
54 PE7_PF_UART2_RXD,
55 /* UART3 */
56 PE8_PF_UART3_TXD,
57 PE9_PF_UART3_RXD,
58 PE10_PF_UART3_CTS,
59 PE11_PF_UART3_RTS,
60 /* FEC */
61 PD0_AIN_FEC_TXD0,
62 PD1_AIN_FEC_TXD1,
63 PD2_AIN_FEC_TXD2,
64 PD3_AIN_FEC_TXD3,
65 PD4_AOUT_FEC_RX_ER,
66 PD5_AOUT_FEC_RXD1,
67 PD6_AOUT_FEC_RXD2,
68 PD7_AOUT_FEC_RXD3,
69 PD8_AF_FEC_MDIO,
70 PD9_AIN_FEC_MDC,
71 PD10_AOUT_FEC_CRS,
72 PD11_AOUT_FEC_TX_CLK,
73 PD12_AOUT_FEC_RXD0,
74 PD13_AOUT_FEC_RX_DV,
75 PD14_AOUT_FEC_RX_CLK,
76 PD15_AOUT_FEC_COL,
77 PD16_AIN_FEC_TX_ER,
78 PF23_AIN_FEC_TX_EN,
79 /* I2C2 */
80 PC5_PF_I2C2_SDA,
81 PC6_PF_I2C2_SCL,
82 /* SPI1 */
83 PD25_PF_CSPI1_RDY,
84 PD29_PF_CSPI1_SCLK,
85 PD30_PF_CSPI1_MISO,
86 PD31_PF_CSPI1_MOSI,
87 /* SSI1 */
88 PC20_PF_SSI1_FS,
89 PC21_PF_SSI1_RXD,
90 PC22_PF_SSI1_TXD,
91 PC23_PF_SSI1_CLK,
92 /* SSI4 */
93 PC16_PF_SSI4_FS,
94 PC17_PF_SSI4_RXD,
95 PC18_PF_SSI4_TXD,
96 PC19_PF_SSI4_CLK,
97 /* USB host */
98 PA0_PF_USBH2_CLK,
99 PA1_PF_USBH2_DIR,
100 PA2_PF_USBH2_DATA7,
101 PA3_PF_USBH2_NXT,
102 PA4_PF_USBH2_STP,
103 PD19_AF_USBH2_DATA4,
104 PD20_AF_USBH2_DATA3,
105 PD21_AF_USBH2_DATA6,
106 PD22_AF_USBH2_DATA0,
107 PD23_AF_USBH2_DATA2,
108 PD24_AF_USBH2_DATA1,
109 PD26_AF_USBH2_DATA5,
110};
111
112/*
113 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
114 * 16 bit width
115 */
116
117static struct platdata_mtd_ram pcm038_sram_data = {
118 .bankwidth = 2,
119};
120
121static struct resource pcm038_sram_resource = {
122 .start = MX27_CS1_BASE_ADDR,
123 .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
124 .flags = IORESOURCE_MEM,
125};
126
127static struct platform_device pcm038_sram_mtd_device = {
128 .name = "mtd-ram",
129 .id = 0,
130 .dev = {
131 .platform_data = &pcm038_sram_data,
132 },
133 .num_resources = 1,
134 .resource = &pcm038_sram_resource,
135};
136
137/*
138 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
139 * 16 bit width
140 */
141static struct physmap_flash_data pcm038_flash_data = {
142 .width = 2,
143};
144
145static struct resource pcm038_flash_resource = {
146 .start = 0xc0000000,
147 .end = 0xc1ffffff,
148 .flags = IORESOURCE_MEM,
149};
150
151static struct platform_device pcm038_nor_mtd_device = {
152 .name = "physmap-flash",
153 .id = 0,
154 .dev = {
155 .platform_data = &pcm038_flash_data,
156 },
157 .num_resources = 1,
158 .resource = &pcm038_flash_resource,
159};
160
161static const struct imxuart_platform_data uart_pdata __initconst = {
162 .flags = IMXUART_HAVE_RTSCTS,
163};
164
165static const struct mxc_nand_platform_data
166pcm038_nand_board_info __initconst = {
167 .width = 1,
168 .hw_ecc = 1,
169};
170
171static struct platform_device *platform_devices[] __initdata = {
172 &pcm038_nor_mtd_device,
173 &pcm038_sram_mtd_device,
174};
175
176/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
177 * setup other stuffs to access the sram. */
178static void __init pcm038_init_sram(void)
179{
180 __raw_writel(0x0000d843, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(1)));
181 __raw_writel(0x22252521, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(1)));
182 __raw_writel(0x22220a00, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(1)));
183}
184
185static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
186 .bitrate = 100000,
187};
188
189static struct at24_platform_data board_eeprom = {
190 .byte_len = 4096,
191 .page_size = 32,
192 .flags = AT24_FLAG_ADDR16,
193};
194
195static struct i2c_board_info pcm038_i2c_devices[] = {
196 {
197 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
198 .platform_data = &board_eeprom,
199 }, {
200 I2C_BOARD_INFO("pcf8563", 0x51),
201 }, {
202 I2C_BOARD_INFO("lm75", 0x4a),
203 }
204};
205
206static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
207
208static const struct spi_imx_master pcm038_spi0_data __initconst = {
209 .chipselect = pcm038_spi_cs,
210 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
211};
212
213static struct regulator_consumer_supply sdhc1_consumers[] = {
214 {
215 .dev_name = "imx21-mmc.1",
216 .supply = "sdhc_vcc",
217 },
218};
219
220static struct regulator_init_data sdhc1_data = {
221 .constraints = {
222 .min_uV = 3000000,
223 .max_uV = 3400000,
224 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
225 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
226 .valid_modes_mask = REGULATOR_MODE_NORMAL |
227 REGULATOR_MODE_FAST,
228 .always_on = 0,
229 .boot_on = 0,
230 },
231 .num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
232 .consumer_supplies = sdhc1_consumers,
233};
234
235static struct regulator_consumer_supply cam_consumers[] = {
236 {
237 .dev_name = NULL,
238 .supply = "imx_cam_vcc",
239 },
240};
241
242static struct regulator_init_data cam_data = {
243 .constraints = {
244 .min_uV = 3000000,
245 .max_uV = 3400000,
246 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
247 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
248 .valid_modes_mask = REGULATOR_MODE_NORMAL |
249 REGULATOR_MODE_FAST,
250 .always_on = 0,
251 .boot_on = 0,
252 },
253 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
254 .consumer_supplies = cam_consumers,
255};
256
257static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
258 {
259 .id = MC13783_REG_VCAM,
260 .init_data = &cam_data,
261 }, {
262 .id = MC13783_REG_VMMC1,
263 .init_data = &sdhc1_data,
264 },
265};
266
267static struct mc13xxx_platform_data pcm038_pmic = {
268 .regulators = {
269 .regulators = pcm038_regulators,
270 .num_regulators = ARRAY_SIZE(pcm038_regulators),
271 },
272 .flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN,
273};
274
275static struct spi_board_info pcm038_spi_board_info[] __initdata = {
276 {
277 .modalias = "mc13783",
278 /* irq number is run-time assigned */
279 .max_speed_hz = 300000,
280 .bus_num = 0,
281 .chip_select = 0,
282 .platform_data = &pcm038_pmic,
283 .mode = SPI_CS_HIGH,
284 }
285};
286
287static int pcm038_usbh2_init(struct platform_device *pdev)
288{
289 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
290 MXC_EHCI_INTERFACE_DIFF_UNI);
291}
292
293static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
294 .init = pcm038_usbh2_init,
295 .portsc = MXC_EHCI_MODE_ULPI,
296};
297
298static void __init pcm038_init(void)
299{
300 imx27_soc_init();
301
302 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
303 "PCM038");
304
305 pcm038_init_sram();
306
307 imx27_add_imx_uart0(&uart_pdata);
308 imx27_add_imx_uart1(&uart_pdata);
309 imx27_add_imx_uart2(&uart_pdata);
310
311 mxc_gpio_mode(PE16_AF_OWIRE);
312 imx27_add_mxc_nand(&pcm038_nand_board_info);
313
314 /* only the i2c master 1 is used on this CPU card */
315 i2c_register_board_info(1, pcm038_i2c_devices,
316 ARRAY_SIZE(pcm038_i2c_devices));
317
318 imx27_add_imx_i2c(1, &pcm038_i2c1_data);
319
320 /* PE18 for user-LED D40 */
321 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
322
323 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
324
325 /* MC13783 IRQ */
326 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
327
328 imx27_add_spi_imx0(&pcm038_spi0_data);
329 pcm038_spi_board_info[0].irq = gpio_to_irq(IMX_GPIO_NR(2, 23));
330 spi_register_board_info(pcm038_spi_board_info,
331 ARRAY_SIZE(pcm038_spi_board_info));
332
333 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
334
335 imx27_add_fec(NULL);
336 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
337 imx27_add_imx2_wdt();
338 imx27_add_mxc_w1();
339
340#ifdef CONFIG_MACH_PCM970_BASEBOARD
341 pcm970_baseboard_init();
342#endif
343}
344
345static void __init pcm038_timer_init(void)
346{
347 mx27_clocks_init(26000000);
348}
349
350MACHINE_START(PCM038, "phyCORE-i.MX27")
351 .atag_offset = 0x100,
352 .map_io = mx27_map_io,
353 .init_early = imx27_init_early,
354 .init_irq = mx27_init_irq,
355 .init_time = pcm038_timer_init,
356 .init_machine = pcm038_init,
357 .restart = mxc_restart,
358MACHINE_END
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
deleted file mode 100644
index 51c608234089..000000000000
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ /dev/null
@@ -1,231 +0,0 @@
1/*
2 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16 * MA 02110-1301, USA.
17 */
18
19#include <linux/gpio.h>
20#include <linux/irq.h>
21#include <linux/platform_device.h>
22#include <linux/can/platform/sja1000.h>
23
24#include <asm/mach/arch.h>
25
26#include "common.h"
27#include "devices-imx27.h"
28#include "hardware.h"
29#include "iomux-mx27.h"
30
31static const int pcm970_pins[] __initconst = {
32 /* SDHC */
33 PB4_PF_SD2_D0,
34 PB5_PF_SD2_D1,
35 PB6_PF_SD2_D2,
36 PB7_PF_SD2_D3,
37 PB8_PF_SD2_CMD,
38 PB9_PF_SD2_CLK,
39 /* display */
40 PA5_PF_LSCLK,
41 PA6_PF_LD0,
42 PA7_PF_LD1,
43 PA8_PF_LD2,
44 PA9_PF_LD3,
45 PA10_PF_LD4,
46 PA11_PF_LD5,
47 PA12_PF_LD6,
48 PA13_PF_LD7,
49 PA14_PF_LD8,
50 PA15_PF_LD9,
51 PA16_PF_LD10,
52 PA17_PF_LD11,
53 PA18_PF_LD12,
54 PA19_PF_LD13,
55 PA20_PF_LD14,
56 PA21_PF_LD15,
57 PA22_PF_LD16,
58 PA23_PF_LD17,
59 PA24_PF_REV,
60 PA25_PF_CLS,
61 PA26_PF_PS,
62 PA27_PF_SPL_SPR,
63 PA28_PF_HSYNC,
64 PA29_PF_VSYNC,
65 PA30_PF_CONTRAST,
66 PA31_PF_OE_ACD,
67 /*
68 * it seems the data line misses a pullup, so we must enable
69 * the internal pullup as a local workaround
70 */
71 PD17_PF_I2C_DATA | GPIO_PUEN,
72 PD18_PF_I2C_CLK,
73 /* Camera */
74 PB10_PF_CSI_D0,
75 PB11_PF_CSI_D1,
76 PB12_PF_CSI_D2,
77 PB13_PF_CSI_D3,
78 PB14_PF_CSI_D4,
79 PB15_PF_CSI_MCLK,
80 PB16_PF_CSI_PIXCLK,
81 PB17_PF_CSI_D5,
82 PB18_PF_CSI_D6,
83 PB19_PF_CSI_D7,
84 PB20_PF_CSI_VSYNC,
85 PB21_PF_CSI_HSYNC,
86};
87
88static int pcm970_sdhc2_get_ro(struct device *dev)
89{
90 return gpio_get_value(GPIO_PORTC + 28);
91}
92
93static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data)
94{
95 int ret;
96
97 ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
98 IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
99 if (ret)
100 return ret;
101
102 ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro");
103 if (ret) {
104 free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
105 return ret;
106 }
107
108 gpio_direction_input(GPIO_PORTC + 28);
109
110 return 0;
111}
112
113static void pcm970_sdhc2_exit(struct device *dev, void *data)
114{
115 free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
116 gpio_free(GPIO_PORTC + 28);
117}
118
119static const struct imxmmc_platform_data sdhc_pdata __initconst = {
120 .get_ro = pcm970_sdhc2_get_ro,
121 .init = pcm970_sdhc2_init,
122 .exit = pcm970_sdhc2_exit,
123};
124
125static struct imx_fb_videomode pcm970_modes[] = {
126 {
127 .mode = {
128 .name = "Sharp-LQ035Q7",
129 .refresh = 60,
130 .xres = 240,
131 .yres = 320,
132 .pixclock = 188679, /* in ps (5.3MHz) */
133 .hsync_len = 7,
134 .left_margin = 5,
135 .right_margin = 16,
136 .vsync_len = 1,
137 .upper_margin = 7,
138 .lower_margin = 9,
139 },
140 /*
141 * - HSYNC active high
142 * - VSYNC active high
143 * - clk notenabled while idle
144 * - clock not inverted
145 * - data not inverted
146 * - data enable low active
147 * - enable sharp mode
148 */
149 .pcr = 0xF00080C0,
150 .bpp = 16,
151 }, {
152 .mode = {
153 .name = "TX090",
154 .refresh = 60,
155 .xres = 240,
156 .yres = 320,
157 .pixclock = 38255,
158 .left_margin = 144,
159 .right_margin = 0,
160 .upper_margin = 7,
161 .lower_margin = 40,
162 .hsync_len = 96,
163 .vsync_len = 1,
164 },
165 /*
166 * - HSYNC active low (1 << 22)
167 * - VSYNC active low (1 << 23)
168 * - clk notenabled while idle
169 * - clock not inverted
170 * - data not inverted
171 * - data enable low active
172 * - enable sharp mode
173 */
174 .pcr = 0xF0008080 | (1<<22) | (1<<23) | (1<<19),
175 .bpp = 32,
176 },
177};
178
179static const struct imx_fb_platform_data pcm038_fb_data __initconst = {
180 .mode = pcm970_modes,
181 .num_modes = ARRAY_SIZE(pcm970_modes),
182
183 .pwmr = 0x00A903FF,
184 .lscr1 = 0x00120300,
185 .dmacr = 0x00020010,
186};
187
188static struct resource pcm970_sja1000_resources[] = {
189 {
190 .start = MX27_CS4_BASE_ADDR,
191 .end = MX27_CS4_BASE_ADDR + 0x100 - 1,
192 .flags = IORESOURCE_MEM,
193 }, {
194 /* irq number is run-time assigned */
195 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
196 },
197};
198
199static struct sja1000_platform_data pcm970_sja1000_platform_data = {
200 .osc_freq = 16000000,
201 .ocr = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
202 .cdr = CDR_CBP,
203};
204
205static struct platform_device pcm970_sja1000 = {
206 .name = "sja1000_platform",
207 .dev = {
208 .platform_data = &pcm970_sja1000_platform_data,
209 },
210 .resource = pcm970_sja1000_resources,
211 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
212};
213
214/*
215 * system init for baseboard usage. Will be called by pcm038 init.
216 *
217 * Add platform devices present on this baseboard and init
218 * them from CPU side as far as required to use them later on
219 */
220void __init pcm970_baseboard_init(void)
221{
222 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins),
223 "PCM970");
224
225 imx27_add_imx_fb(&pcm038_fb_data);
226 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
227 imx27_add_mxc_mmc(1, &sdhc_pdata);
228 pcm970_sja1000_resources[1].start = gpio_to_irq(IMX_GPIO_NR(5, 19));
229 pcm970_sja1000_resources[1].end = gpio_to_irq(IMX_GPIO_NR(5, 19));
230 platform_device_register(&pcm970_sja1000);
231}
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 5b57c17c06bd..771bd25c1025 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -20,8 +20,6 @@
20#include "common.h" 20#include "common.h"
21#include "hardware.h" 21#include "hardware.h"
22 22
23#define SCU_STANDBY_ENABLE (1 << 5)
24
25u32 g_diag_reg; 23u32 g_diag_reg;
26static void __iomem *scu_base; 24static void __iomem *scu_base;
27 25
@@ -45,14 +43,6 @@ void __init imx_scu_map_io(void)
45 scu_base = IMX_IO_ADDRESS(base); 43 scu_base = IMX_IO_ADDRESS(base);
46} 44}
47 45
48void imx_scu_standby_enable(void)
49{
50 u32 val = readl_relaxed(scu_base);
51
52 val |= SCU_STANDBY_ENABLE;
53 writel_relaxed(val, scu_base);
54}
55
56static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle) 46static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
57{ 47{
58 imx_set_cpu_jump(cpu, v7_secondary_startup); 48 imx_set_cpu_jump(cpu, v7_secondary_startup);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e87f2a83d6bf..2d245c2e641c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
142 board_nand_data.nr_parts = nr_parts; 142 board_nand_data.nr_parts = nr_parts;
143 board_nand_data.devsize = nand_type; 143 board_nand_data.devsize = nand_type;
144 144
145 board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW; 145 board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_SW;
146 gpmc_nand_init(&board_nand_data, gpmc_t); 146 gpmc_nand_init(&board_nand_data, gpmc_t);
147} 147}
148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 8897ad7035fd..cb7764314f17 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -49,7 +49,8 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
49 return 0; 49 return 0;
50 50
51 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */ 51 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
52 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW) 52 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
53 ecc_opt == OMAP_ECC_HAM1_CODE_SW)
53 return 1; 54 return 1;
54 else 55 else
55 return 0; 56 return 0;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 8bc13380f0a0..9f42d5437fcc 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1403,8 +1403,11 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
1403 pr_err("%s: ti,nand-ecc-opt not found\n", __func__); 1403 pr_err("%s: ti,nand-ecc-opt not found\n", __func__);
1404 return -ENODEV; 1404 return -ENODEV;
1405 } 1405 }
1406 if (!strcmp(s, "ham1") || !strcmp(s, "sw") || 1406
1407 !strcmp(s, "hw") || !strcmp(s, "hw-romcode")) 1407 if (!strcmp(s, "sw"))
1408 gpmc_nand_data->ecc_opt = OMAP_ECC_HAM1_CODE_SW;
1409 else if (!strcmp(s, "ham1") ||
1410 !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
1408 gpmc_nand_data->ecc_opt = 1411 gpmc_nand_data->ecc_opt =
1409 OMAP_ECC_HAM1_CODE_HW; 1412 OMAP_ECC_HAM1_CODE_HW;
1410 else if (!strcmp(s, "bch4")) 1413 else if (!strcmp(s, "bch4"))
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d42022f2a71e..53841dea80ea 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -663,7 +663,7 @@ void __init dra7xxx_check_revision(void)
663 663
664 default: 664 default:
665 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n",
667 __func__, idcode, hawkeye, rev); 667 __func__, idcode, hawkeye, rev);
668 omap_revision = DRA752_REV_ES1_1; 668 omap_revision = DRA752_REV_ES1_1;
669 } 669 }
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 01ef59def44b..d22c30d3ccfa 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -56,7 +56,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
56 56
57 r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias); 57 r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
58 if (!IS_ERR(r)) { 58 if (!IS_ERR(r)) {
59 dev_warn(&od->pdev->dev, 59 dev_dbg(&od->pdev->dev,
60 "alias %s already exists\n", clk_alias); 60 "alias %s already exists\n", clk_alias);
61 clk_put(r); 61 clk_put(r);
62 return; 62 return;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f37cdd2..8fd87a3055bf 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2185,6 +2185,8 @@ static int _enable(struct omap_hwmod *oh)
2185 oh->mux->pads_dynamic))) { 2185 oh->mux->pads_dynamic))) {
2186 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2186 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2187 _reconfigure_io_chain(); 2187 _reconfigure_io_chain();
2188 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2189 _reconfigure_io_chain();
2188 } 2190 }
2189 2191
2190 _add_initiator_dep(oh, mpu_oh); 2192 _add_initiator_dep(oh, mpu_oh);
@@ -2291,6 +2293,8 @@ static int _idle(struct omap_hwmod *oh)
2291 if (oh->mux && oh->mux->pads_dynamic) { 2293 if (oh->mux && oh->mux->pads_dynamic) {
2292 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 2294 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2293 _reconfigure_io_chain(); 2295 _reconfigure_io_chain();
2296 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2297 _reconfigure_io_chain();
2294 } 2298 }
2295 2299
2296 oh->_state = _HWMOD_STATE_IDLE; 2300 oh->_state = _HWMOD_STATE_IDLE;
@@ -3345,6 +3349,9 @@ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3345 if (!ois) 3349 if (!ois)
3346 return 0; 3350 return 0;
3347 3351
3352 if (ois[0] == NULL) /* Empty list */
3353 return 0;
3354
3348 if (!linkspace) { 3355 if (!linkspace) {
3349 if (_alloc_linkspace(ois)) { 3356 if (_alloc_linkspace(ois)) {
3350 pr_err("omap_hwmod: could not allocate link space\n"); 3357 pr_err("omap_hwmod: could not allocate link space\n");
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 2757abf87fbc..5684f112654b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -35,6 +35,7 @@
35#include "i2c.h" 35#include "i2c.h"
36#include "mmc.h" 36#include "mmc.h"
37#include "wd_timer.h" 37#include "wd_timer.h"
38#include "soc.h"
38 39
39/* Base offset for all DRA7XX interrupts external to MPUSS */ 40/* Base offset for all DRA7XX interrupts external to MPUSS */
40#define DRA7XX_IRQ_GIC_START 32 41#define DRA7XX_IRQ_GIC_START 32
@@ -3261,7 +3262,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3261 &dra7xx_l4_per3__usb_otg_ss1, 3262 &dra7xx_l4_per3__usb_otg_ss1,
3262 &dra7xx_l4_per3__usb_otg_ss2, 3263 &dra7xx_l4_per3__usb_otg_ss2,
3263 &dra7xx_l4_per3__usb_otg_ss3, 3264 &dra7xx_l4_per3__usb_otg_ss3,
3264 &dra7xx_l4_per3__usb_otg_ss4,
3265 &dra7xx_l3_main_1__vcp1, 3265 &dra7xx_l3_main_1__vcp1,
3266 &dra7xx_l4_per2__vcp1, 3266 &dra7xx_l4_per2__vcp1,
3267 &dra7xx_l3_main_1__vcp2, 3267 &dra7xx_l3_main_1__vcp2,
@@ -3270,8 +3270,26 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3270 NULL, 3270 NULL,
3271}; 3271};
3272 3272
3273static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
3274 &dra7xx_l4_per3__usb_otg_ss4,
3275 NULL,
3276};
3277
3278static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
3279 NULL,
3280};
3281
3273int __init dra7xx_hwmod_init(void) 3282int __init dra7xx_hwmod_init(void)
3274{ 3283{
3284 int ret;
3285
3275 omap_hwmod_init(); 3286 omap_hwmod_init();
3276 return omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs); 3287 ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
3288
3289 if (!ret && soc_is_dra74x())
3290 return omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
3291 else if (!ret && soc_is_dra72x())
3292 return omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
3293
3294 return ret;
3277} 3295}
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 01ca8086fb6c..4376f59626d1 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437)
245#define soc_is_omap54xx() 0 245#define soc_is_omap54xx() 0
246#define soc_is_omap543x() 0 246#define soc_is_omap543x() 0
247#define soc_is_dra7xx() 0 247#define soc_is_dra7xx() 0
248#define soc_is_dra74x() 0
249#define soc_is_dra72x() 0
248 250
249#if defined(MULTI_OMAP2) 251#if defined(MULTI_OMAP2)
250# if defined(CONFIG_ARCH_OMAP2) 252# if defined(CONFIG_ARCH_OMAP2)
@@ -393,7 +395,11 @@ IS_OMAP_TYPE(3430, 0x3430)
393 395
394#if defined(CONFIG_SOC_DRA7XX) 396#if defined(CONFIG_SOC_DRA7XX)
395#undef soc_is_dra7xx 397#undef soc_is_dra7xx
398#undef soc_is_dra74x
399#undef soc_is_dra72x
396#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) 400#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7"))
401#define soc_is_dra74x() (of_machine_is_compatible("ti,dra74"))
402#define soc_is_dra72x() (of_machine_is_compatible("ti,dra72"))
397#endif 403#endif
398 404
399/* Various silicon revisions for omap2 */ 405/* Various silicon revisions for omap2 */
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 17435c1aa2fe..126ddafad526 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -183,8 +183,8 @@ enum {
183 183
184static struct clk div4_clks[DIV4_NR] = { 184static struct clk div4_clks[DIV4_NR] = {
185 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), 185 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
186 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), 186 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
187 [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT), 187 [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT),
188}; 188};
189 189
190/* DIV6 clocks */ 190/* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 10e193d707f5..453b23129cfa 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -152,7 +152,7 @@ enum {
152 152
153static struct clk div4_clks[DIV4_NR] = { 153static struct clk div4_clks[DIV4_NR] = {
154 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), 154 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
155 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), 155 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
156}; 156};
157 157
158/* DIV6 clocks */ 158/* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index d8c4048b9e33..02a6f45a0b9e 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -644,7 +644,7 @@ static struct clk_lookup lookups[] = {
644 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 644 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
645 CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */ 645 CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */
646 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 646 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
647 CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */ 647 CLKDEV_DEV_ID("e6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
648 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 648 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
649 CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */ 649 CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */
650 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ 650 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 2c2754e79cb3..f61158c6ce71 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -426,9 +426,15 @@ static int ve_spc_populate_opps(uint32_t cluster)
426 426
427static int ve_init_opp_table(struct device *cpu_dev) 427static int ve_init_opp_table(struct device *cpu_dev)
428{ 428{
429 int cluster = topology_physical_package_id(cpu_dev->id); 429 int cluster;
430 int idx, ret = 0, max_opp = info->num_opps[cluster]; 430 int idx, ret = 0, max_opp;
431 struct ve_spc_opp *opps = info->opps[cluster]; 431 struct ve_spc_opp *opps;
432
433 cluster = topology_physical_package_id(cpu_dev->id);
434 cluster = cluster < 0 ? 0 : cluster;
435
436 max_opp = info->num_opps[cluster];
437 opps = info->opps[cluster];
432 438
433 for (idx = 0; idx < max_opp; idx++, opps++) { 439 for (idx = 0; idx < max_opp; idx++, opps++) {
434 ret = dev_pm_opp_add(cpu_dev, opps->freq * 1000, opps->u_volt); 440 ret = dev_pm_opp_add(cpu_dev, opps->freq * 1000, opps->u_volt);
@@ -537,6 +543,8 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
537 spc->hw.init = &init; 543 spc->hw.init = &init;
538 spc->cluster = topology_physical_package_id(cpu_dev->id); 544 spc->cluster = topology_physical_package_id(cpu_dev->id);
539 545
546 spc->cluster = spc->cluster < 0 ? 0 : spc->cluster;
547
540 init.name = dev_name(cpu_dev); 548 init.name = dev_name(cpu_dev);
541 init.ops = &clk_spc_ops; 549 init.ops = &clk_spc_ops;
542 init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE; 550 init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE;
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index 3815a8262af0..8c48c5c22a33 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -17,12 +17,6 @@
17 */ 17 */
18 .align 5 18 .align 5
19ENTRY(v6_early_abort) 19ENTRY(v6_early_abort)
20#ifdef CONFIG_CPU_V6
21 sub r1, sp, #4 @ Get unused stack location
22 strex r0, r1, [r1] @ Clear the exclusive monitor
23#elif defined(CONFIG_CPU_32v6K)
24 clrex
25#endif
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 20 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 21 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 22/*
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index 703375277ba6..4812ad054214 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -13,12 +13,6 @@
13 */ 13 */
14 .align 5 14 .align 5
15ENTRY(v7_early_abort) 15ENTRY(v7_early_abort)
16 /*
17 * The effect of data aborts on on the exclusive access monitor are
18 * UNPREDICTABLE. Do a CLREX to clear the state
19 */
20 clrex
21
22 mrc p15, 0, r1, c5, c0, 0 @ get FSR 16 mrc p15, 0, r1, c5, c0, 0 @ get FSR
23 mrc p15, 0, r0, c6, c0, 0 @ get FAR 17 mrc p15, 0, r0, c6, c0, 0 @ get FAR
24 18
diff --git a/arch/hexagon/mm/cache.c b/arch/hexagon/mm/cache.c
index fe14ccf28561..0c76c802e31c 100644
--- a/arch/hexagon/mm/cache.c
+++ b/arch/hexagon/mm/cache.c
@@ -68,6 +68,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
68 ); 68 );
69 local_irq_restore(flags); 69 local_irq_restore(flags);
70} 70}
71EXPORT_SYMBOL(flush_icache_range);
71 72
72void hexagon_clean_dcache_range(unsigned long start, unsigned long end) 73void hexagon_clean_dcache_range(unsigned long start, unsigned long end)
73{ 74{
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 64aefb76bd69..c84c88bbbbd7 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -549,8 +549,6 @@ source "drivers/sn/Kconfig"
549config KEXEC 549config KEXEC
550 bool "kexec system call" 550 bool "kexec system call"
551 depends on !IA64_HP_SIM && (!SMP || HOTPLUG_CPU) 551 depends on !IA64_HP_SIM && (!SMP || HOTPLUG_CPU)
552 select CRYPTO
553 select CRYPTO_SHA256
554 help 552 help
555 kexec is a system call that implements the ability to shutdown your 553 kexec is a system call that implements the ability to shutdown your
556 current kernel, and to start another kernel. It is like a reboot 554 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 3ff8c9a25335..87b7c7581b1d 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -91,8 +91,6 @@ config MMU_SUN3
91config KEXEC 91config KEXEC
92 bool "kexec system call" 92 bool "kexec system call"
93 depends on M68KCLASSIC 93 depends on M68KCLASSIC
94 select CRYPTO
95 select CRYPTO_SHA256
96 help 94 help
97 kexec is a system call that implements the ability to shutdown your 95 kexec is a system call that implements the ability to shutdown your
98 current kernel, and to start another kernel. It is like a reboot 96 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index df51e78a72cc..900c7e5333b6 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2396,8 +2396,6 @@ source "kernel/Kconfig.preempt"
2396 2396
2397config KEXEC 2397config KEXEC
2398 bool "Kexec system call" 2398 bool "Kexec system call"
2399 select CRYPTO
2400 select CRYPTO_SHA256
2401 help 2399 help
2402 kexec is a system call that implements the ability to shutdown your 2400 kexec is a system call that implements the ability to shutdown your
2403 current kernel, and to start another kernel. It is like a reboot 2401 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a577609f8ed6..4bc7b62fb4b6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -399,8 +399,6 @@ config PPC64_SUPPORTS_MEMORY_FAILURE
399config KEXEC 399config KEXEC
400 bool "kexec system call" 400 bool "kexec system call"
401 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP)) 401 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP))
402 select CRYPTO
403 select CRYPTO_SHA256
404 help 402 help
405 kexec is a system call that implements the ability to shutdown your 403 kexec is a system call that implements the ability to shutdown your
406 current kernel, and to start another kernel. It is like a reboot 404 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index ab39ceb89ecf..05c78bb5f570 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -48,8 +48,6 @@ config ARCH_SUPPORTS_DEBUG_PAGEALLOC
48 48
49config KEXEC 49config KEXEC
50 def_bool y 50 def_bool y
51 select CRYPTO
52 select CRYPTO_SHA256
53 51
54config AUDIT_ARCH 52config AUDIT_ARCH
55 def_bool y 53 def_bool y
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
index 3802d2d3a18d..940ac49198db 100644
--- a/arch/s390/include/uapi/asm/unistd.h
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -283,7 +283,10 @@
283#define __NR_sched_setattr 345 283#define __NR_sched_setattr 345
284#define __NR_sched_getattr 346 284#define __NR_sched_getattr 346
285#define __NR_renameat2 347 285#define __NR_renameat2 347
286#define NR_syscalls 348 286#define __NR_seccomp 348
287#define __NR_getrandom 349
288#define __NR_memfd_create 350
289#define NR_syscalls 351
287 290
288/* 291/*
289 * There are some system calls that are not present on 64 bit, some 292 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c
index 45cdb37aa6f8..faf6caa510dc 100644
--- a/arch/s390/kernel/compat_wrapper.c
+++ b/arch/s390/kernel/compat_wrapper.c
@@ -214,3 +214,6 @@ COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, fla
214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags); 214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags);
215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags); 215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags);
216COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags); 216COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags);
217COMPAT_SYSCALL_WRAP3(seccomp, unsigned int, op, unsigned int, flags, const char __user *, uargs)
218COMPAT_SYSCALL_WRAP3(getrandom, char __user *, buf, size_t, count, unsigned int, flags)
219COMPAT_SYSCALL_WRAP2(memfd_create, const char __user *, uname, unsigned int, flags)
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 633ca7504536..22aac5885ba2 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -2060,6 +2060,13 @@ void s390_reset_system(void (*func)(void *), void *data)
2060 S390_lowcore.program_new_psw.addr = 2060 S390_lowcore.program_new_psw.addr =
2061 PSW_ADDR_AMODE | (unsigned long) s390_base_pgm_handler; 2061 PSW_ADDR_AMODE | (unsigned long) s390_base_pgm_handler;
2062 2062
2063 /*
2064 * Clear subchannel ID and number to signal new kernel that no CCW or
2065 * SCSI IPL has been done (for kexec and kdump)
2066 */
2067 S390_lowcore.subchannel_id = 0;
2068 S390_lowcore.subchannel_nr = 0;
2069
2063 /* Store status at absolute zero */ 2070 /* Store status at absolute zero */
2064 store_status(); 2071 store_status();
2065 2072
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index ae1d5be7dd88..82bc113e8c1d 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -24,6 +24,7 @@
24#include <linux/stddef.h> 24#include <linux/stddef.h>
25#include <linux/unistd.h> 25#include <linux/unistd.h>
26#include <linux/ptrace.h> 26#include <linux/ptrace.h>
27#include <linux/random.h>
27#include <linux/user.h> 28#include <linux/user.h>
28#include <linux/tty.h> 29#include <linux/tty.h>
29#include <linux/ioport.h> 30#include <linux/ioport.h>
@@ -61,6 +62,7 @@
61#include <asm/diag.h> 62#include <asm/diag.h>
62#include <asm/os_info.h> 63#include <asm/os_info.h>
63#include <asm/sclp.h> 64#include <asm/sclp.h>
65#include <asm/sysinfo.h>
64#include "entry.h" 66#include "entry.h"
65 67
66/* 68/*
@@ -766,6 +768,7 @@ static void __init setup_hwcaps(void)
766#endif 768#endif
767 769
768 get_cpu_id(&cpu_id); 770 get_cpu_id(&cpu_id);
771 add_device_randomness(&cpu_id, sizeof(cpu_id));
769 switch (cpu_id.machine) { 772 switch (cpu_id.machine) {
770 case 0x9672: 773 case 0x9672:
771#if !defined(CONFIG_64BIT) 774#if !defined(CONFIG_64BIT)
@@ -804,6 +807,19 @@ static void __init setup_hwcaps(void)
804} 807}
805 808
806/* 809/*
810 * Add system information as device randomness
811 */
812static void __init setup_randomness(void)
813{
814 struct sysinfo_3_2_2 *vmms;
815
816 vmms = (struct sysinfo_3_2_2 *) alloc_page(GFP_KERNEL);
817 if (vmms && stsi(vmms, 3, 2, 2) == 0 && vmms->count)
818 add_device_randomness(&vmms, vmms->count);
819 free_page((unsigned long) vmms);
820}
821
822/*
807 * Setup function called from init/main.c just after the banner 823 * Setup function called from init/main.c just after the banner
808 * was printed. 824 * was printed.
809 */ 825 */
@@ -901,6 +917,9 @@ void __init setup_arch(char **cmdline_p)
901 917
902 /* Setup zfcpdump support */ 918 /* Setup zfcpdump support */
903 setup_zfcpdump(); 919 setup_zfcpdump();
920
921 /* Add system specific data to the random pool */
922 setup_randomness();
904} 923}
905 924
906#ifdef CONFIG_32BIT 925#ifdef CONFIG_32BIT
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index fe5cdf29a001..6fe886ac2db5 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -356,3 +356,6 @@ SYSCALL(sys_finit_module,sys_finit_module,compat_sys_finit_module)
356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */ 356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */
357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr) 357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr)
358SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2) 358SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2)
359SYSCALL(sys_seccomp,sys_seccomp,compat_sys_seccomp)
360SYSCALL(sys_getrandom,sys_getrandom,compat_sys_getrandom)
361SYSCALL(sys_memfd_create,sys_memfd_create,compat_sys_memfd_create) /* 350 */
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index b319846ad97f..244fb4c81e25 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -598,8 +598,6 @@ source kernel/Kconfig.hz
598config KEXEC 598config KEXEC
599 bool "kexec system call (EXPERIMENTAL)" 599 bool "kexec system call (EXPERIMENTAL)"
600 depends on SUPERH32 && MMU 600 depends on SUPERH32 && MMU
601 select CRYPTO
602 select CRYPTO_SHA256
603 help 601 help
604 kexec is a system call that implements the ability to shutdown your 602 kexec is a system call that implements the ability to shutdown your
605 current kernel, and to start another kernel. It is like a reboot 603 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 097c2cdd117f..f770e3992620 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -229,6 +229,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
229 229
230 cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1); 230 cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1);
231} 231}
232EXPORT_SYMBOL(flush_icache_range);
232 233
233void flush_icache_page(struct vm_area_struct *vma, struct page *page) 234void flush_icache_page(struct vm_area_struct *vma, struct page *page)
234{ 235{
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index a3ffe2dd4832..7fcd492adbfc 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -191,8 +191,6 @@ source "kernel/Kconfig.hz"
191 191
192config KEXEC 192config KEXEC
193 bool "kexec system call" 193 bool "kexec system call"
194 select CRYPTO
195 select CRYPTO_SHA256
196 ---help--- 194 ---help---
197 kexec is a system call that implements the ability to shutdown your 195 kexec is a system call that implements the ability to shutdown your
198 current kernel, and to start another kernel. It is like a reboot 196 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c
index 01e8ab29f43a..19eaa62d456a 100644
--- a/arch/tile/kernel/smp.c
+++ b/arch/tile/kernel/smp.c
@@ -183,6 +183,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
183 preempt_enable(); 183 preempt_enable();
184 } 184 }
185} 185}
186EXPORT_SYMBOL(flush_icache_range);
186 187
187 188
188/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */ 189/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
diff --git a/arch/unicore32/kernel/signal.c b/arch/unicore32/kernel/signal.c
index 780d77388dec..7c8fb7018dc6 100644
--- a/arch/unicore32/kernel/signal.c
+++ b/arch/unicore32/kernel/signal.c
@@ -254,7 +254,8 @@ static int setup_frame(struct ksignal *ksig, sigset_t *set,
254 254
255 err |= setup_sigframe(frame, regs, set); 255 err |= setup_sigframe(frame, regs, set);
256 if (err == 0) 256 if (err == 0)
257 err |= setup_return(regs, &ksig->ka, frame->retcode, frame, usig); 257 err |= setup_return(regs, &ksig->ka, frame->retcode, frame,
258 ksig->sig);
258 259
259 return err; 260 return err;
260} 261}
@@ -276,7 +277,8 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
276 err |= __save_altstack(&frame->sig.uc.uc_stack, regs->UCreg_sp); 277 err |= __save_altstack(&frame->sig.uc.uc_stack, regs->UCreg_sp);
277 err |= setup_sigframe(&frame->sig, regs, set); 278 err |= setup_sigframe(&frame->sig, regs, set);
278 if (err == 0) 279 if (err == 0)
279 err |= setup_return(regs, &ksig->ka, frame->sig.retcode, frame, usig); 280 err |= setup_return(regs, &ksig->ka, frame->sig.retcode, frame,
281 ksig->sig);
280 282
281 if (err == 0) { 283 if (err == 0) {
282 /* 284 /*
@@ -303,7 +305,6 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs,
303 int syscall) 305 int syscall)
304{ 306{
305 struct thread_info *thread = current_thread_info(); 307 struct thread_info *thread = current_thread_info();
306 struct task_struct *tsk = current;
307 sigset_t *oldset = sigmask_to_save(); 308 sigset_t *oldset = sigmask_to_save();
308 int usig = ksig->sig; 309 int usig = ksig->sig;
309 int ret; 310 int ret;
@@ -373,7 +374,7 @@ static void do_signal(struct pt_regs *regs, int syscall)
373 if (!user_mode(regs)) 374 if (!user_mode(regs))
374 return; 375 return;
375 376
376 if (get_signsl(&ksig)) { 377 if (get_signal(&ksig)) {
377 handle_signal(&ksig, regs, syscall); 378 handle_signal(&ksig, regs, syscall);
378 return; 379 return;
379 } 380 }
diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
index 61b6d51866f8..3942f74c92d7 100644
--- a/arch/x86/Kbuild
+++ b/arch/x86/Kbuild
@@ -17,6 +17,4 @@ obj-$(CONFIG_IA32_EMULATION) += ia32/
17obj-y += platform/ 17obj-y += platform/
18obj-y += net/ 18obj-y += net/
19 19
20ifeq ($(CONFIG_X86_64),y) 20obj-$(CONFIG_KEXEC_FILE) += purgatory/
21obj-$(CONFIG_KEXEC) += purgatory/
22endif
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5d0bf1aa9dcb..778178f4c7d1 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1585,9 +1585,6 @@ source kernel/Kconfig.hz
1585 1585
1586config KEXEC 1586config KEXEC
1587 bool "kexec system call" 1587 bool "kexec system call"
1588 select BUILD_BIN2C
1589 select CRYPTO
1590 select CRYPTO_SHA256
1591 ---help--- 1588 ---help---
1592 kexec is a system call that implements the ability to shutdown your 1589 kexec is a system call that implements the ability to shutdown your
1593 current kernel, and to start another kernel. It is like a reboot 1590 current kernel, and to start another kernel. It is like a reboot
@@ -1602,9 +1599,22 @@ config KEXEC
1602 interface is strongly in flux, so no good recommendation can be 1599 interface is strongly in flux, so no good recommendation can be
1603 made. 1600 made.
1604 1601
1602config KEXEC_FILE
1603 bool "kexec file based system call"
1604 select BUILD_BIN2C
1605 depends on KEXEC
1606 depends on X86_64
1607 depends on CRYPTO=y
1608 depends on CRYPTO_SHA256=y
1609 ---help---
1610 This is new version of kexec system call. This system call is
1611 file based and takes file descriptors as system call argument
1612 for kernel and initramfs as opposed to list of segments as
1613 accepted by previous system call.
1614
1605config KEXEC_VERIFY_SIG 1615config KEXEC_VERIFY_SIG
1606 bool "Verify kernel signature during kexec_file_load() syscall" 1616 bool "Verify kernel signature during kexec_file_load() syscall"
1607 depends on KEXEC 1617 depends on KEXEC_FILE
1608 ---help--- 1618 ---help---
1609 This option makes kernel signature verification mandatory for 1619 This option makes kernel signature verification mandatory for
1610 kexec_file_load() syscall. If kernel is signature can not be 1620 kexec_file_load() syscall. If kernel is signature can not be
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index c1aa36887843..60087ca37679 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -184,11 +184,8 @@ archheaders:
184 $(Q)$(MAKE) $(build)=arch/x86/syscalls all 184 $(Q)$(MAKE) $(build)=arch/x86/syscalls all
185 185
186archprepare: 186archprepare:
187ifeq ($(CONFIG_KEXEC),y) 187ifeq ($(CONFIG_KEXEC_FILE),y)
188# Build only for 64bit. No loaders for 32bit yet.
189 ifeq ($(CONFIG_X86_64),y)
190 $(Q)$(MAKE) $(build)=arch/x86/purgatory arch/x86/purgatory/kexec-purgatory.c 188 $(Q)$(MAKE) $(build)=arch/x86/purgatory arch/x86/purgatory/kexec-purgatory.c
191 endif
192endif 189endif
193 190
194### 191###
@@ -254,6 +251,7 @@ archclean:
254 $(Q)rm -rf $(objtree)/arch/x86_64 251 $(Q)rm -rf $(objtree)/arch/x86_64
255 $(Q)$(MAKE) $(clean)=$(boot) 252 $(Q)$(MAKE) $(clean)=$(boot)
256 $(Q)$(MAKE) $(clean)=arch/x86/tools 253 $(Q)$(MAKE) $(clean)=arch/x86/tools
254 $(Q)$(MAKE) $(clean)=arch/x86/purgatory
257 255
258PHONY += kvmconfig 256PHONY += kvmconfig
259kvmconfig: 257kvmconfig:
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 0aeed5ca356e..478c490f3654 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -227,6 +227,8 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned
227 227
228extern void io_apic_eoi(unsigned int apic, unsigned int vector); 228extern void io_apic_eoi(unsigned int apic, unsigned int vector);
229 229
230extern bool mp_should_keep_irq(struct device *dev);
231
230#else /* !CONFIG_X86_IO_APIC */ 232#else /* !CONFIG_X86_IO_APIC */
231 233
232#define io_apic_assign_pci_irqs 0 234#define io_apic_assign_pci_irqs 0
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 0ec056012618..aa97a070f09f 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -131,8 +131,13 @@ static inline int pte_exec(pte_t pte)
131 131
132static inline int pte_special(pte_t pte) 132static inline int pte_special(pte_t pte)
133{ 133{
134 return (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_SPECIAL)) == 134 /*
135 (_PAGE_PRESENT|_PAGE_SPECIAL); 135 * See CONFIG_NUMA_BALANCING pte_numa in include/asm-generic/pgtable.h.
136 * On x86 we have _PAGE_BIT_NUMA == _PAGE_BIT_GLOBAL+1 ==
137 * __PAGE_BIT_SOFTW1 == _PAGE_BIT_SPECIAL.
138 */
139 return (pte_flags(pte) & _PAGE_SPECIAL) &&
140 (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_PROTNONE));
136} 141}
137 142
138static inline unsigned long pte_pfn(pte_t pte) 143static inline unsigned long pte_pfn(pte_t pte)
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index b5ea75c4a4b4..ada2e2d6be3e 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -71,6 +71,7 @@ obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
71obj-$(CONFIG_X86_TSC) += trace_clock.o 71obj-$(CONFIG_X86_TSC) += trace_clock.o
72obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o 72obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
73obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o 73obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
74obj-$(CONFIG_KEXEC_FILE) += kexec-bzimage64.o
74obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o 75obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
75obj-y += kprobes/ 76obj-y += kprobes/
76obj-$(CONFIG_MODULES) += module.o 77obj-$(CONFIG_MODULES) += module.o
@@ -118,5 +119,4 @@ ifeq ($(CONFIG_X86_64),y)
118 119
119 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o 120 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
120 obj-y += vsmp_64.o 121 obj-y += vsmp_64.o
121 obj-$(CONFIG_KEXEC) += kexec-bzimage64.o
122endif 122endif
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 29290f554e79..337ce5a9b15c 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1070,6 +1070,11 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
1070 } 1070 }
1071 1071
1072 if (flags & IOAPIC_MAP_ALLOC) { 1072 if (flags & IOAPIC_MAP_ALLOC) {
1073 /* special handling for legacy IRQs */
1074 if (irq < nr_legacy_irqs() && info->count == 1 &&
1075 mp_irqdomain_map(domain, irq, pin) != 0)
1076 irq = -1;
1077
1073 if (irq > 0) 1078 if (irq > 0)
1074 info->count++; 1079 info->count++;
1075 else if (info->count == 0) 1080 else if (info->count == 0)
@@ -3896,7 +3901,15 @@ int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
3896 info->polarity = 1; 3901 info->polarity = 1;
3897 } 3902 }
3898 info->node = NUMA_NO_NODE; 3903 info->node = NUMA_NO_NODE;
3899 info->set = 1; 3904
3905 /*
3906 * setup_IO_APIC_irqs() programs all legacy IRQs with default
3907 * trigger and polarity attributes. Don't set the flag for that
3908 * case so the first legacy IRQ user could reprogram the pin
3909 * with real trigger and polarity attributes.
3910 */
3911 if (virq >= nr_legacy_irqs() || info->count)
3912 info->set = 1;
3900 } 3913 }
3901 set_io_apic_irq_attr(&attr, ioapic, hwirq, info->trigger, 3914 set_io_apic_irq_attr(&attr, ioapic, hwirq, info->trigger,
3902 info->polarity); 3915 info->polarity);
@@ -3946,6 +3959,18 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)
3946 return ret; 3959 return ret;
3947} 3960}
3948 3961
3962bool mp_should_keep_irq(struct device *dev)
3963{
3964 if (dev->power.is_prepared)
3965 return true;
3966#ifdef CONFIG_PM_RUNTIME
3967 if (dev->power.runtime_status == RPM_SUSPENDING)
3968 return true;
3969#endif
3970
3971 return false;
3972}
3973
3949/* Enable IOAPIC early just for system timer */ 3974/* Enable IOAPIC early just for system timer */
3950void __init pre_init_apic_IRQ0(void) 3975void __init pre_init_apic_IRQ0(void)
3951{ 3976{
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 0553a34fa0df..a618fcd2c07d 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -182,8 +182,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
182 crash_save_cpu(regs, safe_smp_processor_id()); 182 crash_save_cpu(regs, safe_smp_processor_id());
183} 183}
184 184
185#ifdef CONFIG_X86_64 185#ifdef CONFIG_KEXEC_FILE
186
187static int get_nr_ram_ranges_callback(unsigned long start_pfn, 186static int get_nr_ram_ranges_callback(unsigned long start_pfn,
188 unsigned long nr_pfn, void *arg) 187 unsigned long nr_pfn, void *arg)
189{ 188{
@@ -696,5 +695,4 @@ int crash_load_segments(struct kimage *image)
696 695
697 return ret; 696 return ret;
698} 697}
699 698#endif /* CONFIG_KEXEC_FILE */
700#endif /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 1e6cff5814fa..44f1ed42fdf2 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -203,7 +203,7 @@ void __init native_init_IRQ(void)
203 set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]); 203 set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
204 } 204 }
205 205
206 if (!acpi_ioapic && !of_ioapic) 206 if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs())
207 setup_irq(2, &irq2); 207 setup_irq(2, &irq2);
208 208
209#ifdef CONFIG_X86_32 209#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 8b04018e5d1f..485981059a40 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -25,9 +25,11 @@
25#include <asm/debugreg.h> 25#include <asm/debugreg.h>
26#include <asm/kexec-bzimage64.h> 26#include <asm/kexec-bzimage64.h>
27 27
28#ifdef CONFIG_KEXEC_FILE
28static struct kexec_file_ops *kexec_file_loaders[] = { 29static struct kexec_file_ops *kexec_file_loaders[] = {
29 &kexec_bzImage64_ops, 30 &kexec_bzImage64_ops,
30}; 31};
32#endif
31 33
32static void free_transition_pgtable(struct kimage *image) 34static void free_transition_pgtable(struct kimage *image)
33{ 35{
@@ -178,6 +180,7 @@ static void load_segments(void)
178 ); 180 );
179} 181}
180 182
183#ifdef CONFIG_KEXEC_FILE
181/* Update purgatory as needed after various image segments have been prepared */ 184/* Update purgatory as needed after various image segments have been prepared */
182static int arch_update_purgatory(struct kimage *image) 185static int arch_update_purgatory(struct kimage *image)
183{ 186{
@@ -209,6 +212,12 @@ static int arch_update_purgatory(struct kimage *image)
209 212
210 return ret; 213 return ret;
211} 214}
215#else /* !CONFIG_KEXEC_FILE */
216static inline int arch_update_purgatory(struct kimage *image)
217{
218 return 0;
219}
220#endif /* CONFIG_KEXEC_FILE */
212 221
213int machine_kexec_prepare(struct kimage *image) 222int machine_kexec_prepare(struct kimage *image)
214{ 223{
@@ -329,6 +338,7 @@ void arch_crash_save_vmcoreinfo(void)
329 338
330/* arch-dependent functionality related to kexec file-based syscall */ 339/* arch-dependent functionality related to kexec file-based syscall */
331 340
341#ifdef CONFIG_KEXEC_FILE
332int arch_kexec_kernel_image_probe(struct kimage *image, void *buf, 342int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
333 unsigned long buf_len) 343 unsigned long buf_len)
334{ 344{
@@ -522,3 +532,4 @@ overflow:
522 (int)ELF64_R_TYPE(rel[i].r_info), value); 532 (int)ELF64_R_TYPE(rel[i].r_info), value);
523 return -ENOEXEC; 533 return -ENOEXEC;
524} 534}
535#endif /* CONFIG_KEXEC_FILE */
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
index bf7ef5ce29df..0fa29609b2c4 100644
--- a/arch/x86/kernel/time.c
+++ b/arch/x86/kernel/time.c
@@ -68,6 +68,8 @@ static struct irqaction irq0 = {
68 68
69void __init setup_default_timer_irq(void) 69void __init setup_default_timer_irq(void)
70{ 70{
71 if (!nr_legacy_irqs())
72 return;
71 setup_irq(0, &irq0); 73 setup_irq(0, &irq0);
72} 74}
73 75
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 3865116c51fb..b9958c364075 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
229 229
230static void intel_mid_pci_irq_disable(struct pci_dev *dev) 230static void intel_mid_pci_irq_disable(struct pci_dev *dev)
231{ 231{
232 if (!dev->dev.power.is_prepared && dev->irq > 0) 232 if (!mp_should_keep_irq(&dev->dev) && dev->irq > 0)
233 mp_unmap_irq(dev->irq); 233 mp_unmap_irq(dev->irq);
234} 234}
235 235
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index bc1a2c341891..eb500c2592ad 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -1256,7 +1256,7 @@ static int pirq_enable_irq(struct pci_dev *dev)
1256 1256
1257static void pirq_disable_irq(struct pci_dev *dev) 1257static void pirq_disable_irq(struct pci_dev *dev)
1258{ 1258{
1259 if (io_apic_assign_pci_irqs && !dev->dev.power.is_prepared && 1259 if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
1260 dev->irq) { 1260 dev->irq) {
1261 mp_unmap_irq(dev->irq); 1261 mp_unmap_irq(dev->irq);
1262 dev->irq = 0; 1262 dev->irq = 0;
diff --git a/arch/x86/purgatory/Makefile b/arch/x86/purgatory/Makefile
index 7fde9ee438a4..899dd2454256 100644
--- a/arch/x86/purgatory/Makefile
+++ b/arch/x86/purgatory/Makefile
@@ -11,6 +11,7 @@ targets += purgatory.ro
11# sure how to relocate those. Like kexec-tools, use custom flags. 11# sure how to relocate those. Like kexec-tools, use custom flags.
12 12
13KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -MD -Os -mcmodel=large 13KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -MD -Os -mcmodel=large
14KBUILD_CFLAGS += -m$(BITS)
14 15
15$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE 16$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
16 $(call if_changed,ld) 17 $(call if_changed,ld)
@@ -24,7 +25,4 @@ $(obj)/kexec-purgatory.c: $(obj)/purgatory.ro FORCE
24 $(call if_changed,bin2c) 25 $(call if_changed,bin2c)
25 26
26 27
27# No loaders for 32bits yet. 28obj-$(CONFIG_KEXEC_FILE) += kexec-purgatory.o
28ifeq ($(CONFIG_X86_64),y)
29 obj-$(CONFIG_KEXEC) += kexec-purgatory.o
30endif
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 3a617af60d46..49c6c3d94449 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -4,24 +4,23 @@ config ZONE_DMA
4config XTENSA 4config XTENSA
5 def_bool y 5 def_bool y
6 select ARCH_WANT_FRAME_POINTERS 6 select ARCH_WANT_FRAME_POINTERS
7 select HAVE_IDE
8 select GENERIC_ATOMIC64
9 select GENERIC_CLOCKEVENTS
10 select VIRT_TO_BUS
11 select GENERIC_IRQ_SHOW
12 select GENERIC_SCHED_CLOCK
13 select MODULES_USE_ELF_RELA
14 select GENERIC_PCI_IOMAP
15 select ARCH_WANT_IPC_PARSE_VERSION 7 select ARCH_WANT_IPC_PARSE_VERSION
16 select ARCH_WANT_OPTIONAL_GPIOLIB 8 select ARCH_WANT_OPTIONAL_GPIOLIB
17 select BUILDTIME_EXTABLE_SORT 9 select BUILDTIME_EXTABLE_SORT
18 select CLONE_BACKWARDS 10 select CLONE_BACKWARDS
19 select IRQ_DOMAIN 11 select COMMON_CLK
20 select HAVE_OPROFILE 12 select GENERIC_ATOMIC64
13 select GENERIC_CLOCKEVENTS
14 select GENERIC_IRQ_SHOW
15 select GENERIC_PCI_IOMAP
16 select GENERIC_SCHED_CLOCK
21 select HAVE_FUNCTION_TRACER 17 select HAVE_FUNCTION_TRACER
22 select HAVE_IRQ_TIME_ACCOUNTING 18 select HAVE_IRQ_TIME_ACCOUNTING
19 select HAVE_OPROFILE
23 select HAVE_PERF_EVENTS 20 select HAVE_PERF_EVENTS
24 select COMMON_CLK 21 select IRQ_DOMAIN
22 select MODULES_USE_ELF_RELA
23 select VIRT_TO_BUS
25 help 24 help
26 Xtensa processors are 32-bit RISC machines designed by Tensilica 25 Xtensa processors are 32-bit RISC machines designed by Tensilica
27 primarily for embedded systems. These processors are both 26 primarily for embedded systems. These processors are both
@@ -62,7 +61,9 @@ config TRACE_IRQFLAGS_SUPPORT
62 def_bool y 61 def_bool y
63 62
64config MMU 63config MMU
65 def_bool n 64 bool
65 default n if !XTENSA_VARIANT_CUSTOM
66 default XTENSA_VARIANT_MMU if XTENSA_VARIANT_CUSTOM
66 67
67config VARIANT_IRQ_SWITCH 68config VARIANT_IRQ_SWITCH
68 def_bool n 69 def_bool n
@@ -102,8 +103,40 @@ config XTENSA_VARIANT_S6000
102 select VARIANT_IRQ_SWITCH 103 select VARIANT_IRQ_SWITCH
103 select ARCH_REQUIRE_GPIOLIB 104 select ARCH_REQUIRE_GPIOLIB
104 select XTENSA_CALIBRATE_CCOUNT 105 select XTENSA_CALIBRATE_CCOUNT
106
107config XTENSA_VARIANT_CUSTOM
108 bool "Custom Xtensa processor configuration"
109 select MAY_HAVE_SMP
110 select HAVE_XTENSA_GPIO32
111 help
112 Select this variant to use a custom Xtensa processor configuration.
113 You will be prompted for a processor variant CORENAME.
105endchoice 114endchoice
106 115
116config XTENSA_VARIANT_CUSTOM_NAME
117 string "Xtensa Processor Custom Core Variant Name"
118 depends on XTENSA_VARIANT_CUSTOM
119 help
120 Provide the name of a custom Xtensa processor variant.
121 This CORENAME selects arch/xtensa/variant/CORENAME.
122 Dont forget you have to select MMU if you have one.
123
124config XTENSA_VARIANT_NAME
125 string
126 default "dc232b" if XTENSA_VARIANT_DC232B
127 default "dc233c" if XTENSA_VARIANT_DC233C
128 default "fsf" if XTENSA_VARIANT_FSF
129 default "s6000" if XTENSA_VARIANT_S6000
130 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
131
132config XTENSA_VARIANT_MMU
133 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
134 depends on XTENSA_VARIANT_CUSTOM
135 default y
136 help
137 Build a Conventional Kernel with full MMU support,
138 ie: it supports a TLB with auto-loading, page protection.
139
107config XTENSA_UNALIGNED_USER 140config XTENSA_UNALIGNED_USER
108 bool "Unaligned memory access in use space" 141 bool "Unaligned memory access in use space"
109 help 142 help
@@ -156,13 +189,9 @@ config HOTPLUG_CPU
156 189
157 Say N if you want to disable CPU hotplug. 190 Say N if you want to disable CPU hotplug.
158 191
159config MATH_EMULATION
160 bool "Math emulation"
161 help
162 Can we use information of configuration file?
163
164config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 192config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
165 bool "Initialize Xtensa MMU inside the Linux kernel code" 193 bool "Initialize Xtensa MMU inside the Linux kernel code"
194 depends on MMU
166 default y 195 default y
167 help 196 help
168 Earlier version initialized the MMU in the exception vector 197 Earlier version initialized the MMU in the exception vector
@@ -192,6 +221,7 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
192 221
193config HIGHMEM 222config HIGHMEM
194 bool "High Memory Support" 223 bool "High Memory Support"
224 depends on MMU
195 help 225 help
196 Linux can use the full amount of RAM in the system by 226 Linux can use the full amount of RAM in the system by
197 default. However, the default MMUv2 setup only maps the 227 default. However, the default MMUv2 setup only maps the
@@ -208,6 +238,32 @@ config HIGHMEM
208 238
209 If unsure, say Y. 239 If unsure, say Y.
210 240
241config FAST_SYSCALL_XTENSA
242 bool "Enable fast atomic syscalls"
243 default n
244 help
245 fast_syscall_xtensa is a syscall that can make atomic operations
246 on UP kernel when processor has no s32c1i support.
247
248 This syscall is deprecated. It may have issues when called with
249 invalid arguments. It is provided only for backwards compatibility.
250 Only enable it if your userspace software requires it.
251
252 If unsure, say N.
253
254config FAST_SYSCALL_SPILL_REGISTERS
255 bool "Enable spill registers syscall"
256 default n
257 help
258 fast_syscall_spill_registers is a syscall that spills all active
259 register windows of a calling userspace task onto its stack.
260
261 This syscall is deprecated. It may have issues when called with
262 invalid arguments. It is provided only for backwards compatibility.
263 Only enable it if your userspace software requires it.
264
265 If unsure, say N.
266
211endmenu 267endmenu
212 268
213config XTENSA_CALIBRATE_CCOUNT 269config XTENSA_CALIBRATE_CCOUNT
@@ -250,12 +306,14 @@ config XTENSA_PLATFORM_ISS
250 306
251config XTENSA_PLATFORM_XT2000 307config XTENSA_PLATFORM_XT2000
252 bool "XT2000" 308 bool "XT2000"
309 select HAVE_IDE
253 help 310 help
254 XT2000 is the name of Tensilica's feature-rich emulation platform. 311 XT2000 is the name of Tensilica's feature-rich emulation platform.
255 This hardware is capable of running a full Linux distribution. 312 This hardware is capable of running a full Linux distribution.
256 313
257config XTENSA_PLATFORM_S6105 314config XTENSA_PLATFORM_S6105
258 bool "S6105" 315 bool "S6105"
316 select HAVE_IDE
259 select SERIAL_CONSOLE 317 select SERIAL_CONSOLE
260 select NO_IOPORT_MAP 318 select NO_IOPORT_MAP
261 319
diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile
index 81250ece3062..472533064b46 100644
--- a/arch/xtensa/Makefile
+++ b/arch/xtensa/Makefile
@@ -4,6 +4,7 @@
4# for more details. 4# for more details.
5# 5#
6# Copyright (C) 2001 - 2005 Tensilica Inc. 6# Copyright (C) 2001 - 2005 Tensilica Inc.
7# Copyright (C) 2014 Cadence Design Systems Inc.
7# 8#
8# This file is included by the global makefile so that you can add your own 9# This file is included by the global makefile so that you can add your own
9# architecture-specific flags and dependencies. Remember to do have actions 10# architecture-specific flags and dependencies. Remember to do have actions
@@ -13,11 +14,7 @@
13# Core configuration. 14# Core configuration.
14# (Use VAR=<xtensa_config> to use another default compiler.) 15# (Use VAR=<xtensa_config> to use another default compiler.)
15 16
16variant-$(CONFIG_XTENSA_VARIANT_FSF) := fsf 17variant-y := $(patsubst "%",%,$(CONFIG_XTENSA_VARIANT_NAME))
17variant-$(CONFIG_XTENSA_VARIANT_DC232B) := dc232b
18variant-$(CONFIG_XTENSA_VARIANT_DC233C) := dc233c
19variant-$(CONFIG_XTENSA_VARIANT_S6000) := s6000
20variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM) := custom
21 18
22VARIANT = $(variant-y) 19VARIANT = $(variant-y)
23export VARIANT 20export VARIANT
diff --git a/arch/xtensa/boot/dts/kc705.dts b/arch/xtensa/boot/dts/kc705.dts
index 742a347be67a..c4d17a34ab86 100644
--- a/arch/xtensa/boot/dts/kc705.dts
+++ b/arch/xtensa/boot/dts/kc705.dts
@@ -4,8 +4,11 @@
4 4
5/ { 5/ {
6 compatible = "cdns,xtensa-kc705"; 6 compatible = "cdns,xtensa-kc705";
7 chosen {
8 bootargs = "earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=0x38000000";
9 };
7 memory@0 { 10 memory@0 {
8 device_type = "memory"; 11 device_type = "memory";
9 reg = <0x00000000 0x08000000>; 12 reg = <0x00000000 0x38000000>;
10 }; 13 };
11}; 14};
diff --git a/arch/xtensa/configs/common_defconfig b/arch/xtensa/configs/common_defconfig
index f6000fe05119..721df1214bc3 100644
--- a/arch/xtensa/configs/common_defconfig
+++ b/arch/xtensa/configs/common_defconfig
@@ -66,7 +66,6 @@ CONFIG_XTENSA_ARCH_LINUX_BE=y
66CONFIG_MMU=y 66CONFIG_MMU=y
67# CONFIG_XTENSA_UNALIGNED_USER is not set 67# CONFIG_XTENSA_UNALIGNED_USER is not set
68# CONFIG_PREEMPT is not set 68# CONFIG_PREEMPT is not set
69# CONFIG_MATH_EMULATION is not set
70# CONFIG_HIGHMEM is not set 69# CONFIG_HIGHMEM is not set
71 70
72# 71#
diff --git a/arch/xtensa/configs/iss_defconfig b/arch/xtensa/configs/iss_defconfig
index 1493c68352d1..b966baf82cae 100644
--- a/arch/xtensa/configs/iss_defconfig
+++ b/arch/xtensa/configs/iss_defconfig
@@ -146,7 +146,6 @@ CONFIG_XTENSA_VARIANT_FSF=y
146# CONFIG_XTENSA_VARIANT_S6000 is not set 146# CONFIG_XTENSA_VARIANT_S6000 is not set
147# CONFIG_XTENSA_UNALIGNED_USER is not set 147# CONFIG_XTENSA_UNALIGNED_USER is not set
148# CONFIG_PREEMPT is not set 148# CONFIG_PREEMPT is not set
149# CONFIG_MATH_EMULATION is not set
150CONFIG_XTENSA_CALIBRATE_CCOUNT=y 149CONFIG_XTENSA_CALIBRATE_CCOUNT=y
151CONFIG_SERIAL_CONSOLE=y 150CONFIG_SERIAL_CONSOLE=y
152CONFIG_XTENSA_ISS_NETWORK=y 151CONFIG_XTENSA_ISS_NETWORK=y
@@ -308,7 +307,7 @@ CONFIG_MISC_DEVICES=y
308# EEPROM support 307# EEPROM support
309# 308#
310# CONFIG_EEPROM_93CX6 is not set 309# CONFIG_EEPROM_93CX6 is not set
311CONFIG_HAVE_IDE=y 310# CONFIG_HAVE_IDE is not set
312# CONFIG_IDE is not set 311# CONFIG_IDE is not set
313 312
314# 313#
diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig
index 12a492ab6d17..9471265b8ca6 100644
--- a/arch/xtensa/configs/s6105_defconfig
+++ b/arch/xtensa/configs/s6105_defconfig
@@ -109,7 +109,6 @@ CONFIG_VARIANT_IRQ_SWITCH=y
109CONFIG_XTENSA_VARIANT_S6000=y 109CONFIG_XTENSA_VARIANT_S6000=y
110# CONFIG_XTENSA_UNALIGNED_USER is not set 110# CONFIG_XTENSA_UNALIGNED_USER is not set
111CONFIG_PREEMPT=y 111CONFIG_PREEMPT=y
112# CONFIG_MATH_EMULATION is not set
113# CONFIG_HIGHMEM is not set 112# CONFIG_HIGHMEM is not set
114CONFIG_XTENSA_CALIBRATE_CCOUNT=y 113CONFIG_XTENSA_CALIBRATE_CCOUNT=y
115CONFIG_SERIAL_CONSOLE=y 114CONFIG_SERIAL_CONSOLE=y
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 555a98a18453..e72aaca7a77f 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -37,6 +37,7 @@
37 * specials for cache aliasing: 37 * specials for cache aliasing:
38 * 38 *
39 * __flush_invalidate_dcache_page_alias(vaddr,paddr) 39 * __flush_invalidate_dcache_page_alias(vaddr,paddr)
40 * __invalidate_dcache_page_alias(vaddr,paddr)
40 * __invalidate_icache_page_alias(vaddr,paddr) 41 * __invalidate_icache_page_alias(vaddr,paddr)
41 */ 42 */
42 43
@@ -62,6 +63,7 @@ extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
62 63
63#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE) 64#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
64extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); 65extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
66extern void __invalidate_dcache_page_alias(unsigned long, unsigned long);
65#else 67#else
66static inline void __flush_invalidate_dcache_page_alias(unsigned long virt, 68static inline void __flush_invalidate_dcache_page_alias(unsigned long virt,
67 unsigned long phys) { } 69 unsigned long phys) { }
diff --git a/arch/xtensa/include/asm/fixmap.h b/arch/xtensa/include/asm/fixmap.h
index 9f6c33d0428a..62b507deea9d 100644
--- a/arch/xtensa/include/asm/fixmap.h
+++ b/arch/xtensa/include/asm/fixmap.h
@@ -23,8 +23,8 @@
23 * Here we define all the compile-time 'special' virtual 23 * Here we define all the compile-time 'special' virtual
24 * addresses. The point is to have a constant address at 24 * addresses. The point is to have a constant address at
25 * compile time, but to set the physical address only 25 * compile time, but to set the physical address only
26 * in the boot process. We allocate these special addresses 26 * in the boot process. We allocate these special addresses
27 * from the end of the consistent memory region backwards. 27 * from the start of the consistent memory region upwards.
28 * Also this lets us do fail-safe vmalloc(), we 28 * Also this lets us do fail-safe vmalloc(), we
29 * can guarantee that these special addresses and 29 * can guarantee that these special addresses and
30 * vmalloc()-ed addresses never overlap. 30 * vmalloc()-ed addresses never overlap.
@@ -38,7 +38,8 @@ enum fixed_addresses {
38#ifdef CONFIG_HIGHMEM 38#ifdef CONFIG_HIGHMEM
39 /* reserved pte's for temporary kernel mappings */ 39 /* reserved pte's for temporary kernel mappings */
40 FIX_KMAP_BEGIN, 40 FIX_KMAP_BEGIN,
41 FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, 41 FIX_KMAP_END = FIX_KMAP_BEGIN +
42 (KM_TYPE_NR * NR_CPUS * DCACHE_N_COLORS) - 1,
42#endif 43#endif
43 __end_of_fixed_addresses 44 __end_of_fixed_addresses
44}; 45};
@@ -47,7 +48,28 @@ enum fixed_addresses {
47#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 48#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
48#define FIXADDR_START ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK) 49#define FIXADDR_START ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK)
49 50
50#include <asm-generic/fixmap.h> 51#define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT))
52#define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT)
53
54#ifndef __ASSEMBLY__
55/*
56 * 'index to address' translation. If anyone tries to use the idx
57 * directly without translation, we catch the bug with a NULL-deference
58 * kernel oops. Illegal ranges of incoming indices are caught too.
59 */
60static __always_inline unsigned long fix_to_virt(const unsigned int idx)
61{
62 BUILD_BUG_ON(idx >= __end_of_fixed_addresses);
63 return __fix_to_virt(idx);
64}
65
66static inline unsigned long virt_to_fix(const unsigned long vaddr)
67{
68 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
69 return __virt_to_fix(vaddr);
70}
71
72#endif
51 73
52#define kmap_get_fixmap_pte(vaddr) \ 74#define kmap_get_fixmap_pte(vaddr) \
53 pte_offset_kernel( \ 75 pte_offset_kernel( \
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 2653ef5d55f1..2c7901edffaf 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -12,19 +12,55 @@
12#ifndef _XTENSA_HIGHMEM_H 12#ifndef _XTENSA_HIGHMEM_H
13#define _XTENSA_HIGHMEM_H 13#define _XTENSA_HIGHMEM_H
14 14
15#include <linux/wait.h>
15#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
16#include <asm/fixmap.h> 17#include <asm/fixmap.h>
17#include <asm/kmap_types.h> 18#include <asm/kmap_types.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19 20
20#define PKMAP_BASE (FIXADDR_START - PMD_SIZE) 21#define PKMAP_BASE ((FIXADDR_START - \
21#define LAST_PKMAP PTRS_PER_PTE 22 (LAST_PKMAP + 1) * PAGE_SIZE) & PMD_MASK)
23#define LAST_PKMAP (PTRS_PER_PTE * DCACHE_N_COLORS)
22#define LAST_PKMAP_MASK (LAST_PKMAP - 1) 24#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
23#define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT) 25#define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT)
24#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) 26#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
25 27
26#define kmap_prot PAGE_KERNEL 28#define kmap_prot PAGE_KERNEL
27 29
30#if DCACHE_WAY_SIZE > PAGE_SIZE
31#define get_pkmap_color get_pkmap_color
32static inline int get_pkmap_color(struct page *page)
33{
34 return DCACHE_ALIAS(page_to_phys(page));
35}
36
37extern unsigned int last_pkmap_nr_arr[];
38
39static inline unsigned int get_next_pkmap_nr(unsigned int color)
40{
41 last_pkmap_nr_arr[color] =
42 (last_pkmap_nr_arr[color] + DCACHE_N_COLORS) & LAST_PKMAP_MASK;
43 return last_pkmap_nr_arr[color] + color;
44}
45
46static inline int no_more_pkmaps(unsigned int pkmap_nr, unsigned int color)
47{
48 return pkmap_nr < DCACHE_N_COLORS;
49}
50
51static inline int get_pkmap_entries_count(unsigned int color)
52{
53 return LAST_PKMAP / DCACHE_N_COLORS;
54}
55
56extern wait_queue_head_t pkmap_map_wait_arr[];
57
58static inline wait_queue_head_t *get_pkmap_wait_queue_head(unsigned int color)
59{
60 return pkmap_map_wait_arr + color;
61}
62#endif
63
28extern pte_t *pkmap_page_table; 64extern pte_t *pkmap_page_table;
29 65
30void *kmap_high(struct page *page); 66void *kmap_high(struct page *page);
diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
index 47f582333f6b..abe24c6f8b2f 100644
--- a/arch/xtensa/include/asm/page.h
+++ b/arch/xtensa/include/asm/page.h
@@ -78,7 +78,9 @@
78# define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0) 78# define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)
79#else 79#else
80# define DCACHE_ALIAS_ORDER 0 80# define DCACHE_ALIAS_ORDER 0
81# define DCACHE_ALIAS(a) ((void)(a), 0)
81#endif 82#endif
83#define DCACHE_N_COLORS (1 << DCACHE_ALIAS_ORDER)
82 84
83#if ICACHE_WAY_SIZE > PAGE_SIZE 85#if ICACHE_WAY_SIZE > PAGE_SIZE
84# define ICACHE_ALIAS_ORDER (ICACHE_WAY_SHIFT - PAGE_SHIFT) 86# define ICACHE_ALIAS_ORDER (ICACHE_WAY_SHIFT - PAGE_SHIFT)
@@ -134,6 +136,7 @@ static inline __attribute_const__ int get_order(unsigned long size)
134#endif 136#endif
135 137
136struct page; 138struct page;
139struct vm_area_struct;
137extern void clear_page(void *page); 140extern void clear_page(void *page);
138extern void copy_page(void *to, void *from); 141extern void copy_page(void *to, void *from);
139 142
@@ -143,8 +146,15 @@ extern void copy_page(void *to, void *from);
143 */ 146 */
144 147
145#if DCACHE_WAY_SIZE > PAGE_SIZE 148#if DCACHE_WAY_SIZE > PAGE_SIZE
146extern void clear_user_page(void*, unsigned long, struct page*); 149extern void clear_page_alias(void *vaddr, unsigned long paddr);
147extern void copy_user_page(void*, void*, unsigned long, struct page*); 150extern void copy_page_alias(void *to, void *from,
151 unsigned long to_paddr, unsigned long from_paddr);
152
153#define clear_user_highpage clear_user_highpage
154void clear_user_highpage(struct page *page, unsigned long vaddr);
155#define __HAVE_ARCH_COPY_USER_HIGHPAGE
156void copy_user_highpage(struct page *to, struct page *from,
157 unsigned long vaddr, struct vm_area_struct *vma);
148#else 158#else
149# define clear_user_page(page, vaddr, pg) clear_page(page) 159# define clear_user_page(page, vaddr, pg) clear_page(page)
150# define copy_user_page(to, from, vaddr, pg) copy_page(to, from) 160# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index 4b0ca35a93b1..b2173e5da601 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -67,7 +67,12 @@
67#define VMALLOC_START 0xC0000000 67#define VMALLOC_START 0xC0000000
68#define VMALLOC_END 0xC7FEFFFF 68#define VMALLOC_END 0xC7FEFFFF
69#define TLBTEMP_BASE_1 0xC7FF0000 69#define TLBTEMP_BASE_1 0xC7FF0000
70#define TLBTEMP_BASE_2 0xC7FF8000 70#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
71#if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE
72#define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE)
73#else
74#define TLBTEMP_SIZE ICACHE_WAY_SIZE
75#endif
71 76
72/* 77/*
73 * For the Xtensa architecture, the PTE layout is as follows: 78 * For the Xtensa architecture, the PTE layout is as follows:
diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h
index fd686dc45d1a..c7211e7e182d 100644
--- a/arch/xtensa/include/asm/uaccess.h
+++ b/arch/xtensa/include/asm/uaccess.h
@@ -52,7 +52,12 @@
52 */ 52 */
53 .macro get_fs ad, sp 53 .macro get_fs ad, sp
54 GET_CURRENT(\ad,\sp) 54 GET_CURRENT(\ad,\sp)
55#if THREAD_CURRENT_DS > 1020
56 addi \ad, \ad, TASK_THREAD
57 l32i \ad, \ad, THREAD_CURRENT_DS - TASK_THREAD
58#else
55 l32i \ad, \ad, THREAD_CURRENT_DS 59 l32i \ad, \ad, THREAD_CURRENT_DS
60#endif
56 .endm 61 .endm
57 62
58/* 63/*
diff --git a/arch/xtensa/include/uapi/asm/ioctls.h b/arch/xtensa/include/uapi/asm/ioctls.h
index b4cb1100c0fb..a47909f0c34b 100644
--- a/arch/xtensa/include/uapi/asm/ioctls.h
+++ b/arch/xtensa/include/uapi/asm/ioctls.h
@@ -28,17 +28,17 @@
28#define TCSETSW 0x5403 28#define TCSETSW 0x5403
29#define TCSETSF 0x5404 29#define TCSETSF 0x5404
30 30
31#define TCGETA _IOR('t', 23, struct termio) 31#define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
32#define TCSETA _IOW('t', 24, struct termio) 32#define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
33#define TCSETAW _IOW('t', 25, struct termio) 33#define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
34#define TCSETAF _IOW('t', 28, struct termio) 34#define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */
35 35
36#define TCSBRK _IO('t', 29) 36#define TCSBRK _IO('t', 29)
37#define TCXONC _IO('t', 30) 37#define TCXONC _IO('t', 30)
38#define TCFLSH _IO('t', 31) 38#define TCFLSH _IO('t', 31)
39 39
40#define TIOCSWINSZ _IOW('t', 103, struct winsize) 40#define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
41#define TIOCGWINSZ _IOR('t', 104, struct winsize) 41#define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
42#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ 42#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
43#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ 43#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
44#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ 44#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
@@ -88,7 +88,6 @@
88#define TIOCSETD _IOW('T', 35, int) 88#define TIOCSETD _IOW('T', 35, int)
89#define TIOCGETD _IOR('T', 36, int) 89#define TIOCGETD _IOR('T', 36, int)
90#define TCSBRKP _IOW('T', 37, int) /* Needed for POSIX tcsendbreak()*/ 90#define TCSBRKP _IOW('T', 37, int) /* Needed for POSIX tcsendbreak()*/
91#define TIOCTTYGSTRUCT _IOR('T', 38, struct tty_struct) /* For debugging only*/
92#define TIOCSBRK _IO('T', 39) /* BSD compatibility */ 91#define TIOCSBRK _IO('T', 39) /* BSD compatibility */
93#define TIOCCBRK _IO('T', 40) /* BSD compatibility */ 92#define TIOCCBRK _IO('T', 40) /* BSD compatibility */
94#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/ 93#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/
@@ -114,8 +113,10 @@
114#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* Get line status reg. */ 113#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* Get line status reg. */
115 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ 114 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
116# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ 115# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
117#define TIOCSERGETMULTI _IOR('T', 90, struct serial_multiport_struct) /* Get multiport config */ 116#define TIOCSERGETMULTI 0x80a8545a /* Get multiport config */
118#define TIOCSERSETMULTI _IOW('T', 91, struct serial_multiport_struct) /* Set multiport config */ 117 /* _IOR('T', 90, struct serial_multiport_struct) */
118#define TIOCSERSETMULTI 0x40a8545b /* Set multiport config */
119 /* _IOW('T', 91, struct serial_multiport_struct) */
119 120
120#define TIOCMIWAIT _IO('T', 92) /* wait for a change on serial input line(s) */ 121#define TIOCMIWAIT _IO('T', 92) /* wait for a change on serial input line(s) */
121#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ 122#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index b9395529f02d..8883fc877c5c 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -739,7 +739,10 @@ __SYSCALL(334, sys_sched_setattr, 2)
739#define __NR_sched_getattr 335 739#define __NR_sched_getattr 335
740__SYSCALL(335, sys_sched_getattr, 3) 740__SYSCALL(335, sys_sched_getattr, 3)
741 741
742#define __NR_syscall_count 336 742#define __NR_renameat2 336
743__SYSCALL(336, sys_renameat2, 5)
744
745#define __NR_syscall_count 337
743 746
744/* 747/*
745 * sysxtensa syscall handler 748 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S
index d4cef6039a5c..890004af03a9 100644
--- a/arch/xtensa/kernel/align.S
+++ b/arch/xtensa/kernel/align.S
@@ -8,6 +8,7 @@
8 * this archive for more details. 8 * this archive for more details.
9 * 9 *
10 * Copyright (C) 2001 - 2005 Tensilica, Inc. 10 * Copyright (C) 2001 - 2005 Tensilica, Inc.
11 * Copyright (C) 2014 Cadence Design Systems Inc.
11 * 12 *
12 * Rewritten by Chris Zankel <chris@zankel.net> 13 * Rewritten by Chris Zankel <chris@zankel.net>
13 * 14 *
@@ -174,6 +175,10 @@ ENTRY(fast_unaligned)
174 s32i a0, a2, PT_AREG2 175 s32i a0, a2, PT_AREG2
175 s32i a3, a2, PT_AREG3 176 s32i a3, a2, PT_AREG3
176 177
178 rsr a3, excsave1
179 movi a4, fast_unaligned_fixup
180 s32i a4, a3, EXC_TABLE_FIXUP
181
177 /* Keep value of SAR in a0 */ 182 /* Keep value of SAR in a0 */
178 183
179 rsr a0, sar 184 rsr a0, sar
@@ -225,10 +230,6 @@ ENTRY(fast_unaligned)
225 addx8 a5, a6, a5 230 addx8 a5, a6, a5
226 jx a5 # jump into table 231 jx a5 # jump into table
227 232
228 /* Invalid instruction, CRITICAL! */
229.Linvalid_instruction_load:
230 j .Linvalid_instruction
231
232 /* Load: Load memory address. */ 233 /* Load: Load memory address. */
233 234
234.Lload: movi a3, ~3 235.Lload: movi a3, ~3
@@ -272,18 +273,6 @@ ENTRY(fast_unaligned)
272 /* Set target register. */ 273 /* Set target register. */
273 274
2741: 2751:
275
276#if XCHAL_HAVE_LOOPS
277 rsr a5, lend # check if we reached LEND
278 bne a7, a5, 1f
279 rsr a5, lcount # and LCOUNT != 0
280 beqz a5, 1f
281 addi a5, a5, -1 # decrement LCOUNT and set
282 rsr a7, lbeg # set PC to LBEGIN
283 wsr a5, lcount
284#endif
285
2861: wsr a7, epc1 # skip load instruction
287 extui a4, a4, INSN_T, 4 # extract target register 276 extui a4, a4, INSN_T, 4 # extract target register
288 movi a5, .Lload_table 277 movi a5, .Lload_table
289 addx8 a4, a4, a5 278 addx8 a4, a4, a5
@@ -326,6 +315,35 @@ ENTRY(fast_unaligned)
326 mov a3, a14 ; _j 1f; .align 8 315 mov a3, a14 ; _j 1f; .align 8
327 mov a3, a15 ; _j 1f; .align 8 316 mov a3, a15 ; _j 1f; .align 8
328 317
318 /* We cannot handle this exception. */
319
320 .extern _kernel_exception
321.Linvalid_instruction_load:
322.Linvalid_instruction_store:
323
324 movi a4, 0
325 rsr a3, excsave1
326 s32i a4, a3, EXC_TABLE_FIXUP
327
328 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */
329
330 l32i a8, a2, PT_AREG8
331 l32i a7, a2, PT_AREG7
332 l32i a6, a2, PT_AREG6
333 l32i a5, a2, PT_AREG5
334 l32i a4, a2, PT_AREG4
335 wsr a0, sar
336 mov a1, a2
337
338 rsr a0, ps
339 bbsi.l a0, PS_UM_BIT, 2f # jump if user mode
340
341 movi a0, _kernel_exception
342 jx a0
343
3442: movi a0, _user_exception
345 jx a0
346
3291: # a7: instruction pointer, a4: instruction, a3: value 3471: # a7: instruction pointer, a4: instruction, a3: value
330 348
331 movi a6, 0 # mask: ffffffff:00000000 349 movi a6, 0 # mask: ffffffff:00000000
@@ -353,17 +371,6 @@ ENTRY(fast_unaligned)
353 /* Get memory address */ 371 /* Get memory address */
354 372
3551: 3731:
356#if XCHAL_HAVE_LOOPS
357 rsr a4, lend # check if we reached LEND
358 bne a7, a4, 1f
359 rsr a4, lcount # and LCOUNT != 0
360 beqz a4, 1f
361 addi a4, a4, -1 # decrement LCOUNT and set
362 rsr a7, lbeg # set PC to LBEGIN
363 wsr a4, lcount
364#endif
365
3661: wsr a7, epc1 # skip store instruction
367 movi a4, ~3 374 movi a4, ~3
368 and a4, a4, a8 # align memory address 375 and a4, a4, a8 # align memory address
369 376
@@ -375,25 +382,25 @@ ENTRY(fast_unaligned)
375#endif 382#endif
376 383
377 __ssa8r a8 384 __ssa8r a8
378 __src_b a7, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE) 385 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
379 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE) 386 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
380#ifdef UNALIGNED_USER_EXCEPTION 387#ifdef UNALIGNED_USER_EXCEPTION
381 l32e a5, a4, -8 388 l32e a5, a4, -8
382#else 389#else
383 l32i a5, a4, 0 # load lower address word 390 l32i a5, a4, 0 # load lower address word
384#endif 391#endif
385 and a5, a5, a7 # mask 392 and a5, a5, a8 # mask
386 __sh a7, a3 # shift value 393 __sh a8, a3 # shift value
387 or a5, a5, a7 # or with original value 394 or a5, a5, a8 # or with original value
388#ifdef UNALIGNED_USER_EXCEPTION 395#ifdef UNALIGNED_USER_EXCEPTION
389 s32e a5, a4, -8 396 s32e a5, a4, -8
390 l32e a7, a4, -4 397 l32e a8, a4, -4
391#else 398#else
392 s32i a5, a4, 0 # store 399 s32i a5, a4, 0 # store
393 l32i a7, a4, 4 # same for upper address word 400 l32i a8, a4, 4 # same for upper address word
394#endif 401#endif
395 __sl a5, a3 402 __sl a5, a3
396 and a6, a7, a6 403 and a6, a8, a6
397 or a6, a6, a5 404 or a6, a6, a5
398#ifdef UNALIGNED_USER_EXCEPTION 405#ifdef UNALIGNED_USER_EXCEPTION
399 s32e a6, a4, -4 406 s32e a6, a4, -4
@@ -401,9 +408,27 @@ ENTRY(fast_unaligned)
401 s32i a6, a4, 4 408 s32i a6, a4, 4
402#endif 409#endif
403 410
404 /* Done. restore stack and return */
405
406.Lexit: 411.Lexit:
412#if XCHAL_HAVE_LOOPS
413 rsr a4, lend # check if we reached LEND
414 bne a7, a4, 1f
415 rsr a4, lcount # and LCOUNT != 0
416 beqz a4, 1f
417 addi a4, a4, -1 # decrement LCOUNT and set
418 rsr a7, lbeg # set PC to LBEGIN
419 wsr a4, lcount
420#endif
421
4221: wsr a7, epc1 # skip emulated instruction
423
424 /* Update icount if we're single-stepping in userspace. */
425 rsr a4, icountlevel
426 beqz a4, 1f
427 bgeui a4, LOCKLEVEL + 1, 1f
428 rsr a4, icount
429 addi a4, a4, 1
430 wsr a4, icount
4311:
407 movi a4, 0 432 movi a4, 0
408 rsr a3, excsave1 433 rsr a3, excsave1
409 s32i a4, a3, EXC_TABLE_FIXUP 434 s32i a4, a3, EXC_TABLE_FIXUP
@@ -424,31 +449,40 @@ ENTRY(fast_unaligned)
424 l32i a2, a2, PT_AREG2 449 l32i a2, a2, PT_AREG2
425 rfe 450 rfe
426 451
427 /* We cannot handle this exception. */ 452ENDPROC(fast_unaligned)
428 453
429 .extern _kernel_exception 454ENTRY(fast_unaligned_fixup)
430.Linvalid_instruction_store:
431.Linvalid_instruction:
432 455
433 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */ 456 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE
457 wsr a3, excsave1
434 458
435 l32i a8, a2, PT_AREG8 459 l32i a8, a2, PT_AREG8
436 l32i a7, a2, PT_AREG7 460 l32i a7, a2, PT_AREG7
437 l32i a6, a2, PT_AREG6 461 l32i a6, a2, PT_AREG6
438 l32i a5, a2, PT_AREG5 462 l32i a5, a2, PT_AREG5
439 l32i a4, a2, PT_AREG4 463 l32i a4, a2, PT_AREG4
464 l32i a0, a2, PT_AREG2
465 xsr a0, depc # restore depc and a0
440 wsr a0, sar 466 wsr a0, sar
441 mov a1, a2 467
468 rsr a0, exccause
469 s32i a0, a2, PT_DEPC # mark as a regular exception
442 470
443 rsr a0, ps 471 rsr a0, ps
444 bbsi.l a2, PS_UM_BIT, 1f # jump if user mode 472 bbsi.l a0, PS_UM_BIT, 1f # jump if user mode
445 473
446 movi a0, _kernel_exception 474 rsr a0, exccause
475 addx4 a0, a0, a3 # find entry in table
476 l32i a0, a0, EXC_TABLE_FAST_KERNEL # load handler
477 l32i a3, a2, PT_AREG3
447 jx a0 478 jx a0
448 4791:
4491: movi a0, _user_exception 480 rsr a0, exccause
481 addx4 a0, a0, a3 # find entry in table
482 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
483 l32i a3, a2, PT_AREG3
450 jx a0 484 jx a0
451 485
452ENDPROC(fast_unaligned) 486ENDPROC(fast_unaligned_fixup)
453 487
454#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */ 488#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index ef7f4990722b..82bbfa5a05b3 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -986,6 +986,8 @@ ENDPROC(fast_syscall_unrecoverable)
986 * j done 986 * j done
987 */ 987 */
988 988
989#ifdef CONFIG_FAST_SYSCALL_XTENSA
990
989#define TRY \ 991#define TRY \
990 .section __ex_table, "a"; \ 992 .section __ex_table, "a"; \
991 .word 66f, 67f; \ 993 .word 66f, 67f; \
@@ -1001,9 +1003,8 @@ ENTRY(fast_syscall_xtensa)
1001 movi a7, 4 # sizeof(unsigned int) 1003 movi a7, 4 # sizeof(unsigned int)
1002 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp 1004 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1003 1005
1004 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1 1006 _bgeui a6, SYS_XTENSA_COUNT, .Lill
1005 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill 1007 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP, .Lnswp
1006 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1007 1008
1008 /* Fall through for ATOMIC_CMP_SWP. */ 1009 /* Fall through for ATOMIC_CMP_SWP. */
1009 1010
@@ -1015,27 +1016,26 @@ TRY s32i a5, a3, 0 # different, modify value
1015 l32i a7, a2, PT_AREG7 # restore a7 1016 l32i a7, a2, PT_AREG7 # restore a7
1016 l32i a0, a2, PT_AREG0 # restore a0 1017 l32i a0, a2, PT_AREG0 # restore a0
1017 movi a2, 1 # and return 1 1018 movi a2, 1 # and return 1
1018 addi a6, a6, 1 # restore a6 (really necessary?)
1019 rfe 1019 rfe
1020 1020
10211: l32i a7, a2, PT_AREG7 # restore a7 10211: l32i a7, a2, PT_AREG7 # restore a7
1022 l32i a0, a2, PT_AREG0 # restore a0 1022 l32i a0, a2, PT_AREG0 # restore a0
1023 movi a2, 0 # return 0 (note that we cannot set 1023 movi a2, 0 # return 0 (note that we cannot set
1024 addi a6, a6, 1 # restore a6 (really necessary?)
1025 rfe 1024 rfe
1026 1025
1027.Lnswp: /* Atomic set, add, and exg_add. */ 1026.Lnswp: /* Atomic set, add, and exg_add. */
1028 1027
1029TRY l32i a7, a3, 0 # orig 1028TRY l32i a7, a3, 0 # orig
1029 addi a6, a6, -SYS_XTENSA_ATOMIC_SET
1030 add a0, a4, a7 # + arg 1030 add a0, a4, a7 # + arg
1031 moveqz a0, a4, a6 # set 1031 moveqz a0, a4, a6 # set
1032 addi a6, a6, SYS_XTENSA_ATOMIC_SET
1032TRY s32i a0, a3, 0 # write new value 1033TRY s32i a0, a3, 0 # write new value
1033 1034
1034 mov a0, a2 1035 mov a0, a2
1035 mov a2, a7 1036 mov a2, a7
1036 l32i a7, a0, PT_AREG7 # restore a7 1037 l32i a7, a0, PT_AREG7 # restore a7
1037 l32i a0, a0, PT_AREG0 # restore a0 1038 l32i a0, a0, PT_AREG0 # restore a0
1038 addi a6, a6, 1 # restore a6 (really necessary?)
1039 rfe 1039 rfe
1040 1040
1041CATCH 1041CATCH
@@ -1044,13 +1044,25 @@ CATCH
1044 movi a2, -EFAULT 1044 movi a2, -EFAULT
1045 rfe 1045 rfe
1046 1046
1047.Lill: l32i a7, a2, PT_AREG0 # restore a7 1047.Lill: l32i a7, a2, PT_AREG7 # restore a7
1048 l32i a0, a2, PT_AREG0 # restore a0 1048 l32i a0, a2, PT_AREG0 # restore a0
1049 movi a2, -EINVAL 1049 movi a2, -EINVAL
1050 rfe 1050 rfe
1051 1051
1052ENDPROC(fast_syscall_xtensa) 1052ENDPROC(fast_syscall_xtensa)
1053 1053
1054#else /* CONFIG_FAST_SYSCALL_XTENSA */
1055
1056ENTRY(fast_syscall_xtensa)
1057
1058 l32i a0, a2, PT_AREG0 # restore a0
1059 movi a2, -ENOSYS
1060 rfe
1061
1062ENDPROC(fast_syscall_xtensa)
1063
1064#endif /* CONFIG_FAST_SYSCALL_XTENSA */
1065
1054 1066
1055/* fast_syscall_spill_registers. 1067/* fast_syscall_spill_registers.
1056 * 1068 *
@@ -1066,6 +1078,8 @@ ENDPROC(fast_syscall_xtensa)
1066 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler. 1078 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1067 */ 1079 */
1068 1080
1081#ifdef CONFIG_FAST_SYSCALL_SPILL_REGISTERS
1082
1069ENTRY(fast_syscall_spill_registers) 1083ENTRY(fast_syscall_spill_registers)
1070 1084
1071 /* Register a FIXUP handler (pass current wb as a parameter) */ 1085 /* Register a FIXUP handler (pass current wb as a parameter) */
@@ -1400,6 +1414,18 @@ ENTRY(fast_syscall_spill_registers_fixup_return)
1400 1414
1401ENDPROC(fast_syscall_spill_registers_fixup_return) 1415ENDPROC(fast_syscall_spill_registers_fixup_return)
1402 1416
1417#else /* CONFIG_FAST_SYSCALL_SPILL_REGISTERS */
1418
1419ENTRY(fast_syscall_spill_registers)
1420
1421 l32i a0, a2, PT_AREG0 # restore a0
1422 movi a2, -ENOSYS
1423 rfe
1424
1425ENDPROC(fast_syscall_spill_registers)
1426
1427#endif /* CONFIG_FAST_SYSCALL_SPILL_REGISTERS */
1428
1403#ifdef CONFIG_MMU 1429#ifdef CONFIG_MMU
1404/* 1430/*
1405 * We should never get here. Bail out! 1431 * We should never get here. Bail out!
@@ -1565,7 +1591,7 @@ ENTRY(fast_second_level_miss)
1565 rsr a0, excvaddr 1591 rsr a0, excvaddr
1566 bltu a0, a3, 2f 1592 bltu a0, a3, 2f
1567 1593
1568 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT)) 1594 addi a1, a0, -TLBTEMP_SIZE
1569 bgeu a1, a3, 2f 1595 bgeu a1, a3, 2f
1570 1596
1571 /* Check if we have to restore an ITLB mapping. */ 1597 /* Check if we have to restore an ITLB mapping. */
@@ -1820,7 +1846,6 @@ ENTRY(_switch_to)
1820 1846
1821 entry a1, 16 1847 entry a1, 16
1822 1848
1823 mov a10, a2 # preserve 'prev' (a2)
1824 mov a11, a3 # and 'next' (a3) 1849 mov a11, a3 # and 'next' (a3)
1825 1850
1826 l32i a4, a2, TASK_THREAD_INFO 1851 l32i a4, a2, TASK_THREAD_INFO
@@ -1828,8 +1853,14 @@ ENTRY(_switch_to)
1828 1853
1829 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER 1854 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1830 1855
1831 s32i a0, a10, THREAD_RA # save return address 1856#if THREAD_RA > 1020 || THREAD_SP > 1020
1832 s32i a1, a10, THREAD_SP # save stack pointer 1857 addi a10, a2, TASK_THREAD
1858 s32i a0, a10, THREAD_RA - TASK_THREAD # save return address
1859 s32i a1, a10, THREAD_SP - TASK_THREAD # save stack pointer
1860#else
1861 s32i a0, a2, THREAD_RA # save return address
1862 s32i a1, a2, THREAD_SP # save stack pointer
1863#endif
1833 1864
1834 /* Disable ints while we manipulate the stack pointer. */ 1865 /* Disable ints while we manipulate the stack pointer. */
1835 1866
@@ -1870,7 +1901,6 @@ ENTRY(_switch_to)
1870 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER 1901 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1871 1902
1872 wsr a14, ps 1903 wsr a14, ps
1873 mov a2, a10 # return 'prev'
1874 rsync 1904 rsync
1875 1905
1876 retw 1906 retw
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 2d9cc6dbfd78..e8b76b8e4b29 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -49,9 +49,8 @@ dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
49 49
50 /* We currently don't support coherent memory outside KSEG */ 50 /* We currently don't support coherent memory outside KSEG */
51 51
52 if (ret < XCHAL_KSEG_CACHED_VADDR 52 BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
53 || ret >= XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE) 53 ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
54 BUG();
55 54
56 55
57 if (ret != 0) { 56 if (ret != 0) {
@@ -68,10 +67,11 @@ EXPORT_SYMBOL(dma_alloc_coherent);
68void dma_free_coherent(struct device *hwdev, size_t size, 67void dma_free_coherent(struct device *hwdev, size_t size,
69 void *vaddr, dma_addr_t dma_handle) 68 void *vaddr, dma_addr_t dma_handle)
70{ 69{
71 long addr=(long)vaddr+XCHAL_KSEG_CACHED_VADDR-XCHAL_KSEG_BYPASS_VADDR; 70 unsigned long addr = (unsigned long)vaddr +
71 XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
72 72
73 if (addr < 0 || addr >= XCHAL_KSEG_SIZE) 73 BUG_ON(addr < XCHAL_KSEG_CACHED_VADDR ||
74 BUG(); 74 addr > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
75 75
76 free_pages(addr, get_order(size)); 76 free_pages(addr, get_order(size));
77} 77}
diff --git a/arch/xtensa/kernel/smp.c b/arch/xtensa/kernel/smp.c
index 40b5a3771fb0..4d02e38514f5 100644
--- a/arch/xtensa/kernel/smp.c
+++ b/arch/xtensa/kernel/smp.c
@@ -571,6 +571,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
571 }; 571 };
572 on_each_cpu(ipi_flush_icache_range, &fd, 1); 572 on_each_cpu(ipi_flush_icache_range, &fd, 1);
573} 573}
574EXPORT_SYMBOL(flush_icache_range);
574 575
575/* ------------------------------------------------------------------------- */ 576/* ------------------------------------------------------------------------- */
576 577
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index eebbfd8c26fc..9d2f45f010ef 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -101,9 +101,8 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = {
101#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION 101#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
102#ifdef CONFIG_XTENSA_UNALIGNED_USER 102#ifdef CONFIG_XTENSA_UNALIGNED_USER
103{ EXCCAUSE_UNALIGNED, USER, fast_unaligned }, 103{ EXCCAUSE_UNALIGNED, USER, fast_unaligned },
104#else
105{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
106#endif 104#endif
105{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
107{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned }, 106{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
108#endif 107#endif
109#ifdef CONFIG_MMU 108#ifdef CONFIG_MMU
@@ -264,7 +263,6 @@ do_illegal_instruction(struct pt_regs *regs)
264 */ 263 */
265 264
266#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION 265#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
267#ifndef CONFIG_XTENSA_UNALIGNED_USER
268void 266void
269do_unaligned_user (struct pt_regs *regs) 267do_unaligned_user (struct pt_regs *regs)
270{ 268{
@@ -286,7 +284,6 @@ do_unaligned_user (struct pt_regs *regs)
286 284
287} 285}
288#endif 286#endif
289#endif
290 287
291void 288void
292do_debug(struct pt_regs *regs) 289do_debug(struct pt_regs *regs)
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index 8453e6e39895..1b397a902292 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -454,8 +454,14 @@ _DoubleExceptionVector_WindowOverflow:
454 s32i a0, a2, PT_DEPC 454 s32i a0, a2, PT_DEPC
455 455
456_DoubleExceptionVector_handle_exception: 456_DoubleExceptionVector_handle_exception:
457 addi a0, a0, -EXCCAUSE_UNALIGNED
458 beqz a0, 2f
457 addx4 a0, a0, a3 459 addx4 a0, a0, a3
458 l32i a0, a0, EXC_TABLE_FAST_USER 460 l32i a0, a0, EXC_TABLE_FAST_USER + 4 * EXCCAUSE_UNALIGNED
461 xsr a3, excsave1
462 jx a0
4632:
464 movi a0, user_exception
459 xsr a3, excsave1 465 xsr a3, excsave1
460 jx a0 466 jx a0
461 467
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index d16db6df86f8..fc1bc2ba8d5d 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -269,13 +269,13 @@ SECTIONS
269 .UserExceptionVector.literal) 269 .UserExceptionVector.literal)
270 SECTION_VECTOR (_DoubleExceptionVector_literal, 270 SECTION_VECTOR (_DoubleExceptionVector_literal,
271 .DoubleExceptionVector.literal, 271 .DoubleExceptionVector.literal,
272 DOUBLEEXC_VECTOR_VADDR - 40, 272 DOUBLEEXC_VECTOR_VADDR - 48,
273 SIZEOF(.UserExceptionVector.text), 273 SIZEOF(.UserExceptionVector.text),
274 .UserExceptionVector.text) 274 .UserExceptionVector.text)
275 SECTION_VECTOR (_DoubleExceptionVector_text, 275 SECTION_VECTOR (_DoubleExceptionVector_text,
276 .DoubleExceptionVector.text, 276 .DoubleExceptionVector.text,
277 DOUBLEEXC_VECTOR_VADDR, 277 DOUBLEEXC_VECTOR_VADDR,
278 40, 278 48,
279 .DoubleExceptionVector.literal) 279 .DoubleExceptionVector.literal)
280 280
281 . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; 281 . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c
index 63cbb867dadd..d75aa1476da7 100644
--- a/arch/xtensa/mm/cache.c
+++ b/arch/xtensa/mm/cache.c
@@ -59,9 +59,68 @@
59 * 59 *
60 */ 60 */
61 61
62#if (DCACHE_WAY_SIZE > PAGE_SIZE) && defined(CONFIG_HIGHMEM) 62#if (DCACHE_WAY_SIZE > PAGE_SIZE)
63#error "HIGHMEM is not supported on cores with aliasing cache." 63static inline void kmap_invalidate_coherent(struct page *page,
64#endif 64 unsigned long vaddr)
65{
66 if (!DCACHE_ALIAS_EQ(page_to_phys(page), vaddr)) {
67 unsigned long kvaddr;
68
69 if (!PageHighMem(page)) {
70 kvaddr = (unsigned long)page_to_virt(page);
71
72 __invalidate_dcache_page(kvaddr);
73 } else {
74 kvaddr = TLBTEMP_BASE_1 +
75 (page_to_phys(page) & DCACHE_ALIAS_MASK);
76
77 __invalidate_dcache_page_alias(kvaddr,
78 page_to_phys(page));
79 }
80 }
81}
82
83static inline void *coherent_kvaddr(struct page *page, unsigned long base,
84 unsigned long vaddr, unsigned long *paddr)
85{
86 if (PageHighMem(page) || !DCACHE_ALIAS_EQ(page_to_phys(page), vaddr)) {
87 *paddr = page_to_phys(page);
88 return (void *)(base + (vaddr & DCACHE_ALIAS_MASK));
89 } else {
90 *paddr = 0;
91 return page_to_virt(page);
92 }
93}
94
95void clear_user_highpage(struct page *page, unsigned long vaddr)
96{
97 unsigned long paddr;
98 void *kvaddr = coherent_kvaddr(page, TLBTEMP_BASE_1, vaddr, &paddr);
99
100 pagefault_disable();
101 kmap_invalidate_coherent(page, vaddr);
102 set_bit(PG_arch_1, &page->flags);
103 clear_page_alias(kvaddr, paddr);
104 pagefault_enable();
105}
106
107void copy_user_highpage(struct page *dst, struct page *src,
108 unsigned long vaddr, struct vm_area_struct *vma)
109{
110 unsigned long dst_paddr, src_paddr;
111 void *dst_vaddr = coherent_kvaddr(dst, TLBTEMP_BASE_1, vaddr,
112 &dst_paddr);
113 void *src_vaddr = coherent_kvaddr(src, TLBTEMP_BASE_2, vaddr,
114 &src_paddr);
115
116 pagefault_disable();
117 kmap_invalidate_coherent(dst, vaddr);
118 set_bit(PG_arch_1, &dst->flags);
119 copy_page_alias(dst_vaddr, src_vaddr, dst_paddr, src_paddr);
120 pagefault_enable();
121}
122
123#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */
65 124
66#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK 125#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
67 126
@@ -103,7 +162,8 @@ void flush_dcache_page(struct page *page)
103 if (!alias && !mapping) 162 if (!alias && !mapping)
104 return; 163 return;
105 164
106 __flush_invalidate_dcache_page((long)page_address(page)); 165 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);
166 __flush_invalidate_dcache_page_alias(virt, phys);
107 167
108 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); 168 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK);
109 169
@@ -168,13 +228,12 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
168#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK 228#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
169 229
170 if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) { 230 if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) {
171
172 unsigned long paddr = (unsigned long) page_address(page);
173 unsigned long phys = page_to_phys(page); 231 unsigned long phys = page_to_phys(page);
174 unsigned long tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); 232 unsigned long tmp;
175
176 __flush_invalidate_dcache_page(paddr);
177 233
234 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);
235 __flush_invalidate_dcache_page_alias(tmp, phys);
236 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK);
178 __flush_invalidate_dcache_page_alias(tmp, phys); 237 __flush_invalidate_dcache_page_alias(tmp, phys);
179 __invalidate_icache_page_alias(tmp, phys); 238 __invalidate_icache_page_alias(tmp, phys);
180 239
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
index 17a8c0d6fd17..8cfb71ec0937 100644
--- a/arch/xtensa/mm/highmem.c
+++ b/arch/xtensa/mm/highmem.c
@@ -14,23 +14,45 @@
14 14
15static pte_t *kmap_pte; 15static pte_t *kmap_pte;
16 16
17#if DCACHE_WAY_SIZE > PAGE_SIZE
18unsigned int last_pkmap_nr_arr[DCACHE_N_COLORS];
19wait_queue_head_t pkmap_map_wait_arr[DCACHE_N_COLORS];
20
21static void __init kmap_waitqueues_init(void)
22{
23 unsigned int i;
24
25 for (i = 0; i < ARRAY_SIZE(pkmap_map_wait_arr); ++i)
26 init_waitqueue_head(pkmap_map_wait_arr + i);
27}
28#else
29static inline void kmap_waitqueues_init(void)
30{
31}
32#endif
33
34static inline enum fixed_addresses kmap_idx(int type, unsigned long color)
35{
36 return (type + KM_TYPE_NR * smp_processor_id()) * DCACHE_N_COLORS +
37 color;
38}
39
17void *kmap_atomic(struct page *page) 40void *kmap_atomic(struct page *page)
18{ 41{
19 enum fixed_addresses idx; 42 enum fixed_addresses idx;
20 unsigned long vaddr; 43 unsigned long vaddr;
21 int type;
22 44
23 pagefault_disable(); 45 pagefault_disable();
24 if (!PageHighMem(page)) 46 if (!PageHighMem(page))
25 return page_address(page); 47 return page_address(page);
26 48
27 type = kmap_atomic_idx_push(); 49 idx = kmap_idx(kmap_atomic_idx_push(),
28 idx = type + KM_TYPE_NR * smp_processor_id(); 50 DCACHE_ALIAS(page_to_phys(page)));
29 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); 51 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
30#ifdef CONFIG_DEBUG_HIGHMEM 52#ifdef CONFIG_DEBUG_HIGHMEM
31 BUG_ON(!pte_none(*(kmap_pte - idx))); 53 BUG_ON(!pte_none(*(kmap_pte + idx)));
32#endif 54#endif
33 set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL_EXEC)); 55 set_pte(kmap_pte + idx, mk_pte(page, PAGE_KERNEL_EXEC));
34 56
35 return (void *)vaddr; 57 return (void *)vaddr;
36} 58}
@@ -38,12 +60,10 @@ EXPORT_SYMBOL(kmap_atomic);
38 60
39void __kunmap_atomic(void *kvaddr) 61void __kunmap_atomic(void *kvaddr)
40{ 62{
41 int idx, type;
42
43 if (kvaddr >= (void *)FIXADDR_START && 63 if (kvaddr >= (void *)FIXADDR_START &&
44 kvaddr < (void *)FIXADDR_TOP) { 64 kvaddr < (void *)FIXADDR_TOP) {
45 type = kmap_atomic_idx(); 65 int idx = kmap_idx(kmap_atomic_idx(),
46 idx = type + KM_TYPE_NR * smp_processor_id(); 66 DCACHE_ALIAS((unsigned long)kvaddr));
47 67
48 /* 68 /*
49 * Force other mappings to Oops if they'll try to access this 69 * Force other mappings to Oops if they'll try to access this
@@ -51,7 +71,7 @@ void __kunmap_atomic(void *kvaddr)
51 * is a bad idea also, in case the page changes cacheability 71 * is a bad idea also, in case the page changes cacheability
52 * attributes or becomes a protected page in a hypervisor. 72 * attributes or becomes a protected page in a hypervisor.
53 */ 73 */
54 pte_clear(&init_mm, kvaddr, kmap_pte - idx); 74 pte_clear(&init_mm, kvaddr, kmap_pte + idx);
55 local_flush_tlb_kernel_range((unsigned long)kvaddr, 75 local_flush_tlb_kernel_range((unsigned long)kvaddr,
56 (unsigned long)kvaddr + PAGE_SIZE); 76 (unsigned long)kvaddr + PAGE_SIZE);
57 77
@@ -69,4 +89,5 @@ void __init kmap_init(void)
69 /* cache the first kmap pte */ 89 /* cache the first kmap pte */
70 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); 90 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
71 kmap_pte = kmap_get_fixmap_pte(kmap_vstart); 91 kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
92 kmap_waitqueues_init();
72} 93}
diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S
index 1f68558dbcc2..11a01c3e9cea 100644
--- a/arch/xtensa/mm/misc.S
+++ b/arch/xtensa/mm/misc.S
@@ -110,41 +110,24 @@ ENTRY(__tlbtemp_mapping_start)
110#if (DCACHE_WAY_SIZE > PAGE_SIZE) 110#if (DCACHE_WAY_SIZE > PAGE_SIZE)
111 111
112/* 112/*
113 * clear_user_page (void *addr, unsigned long vaddr, struct page *page) 113 * clear_page_alias(void *addr, unsigned long paddr)
114 * a2 a3 a4 114 * a2 a3
115 */ 115 */
116 116
117ENTRY(clear_user_page) 117ENTRY(clear_page_alias)
118 118
119 entry a1, 32 119 entry a1, 32
120 120
121 /* Mark page dirty and determine alias. */ 121 /* Skip setting up a temporary DTLB if not aliased low page. */
122 122
123 movi a7, (1 << PG_ARCH_1) 123 movi a5, PAGE_OFFSET
124 l32i a5, a4, PAGE_FLAGS 124 movi a6, 0
125 xor a6, a2, a3 125 beqz a3, 1f
126 extui a3, a3, PAGE_SHIFT, DCACHE_ALIAS_ORDER
127 extui a6, a6, PAGE_SHIFT, DCACHE_ALIAS_ORDER
128 or a5, a5, a7
129 slli a3, a3, PAGE_SHIFT
130 s32i a5, a4, PAGE_FLAGS
131 126
132 /* Skip setting up a temporary DTLB if not aliased. */ 127 /* Setup a temporary DTLB for the addr. */
133
134 beqz a6, 1f
135
136 /* Invalidate kernel page. */
137
138 mov a10, a2
139 call8 __invalidate_dcache_page
140
141 /* Setup a temporary DTLB with the color of the VPN */
142
143 movi a4, ((PAGE_KERNEL | _PAGE_HW_WRITE) - PAGE_OFFSET) & 0xffffffff
144 movi a5, TLBTEMP_BASE_1 # virt
145 add a6, a2, a4 # ppn
146 add a2, a5, a3 # add 'color'
147 128
129 addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE)
130 mov a4, a2
148 wdtlb a6, a2 131 wdtlb a6, a2
149 dsync 132 dsync
150 133
@@ -165,62 +148,43 @@ ENTRY(clear_user_page)
165 148
166 /* We need to invalidate the temporary idtlb entry, if any. */ 149 /* We need to invalidate the temporary idtlb entry, if any. */
167 150
1681: addi a2, a2, -PAGE_SIZE 1511: idtlb a4
169 idtlb a2
170 dsync 152 dsync
171 153
172 retw 154 retw
173 155
174ENDPROC(clear_user_page) 156ENDPROC(clear_page_alias)
175 157
176/* 158/*
177 * copy_page_user (void *to, void *from, unsigned long vaddr, struct page *page) 159 * copy_page_alias(void *to, void *from,
178 * a2 a3 a4 a5 160 * a2 a3
161 * unsigned long to_paddr, unsigned long from_paddr)
162 * a4 a5
179 */ 163 */
180 164
181ENTRY(copy_user_page) 165ENTRY(copy_page_alias)
182 166
183 entry a1, 32 167 entry a1, 32
184 168
185 /* Mark page dirty and determine alias for destination. */ 169 /* Skip setting up a temporary DTLB for destination if not aliased. */
186
187 movi a8, (1 << PG_ARCH_1)
188 l32i a9, a5, PAGE_FLAGS
189 xor a6, a2, a4
190 xor a7, a3, a4
191 extui a4, a4, PAGE_SHIFT, DCACHE_ALIAS_ORDER
192 extui a6, a6, PAGE_SHIFT, DCACHE_ALIAS_ORDER
193 extui a7, a7, PAGE_SHIFT, DCACHE_ALIAS_ORDER
194 or a9, a9, a8
195 slli a4, a4, PAGE_SHIFT
196 s32i a9, a5, PAGE_FLAGS
197 movi a5, ((PAGE_KERNEL | _PAGE_HW_WRITE) - PAGE_OFFSET) & 0xffffffff
198
199 beqz a6, 1f
200
201 /* Invalidate dcache */
202
203 mov a10, a2
204 call8 __invalidate_dcache_page
205 170
206 /* Setup a temporary DTLB with a matching color. */ 171 movi a6, 0
172 movi a7, 0
173 beqz a4, 1f
207 174
208 movi a8, TLBTEMP_BASE_1 # base 175 /* Setup a temporary DTLB for destination. */
209 add a6, a2, a5 # ppn
210 add a2, a8, a4 # add 'color'
211 176
177 addi a6, a4, (PAGE_KERNEL | _PAGE_HW_WRITE)
212 wdtlb a6, a2 178 wdtlb a6, a2
213 dsync 179 dsync
214 180
215 /* Skip setting up a temporary DTLB for destination if not aliased. */ 181 /* Skip setting up a temporary DTLB for source if not aliased. */
216 182
2171: beqz a7, 1f 1831: beqz a5, 1f
218 184
219 /* Setup a temporary DTLB with a matching color. */ 185 /* Setup a temporary DTLB for source. */
220 186
221 movi a8, TLBTEMP_BASE_2 # base 187 addi a7, a5, PAGE_KERNEL
222 add a7, a3, a5 # ppn
223 add a3, a8, a4
224 addi a8, a3, 1 # way1 188 addi a8, a3, 1 # way1
225 189
226 wdtlb a7, a8 190 wdtlb a7, a8
@@ -271,7 +235,7 @@ ENTRY(copy_user_page)
271 235
272 retw 236 retw
273 237
274ENDPROC(copy_user_page) 238ENDPROC(copy_page_alias)
275 239
276#endif 240#endif
277 241
@@ -300,6 +264,30 @@ ENTRY(__flush_invalidate_dcache_page_alias)
300 retw 264 retw
301 265
302ENDPROC(__flush_invalidate_dcache_page_alias) 266ENDPROC(__flush_invalidate_dcache_page_alias)
267
268/*
269 * void __invalidate_dcache_page_alias (addr, phys)
270 * a2 a3
271 */
272
273ENTRY(__invalidate_dcache_page_alias)
274
275 entry sp, 16
276
277 movi a7, 0 # required for exception handler
278 addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE)
279 mov a4, a2
280 wdtlb a6, a2
281 dsync
282
283 ___invalidate_dcache_page a2 a3
284
285 idtlb a4
286 dsync
287
288 retw
289
290ENDPROC(__invalidate_dcache_page_alias)
303#endif 291#endif
304 292
305ENTRY(__tlbtemp_mapping_itlb) 293ENTRY(__tlbtemp_mapping_itlb)
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 3429b483d9f8..abe4513eb0dd 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -18,32 +18,38 @@
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20#if defined(CONFIG_HIGHMEM) 20#if defined(CONFIG_HIGHMEM)
21static void * __init init_pmd(unsigned long vaddr) 21static void * __init init_pmd(unsigned long vaddr, unsigned long n_pages)
22{ 22{
23 pgd_t *pgd = pgd_offset_k(vaddr); 23 pgd_t *pgd = pgd_offset_k(vaddr);
24 pmd_t *pmd = pmd_offset(pgd, vaddr); 24 pmd_t *pmd = pmd_offset(pgd, vaddr);
25 pte_t *pte;
26 unsigned long i;
25 27
26 if (pmd_none(*pmd)) { 28 n_pages = ALIGN(n_pages, PTRS_PER_PTE);
27 unsigned i;
28 pte_t *pte = alloc_bootmem_low_pages(PAGE_SIZE);
29 29
30 for (i = 0; i < 1024; i++) 30 pr_debug("%s: vaddr: 0x%08lx, n_pages: %ld\n",
31 pte_clear(NULL, 0, pte + i); 31 __func__, vaddr, n_pages);
32 32
33 set_pmd(pmd, __pmd(((unsigned long)pte) & PAGE_MASK)); 33 pte = alloc_bootmem_low_pages(n_pages * sizeof(pte_t));
34 BUG_ON(pte != pte_offset_kernel(pmd, 0)); 34
35 pr_debug("%s: vaddr: 0x%08lx, pmd: 0x%p, pte: 0x%p\n", 35 for (i = 0; i < n_pages; ++i)
36 __func__, vaddr, pmd, pte); 36 pte_clear(NULL, 0, pte + i);
37 return pte; 37
38 } else { 38 for (i = 0; i < n_pages; i += PTRS_PER_PTE, ++pmd) {
39 return pte_offset_kernel(pmd, 0); 39 pte_t *cur_pte = pte + i;
40
41 BUG_ON(!pmd_none(*pmd));
42 set_pmd(pmd, __pmd(((unsigned long)cur_pte) & PAGE_MASK));
43 BUG_ON(cur_pte != pte_offset_kernel(pmd, 0));
44 pr_debug("%s: pmd: 0x%p, pte: 0x%p\n",
45 __func__, pmd, cur_pte);
40 } 46 }
47 return pte;
41} 48}
42 49
43static void __init fixedrange_init(void) 50static void __init fixedrange_init(void)
44{ 51{
45 BUILD_BUG_ON(FIXADDR_SIZE > PMD_SIZE); 52 init_pmd(__fix_to_virt(0), __end_of_fixed_addresses);
46 init_pmd(__fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK);
47} 53}
48#endif 54#endif
49 55
@@ -52,7 +58,7 @@ void __init paging_init(void)
52 memset(swapper_pg_dir, 0, PAGE_SIZE); 58 memset(swapper_pg_dir, 0, PAGE_SIZE);
53#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
54 fixedrange_init(); 60 fixedrange_init();
55 pkmap_page_table = init_pmd(PKMAP_BASE); 61 pkmap_page_table = init_pmd(PKMAP_BASE, LAST_PKMAP);
56 kmap_init(); 62 kmap_init();
57#endif 63#endif
58} 64}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 05:53:30 -0400