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authorOlof Johansson <olof@lixom.net>2013-03-04 20:33:21 -0500
committerOlof Johansson <olof@lixom.net>2013-03-04 20:35:01 -0500
commit260a8e507a8e066b52e299224296cd6fe370932e (patch)
treeb66d6f8d2f2a4f8343e0ce962550326de7750dfc /arch
parent984b839337da1eb7b4a4fb50e24cf28c2b473862 (diff)
parent0545c798e9bb7fe29606681653c20d68e47f4840 (diff)
Merge tag 'imx-fixes-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo: The imx fixes for 3.9: - move early resume code out of .data section to fix allyesconfig failure since c08e20d (arm: Add v7_invalidate_l1 to cache-v7.S) gets merged - Fix incorrect DISP1_DAT_21 number in imx53-mba53 disp1-grp1 * tag 'imx-fixes-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: imx53-mba53: fix fsl,pins for disp1-grp1 ARM: mach-imx: move early resume code out of the .data section Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts3
-rw-r--r--arch/arm/mach-imx/headsmp.S18
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c15
3 files changed, 10 insertions, 26 deletions
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index e54fffd48369..468c0a1d48d9 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -42,10 +42,9 @@
42 fsl,pins = <689 0x10000 /* DISP1_DRDY */ 42 fsl,pins = <689 0x10000 /* DISP1_DRDY */
43 482 0x10000 /* DISP1_HSYNC */ 43 482 0x10000 /* DISP1_HSYNC */
44 489 0x10000 /* DISP1_VSYNC */ 44 489 0x10000 /* DISP1_VSYNC */
45 684 0x10000 /* DISP1_DAT_0 */
46 515 0x10000 /* DISP1_DAT_22 */ 45 515 0x10000 /* DISP1_DAT_22 */
47 523 0x10000 /* DISP1_DAT_23 */ 46 523 0x10000 /* DISP1_DAT_23 */
48 543 0x10000 /* DISP1_DAT_21 */ 47 545 0x10000 /* DISP1_DAT_21 */
49 553 0x10000 /* DISP1_DAT_20 */ 48 553 0x10000 /* DISP1_DAT_20 */
50 558 0x10000 /* DISP1_DAT_19 */ 49 558 0x10000 /* DISP1_DAT_19 */
51 564 0x10000 /* DISP1_DAT_18 */ 50 564 0x10000 /* DISP1_DAT_18 */
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index 921fc1555854..a58c8b0527cc 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
26 26
27#ifdef CONFIG_PM 27#ifdef CONFIG_PM
28/* 28/*
29 * The following code is located into the .data section. This is to 29 * The following code must assume it is running from physical address
30 * allow phys_l2x0_saved_regs to be accessed with a relative load 30 * where absolute virtual addresses to the data section have to be
31 * as we are running on physical address here. 31 * turned into relative ones.
32 */ 32 */
33 .data
34 .align
35 33
36#ifdef CONFIG_CACHE_L2X0 34#ifdef CONFIG_CACHE_L2X0
37 .macro pl310_resume 35 .macro pl310_resume
38 ldr r2, phys_l2x0_saved_regs 36 adr r0, l2x0_saved_regs_offset
37 ldr r2, [r0]
38 add r2, r2, r0
39 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 39 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
40 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value 40 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
41 str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl 41 str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
43 str r1, [r0, #L2X0_CTRL] @ re-enable L2 43 str r1, [r0, #L2X0_CTRL] @ re-enable L2
44 .endm 44 .endm
45 45
46 .globl phys_l2x0_saved_regs 46l2x0_saved_regs_offset:
47phys_l2x0_saved_regs: 47 .word l2x0_saved_regs - .
48 .long 0 48
49#else 49#else
50 .macro pl310_resume 50 .macro pl310_resume
51 .endm 51 .endm
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index ee42d20cba19..5faba7a3c95f 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -22,8 +22,6 @@
22#include "common.h" 22#include "common.h"
23#include "hardware.h" 23#include "hardware.h"
24 24
25extern unsigned long phys_l2x0_saved_regs;
26
27static int imx6q_suspend_finish(unsigned long val) 25static int imx6q_suspend_finish(unsigned long val)
28{ 26{
29 cpu_do_idle(); 27 cpu_do_idle();
@@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
57 55
58void __init imx6q_pm_init(void) 56void __init imx6q_pm_init(void)
59{ 57{
60 /*
61 * The l2x0 core code provides an infrastucture to save and restore
62 * l2x0 registers across suspend/resume cycle. But because imx6q
63 * retains L2 content during suspend and needs to resume L2 before
64 * MMU is enabled, it can only utilize register saving support and
65 * have to take care of restoring on its own. So we save physical
66 * address of the data structure used by l2x0 core to save registers,
67 * and later restore the necessary ones in imx6q resume entry.
68 */
69#ifdef CONFIG_CACHE_L2X0
70 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
71#endif
72
73 suspend_set_ops(&imx6q_pm_ops); 58 suspend_set_ops(&imx6q_pm_ops);
74} 59}