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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-12-22 17:46:24 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-22 17:46:24 -0500
commit25cf0398bdf365d027e171116aa4a281e9cd3c1c (patch)
treea8be3d3d314625a376be0e62c67809dc22274dd4 /arch
parent9326845f45650f6af9953a4b6a31e89b54fab82f (diff)
parent59bdd133561a432c4655146e283caf85fa64c2fb (diff)
Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/boot/Makefile5
-rw-r--r--arch/arm/boot/bootp/init.S2
-rw-r--r--arch/arm/boot/compressed/head.S13
-rw-r--r--arch/arm/common/gic.c40
-rw-r--r--arch/arm/configs/at91rm9200_defconfig341
-rw-r--r--arch/arm/configs/at91rm9200dk_defconfig72
-rw-r--r--arch/arm/configs/at91rm9200ek_defconfig73
-rw-r--r--arch/arm/configs/ateb9200_defconfig131
-rw-r--r--arch/arm/configs/carmeva_defconfig47
-rw-r--r--arch/arm/configs/cpuat91_defconfig112
-rw-r--r--arch/arm/configs/csb337_defconfig104
-rw-r--r--arch/arm/configs/csb637_defconfig98
-rw-r--r--arch/arm/configs/ecbat91_defconfig99
-rw-r--r--arch/arm/configs/kafa_defconfig61
-rw-r--r--arch/arm/configs/kb9202_defconfig127
-rw-r--r--arch/arm/configs/onearm_defconfig80
-rw-r--r--arch/arm/configs/picotux200_defconfig242
-rw-r--r--arch/arm/configs/yl9200_defconfig137
-rw-r--r--arch/arm/kernel/Makefile1
-rw-r--r--arch/arm/kernel/entry-armv.S2
-rw-r--r--arch/arm/kernel/head.S7
-rw-r--r--arch/arm/kernel/iwmmxt.S55
-rw-r--r--arch/arm/kernel/pj4-cp0.c94
-rw-r--r--arch/arm/kernel/relocate_kernel.S2
-rw-r--r--arch/arm/mach-at91/Makefile4
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c45
-rw-r--r--arch/arm/mach-at91/board-1arm.c26
-rw-r--r--arch/arm/mach-at91/board-kafa.c21
-rw-r--r--arch/arm/mach-at91/board-picotux200.c53
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c (renamed from arch/arm/mach-at91/board-dk.c)4
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c (renamed from arch/arm/mach-at91/board-ek.c)4
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/include/mach/board.h6
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c2
-rw-r--r--arch/arm/mach-mmp/Kconfig22
-rw-r--r--arch/arm/mach-mmp/Makefile1
-rw-r--r--arch/arm/mach-mmp/brownstone.c204
-rw-r--r--arch/arm/mach-mmp/flint.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h338
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h22
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h2
-rw-r--r--arch/arm/mach-mmp/jasper.c35
-rw-r--r--arch/arm/mach-mmp/mmp2.c36
-rw-r--r--arch/arm/mach-mmp/pxa910.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/io.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c34
-rw-r--r--arch/arm/mach-omap2/pm24xx.c34
-rw-r--r--arch/arm/mach-omap2/pm34xx.c27
-rw-r--r--arch/arm/mach-omap2/prcm-common.h11
-rw-r--r--arch/arm/mach-pxa/Kconfig24
-rw-r--r--arch/arm/mach-pxa/Makefile10
-rw-r--r--arch/arm/mach-pxa/balloon3.c59
-rw-r--r--arch/arm/mach-pxa/capc7117.c2
-rw-r--r--arch/arm/mach-pxa/clock-pxa2xx.c64
-rw-r--r--arch/arm/mach-pxa/clock-pxa3xx.c218
-rw-r--r--arch/arm/mach-pxa/clock.c26
-rw-r--r--arch/arm/mach-pxa/clock.h47
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c26
-rw-r--r--arch/arm/mach-pxa/cm-x300.c2
-rw-r--r--arch/arm/mach-pxa/colibri-evalboard.c (renamed from arch/arm/mach-pxa/colibri-pxa270-evalboard.c)96
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c47
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c108
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c73
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c139
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c49
-rw-r--r--arch/arm/mach-pxa/corgi.c6
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c10
-rw-r--r--arch/arm/mach-pxa/csb726.c9
-rw-r--r--arch/arm/mach-pxa/devices.c247
-rw-r--r--arch/arm/mach-pxa/em-x270.c4
-rw-r--r--arch/arm/mach-pxa/eseries.c12
-rw-r--r--arch/arm/mach-pxa/ezx.c12
-rw-r--r--arch/arm/mach-pxa/generic.c48
-rw-r--r--arch/arm/mach-pxa/generic.h11
-rw-r--r--arch/arm/mach-pxa/gumstix.c2
-rw-r--r--arch/arm/mach-pxa/h5000.c11
-rw-r--r--arch/arm/mach-pxa/himalaya.c2
-rw-r--r--arch/arm/mach-pxa/hx4700.c2
-rw-r--r--arch/arm/mach-pxa/icontrol.c2
-rw-r--r--arch/arm/mach-pxa/idp.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h48
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h47
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h48
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-regs.h66
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-intc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/smemc.h74
-rw-r--r--arch/arm/mach-pxa/irq.c129
-rw-r--r--arch/arm/mach-pxa/littleton.c2
-rw-r--r--arch/arm/mach-pxa/lpd270.c5
-rw-r--r--arch/arm/mach-pxa/lubbock.c5
-rw-r--r--arch/arm/mach-pxa/magician.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c5
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/mp900.c2
-rw-r--r--arch/arm/mach-pxa/palmld.c2
-rw-r--r--arch/arm/mach-pxa/palmt5.c2
-rw-r--r--arch/arm/mach-pxa/palmtc.c190
-rw-r--r--arch/arm/mach-pxa/palmte2.c2
-rw-r--r--arch/arm/mach-pxa/palmtreo.c4
-rw-r--r--arch/arm/mach-pxa/palmtx.c5
-rw-r--r--arch/arm/mach-pxa/palmz72.c2
-rw-r--r--arch/arm/mach-pxa/pcm027.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c86
-rw-r--r--arch/arm/mach-pxa/pxa27x.c102
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c234
-rw-r--r--arch/arm/mach-pxa/pxa930.c2
-rw-r--r--arch/arm/mach-pxa/pxa95x.c308
-rw-r--r--arch/arm/mach-pxa/raumfeld.c11
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-pxa/saarb.c114
-rw-r--r--arch/arm/mach-pxa/sleep.S2
-rw-r--r--arch/arm/mach-pxa/smemc.c51
-rw-r--r--arch/arm/mach-pxa/spitz.c13
-rw-r--r--arch/arm/mach-pxa/stargate2.c7
-rw-r--r--arch/arm/mach-pxa/tavorevb.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c9
-rw-r--r--arch/arm/mach-pxa/trizeps4.c5
-rw-r--r--arch/arm/mach-pxa/viper.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-pxa/xcep.c7
-rw-r--r--arch/arm/mach-pxa/z2.c2
-rw-r--r--arch/arm/mach-pxa/zeus.c10
-rw-r--r--arch/arm/mach-pxa/zylonite.c2
-rw-r--r--arch/arm/mach-realview/headsmp.S1
-rw-r--r--arch/arm/mach-s3c2412/Kconfig2
-rw-r--r--arch/arm/mach-s3c2416/Kconfig3
-rw-r--r--arch/arm/mach-s3c2440/Kconfig4
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c11
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c14
-rw-r--r--arch/arm/mach-s3c2443/Kconfig1
-rw-r--r--arch/arm/mach-tegra/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-vexpress/headsmp.S1
-rw-r--r--arch/arm/mm/Kconfig8
-rw-r--r--arch/arm/mm/cache-v6.S28
-rw-r--r--arch/arm/mm/cache-v7.S27
-rw-r--r--arch/arm/mm/proc-macros.S22
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/plat-iop/time.c3
-rw-r--r--arch/arm/plat-omap/counter_32k.c3
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-pxa/Makefile1
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h4
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c8
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c244x.h7
-rw-r--r--arch/arm/plat-samsung/gpio-config.c47
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h11
-rw-r--r--arch/arm/tools/mach-types183
-rw-r--r--arch/arm/vfp/vfphw.S1
-rw-r--r--arch/mn10300/include/asm/syscall.h117
-rw-r--r--arch/mn10300/kernel/gdb-io-serial.c3
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm.c3
-rw-r--r--arch/mn10300/kernel/gdb-stub.c3
-rw-r--r--arch/parisc/kernel/irq.c7
-rw-r--r--arch/parisc/kernel/signal.c9
-rw-r--r--arch/s390/kernel/vtime.c19
-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c34
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c47
-rw-r--r--arch/sh/include/asm/cacheflush.h2
-rw-r--r--arch/sh/include/asm/unistd_32.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7724.h3
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c44
-rw-r--r--arch/sh/kernel/syscalls_32.S1
-rw-r--r--arch/sh/mm/cache-sh4.c4
-rw-r--r--arch/sh/mm/cache-sh7705.c2
-rw-r--r--arch/sh/mm/cache.c14
-rw-r--r--arch/sh/mm/kmap.c2
-rw-r--r--arch/sparc/include/asm/openprom.h2
-rw-r--r--arch/sparc/include/asm/oplib_32.h35
-rw-r--r--arch/sparc/include/asm/oplib_64.h46
-rw-r--r--arch/sparc/kernel/leon_kernel.c4
-rw-r--r--arch/sparc/prom/Makefile1
-rw-r--r--arch/sparc/prom/console_32.c65
-rw-r--r--arch/sparc/prom/console_64.c81
-rw-r--r--arch/sparc/prom/devops_32.c87
-rw-r--r--arch/sparc/prom/devops_64.c67
-rw-r--r--arch/sparc/prom/misc_64.c16
-rw-r--r--arch/sparc/prom/printf.c35
-rw-r--r--arch/sparc/prom/tree_32.c16
-rw-r--r--arch/sparc/prom/tree_64.c18
-rw-r--r--arch/x86/crypto/ghash-clmulni-intel_glue.c1
-rw-r--r--arch/x86/include/asm/pvclock.h1
-rw-r--r--arch/x86/kernel/pvclock.c5
-rw-r--r--arch/x86/pci/xen.c27
-rw-r--r--arch/x86/xen/enlighten.c4
-rw-r--r--arch/x86/xen/mmu.c2
-rw-r--r--arch/x86/xen/platform-pci-unplug.c2
-rw-r--r--arch/x86/xen/setup.c41
-rw-r--r--arch/x86/xen/suspend.c1
-rw-r--r--arch/x86/xen/time.c2
-rw-r--r--arch/x86/xen/xen-ops.h2
199 files changed, 3725 insertions, 3478 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 49778bb43782..d571cdb79d81 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,7 +9,7 @@ config ARM
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) 9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11 select HAVE_ARCH_KGDB 11 select HAVE_ARCH_KGDB
12 select HAVE_KPROBES if (!XIP_KERNEL) 12 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES) 13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
@@ -1000,8 +1000,8 @@ source arch/arm/mm/Kconfig
1000 1000
1001config IWMMXT 1001config IWMMXT
1002 bool "Enable iWMMXt support" 1002 bool "Enable iWMMXt support"
1003 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK 1003 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1004 default y if PXA27x || PXA3xx || ARCH_MMP 1004 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1005 help 1005 help
1006 Enable support for iWMMXt context switching at run time if 1006 Enable support for iWMMXt context switching at run time if
1007 running on a CPU that supports it. 1007 running on a CPU that supports it.
@@ -1314,7 +1314,7 @@ config HZ
1314 1314
1315config THUMB2_KERNEL 1315config THUMB2_KERNEL
1316 bool "Compile the kernel in Thumb-2 mode" 1316 bool "Compile the kernel in Thumb-2 mode"
1317 depends on CPU_V7 && EXPERIMENTAL 1317 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1318 select AEABI 1318 select AEABI
1319 select ARM_ASM_UNIFIED 1319 select ARM_ASM_UNIFIED
1320 help 1320 help
@@ -1762,7 +1762,7 @@ comment "At least one emulation must be selected"
1762 1762
1763config FPE_NWFPE 1763config FPE_NWFPE
1764 bool "NWFPE math emulation" 1764 bool "NWFPE math emulation"
1765 depends on !AEABI || OABI_COMPAT 1765 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1766 ---help--- 1766 ---help---
1767 Say Y to include the NWFPE floating point emulator in the kernel. 1767 Say Y to include the NWFPE floating point emulator in the kernel.
1768 This is necessary to run most binaries. Linux does not currently 1768 This is necessary to run most binaries. Linux does not currently
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 4a590f4113e2..4d26f2c52a75 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -70,12 +70,7 @@ else
70$(obj)/uImage: LOADADDR=$(ZRELADDR) 70$(obj)/uImage: LOADADDR=$(ZRELADDR)
71endif 71endif
72 72
73ifeq ($(CONFIG_THUMB2_KERNEL),y)
74# Set bit 0 to 1 so that "mov pc, rx" switches to Thumb-2 mode
75$(obj)/uImage: STARTADDR=$(shell echo $(LOADADDR) | sed -e "s/.$$/1/")
76else
77$(obj)/uImage: STARTADDR=$(LOADADDR) 73$(obj)/uImage: STARTADDR=$(LOADADDR)
78endif
79 74
80$(obj)/uImage: $(obj)/zImage FORCE 75$(obj)/uImage: $(obj)/zImage FORCE
81 $(call if_changed,uimage) 76 $(call if_changed,uimage)
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
index 8b0de41c3dcb..78b508075161 100644
--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -73,6 +73,8 @@ move: ldmia r4!, {r7 - r10} @ move 32-bytes at a time
73 73
74 .size _start, . - _start 74 .size _start, . - _start
75 75
76 .align
77
76 .type data,#object 78 .type data,#object
77data: .word initrd_start @ source initrd address 79data: .word initrd_start @ source initrd address
78 .word initrd_phys @ destination initrd address 80 .word initrd_phys @ destination initrd address
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 9be21ba648cd..7193884ed8b0 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -125,9 +125,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
125 * sort out different calling conventions 125 * sort out different calling conventions
126 */ 126 */
127 .align 127 .align
128 .arm @ Always enter in ARM state
128start: 129start:
129 .type start,#function 130 .type start,#function
130 .rept 8 131 THUMB( adr r12, BSYM(1f) )
132 THUMB( bx r12 )
133 THUMB( .rept 6 )
134 ARM( .rept 8 )
131 mov r0, r0 135 mov r0, r0
132 .endr 136 .endr
133 137
@@ -135,6 +139,7 @@ start:
135 .word 0x016f2818 @ Magic numbers to help the loader 139 .word 0x016f2818 @ Magic numbers to help the loader
136 .word start @ absolute load/run zImage address 140 .word start @ absolute load/run zImage address
137 .word _edata @ zImage end address 141 .word _edata @ zImage end address
142 THUMB( .thumb )
1381: mov r7, r1 @ save architecture ID 1431: mov r7, r1 @ save architecture ID
139 mov r8, r2 @ save atags pointer 144 mov r8, r2 @ save atags pointer
140 145
@@ -174,7 +179,8 @@ not_angel:
174 ldr sp, [r0, #28] 179 ldr sp, [r0, #28]
175#ifdef CONFIG_AUTO_ZRELADDR 180#ifdef CONFIG_AUTO_ZRELADDR
176 @ determine final kernel image address 181 @ determine final kernel image address
177 and r4, pc, #0xf8000000 182 mov r4, pc
183 and r4, r4, #0xf8000000
178 add r4, r4, #TEXT_OFFSET 184 add r4, r4, #TEXT_OFFSET
179#else 185#else
180 ldr r4, =zreladdr 186 ldr r4, =zreladdr
@@ -445,7 +451,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
445 */ 451 */
446 mov r1, #0x1e 452 mov r1, #0x1e
447 orr r1, r1, #3 << 10 453 orr r1, r1, #3 << 10
448 mov r2, pc, lsr #20 454 mov r2, pc
455 mov r2, r2, lsr #20
449 orr r1, r1, r2, lsl #20 456 orr r1, r1, r2, lsl #20
450 add r0, r3, r2, lsl #2 457 add r0, r3, r2, lsl #2
451 str r1, [r0], #4 458 str r1, [r0], #4
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 772f95f1aecd..e6388dcd8cfa 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
146 unsigned int shift = (irq % 4) * 8; 146 unsigned int shift = (irq % 4) * 8;
147 unsigned int cpu = cpumask_first(mask_val); 147 unsigned int cpu = cpumask_first(mask_val);
148 u32 val; 148 u32 val;
149 struct irq_desc *desc;
149 150
150 spin_lock(&irq_controller_lock); 151 spin_lock(&irq_controller_lock);
151 irq_desc[irq].node = cpu; 152 desc = irq_to_desc(irq);
153 if (desc == NULL) {
154 spin_unlock(&irq_controller_lock);
155 return -EINVAL;
156 }
157 desc->node = cpu;
152 val = readl(reg) & ~(0xff << shift); 158 val = readl(reg) & ~(0xff << shift);
153 val |= 1 << (cpu + shift); 159 val |= 1 << (cpu + shift);
154 writel(val, reg); 160 writel(val, reg);
@@ -210,7 +216,7 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
210void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, 216void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
211 unsigned int irq_start) 217 unsigned int irq_start)
212{ 218{
213 unsigned int max_irq, i; 219 unsigned int gic_irqs, irq_limit, i;
214 u32 cpumask = 1 << smp_processor_id(); 220 u32 cpumask = 1 << smp_processor_id();
215 221
216 if (gic_nr >= MAX_GIC_NR) 222 if (gic_nr >= MAX_GIC_NR)
@@ -226,47 +232,49 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
226 232
227 /* 233 /*
228 * Find out how many interrupts are supported. 234 * Find out how many interrupts are supported.
229 */
230 max_irq = readl(base + GIC_DIST_CTR) & 0x1f;
231 max_irq = (max_irq + 1) * 32;
232
233 /*
234 * The GIC only supports up to 1020 interrupt sources. 235 * The GIC only supports up to 1020 interrupt sources.
235 * Limit this to either the architected maximum, or the
236 * platform maximum.
237 */ 236 */
238 if (max_irq > max(1020, NR_IRQS)) 237 gic_irqs = readl(base + GIC_DIST_CTR) & 0x1f;
239 max_irq = max(1020, NR_IRQS); 238 gic_irqs = (gic_irqs + 1) * 32;
239 if (gic_irqs > 1020)
240 gic_irqs = 1020;
240 241
241 /* 242 /*
242 * Set all global interrupts to be level triggered, active low. 243 * Set all global interrupts to be level triggered, active low.
243 */ 244 */
244 for (i = 32; i < max_irq; i += 16) 245 for (i = 32; i < gic_irqs; i += 16)
245 writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); 246 writel(0, base + GIC_DIST_CONFIG + i * 4 / 16);
246 247
247 /* 248 /*
248 * Set all global interrupts to this CPU only. 249 * Set all global interrupts to this CPU only.
249 */ 250 */
250 for (i = 32; i < max_irq; i += 4) 251 for (i = 32; i < gic_irqs; i += 4)
251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); 252 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
252 253
253 /* 254 /*
254 * Set priority on all global interrupts. 255 * Set priority on all global interrupts.
255 */ 256 */
256 for (i = 32; i < max_irq; i += 4) 257 for (i = 32; i < gic_irqs; i += 4)
257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); 258 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);
258 259
259 /* 260 /*
260 * Disable all interrupts. Leave the PPI and SGIs alone 261 * Disable all interrupts. Leave the PPI and SGIs alone
261 * as these enables are banked registers. 262 * as these enables are banked registers.
262 */ 263 */
263 for (i = 32; i < max_irq; i += 32) 264 for (i = 32; i < gic_irqs; i += 32)
264 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); 265 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
265 266
266 /* 267 /*
268 * Limit number of interrupts registered to the platform maximum
269 */
270 irq_limit = gic_data[gic_nr].irq_offset + gic_irqs;
271 if (WARN_ON(irq_limit > NR_IRQS))
272 irq_limit = NR_IRQS;
273
274 /*
267 * Setup the Linux IRQ subsystem. 275 * Setup the Linux IRQ subsystem.
268 */ 276 */
269 for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) { 277 for (i = irq_start; i < irq_limit; i++) {
270 set_irq_chip(i, &gic_chip); 278 set_irq_chip(i, &gic_chip);
271 set_irq_chip_data(i, &gic_data[gic_nr]); 279 set_irq_chip_data(i, &gic_data[gic_nr]);
272 set_irq_handler(i, handle_level_irq); 280 set_irq_handler(i, handle_level_irq);
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
new file mode 100644
index 000000000000..38cb7c985426
--- /dev/null
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -0,0 +1,341 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y
7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_SYSFS_DEPRECATED_V2=y
9CONFIG_BLK_DEV_INITRD=y
10CONFIG_MODULES=y
11CONFIG_MODULE_FORCE_LOAD=y
12CONFIG_MODULE_UNLOAD=y
13CONFIG_MODVERSIONS=y
14CONFIG_MODULE_SRCVERSION_ALL=y
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_CFQ is not set
17CONFIG_ARCH_AT91=y
18CONFIG_MACH_ONEARM=y
19CONFIG_ARCH_AT91RM9200DK=y
20CONFIG_MACH_AT91RM9200EK=y
21CONFIG_MACH_CSB337=y
22CONFIG_MACH_CSB637=y
23CONFIG_MACH_CARMEVA=y
24CONFIG_MACH_ATEB9200=y
25CONFIG_MACH_KB9200=y
26CONFIG_MACH_PICOTUX2XX=y
27CONFIG_MACH_KAFA=y
28CONFIG_MACH_ECBAT91=y
29CONFIG_MACH_YL9200=y
30CONFIG_MACH_CPUAT91=y
31CONFIG_MACH_ECO920=y
32CONFIG_MTD_AT91_DATAFLASH_CARD=y
33CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
34CONFIG_AT91_TIMER_HZ=100
35# CONFIG_ARM_THUMB is not set
36CONFIG_PCCARD=y
37CONFIG_AT91_CF=y
38CONFIG_NO_HZ=y
39CONFIG_HIGH_RES_TIMERS=y
40CONFIG_PREEMPT=y
41CONFIG_AEABI=y
42CONFIG_LEDS=y
43CONFIG_LEDS_CPU=y
44CONFIG_ZBOOT_ROM_TEXT=0x10000000
45CONFIG_ZBOOT_ROM_BSS=0x20040000
46CONFIG_KEXEC=y
47CONFIG_FPE_NWFPE=y
48CONFIG_BINFMT_MISC=y
49CONFIG_NET=y
50CONFIG_PACKET=y
51CONFIG_UNIX=y
52CONFIG_XFRM_USER=m
53CONFIG_INET=y
54CONFIG_IP_MULTICAST=y
55CONFIG_IP_PNP=y
56CONFIG_IP_PNP_DHCP=y
57CONFIG_IP_PNP_BOOTP=y
58CONFIG_NET_IPIP=m
59CONFIG_NET_IPGRE=m
60CONFIG_INET_AH=m
61CONFIG_INET_ESP=m
62CONFIG_INET_IPCOMP=m
63CONFIG_INET_XFRM_MODE_TRANSPORT=m
64CONFIG_INET_XFRM_MODE_TUNNEL=m
65CONFIG_INET_XFRM_MODE_BEET=m
66CONFIG_IPV6_PRIVACY=y
67CONFIG_IPV6_ROUTER_PREF=y
68CONFIG_IPV6_ROUTE_INFO=y
69CONFIG_INET6_AH=m
70CONFIG_INET6_ESP=m
71CONFIG_INET6_IPCOMP=m
72CONFIG_IPV6_MIP6=m
73CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
74CONFIG_IPV6_TUNNEL=m
75CONFIG_BRIDGE=m
76CONFIG_VLAN_8021Q=m
77CONFIG_BT=m
78CONFIG_BT_L2CAP=m
79CONFIG_BT_SCO=m
80CONFIG_BT_RFCOMM=m
81CONFIG_BT_RFCOMM_TTY=y
82CONFIG_BT_BNEP=m
83CONFIG_BT_BNEP_MC_FILTER=y
84CONFIG_BT_BNEP_PROTO_FILTER=y
85CONFIG_BT_HIDP=m
86CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
87CONFIG_MTD=y
88CONFIG_MTD_CONCAT=y
89CONFIG_MTD_PARTITIONS=y
90CONFIG_MTD_CMDLINE_PARTS=y
91CONFIG_MTD_AFS_PARTS=y
92CONFIG_MTD_CHAR=y
93CONFIG_MTD_BLOCK=y
94CONFIG_MTD_CFI=y
95CONFIG_MTD_JEDECPROBE=y
96CONFIG_MTD_CFI_INTELEXT=y
97CONFIG_MTD_CFI_AMDSTD=y
98CONFIG_MTD_COMPLEX_MAPPINGS=y
99CONFIG_MTD_PHYSMAP=y
100CONFIG_MTD_PLATRAM=y
101CONFIG_MTD_DATAFLASH=y
102CONFIG_MTD_NAND=y
103CONFIG_MTD_NAND_ATMEL=y
104CONFIG_MTD_NAND_PLATFORM=y
105CONFIG_MTD_UBI=y
106CONFIG_MTD_UBI_GLUEBI=y
107CONFIG_BLK_DEV_LOOP=y
108CONFIG_BLK_DEV_NBD=y
109CONFIG_BLK_DEV_RAM=y
110CONFIG_BLK_DEV_RAM_SIZE=8192
111CONFIG_ATMEL_TCLIB=y
112CONFIG_EEPROM_LEGACY=m
113CONFIG_SCSI=y
114CONFIG_BLK_DEV_SD=y
115CONFIG_BLK_DEV_SR=m
116CONFIG_BLK_DEV_SR_VENDOR=y
117CONFIG_CHR_DEV_SG=m
118CONFIG_SCSI_MULTI_LUN=y
119# CONFIG_SCSI_LOWLEVEL is not set
120CONFIG_NETDEVICES=y
121CONFIG_TUN=m
122CONFIG_PHYLIB=y
123CONFIG_DAVICOM_PHY=y
124CONFIG_SMSC_PHY=y
125CONFIG_MICREL_PHY=y
126CONFIG_NET_ETHERNET=y
127CONFIG_ARM_AT91_ETHER=y
128# CONFIG_NETDEV_1000 is not set
129# CONFIG_NETDEV_10000 is not set
130CONFIG_USB_CATC=m
131CONFIG_USB_KAWETH=m
132CONFIG_USB_PEGASUS=m
133CONFIG_USB_RTL8150=m
134CONFIG_USB_USBNET=m
135CONFIG_USB_NET_DM9601=m
136CONFIG_USB_NET_GL620A=m
137CONFIG_USB_NET_PLUSB=m
138CONFIG_USB_NET_RNDIS_HOST=m
139CONFIG_USB_ALI_M5632=y
140CONFIG_USB_AN2720=y
141CONFIG_USB_EPSON2888=y
142CONFIG_PPP=y
143CONFIG_PPP_MULTILINK=y
144CONFIG_PPP_FILTER=y
145CONFIG_PPP_ASYNC=y
146CONFIG_PPP_DEFLATE=y
147CONFIG_PPP_BSDCOMP=y
148CONFIG_PPP_MPPE=m
149CONFIG_PPPOE=m
150CONFIG_SLIP=m
151CONFIG_SLIP_COMPRESSED=y
152CONFIG_SLIP_SMART=y
153CONFIG_SLIP_MODE_SLIP6=y
154# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
155CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
156CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
157CONFIG_INPUT_EVDEV=y
158CONFIG_KEYBOARD_GPIO=y
159# CONFIG_INPUT_MOUSE is not set
160CONFIG_INPUT_TOUCHSCREEN=y
161CONFIG_SERIAL_ATMEL=y
162CONFIG_SERIAL_ATMEL_CONSOLE=y
163CONFIG_LEGACY_PTY_COUNT=32
164CONFIG_HW_RANDOM=y
165CONFIG_I2C=y
166CONFIG_I2C_CHARDEV=y
167CONFIG_I2C_GPIO=y
168CONFIG_SPI=y
169CONFIG_SPI_ATMEL=y
170CONFIG_SPI_BITBANG=y
171CONFIG_GPIO_SYSFS=y
172CONFIG_HWMON=m
173CONFIG_SENSORS_ADM1021=m
174CONFIG_SENSORS_ADM1025=m
175CONFIG_SENSORS_ADM1026=m
176CONFIG_SENSORS_ADM1029=m
177CONFIG_SENSORS_ADM1031=m
178CONFIG_SENSORS_ADM9240=m
179CONFIG_SENSORS_DS1621=m
180CONFIG_SENSORS_GL518SM=m
181CONFIG_SENSORS_GL520SM=m
182CONFIG_SENSORS_IT87=m
183CONFIG_SENSORS_LM63=m
184CONFIG_SENSORS_LM73=m
185CONFIG_SENSORS_LM75=m
186CONFIG_SENSORS_LM77=m
187CONFIG_SENSORS_LM78=m
188CONFIG_SENSORS_LM80=m
189CONFIG_SENSORS_LM83=m
190CONFIG_SENSORS_LM85=m
191CONFIG_SENSORS_LM87=m
192CONFIG_SENSORS_LM90=m
193CONFIG_SENSORS_LM92=m
194CONFIG_SENSORS_MAX1619=m
195CONFIG_SENSORS_PCF8591=m
196CONFIG_SENSORS_SMSC47B397=m
197CONFIG_SENSORS_W83781D=m
198CONFIG_SENSORS_W83791D=m
199CONFIG_SENSORS_W83792D=m
200CONFIG_SENSORS_W83793=m
201CONFIG_SENSORS_W83L785TS=m
202CONFIG_WATCHDOG=y
203CONFIG_WATCHDOG_NOWAYOUT=y
204CONFIG_AT91RM9200_WATCHDOG=y
205CONFIG_FB=y
206CONFIG_FB_MODE_HELPERS=y
207CONFIG_FB_TILEBLITTING=y
208CONFIG_FB_S1D13XXX=y
209CONFIG_BACKLIGHT_LCD_SUPPORT=y
210CONFIG_LCD_CLASS_DEVICE=y
211CONFIG_BACKLIGHT_CLASS_DEVICE=y
212# CONFIG_BACKLIGHT_GENERIC is not set
213CONFIG_DISPLAY_SUPPORT=y
214CONFIG_FRAMEBUFFER_CONSOLE=y
215CONFIG_FONTS=y
216CONFIG_FONT_MINI_4x6=y
217CONFIG_LOGO=y
218# CONFIG_LOGO_LINUX_MONO is not set
219# CONFIG_LOGO_LINUX_VGA16 is not set
220CONFIG_USB=y
221CONFIG_USB_DEVICEFS=y
222# CONFIG_USB_DEVICE_CLASS is not set
223CONFIG_USB_MON=y
224CONFIG_USB_OHCI_HCD=y
225CONFIG_USB_ACM=m
226CONFIG_USB_PRINTER=m
227CONFIG_USB_STORAGE=y
228CONFIG_USB_SERIAL=y
229CONFIG_USB_SERIAL_CONSOLE=y
230CONFIG_USB_SERIAL_GENERIC=y
231CONFIG_USB_SERIAL_FTDI_SIO=y
232CONFIG_USB_SERIAL_KEYSPAN=y
233CONFIG_USB_SERIAL_KEYSPAN_MPR=y
234CONFIG_USB_SERIAL_KEYSPAN_USA28=y
235CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
236CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
237CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
238CONFIG_USB_SERIAL_KEYSPAN_USA19=y
239CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
240CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
241CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
242CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
243CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
244CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
245CONFIG_USB_SERIAL_MCT_U232=y
246CONFIG_USB_SERIAL_PL2303=y
247CONFIG_USB_GADGET=y
248CONFIG_USB_ETH=m
249CONFIG_USB_MASS_STORAGE=m
250CONFIG_MMC=y
251CONFIG_MMC_AT91=y
252CONFIG_NEW_LEDS=y
253CONFIG_LEDS_CLASS=y
254CONFIG_LEDS_GPIO=y
255CONFIG_LEDS_TRIGGERS=y
256CONFIG_LEDS_TRIGGER_TIMER=y
257CONFIG_LEDS_TRIGGER_HEARTBEAT=y
258CONFIG_LEDS_TRIGGER_GPIO=y
259CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
260CONFIG_RTC_CLASS=y
261# CONFIG_RTC_HCTOSYS is not set
262CONFIG_RTC_DRV_DS1307=y
263CONFIG_RTC_DRV_PCF8563=y
264CONFIG_RTC_DRV_AT91RM9200=y
265CONFIG_EXT2_FS=y
266CONFIG_EXT2_FS_XATTR=y
267CONFIG_EXT3_FS=y
268# CONFIG_EXT3_FS_XATTR is not set
269CONFIG_REISERFS_FS=y
270CONFIG_AUTOFS4_FS=y
271CONFIG_ISO9660_FS=y
272CONFIG_JOLIET=y
273CONFIG_ZISOFS=y
274CONFIG_UDF_FS=y
275CONFIG_MSDOS_FS=y
276CONFIG_VFAT_FS=y
277CONFIG_NTFS_FS=m
278CONFIG_TMPFS=y
279CONFIG_CONFIGFS_FS=y
280CONFIG_JFFS2_FS=y
281CONFIG_JFFS2_SUMMARY=y
282CONFIG_JFFS2_COMPRESSION_OPTIONS=y
283CONFIG_JFFS2_LZO=y
284CONFIG_JFFS2_RUBIN=y
285CONFIG_CRAMFS=y
286CONFIG_MINIX_FS=y
287CONFIG_NFS_FS=y
288CONFIG_NFS_V3=y
289CONFIG_NFS_V3_ACL=y
290CONFIG_NFS_V4=y
291CONFIG_ROOT_NFS=y
292CONFIG_NFSD=y
293CONFIG_SMB_FS=m
294CONFIG_CIFS=m
295CONFIG_PARTITION_ADVANCED=y
296CONFIG_MAC_PARTITION=y
297CONFIG_NLS_CODEPAGE_437=y
298CONFIG_NLS_CODEPAGE_737=m
299CONFIG_NLS_CODEPAGE_775=m
300CONFIG_NLS_CODEPAGE_850=m
301CONFIG_NLS_CODEPAGE_852=m
302CONFIG_NLS_CODEPAGE_855=m
303CONFIG_NLS_CODEPAGE_857=m
304CONFIG_NLS_CODEPAGE_860=m
305CONFIG_NLS_CODEPAGE_861=m
306CONFIG_NLS_CODEPAGE_862=m
307CONFIG_NLS_CODEPAGE_863=m
308CONFIG_NLS_CODEPAGE_864=m
309CONFIG_NLS_CODEPAGE_865=m
310CONFIG_NLS_CODEPAGE_866=m
311CONFIG_NLS_CODEPAGE_869=m
312CONFIG_NLS_CODEPAGE_936=m
313CONFIG_NLS_CODEPAGE_950=m
314CONFIG_NLS_CODEPAGE_932=m
315CONFIG_NLS_CODEPAGE_949=m
316CONFIG_NLS_CODEPAGE_874=m
317CONFIG_NLS_ISO8859_8=m
318CONFIG_NLS_CODEPAGE_1250=m
319CONFIG_NLS_CODEPAGE_1251=m
320CONFIG_NLS_ASCII=m
321CONFIG_NLS_ISO8859_1=y
322CONFIG_NLS_ISO8859_2=m
323CONFIG_NLS_ISO8859_3=m
324CONFIG_NLS_ISO8859_4=m
325CONFIG_NLS_ISO8859_5=m
326CONFIG_NLS_ISO8859_6=m
327CONFIG_NLS_ISO8859_7=m
328CONFIG_NLS_ISO8859_9=m
329CONFIG_NLS_ISO8859_13=m
330CONFIG_NLS_ISO8859_14=m
331CONFIG_NLS_ISO8859_15=m
332CONFIG_NLS_KOI8_R=m
333CONFIG_NLS_KOI8_U=m
334CONFIG_NLS_UTF8=y
335CONFIG_MAGIC_SYSRQ=y
336CONFIG_DEBUG_FS=y
337CONFIG_DEBUG_KERNEL=y
338# CONFIG_RCU_CPU_STALL_DETECTOR is not set
339# CONFIG_FTRACE is not set
340CONFIG_CRYPTO_PCBC=y
341CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig
deleted file mode 100644
index 4438e64f3bfb..000000000000
--- a/arch/arm/configs/at91rm9200dk_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y
6CONFIG_MODULES=y
7CONFIG_MODULE_UNLOAD=y
8# CONFIG_IOSCHED_DEADLINE is not set
9# CONFIG_IOSCHED_CFQ is not set
10CONFIG_ARCH_AT91=y
11CONFIG_ARCH_AT91RM9200DK=y
12CONFIG_MACH_ECO920=y
13CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
14# CONFIG_ARM_THUMB is not set
15CONFIG_PCCARD=y
16CONFIG_AT91_CF=y
17CONFIG_LEDS=y
18CONFIG_ZBOOT_ROM_TEXT=0x0
19CONFIG_ZBOOT_ROM_BSS=0x0
20CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
21CONFIG_FPE_NWFPE=y
22CONFIG_NET=y
23CONFIG_PACKET=y
24CONFIG_UNIX=y
25CONFIG_INET=y
26CONFIG_IP_PNP=y
27CONFIG_IP_PNP_BOOTP=y
28# CONFIG_IPV6 is not set
29CONFIG_MTD=y
30CONFIG_MTD_PARTITIONS=y
31CONFIG_MTD_CMDLINE_PARTS=y
32CONFIG_MTD_CHAR=y
33CONFIG_MTD_BLOCK=y
34CONFIG_MTD_CFI=y
35CONFIG_MTD_JEDECPROBE=y
36CONFIG_MTD_CFI_AMDSTD=y
37CONFIG_MTD_PHYSMAP=y
38CONFIG_BLK_DEV_RAM=y
39CONFIG_BLK_DEV_RAM_SIZE=8192
40CONFIG_NETDEVICES=y
41CONFIG_NET_ETHERNET=y
42CONFIG_ARM_AT91_ETHER=y
43# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
44# CONFIG_INPUT_KEYBOARD is not set
45# CONFIG_INPUT_MOUSE is not set
46# CONFIG_SERIO is not set
47CONFIG_SERIAL_ATMEL=y
48CONFIG_SERIAL_ATMEL_CONSOLE=y
49CONFIG_I2C=y
50CONFIG_I2C_CHARDEV=y
51CONFIG_I2C_GPIO=y
52CONFIG_WATCHDOG=y
53CONFIG_WATCHDOG_NOWAYOUT=y
54CONFIG_AT91RM9200_WATCHDOG=y
55# CONFIG_VGA_CONSOLE is not set
56# CONFIG_USB_HID is not set
57CONFIG_USB=y
58CONFIG_USB_DEBUG=y
59CONFIG_USB_DEVICEFS=y
60CONFIG_USB_MON=y
61CONFIG_USB_OHCI_HCD=y
62CONFIG_USB_GADGET=y
63CONFIG_MMC=y
64CONFIG_RTC_CLASS=y
65CONFIG_RTC_DRV_AT91RM9200=y
66CONFIG_EXT2_FS=y
67CONFIG_INOTIFY=y
68CONFIG_TMPFS=y
69CONFIG_CRAMFS=y
70CONFIG_DEBUG_KERNEL=y
71CONFIG_DEBUG_USER=y
72CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
deleted file mode 100644
index ccd517c64bc7..000000000000
--- a/arch/arm/configs/at91rm9200ek_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9# CONFIG_IOSCHED_DEADLINE is not set
10# CONFIG_IOSCHED_CFQ is not set
11CONFIG_ARCH_AT91=y
12CONFIG_MACH_AT91RM9200EK=y
13CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
14# CONFIG_ARM_THUMB is not set
15CONFIG_LEDS=y
16CONFIG_LEDS_CPU=y
17CONFIG_ZBOOT_ROM_TEXT=0x0
18CONFIG_ZBOOT_ROM_BSS=0x0
19CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
20CONFIG_FPE_NWFPE=y
21CONFIG_NET=y
22CONFIG_PACKET=y
23CONFIG_UNIX=y
24CONFIG_INET=y
25CONFIG_IP_PNP=y
26CONFIG_IP_PNP_BOOTP=y
27# CONFIG_IPV6 is not set
28CONFIG_MTD=y
29CONFIG_MTD_PARTITIONS=y
30CONFIG_MTD_CMDLINE_PARTS=y
31CONFIG_MTD_CHAR=y
32CONFIG_MTD_BLOCK=y
33CONFIG_MTD_CFI=y
34CONFIG_MTD_JEDECPROBE=y
35CONFIG_MTD_CFI_AMDSTD=y
36CONFIG_MTD_PHYSMAP=y
37CONFIG_BLK_DEV_RAM=y
38CONFIG_BLK_DEV_RAM_SIZE=8192
39CONFIG_NETDEVICES=y
40CONFIG_NET_ETHERNET=y
41CONFIG_ARM_AT91_ETHER=y
42# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
43# CONFIG_INPUT_KEYBOARD is not set
44# CONFIG_INPUT_MOUSE is not set
45# CONFIG_SERIO is not set
46CONFIG_SERIAL_ATMEL=y
47CONFIG_SERIAL_ATMEL_CONSOLE=y
48CONFIG_I2C=y
49CONFIG_I2C_CHARDEV=y
50CONFIG_I2C_GPIO=y
51CONFIG_WATCHDOG=y
52CONFIG_WATCHDOG_NOWAYOUT=y
53CONFIG_AT91RM9200_WATCHDOG=y
54CONFIG_FB=y
55CONFIG_FB_S1D13XXX=y
56# CONFIG_VGA_CONSOLE is not set
57# CONFIG_USB_HID is not set
58CONFIG_USB=y
59CONFIG_USB_DEBUG=y
60CONFIG_USB_DEVICEFS=y
61CONFIG_USB_MON=y
62CONFIG_USB_OHCI_HCD=y
63CONFIG_USB_GADGET=y
64CONFIG_MMC=y
65CONFIG_RTC_CLASS=y
66CONFIG_RTC_DRV_AT91RM9200=y
67CONFIG_EXT2_FS=y
68CONFIG_INOTIFY=y
69CONFIG_TMPFS=y
70CONFIG_CRAMFS=y
71CONFIG_DEBUG_KERNEL=y
72CONFIG_DEBUG_USER=y
73CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig
deleted file mode 100644
index 1b0e9a1689bb..000000000000
--- a/arch/arm/configs/ateb9200_defconfig
+++ /dev/null
@@ -1,131 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_EMBEDDED=y
5CONFIG_SLAB=y
6CONFIG_PROFILING=y
7CONFIG_OPROFILE=m
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10CONFIG_ARCH_AT91=y
11CONFIG_MACH_ATEB9200=y
12CONFIG_PCCARD=m
13CONFIG_AT91_CF=m
14CONFIG_PREEMPT=y
15CONFIG_ZBOOT_ROM_TEXT=0x0
16CONFIG_ZBOOT_ROM_BSS=0x0
17CONFIG_FPE_NWFPE=y
18CONFIG_PM=y
19CONFIG_NET=y
20CONFIG_PACKET=y
21CONFIG_UNIX=y
22CONFIG_NET_KEY=y
23CONFIG_INET=y
24# CONFIG_IPV6 is not set
25CONFIG_BRIDGE=m
26CONFIG_VLAN_8021Q=m
27CONFIG_MTD=y
28CONFIG_MTD_PARTITIONS=y
29CONFIG_MTD_CMDLINE_PARTS=y
30CONFIG_MTD_CHAR=y
31CONFIG_MTD_BLOCK_RO=y
32CONFIG_BLK_DEV_LOOP=m
33CONFIG_BLK_DEV_NBD=m
34CONFIG_SCSI=m
35CONFIG_BLK_DEV_SD=m
36CONFIG_BLK_DEV_SR=m
37CONFIG_BLK_DEV_SR_VENDOR=y
38CONFIG_CHR_DEV_SG=m
39CONFIG_SCSI_MULTI_LUN=y
40CONFIG_NETDEVICES=y
41CONFIG_DUMMY=m
42CONFIG_TUN=m
43CONFIG_PHYLIB=y
44CONFIG_DAVICOM_PHY=y
45CONFIG_NET_ETHERNET=y
46CONFIG_ARM_AT91_ETHER=y
47CONFIG_USB_USBNET=y
48CONFIG_USB_NET_GL620A=y
49CONFIG_USB_NET_PLUSB=y
50CONFIG_USB_NET_RNDIS_HOST=y
51CONFIG_USB_ALI_M5632=y
52CONFIG_USB_AN2720=y
53CONFIG_USB_EPSON2888=y
54CONFIG_PPP=m
55CONFIG_PPP_ASYNC=m
56CONFIG_PPP_SYNC_TTY=m
57CONFIG_PPP_DEFLATE=m
58CONFIG_PPP_BSDCOMP=m
59CONFIG_PPPOE=m
60CONFIG_SERIAL_ATMEL=y
61CONFIG_SERIAL_ATMEL_CONSOLE=y
62CONFIG_I2C=m
63CONFIG_I2C_CHARDEV=m
64CONFIG_I2C_GPIO=m
65# CONFIG_VGA_CONSOLE is not set
66CONFIG_SOUND=y
67CONFIG_USB_HID=m
68CONFIG_HID_PID=y
69CONFIG_USB_HIDDEV=y
70CONFIG_USB=y
71CONFIG_USB_DEVICEFS=y
72CONFIG_USB_MON=y
73CONFIG_USB_OHCI_HCD=y
74CONFIG_USB_ACM=m
75CONFIG_USB_PRINTER=m
76CONFIG_USB_STORAGE=m
77CONFIG_USB_STORAGE_DATAFAB=m
78CONFIG_USB_STORAGE_FREECOM=m
79CONFIG_USB_STORAGE_USBAT=m
80CONFIG_USB_STORAGE_SDDR09=m
81CONFIG_USB_STORAGE_SDDR55=m
82CONFIG_USB_STORAGE_JUMPSHOT=m
83CONFIG_USB_SERIAL=m
84CONFIG_USB_SERIAL_GENERIC=y
85CONFIG_USB_SERIAL_FTDI_SIO=m
86CONFIG_USB_SERIAL_PL2303=m
87CONFIG_USB_GADGET=m
88CONFIG_USB_ETH=m
89CONFIG_USB_GADGETFS=m
90CONFIG_USB_FILE_STORAGE=m
91CONFIG_USB_G_SERIAL=m
92CONFIG_MMC=m
93CONFIG_MMC_DEBUG=y
94CONFIG_RTC_CLASS=y
95# CONFIG_RTC_HCTOSYS is not set
96CONFIG_RTC_DRV_AT91RM9200=y
97CONFIG_EXT2_FS=m
98CONFIG_EXT3_FS=m
99CONFIG_REISERFS_FS=m
100CONFIG_INOTIFY=y
101CONFIG_ISO9660_FS=m
102CONFIG_JOLIET=y
103CONFIG_ZISOFS=y
104CONFIG_UDF_FS=m
105CONFIG_MSDOS_FS=m
106CONFIG_VFAT_FS=m
107CONFIG_NTFS_FS=m
108CONFIG_NTFS_RW=y
109CONFIG_TMPFS=y
110CONFIG_CRAMFS=y
111CONFIG_NFS_FS=m
112CONFIG_NFS_V3=y
113CONFIG_NFS_V3_ACL=y
114CONFIG_NFS_V4=y
115CONFIG_NFSD=m
116CONFIG_NFSD_V4=y
117CONFIG_PARTITION_ADVANCED=y
118CONFIG_MAC_PARTITION=y
119CONFIG_BSD_DISKLABEL=y
120CONFIG_MINIX_SUBPARTITION=y
121CONFIG_SOLARIS_X86_PARTITION=y
122CONFIG_UNIXWARE_DISKLABEL=y
123CONFIG_NLS_CODEPAGE_932=m
124CONFIG_NLS_ASCII=m
125CONFIG_NLS_ISO8859_15=m
126CONFIG_NLS_UTF8=m
127CONFIG_CRYPTO_MD5=y
128CONFIG_CRYPTO_MICHAEL_MIC=m
129CONFIG_CRYPTO_ARC4=m
130CONFIG_CRC16=m
131CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig
deleted file mode 100644
index ac64dbd8a49c..000000000000
--- a/arch/arm/configs/carmeva_defconfig
+++ /dev/null
@@ -1,47 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3CONFIG_BLK_DEV_INITRD=y
4CONFIG_EMBEDDED=y
5# CONFIG_HOTPLUG is not set
6CONFIG_MODULES=y
7CONFIG_MODULE_UNLOAD=y
8CONFIG_MODULE_FORCE_UNLOAD=y
9CONFIG_ARCH_AT91=y
10CONFIG_MACH_CARMEVA=y
11CONFIG_ZBOOT_ROM_TEXT=0x0
12CONFIG_ZBOOT_ROM_BSS=0x0
13CONFIG_FPE_NWFPE=y
14CONFIG_NET=y
15CONFIG_UNIX=y
16CONFIG_INET=y
17CONFIG_IP_MULTICAST=y
18CONFIG_IP_PNP=y
19# CONFIG_IPV6 is not set
20CONFIG_MTD=y
21CONFIG_MTD_PARTITIONS=y
22CONFIG_MTD_CMDLINE_PARTS=y
23CONFIG_MTD_CHAR=y
24CONFIG_MTD_BLOCK=y
25CONFIG_BLK_DEV_RAM=y
26CONFIG_NETDEVICES=y
27CONFIG_NET_ETHERNET=y
28CONFIG_ARM_AT91_ETHER=y
29# CONFIG_INPUT_MOUSEDEV is not set
30# CONFIG_INPUT_KEYBOARD is not set
31# CONFIG_INPUT_MOUSE is not set
32CONFIG_SERIO=m
33CONFIG_SERIAL_ATMEL=y
34CONFIG_SERIAL_ATMEL_CONSOLE=y
35# CONFIG_VGA_CONSOLE is not set
36CONFIG_MMC=m
37CONFIG_MMC_DEBUG=y
38CONFIG_EXT2_FS=y
39CONFIG_EXT2_FS_XATTR=y
40# CONFIG_DNOTIFY is not set
41CONFIG_JFFS2_FS=y
42CONFIG_JFFS2_COMPRESSION_OPTIONS=y
43CONFIG_NFS_FS=y
44CONFIG_NFS_V3=y
45CONFIG_NFS_V4=y
46CONFIG_ROOT_NFS=y
47CONFIG_NFSD=y
diff --git a/arch/arm/configs/cpuat91_defconfig b/arch/arm/configs/cpuat91_defconfig
deleted file mode 100644
index 022aeb55b676..000000000000
--- a/arch/arm/configs/cpuat91_defconfig
+++ /dev/null
@@ -1,112 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SYSFS_DEPRECATED_V2=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9# CONFIG_BLK_DEV_BSG is not set
10# CONFIG_IOSCHED_CFQ is not set
11CONFIG_ARCH_AT91=y
12CONFIG_MACH_CPUAT91=y
13CONFIG_AT91_TIMER_HZ=100
14# CONFIG_ARM_THUMB is not set
15CONFIG_PREEMPT=y
16CONFIG_ZBOOT_ROM_TEXT=0x0
17CONFIG_ZBOOT_ROM_BSS=0x0
18CONFIG_NET=y
19CONFIG_PACKET=y
20CONFIG_UNIX=y
21CONFIG_INET=y
22CONFIG_IP_PNP=y
23# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
24# CONFIG_INET_XFRM_MODE_TUNNEL is not set
25# CONFIG_INET_XFRM_MODE_BEET is not set
26# CONFIG_IPV6 is not set
27CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
28CONFIG_MTD=y
29CONFIG_MTD_PARTITIONS=y
30CONFIG_MTD_CMDLINE_PARTS=y
31CONFIG_MTD_CHAR=y
32CONFIG_MTD_BLOCK=y
33CONFIG_MTD_CFI=y
34CONFIG_MTD_CFI_INTELEXT=y
35CONFIG_MTD_PHYSMAP=y
36CONFIG_MTD_PLATRAM=y
37CONFIG_BLK_DEV_LOOP=y
38CONFIG_BLK_DEV_NBD=y
39CONFIG_BLK_DEV_RAM=y
40# CONFIG_MISC_DEVICES is not set
41CONFIG_SCSI=y
42CONFIG_BLK_DEV_SD=y
43CONFIG_SCSI_MULTI_LUN=y
44# CONFIG_SCSI_LOWLEVEL is not set
45CONFIG_NETDEVICES=y
46CONFIG_PHYLIB=y
47CONFIG_NET_ETHERNET=y
48CONFIG_ARM_AT91_ETHER=y
49# CONFIG_NETDEV_1000 is not set
50# CONFIG_NETDEV_10000 is not set
51CONFIG_PPP=y
52CONFIG_PPP_ASYNC=y
53CONFIG_PPP_DEFLATE=y
54CONFIG_PPP_BSDCOMP=y
55# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
56# CONFIG_INPUT_KEYBOARD is not set
57# CONFIG_INPUT_MOUSE is not set
58# CONFIG_SERIO is not set
59CONFIG_SERIAL_ATMEL=y
60CONFIG_SERIAL_ATMEL_CONSOLE=y
61CONFIG_LEGACY_PTY_COUNT=32
62# CONFIG_HW_RANDOM is not set
63CONFIG_I2C=y
64CONFIG_I2C_CHARDEV=y
65CONFIG_I2C_GPIO=y
66CONFIG_GPIO_SYSFS=y
67# CONFIG_HWMON is not set
68CONFIG_WATCHDOG=y
69CONFIG_WATCHDOG_NOWAYOUT=y
70CONFIG_AT91RM9200_WATCHDOG=y
71# CONFIG_VGA_CONSOLE is not set
72# CONFIG_HID_SUPPORT is not set
73CONFIG_USB=y
74# CONFIG_USB_DEVICE_CLASS is not set
75CONFIG_USB_OHCI_HCD=y
76CONFIG_USB_STORAGE=y
77CONFIG_USB_GADGET=y
78CONFIG_USB_ETH=m
79CONFIG_MMC=y
80CONFIG_MMC_AT91=m
81CONFIG_NEW_LEDS=y
82CONFIG_LEDS_CLASS=y
83CONFIG_LEDS_GPIO=y
84CONFIG_LEDS_TRIGGERS=y
85CONFIG_LEDS_TRIGGER_TIMER=y
86CONFIG_LEDS_TRIGGER_HEARTBEAT=y
87CONFIG_LEDS_TRIGGER_GPIO=y
88CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
89CONFIG_RTC_CLASS=y
90# CONFIG_RTC_HCTOSYS is not set
91CONFIG_RTC_DRV_DS1307=y
92CONFIG_RTC_DRV_PCF8563=y
93CONFIG_EXT2_FS=y
94CONFIG_EXT3_FS=y
95# CONFIG_EXT3_FS_XATTR is not set
96CONFIG_INOTIFY=y
97CONFIG_AUTOFS4_FS=y
98CONFIG_MSDOS_FS=y
99CONFIG_VFAT_FS=y
100CONFIG_TMPFS=y
101CONFIG_JFFS2_FS=y
102CONFIG_JFFS2_SUMMARY=y
103CONFIG_CRAMFS=y
104CONFIG_MINIX_FS=y
105CONFIG_NFS_FS=y
106CONFIG_NFS_V3=y
107CONFIG_ROOT_NFS=y
108CONFIG_PARTITION_ADVANCED=y
109CONFIG_NLS_CODEPAGE_437=y
110CONFIG_NLS_ISO8859_1=y
111CONFIG_NLS_UTF8=y
112# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig
deleted file mode 100644
index a24c448840c4..000000000000
--- a/arch/arm/configs/csb337_defconfig
+++ /dev/null
@@ -1,104 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y
6CONFIG_MODULES=y
7CONFIG_MODULE_UNLOAD=y
8# CONFIG_BLK_DEV_BSG is not set
9CONFIG_ARCH_AT91=y
10CONFIG_MACH_CSB337=y
11CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
12# CONFIG_ARM_THUMB is not set
13CONFIG_PCCARD=y
14CONFIG_AT91_CF=y
15CONFIG_LEDS=y
16CONFIG_LEDS_CPU=y
17CONFIG_ZBOOT_ROM_TEXT=0x0
18CONFIG_ZBOOT_ROM_BSS=0x0
19CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw"
20CONFIG_FPE_NWFPE=y
21CONFIG_NET=y
22CONFIG_PACKET=y
23CONFIG_UNIX=y
24CONFIG_INET=y
25CONFIG_IP_PNP=y
26CONFIG_IP_PNP_DHCP=y
27CONFIG_IP_PNP_BOOTP=y
28# CONFIG_INET_LRO is not set
29# CONFIG_IPV6 is not set
30CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
31CONFIG_MTD=y
32CONFIG_MTD_PARTITIONS=y
33CONFIG_MTD_CMDLINE_PARTS=y
34CONFIG_MTD_CHAR=y
35CONFIG_MTD_BLOCK=y
36CONFIG_MTD_CFI=y
37CONFIG_MTD_CFI_INTELEXT=y
38CONFIG_MTD_PHYSMAP=y
39CONFIG_BLK_DEV_LOOP=y
40CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=8192
42CONFIG_ATMEL_SSC=y
43CONFIG_SCSI=y
44CONFIG_NETDEVICES=y
45CONFIG_NET_ETHERNET=y
46CONFIG_ARM_AT91_ETHER=y
47# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
48# CONFIG_INPUT_KEYBOARD is not set
49# CONFIG_INPUT_MOUSE is not set
50# CONFIG_SERIO is not set
51CONFIG_SERIAL_ATMEL=y
52CONFIG_SERIAL_ATMEL_CONSOLE=y
53# CONFIG_HW_RANDOM is not set
54CONFIG_I2C=y
55CONFIG_I2C_CHARDEV=y
56CONFIG_I2C_GPIO=y
57# CONFIG_HWMON is not set
58CONFIG_WATCHDOG=y
59CONFIG_WATCHDOG_NOWAYOUT=y
60CONFIG_AT91RM9200_WATCHDOG=y
61# CONFIG_VGA_CONSOLE is not set
62# CONFIG_USB_HID is not set
63CONFIG_USB=y
64CONFIG_USB_DEBUG=y
65CONFIG_USB_DEVICEFS=y
66CONFIG_USB_MON=y
67CONFIG_USB_OHCI_HCD=y
68CONFIG_USB_STORAGE=y
69CONFIG_USB_SERIAL=y
70CONFIG_USB_SERIAL_CONSOLE=y
71CONFIG_USB_SERIAL_GENERIC=y
72CONFIG_USB_SERIAL_FTDI_SIO=y
73CONFIG_USB_SERIAL_KEYSPAN=y
74CONFIG_USB_SERIAL_KEYSPAN_MPR=y
75CONFIG_USB_SERIAL_KEYSPAN_USA28=y
76CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
77CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
78CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
79CONFIG_USB_SERIAL_KEYSPAN_USA19=y
80CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
81CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
82CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
83CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
84CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
85CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
86CONFIG_USB_SERIAL_MCT_U232=y
87CONFIG_USB_GADGET=y
88CONFIG_MMC=y
89CONFIG_RTC_CLASS=y
90CONFIG_RTC_HCTOSYS_DEVICE="rtc1"
91# CONFIG_RTC_INTF_SYSFS is not set
92CONFIG_RTC_DRV_DS1307=y
93CONFIG_RTC_DRV_AT91RM9200=y
94CONFIG_EXT2_FS=y
95CONFIG_INOTIFY=y
96CONFIG_TMPFS=y
97CONFIG_CRAMFS=y
98CONFIG_NFS_FS=y
99CONFIG_NFS_V3=y
100CONFIG_NFS_V4=y
101CONFIG_ROOT_NFS=y
102CONFIG_DEBUG_KERNEL=y
103CONFIG_DEBUG_USER=y
104CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig
deleted file mode 100644
index 98552adac5fb..000000000000
--- a/arch/arm/configs/csb637_defconfig
+++ /dev/null
@@ -1,98 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_SYSFS_DEPRECATED_V2=y
6CONFIG_BLK_DEV_INITRD=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_ARCH_AT91=y
11CONFIG_MACH_CSB637=y
12CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
13# CONFIG_ARM_THUMB is not set
14CONFIG_PCCARD=y
15CONFIG_AT91_CF=y
16CONFIG_LEDS=y
17CONFIG_LEDS_CPU=y
18CONFIG_ZBOOT_ROM_TEXT=0x0
19CONFIG_ZBOOT_ROM_BSS=0x0
20CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw"
21CONFIG_FPE_NWFPE=y
22CONFIG_NET=y
23CONFIG_PACKET=y
24CONFIG_UNIX=y
25CONFIG_INET=y
26CONFIG_IP_PNP=y
27CONFIG_IP_PNP_DHCP=y
28CONFIG_IP_PNP_BOOTP=y
29# CONFIG_INET_LRO is not set
30# CONFIG_IPV6 is not set
31CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
32CONFIG_MTD=y
33CONFIG_MTD_PARTITIONS=y
34CONFIG_MTD_CMDLINE_PARTS=y
35CONFIG_MTD_CHAR=y
36CONFIG_MTD_BLOCK=y
37CONFIG_MTD_CFI=y
38CONFIG_MTD_CFI_INTELEXT=y
39CONFIG_MTD_PHYSMAP=y
40CONFIG_BLK_DEV_LOOP=y
41CONFIG_BLK_DEV_RAM=y
42CONFIG_BLK_DEV_RAM_SIZE=8192
43CONFIG_SCSI=y
44CONFIG_NETDEVICES=y
45CONFIG_NET_ETHERNET=y
46CONFIG_ARM_AT91_ETHER=y
47# CONFIG_INPUT_KEYBOARD is not set
48# CONFIG_INPUT_MOUSE is not set
49# CONFIG_SERIO is not set
50CONFIG_SERIAL_ATMEL=y
51CONFIG_SERIAL_ATMEL_CONSOLE=y
52CONFIG_I2C=y
53CONFIG_I2C_CHARDEV=y
54CONFIG_WATCHDOG=y
55CONFIG_WATCHDOG_NOWAYOUT=y
56CONFIG_AT91RM9200_WATCHDOG=y
57# CONFIG_VGA_CONSOLE is not set
58# CONFIG_USB_HID is not set
59CONFIG_USB=y
60CONFIG_USB_DEBUG=y
61CONFIG_USB_DEVICEFS=y
62CONFIG_USB_MON=y
63CONFIG_USB_OHCI_HCD=y
64CONFIG_USB_STORAGE=y
65CONFIG_USB_SERIAL=y
66CONFIG_USB_SERIAL_CONSOLE=y
67CONFIG_USB_SERIAL_GENERIC=y
68CONFIG_USB_SERIAL_FTDI_SIO=y
69CONFIG_USB_SERIAL_KEYSPAN=y
70CONFIG_USB_SERIAL_KEYSPAN_MPR=y
71CONFIG_USB_SERIAL_KEYSPAN_USA28=y
72CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
73CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
74CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
75CONFIG_USB_SERIAL_KEYSPAN_USA19=y
76CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
77CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
78CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
79CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
80CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
81CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
82CONFIG_USB_SERIAL_MCT_U232=y
83CONFIG_NEW_LEDS=y
84CONFIG_LEDS_CLASS=y
85CONFIG_LEDS_GPIO=y
86CONFIG_LEDS_TRIGGERS=y
87CONFIG_LEDS_TRIGGER_HEARTBEAT=y
88CONFIG_EXT2_FS=y
89CONFIG_INOTIFY=y
90CONFIG_TMPFS=y
91CONFIG_CRAMFS=y
92CONFIG_NFS_FS=y
93CONFIG_NFS_V3=y
94CONFIG_NFS_V4=y
95CONFIG_ROOT_NFS=y
96CONFIG_DEBUG_KERNEL=y
97CONFIG_DEBUG_USER=y
98CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/ecbat91_defconfig b/arch/arm/configs/ecbat91_defconfig
deleted file mode 100644
index 6bb6abdcea8c..000000000000
--- a/arch/arm/configs/ecbat91_defconfig
+++ /dev/null
@@ -1,99 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SLAB=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9# CONFIG_IOSCHED_DEADLINE is not set
10# CONFIG_IOSCHED_CFQ is not set
11CONFIG_ARCH_AT91=y
12CONFIG_MACH_ECBAT91=y
13CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
14CONFIG_PCCARD=y
15CONFIG_AT91_CF=y
16CONFIG_PREEMPT=y
17CONFIG_LEDS=y
18CONFIG_LEDS_CPU=y
19CONFIG_ZBOOT_ROM_TEXT=0x0
20CONFIG_ZBOOT_ROM_BSS=0x0
21CONFIG_CMDLINE="rootfstype=reiserfs root=/dev/mmcblk0p1 console=ttyS0,115200n8 rootdelay=1"
22CONFIG_FPE_NWFPE=y
23CONFIG_NET=y
24CONFIG_PACKET=y
25CONFIG_UNIX=y
26CONFIG_INET=y
27CONFIG_IP_PNP=y
28CONFIG_IP_PNP_DHCP=y
29# CONFIG_IPV6 is not set
30CONFIG_CFG80211=y
31CONFIG_MAC80211=y
32# CONFIG_STANDALONE is not set
33# CONFIG_PREVENT_FIRMWARE_BUILD is not set
34CONFIG_MTD=y
35CONFIG_MTD_PARTITIONS=y
36CONFIG_MTD_CMDLINE_PARTS=y
37CONFIG_MTD_AFS_PARTS=y
38CONFIG_MTD_CHAR=y
39CONFIG_MTD_BLOCK=y
40CONFIG_MTD_DATAFLASH=y
41CONFIG_BLK_DEV_LOOP=y
42CONFIG_SCSI=y
43CONFIG_BLK_DEV_SD=y
44CONFIG_CHR_DEV_SG=y
45CONFIG_NETDEVICES=y
46CONFIG_NET_ETHERNET=y
47CONFIG_ARM_AT91_ETHER=y
48# CONFIG_NETDEV_1000 is not set
49# CONFIG_NETDEV_10000 is not set
50CONFIG_PPP=y
51CONFIG_PPP_MULTILINK=y
52CONFIG_PPP_FILTER=y
53CONFIG_PPP_ASYNC=y
54# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
55# CONFIG_INPUT_KEYBOARD is not set
56# CONFIG_INPUT_MOUSE is not set
57# CONFIG_SERIO is not set
58CONFIG_SERIAL_ATMEL=y
59CONFIG_SERIAL_ATMEL_CONSOLE=y
60CONFIG_HW_RANDOM=y
61CONFIG_I2C=y
62CONFIG_I2C_CHARDEV=y
63CONFIG_SPI=y
64CONFIG_SPI_BITBANG=y
65CONFIG_WATCHDOG=y
66CONFIG_WATCHDOG_NOWAYOUT=y
67# CONFIG_VGA_CONSOLE is not set
68# CONFIG_USB_HID is not set
69CONFIG_USB=y
70CONFIG_USB_DEVICEFS=y
71# CONFIG_USB_DEVICE_CLASS is not set
72CONFIG_USB_OHCI_HCD=y
73CONFIG_USB_PRINTER=y
74CONFIG_USB_STORAGE=y
75CONFIG_USB_GADGET=y
76CONFIG_MMC=y
77CONFIG_MMC_DEBUG=y
78CONFIG_MMC_AT91=m
79CONFIG_NEW_LEDS=y
80CONFIG_LEDS_CLASS=y
81CONFIG_RTC_CLASS=y
82# CONFIG_RTC_HCTOSYS is not set
83CONFIG_RTC_DRV_AT91RM9200=y
84CONFIG_EXT2_FS=y
85CONFIG_EXT3_FS=y
86CONFIG_REISERFS_FS=y
87CONFIG_INOTIFY=y
88CONFIG_TMPFS=y
89CONFIG_CONFIGFS_FS=y
90CONFIG_CRAMFS=y
91CONFIG_NFS_FS=y
92CONFIG_NFS_V3=y
93CONFIG_NFS_V3_ACL=y
94CONFIG_NFS_V4=y
95CONFIG_ROOT_NFS=y
96CONFIG_PARTITION_ADVANCED=y
97CONFIG_DEBUG_USER=y
98CONFIG_CRYPTO_PCBC=y
99CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig
deleted file mode 100644
index 896dbe00dc6e..000000000000
--- a/arch/arm/configs/kafa_defconfig
+++ /dev/null
@@ -1,61 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SLAB=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9# CONFIG_IOSCHED_CFQ is not set
10CONFIG_ARCH_AT91=y
11CONFIG_MACH_KAFA=y
12# CONFIG_ARM_THUMB is not set
13CONFIG_PREEMPT=y
14CONFIG_LEDS=y
15CONFIG_LEDS_CPU=y
16CONFIG_ZBOOT_ROM_TEXT=0x0
17CONFIG_ZBOOT_ROM_BSS=0x0
18CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw"
19CONFIG_FPE_NWFPE=y
20CONFIG_BINFMT_MISC=y
21CONFIG_NET=y
22CONFIG_PACKET=y
23CONFIG_UNIX=y
24CONFIG_INET=y
25# CONFIG_INET_DIAG is not set
26# CONFIG_IPV6 is not set
27CONFIG_MTD=y
28CONFIG_MTD_PARTITIONS=y
29CONFIG_MTD_CHAR=y
30CONFIG_MTD_BLOCK_RO=y
31CONFIG_NETDEVICES=y
32CONFIG_PHYLIB=y
33CONFIG_DAVICOM_PHY=y
34CONFIG_NET_ETHERNET=y
35CONFIG_ARM_AT91_ETHER=y
36# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
37# CONFIG_INPUT_KEYBOARD is not set
38# CONFIG_INPUT_MOUSE is not set
39# CONFIG_SERIO is not set
40CONFIG_SERIAL_ATMEL=y
41CONFIG_SERIAL_ATMEL_CONSOLE=y
42CONFIG_LEGACY_PTY_COUNT=32
43CONFIG_I2C=y
44CONFIG_I2C_CHARDEV=y
45CONFIG_I2C_GPIO=y
46# CONFIG_HWMON is not set
47CONFIG_WATCHDOG=y
48CONFIG_WATCHDOG_NOWAYOUT=y
49CONFIG_AT91RM9200_WATCHDOG=y
50# CONFIG_VGA_CONSOLE is not set
51CONFIG_RTC_CLASS=y
52# CONFIG_RTC_HCTOSYS is not set
53CONFIG_RTC_DRV_AT91RM9200=y
54CONFIG_EXT3_FS=y
55# CONFIG_EXT3_FS_XATTR is not set
56CONFIG_TMPFS=y
57CONFIG_CRAMFS=y
58CONFIG_NFS_FS=m
59CONFIG_NFS_V3=y
60CONFIG_CRYPTO_MD5=y
61CONFIG_CRYPTO_DES=y
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig
deleted file mode 100644
index 9f906a85f5c2..000000000000
--- a/arch/arm/configs/kb9202_defconfig
+++ /dev/null
@@ -1,127 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_POSIX_MQUEUE=y
5CONFIG_BSD_PROCESS_ACCT=y
6CONFIG_AUDIT=y
7CONFIG_IKCONFIG=y
8CONFIG_IKCONFIG_PROC=y
9CONFIG_BLK_DEV_INITRD=y
10CONFIG_KALLSYMS_EXTRA_PASS=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13CONFIG_MODVERSIONS=y
14CONFIG_MODULE_SRCVERSION_ALL=y
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17CONFIG_ARCH_AT91=y
18CONFIG_MACH_KB9200=y
19CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
20CONFIG_NO_HZ=y
21CONFIG_HIGH_RES_TIMERS=y
22CONFIG_PREEMPT=y
23CONFIG_AEABI=y
24CONFIG_ZBOOT_ROM_TEXT=0x10000000
25CONFIG_ZBOOT_ROM_BSS=0x20040000
26CONFIG_CMDLINE="noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M"
27CONFIG_KEXEC=y
28CONFIG_FPE_NWFPE=y
29CONFIG_BINFMT_MISC=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34CONFIG_IP_PNP=y
35CONFIG_IP_PNP_DHCP=y
36CONFIG_IP_PNP_BOOTP=y
37# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
38# CONFIG_INET_XFRM_MODE_TUNNEL is not set
39# CONFIG_INET_XFRM_MODE_BEET is not set
40# CONFIG_INET_LRO is not set
41# CONFIG_INET_DIAG is not set
42# CONFIG_IPV6 is not set
43CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
44# CONFIG_FIRMWARE_IN_KERNEL is not set
45CONFIG_MTD=y
46CONFIG_MTD_CONCAT=y
47CONFIG_MTD_PARTITIONS=y
48CONFIG_MTD_CMDLINE_PARTS=y
49CONFIG_MTD_CHAR=y
50CONFIG_MTD_BLOCK=y
51CONFIG_MTD_CFI=y
52CONFIG_MTD_CFI_INTELEXT=y
53CONFIG_MTD_COMPLEX_MAPPINGS=y
54CONFIG_MTD_PHYSMAP=y
55CONFIG_MTD_NAND=y
56CONFIG_MTD_NAND_ATMEL=y
57CONFIG_MTD_UBI=y
58CONFIG_MTD_UBI_GLUEBI=y
59CONFIG_BLK_DEV_LOOP=y
60CONFIG_BLK_DEV_RAM=y
61CONFIG_BLK_DEV_RAM_SIZE=16384
62CONFIG_ATMEL_TCLIB=y
63CONFIG_ATMEL_SSC=y
64CONFIG_SCSI=y
65CONFIG_BLK_DEV_SD=y
66CONFIG_CHR_DEV_SG=y
67CONFIG_SCSI_MULTI_LUN=y
68CONFIG_SCSI_CONSTANTS=y
69CONFIG_SCSI_LOGGING=y
70CONFIG_SCSI_SPI_ATTRS=m
71# CONFIG_SCSI_LOWLEVEL is not set
72CONFIG_NETDEVICES=y
73CONFIG_NET_ETHERNET=y
74CONFIG_ARM_AT91_ETHER=y
75# CONFIG_NETDEV_1000 is not set
76# CONFIG_NETDEV_10000 is not set
77# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
78# CONFIG_INPUT_KEYBOARD is not set
79# CONFIG_INPUT_MOUSE is not set
80# CONFIG_SERIO is not set
81CONFIG_SERIAL_ATMEL=y
82CONFIG_SERIAL_ATMEL_CONSOLE=y
83# CONFIG_LEGACY_PTYS is not set
84# CONFIG_HW_RANDOM is not set
85# CONFIG_HWMON is not set
86CONFIG_WATCHDOG=y
87CONFIG_AT91RM9200_WATCHDOG=y
88CONFIG_FB=y
89CONFIG_FB_MODE_HELPERS=y
90CONFIG_FB_TILEBLITTING=y
91CONFIG_BACKLIGHT_LCD_SUPPORT=y
92# CONFIG_LCD_CLASS_DEVICE is not set
93CONFIG_BACKLIGHT_CLASS_DEVICE=y
94# CONFIG_BACKLIGHT_GENERIC is not set
95# CONFIG_VGA_CONSOLE is not set
96CONFIG_FRAMEBUFFER_CONSOLE=y
97CONFIG_FONTS=y
98CONFIG_FONT_MINI_4x6=y
99# CONFIG_HID_SUPPORT is not set
100CONFIG_USB=y
101CONFIG_USB_DEVICEFS=y
102CONFIG_USB_OHCI_HCD=y
103CONFIG_USB_STORAGE=y
104CONFIG_USB_LIBUSUAL=y
105CONFIG_MMC=y
106CONFIG_MMC_AT91=m
107CONFIG_RTC_CLASS=y
108CONFIG_RTC_DRV_AT91RM9200=y
109CONFIG_EXT2_FS=y
110CONFIG_EXT3_FS=y
111# CONFIG_DNOTIFY is not set
112CONFIG_INOTIFY=y
113CONFIG_VFAT_FS=y
114CONFIG_TMPFS=y
115CONFIG_CONFIGFS_FS=y
116CONFIG_JFFS2_FS=y
117CONFIG_NFS_FS=y
118CONFIG_NFS_V3=y
119CONFIG_ROOT_NFS=y
120CONFIG_NLS_CODEPAGE_437=y
121CONFIG_NLS_UTF8=y
122CONFIG_MAGIC_SYSRQ=y
123CONFIG_DEBUG_FS=y
124CONFIG_DEBUG_KERNEL=y
125# CONFIG_SCHED_DEBUG is not set
126# CONFIG_DEBUG_PREEMPT is not set
127# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig
deleted file mode 100644
index 1579857aeeaa..000000000000
--- a/arch/arm/configs/onearm_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y
6CONFIG_EMBEDDED=y
7CONFIG_SLAB=y
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10# CONFIG_IOSCHED_DEADLINE is not set
11# CONFIG_IOSCHED_CFQ is not set
12CONFIG_ARCH_AT91=y
13CONFIG_MACH_ONEARM=y
14CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
15# CONFIG_ARM_THUMB is not set
16CONFIG_PCCARD=y
17CONFIG_AT91_CF=y
18CONFIG_LEDS=y
19CONFIG_ZBOOT_ROM_TEXT=0x0
20CONFIG_ZBOOT_ROM_BSS=0x0
21CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M"
22CONFIG_FPE_NWFPE=y
23CONFIG_NET=y
24CONFIG_PACKET=y
25CONFIG_UNIX=y
26CONFIG_INET=y
27CONFIG_IP_PNP=y
28CONFIG_IP_PNP_BOOTP=y
29CONFIG_IPV6=y
30# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
31# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
32# CONFIG_INET6_XFRM_MODE_BEET is not set
33# CONFIG_IPV6_SIT is not set
34CONFIG_MTD=y
35CONFIG_MTD_PARTITIONS=y
36CONFIG_MTD_CMDLINE_PARTS=y
37CONFIG_MTD_CHAR=y
38CONFIG_MTD_BLOCK=y
39CONFIG_MTD_CFI=y
40CONFIG_MTD_JEDECPROBE=y
41CONFIG_MTD_CFI_AMDSTD=y
42CONFIG_MTD_PHYSMAP=y
43CONFIG_BLK_DEV_NBD=y
44CONFIG_BLK_DEV_RAM=y
45CONFIG_BLK_DEV_RAM_SIZE=8192
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48CONFIG_ARM_AT91_ETHER=y
49# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
50# CONFIG_INPUT_KEYBOARD is not set
51# CONFIG_INPUT_MOUSE is not set
52# CONFIG_SERIO is not set
53# CONFIG_VT is not set
54CONFIG_SERIAL_ATMEL=y
55CONFIG_SERIAL_ATMEL_CONSOLE=y
56# CONFIG_HW_RANDOM is not set
57CONFIG_I2C=y
58CONFIG_I2C_CHARDEV=y
59CONFIG_WATCHDOG=y
60CONFIG_WATCHDOG_NOWAYOUT=y
61CONFIG_AT91RM9200_WATCHDOG=y
62# CONFIG_USB_HID is not set
63CONFIG_USB=y
64CONFIG_USB_DEBUG=y
65CONFIG_USB_DEVICEFS=y
66CONFIG_USB_MON=y
67CONFIG_USB_OHCI_HCD=y
68CONFIG_USB_GADGET=y
69CONFIG_MMC=y
70CONFIG_EXT2_FS=y
71CONFIG_INOTIFY=y
72CONFIG_TMPFS=y
73CONFIG_CRAMFS=y
74CONFIG_NFS_FS=y
75CONFIG_NFS_V3=y
76CONFIG_NFS_V3_ACL=y
77CONFIG_ROOT_NFS=y
78CONFIG_DEBUG_KERNEL=y
79CONFIG_DEBUG_USER=y
80CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig
deleted file mode 100644
index 4c9afa478d57..000000000000
--- a/arch/arm/configs/picotux200_defconfig
+++ /dev/null
@@ -1,242 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=m
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_EMBEDDED=y
7# CONFIG_KALLSYMS is not set
8CONFIG_SLAB=y
9CONFIG_MODULES=y
10CONFIG_MODULE_UNLOAD=y
11# CONFIG_IOSCHED_DEADLINE is not set
12# CONFIG_IOSCHED_CFQ is not set
13CONFIG_ARCH_AT91=y
14CONFIG_MACH_PICOTUX2XX=y
15CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
16CONFIG_AEABI=y
17CONFIG_ZBOOT_ROM_TEXT=0x0
18CONFIG_ZBOOT_ROM_BSS=0x0
19CONFIG_KEXEC=y
20CONFIG_FPE_NWFPE=y
21CONFIG_BINFMT_MISC=m
22CONFIG_NET=y
23CONFIG_PACKET=m
24CONFIG_UNIX=y
25CONFIG_XFRM_USER=m
26CONFIG_INET=y
27CONFIG_IP_PNP=y
28CONFIG_IP_PNP_BOOTP=y
29CONFIG_NET_IPIP=m
30CONFIG_NET_IPGRE=m
31CONFIG_INET_AH=m
32CONFIG_INET_ESP=m
33CONFIG_INET_IPCOMP=m
34CONFIG_INET_XFRM_MODE_TRANSPORT=m
35CONFIG_INET_XFRM_MODE_TUNNEL=m
36CONFIG_INET_XFRM_MODE_BEET=m
37CONFIG_INET_DIAG=m
38CONFIG_IPV6_PRIVACY=y
39CONFIG_IPV6_ROUTER_PREF=y
40CONFIG_IPV6_ROUTE_INFO=y
41CONFIG_INET6_AH=m
42CONFIG_INET6_ESP=m
43CONFIG_INET6_IPCOMP=m
44CONFIG_IPV6_MIP6=m
45CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
46CONFIG_IPV6_TUNNEL=m
47CONFIG_BRIDGE=m
48CONFIG_VLAN_8021Q=m
49CONFIG_BT=m
50CONFIG_BT_L2CAP=m
51CONFIG_BT_SCO=m
52CONFIG_BT_RFCOMM=m
53CONFIG_BT_RFCOMM_TTY=y
54CONFIG_BT_BNEP=m
55CONFIG_BT_BNEP_MC_FILTER=y
56CONFIG_BT_BNEP_PROTO_FILTER=y
57CONFIG_BT_HIDP=m
58CONFIG_FW_LOADER=m
59CONFIG_MTD=y
60CONFIG_MTD_PARTITIONS=y
61CONFIG_MTD_CMDLINE_PARTS=y
62CONFIG_MTD_CHAR=y
63CONFIG_MTD_BLOCK=y
64CONFIG_MTD_CFI=y
65CONFIG_MTD_CFI_AMDSTD=y
66CONFIG_MTD_PHYSMAP=y
67CONFIG_BLK_DEV_LOOP=m
68CONFIG_EEPROM_LEGACY=m
69CONFIG_SCSI=m
70CONFIG_BLK_DEV_SD=m
71CONFIG_BLK_DEV_SR=m
72CONFIG_BLK_DEV_SR_VENDOR=y
73CONFIG_CHR_DEV_SG=m
74CONFIG_NETDEVICES=y
75CONFIG_TUN=m
76CONFIG_NET_ETHERNET=y
77CONFIG_ARM_AT91_ETHER=y
78CONFIG_USB_CATC=m
79CONFIG_USB_KAWETH=m
80CONFIG_USB_PEGASUS=m
81CONFIG_USB_RTL8150=m
82CONFIG_USB_USBNET=m
83CONFIG_USB_NET_DM9601=m
84CONFIG_USB_NET_GL620A=m
85CONFIG_USB_NET_PLUSB=m
86CONFIG_USB_NET_MCS7830=m
87CONFIG_USB_NET_RNDIS_HOST=m
88CONFIG_USB_ALI_M5632=y
89CONFIG_USB_AN2720=y
90CONFIG_USB_EPSON2888=y
91CONFIG_USB_KC2190=y
92CONFIG_PPP=m
93CONFIG_PPP_FILTER=y
94CONFIG_PPP_ASYNC=m
95CONFIG_PPP_DEFLATE=m
96CONFIG_PPP_BSDCOMP=m
97CONFIG_PPP_MPPE=m
98CONFIG_PPPOE=m
99CONFIG_SLIP=m
100CONFIG_SLIP_COMPRESSED=y
101CONFIG_SLIP_SMART=y
102CONFIG_SLIP_MODE_SLIP6=y
103# CONFIG_INPUT_MOUSEDEV is not set
104# CONFIG_INPUT_KEYBOARD is not set
105# CONFIG_INPUT_MOUSE is not set
106# CONFIG_SERIO is not set
107# CONFIG_VT is not set
108CONFIG_SERIAL_ATMEL=y
109CONFIG_SERIAL_ATMEL_CONSOLE=y
110# CONFIG_LEGACY_PTYS is not set
111CONFIG_I2C=m
112CONFIG_I2C_CHARDEV=m
113CONFIG_I2C_GPIO=m
114CONFIG_HWMON=m
115CONFIG_SENSORS_ADM1021=m
116CONFIG_SENSORS_ADM1025=m
117CONFIG_SENSORS_ADM1026=m
118CONFIG_SENSORS_ADM1029=m
119CONFIG_SENSORS_ADM1031=m
120CONFIG_SENSORS_ADM9240=m
121CONFIG_SENSORS_DS1621=m
122CONFIG_SENSORS_GL518SM=m
123CONFIG_SENSORS_GL520SM=m
124CONFIG_SENSORS_IT87=m
125CONFIG_SENSORS_LM63=m
126CONFIG_SENSORS_LM75=m
127CONFIG_SENSORS_LM77=m
128CONFIG_SENSORS_LM78=m
129CONFIG_SENSORS_LM80=m
130CONFIG_SENSORS_LM83=m
131CONFIG_SENSORS_LM85=m
132CONFIG_SENSORS_LM87=m
133CONFIG_SENSORS_LM90=m
134CONFIG_SENSORS_LM92=m
135CONFIG_SENSORS_MAX1619=m
136CONFIG_SENSORS_PCF8591=m
137CONFIG_SENSORS_SMSC47B397=m
138CONFIG_SENSORS_W83781D=m
139CONFIG_SENSORS_W83791D=m
140CONFIG_SENSORS_W83792D=m
141CONFIG_SENSORS_W83793=m
142CONFIG_SENSORS_W83L785TS=m
143CONFIG_WATCHDOG=y
144CONFIG_WATCHDOG_NOWAYOUT=y
145CONFIG_AT91RM9200_WATCHDOG=m
146CONFIG_HID=m
147CONFIG_USB=m
148CONFIG_USB_DEVICEFS=y
149CONFIG_USB_OHCI_HCD=m
150CONFIG_USB_ACM=m
151CONFIG_USB_PRINTER=m
152CONFIG_USB_STORAGE=m
153CONFIG_USB_SERIAL=m
154CONFIG_USB_SERIAL_GENERIC=y
155CONFIG_USB_SERIAL_PL2303=m
156CONFIG_MMC=m
157CONFIG_MMC_AT91=m
158CONFIG_RTC_CLASS=m
159CONFIG_RTC_DRV_AT91RM9200=m
160CONFIG_EXT2_FS=m
161CONFIG_EXT3_FS=m
162# CONFIG_EXT3_FS_XATTR is not set
163CONFIG_INOTIFY=y
164CONFIG_ISO9660_FS=m
165CONFIG_JOLIET=y
166CONFIG_UDF_FS=m
167CONFIG_MSDOS_FS=m
168CONFIG_VFAT_FS=m
169CONFIG_NTFS_FS=m
170CONFIG_TMPFS=y
171CONFIG_JFFS2_FS=y
172CONFIG_JFFS2_SUMMARY=y
173CONFIG_JFFS2_COMPRESSION_OPTIONS=y
174CONFIG_NFS_FS=m
175CONFIG_SMB_FS=m
176CONFIG_CIFS=m
177CONFIG_PARTITION_ADVANCED=y
178CONFIG_AMIGA_PARTITION=y
179CONFIG_NLS_DEFAULT="utf-8"
180CONFIG_NLS_CODEPAGE_437=m
181CONFIG_NLS_CODEPAGE_737=m
182CONFIG_NLS_CODEPAGE_775=m
183CONFIG_NLS_CODEPAGE_850=m
184CONFIG_NLS_CODEPAGE_852=m
185CONFIG_NLS_CODEPAGE_855=m
186CONFIG_NLS_CODEPAGE_857=m
187CONFIG_NLS_CODEPAGE_860=m
188CONFIG_NLS_CODEPAGE_861=m
189CONFIG_NLS_CODEPAGE_862=m
190CONFIG_NLS_CODEPAGE_863=m
191CONFIG_NLS_CODEPAGE_864=m
192CONFIG_NLS_CODEPAGE_865=m
193CONFIG_NLS_CODEPAGE_866=m
194CONFIG_NLS_CODEPAGE_869=m
195CONFIG_NLS_CODEPAGE_936=m
196CONFIG_NLS_CODEPAGE_950=m
197CONFIG_NLS_CODEPAGE_932=m
198CONFIG_NLS_CODEPAGE_949=m
199CONFIG_NLS_CODEPAGE_874=m
200CONFIG_NLS_ISO8859_8=m
201CONFIG_NLS_CODEPAGE_1250=m
202CONFIG_NLS_CODEPAGE_1251=m
203CONFIG_NLS_ASCII=m
204CONFIG_NLS_ISO8859_1=m
205CONFIG_NLS_ISO8859_2=m
206CONFIG_NLS_ISO8859_3=m
207CONFIG_NLS_ISO8859_4=m
208CONFIG_NLS_ISO8859_5=m
209CONFIG_NLS_ISO8859_6=m
210CONFIG_NLS_ISO8859_7=m
211CONFIG_NLS_ISO8859_9=m
212CONFIG_NLS_ISO8859_13=m
213CONFIG_NLS_ISO8859_14=m
214CONFIG_NLS_ISO8859_15=m
215CONFIG_NLS_KOI8_R=m
216CONFIG_NLS_KOI8_U=m
217CONFIG_NLS_UTF8=m
218CONFIG_DEBUG_KERNEL=y
219# CONFIG_DEBUG_BUGVERBOSE is not set
220CONFIG_DEBUG_LL=y
221CONFIG_CRYPTO_NULL=m
222CONFIG_CRYPTO_TEST=m
223CONFIG_CRYPTO_LRW=m
224CONFIG_CRYPTO_PCBC=m
225CONFIG_CRYPTO_XCBC=m
226CONFIG_CRYPTO_MD4=m
227CONFIG_CRYPTO_MICHAEL_MIC=m
228CONFIG_CRYPTO_SHA256=m
229CONFIG_CRYPTO_SHA512=m
230CONFIG_CRYPTO_TGR192=m
231CONFIG_CRYPTO_WP512=m
232CONFIG_CRYPTO_ANUBIS=m
233CONFIG_CRYPTO_BLOWFISH=m
234CONFIG_CRYPTO_CAMELLIA=m
235CONFIG_CRYPTO_CAST5=m
236CONFIG_CRYPTO_CAST6=m
237CONFIG_CRYPTO_FCRYPT=m
238CONFIG_CRYPTO_KHAZAD=m
239CONFIG_CRYPTO_SERPENT=m
240CONFIG_CRYPTO_TEA=m
241CONFIG_CRYPTO_TWOFISH=m
242CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/yl9200_defconfig b/arch/arm/configs/yl9200_defconfig
deleted file mode 100644
index 30c537f61089..000000000000
--- a/arch/arm/configs/yl9200_defconfig
+++ /dev/null
@@ -1,137 +0,0 @@
1# CONFIG_SWAP is not set
2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y
5# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
6CONFIG_MODULES=y
7CONFIG_MODULE_UNLOAD=y
8# CONFIG_IOSCHED_DEADLINE is not set
9# CONFIG_IOSCHED_CFQ is not set
10CONFIG_ARCH_AT91=y
11CONFIG_ARCH_AT91RM9200DK=y
12CONFIG_MACH_YL9200=y
13# CONFIG_ARM_THUMB is not set
14CONFIG_ZBOOT_ROM_TEXT=0x0
15CONFIG_ZBOOT_ROM_BSS=0x0
16CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
17CONFIG_FPE_NWFPE=y
18CONFIG_NET=y
19CONFIG_PACKET=y
20CONFIG_UNIX=y
21CONFIG_INET=y
22CONFIG_IP_PNP=y
23CONFIG_IP_PNP_DHCP=y
24# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
25# CONFIG_INET_XFRM_MODE_TUNNEL is not set
26# CONFIG_INET_XFRM_MODE_BEET is not set
27# CONFIG_INET_LRO is not set
28# CONFIG_INET_DIAG is not set
29# CONFIG_IPV6 is not set
30CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
31CONFIG_MTD=y
32CONFIG_MTD_CONCAT=y
33CONFIG_MTD_PARTITIONS=y
34CONFIG_MTD_CMDLINE_PARTS=y
35CONFIG_MTD_CHAR=y
36CONFIG_MTD_BLOCK=y
37CONFIG_MTD_CFI=y
38CONFIG_MTD_JEDECPROBE=y
39CONFIG_MTD_CFI_INTELEXT=y
40CONFIG_MTD_COMPLEX_MAPPINGS=y
41CONFIG_MTD_PHYSMAP=y
42CONFIG_MTD_PLATRAM=y
43CONFIG_MTD_NAND=y
44CONFIG_MTD_NAND_ATMEL=y
45CONFIG_MTD_NAND_PLATFORM=y
46CONFIG_BLK_DEV_LOOP=y
47CONFIG_BLK_DEV_RAM=y
48CONFIG_BLK_DEV_RAM_COUNT=3
49CONFIG_BLK_DEV_RAM_SIZE=8192
50# CONFIG_MISC_DEVICES is not set
51CONFIG_BLK_DEV_SD=y
52CONFIG_ATA=y
53CONFIG_NETDEVICES=y
54CONFIG_PHYLIB=y
55CONFIG_DAVICOM_PHY=y
56CONFIG_NET_ETHERNET=y
57CONFIG_ARM_AT91_ETHER=y
58# CONFIG_NETDEV_1000 is not set
59# CONFIG_NETDEV_10000 is not set
60# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
61CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
62CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
63CONFIG_INPUT_EVDEV=y
64# CONFIG_KEYBOARD_ATKBD is not set
65CONFIG_KEYBOARD_GPIO=y
66CONFIG_INPUT_TOUCHSCREEN=y
67CONFIG_TOUCHSCREEN_ADS7846=y
68# CONFIG_SERIO_SERPORT is not set
69CONFIG_SERIAL_ATMEL=y
70CONFIG_SERIAL_ATMEL_CONSOLE=y
71# CONFIG_HW_RANDOM is not set
72CONFIG_I2C=y
73CONFIG_SPI=y
74CONFIG_SPI_DEBUG=y
75CONFIG_SPI_ATMEL=y
76CONFIG_FB=y
77CONFIG_BACKLIGHT_LCD_SUPPORT=y
78CONFIG_LCD_CLASS_DEVICE=y
79CONFIG_BACKLIGHT_CLASS_DEVICE=y
80CONFIG_DISPLAY_SUPPORT=y
81# CONFIG_VGA_CONSOLE is not set
82CONFIG_LOGO=y
83# CONFIG_LOGO_LINUX_MONO is not set
84# CONFIG_LOGO_LINUX_VGA16 is not set
85CONFIG_USB=y
86CONFIG_USB_DEBUG=y
87CONFIG_USB_DEVICEFS=y
88# CONFIG_USB_DEVICE_CLASS is not set
89CONFIG_USB_MON=y
90CONFIG_USB_OHCI_HCD=y
91CONFIG_USB_STORAGE=y
92CONFIG_USB_GADGET=y
93CONFIG_USB_GADGET_M66592=y
94CONFIG_USB_FILE_STORAGE=m
95CONFIG_MMC=y
96CONFIG_MMC_DEBUG=y
97# CONFIG_MMC_BLOCK_BOUNCE is not set
98CONFIG_MMC_AT91=m
99CONFIG_NEW_LEDS=y
100CONFIG_LEDS_CLASS=y
101CONFIG_LEDS_GPIO=y
102CONFIG_LEDS_TRIGGERS=y
103CONFIG_LEDS_TRIGGER_TIMER=y
104CONFIG_LEDS_TRIGGER_HEARTBEAT=y
105CONFIG_RTC_CLASS=y
106CONFIG_RTC_DRV_AT91RM9200=y
107CONFIG_EXT2_FS=y
108CONFIG_EXT2_FS_XATTR=y
109CONFIG_EXT3_FS=y
110CONFIG_REISERFS_FS=y
111CONFIG_INOTIFY=y
112CONFIG_ISO9660_FS=y
113CONFIG_JOLIET=y
114CONFIG_ZISOFS=y
115CONFIG_UDF_FS=y
116CONFIG_MSDOS_FS=y
117CONFIG_VFAT_FS=y
118CONFIG_TMPFS=y
119CONFIG_JFFS2_FS=y
120CONFIG_JFFS2_FS_DEBUG=1
121CONFIG_JFFS2_COMPRESSION_OPTIONS=y
122CONFIG_JFFS2_RUBIN=y
123CONFIG_CRAMFS=y
124CONFIG_PARTITION_ADVANCED=y
125CONFIG_MAC_PARTITION=y
126CONFIG_NLS_CODEPAGE_437=y
127CONFIG_NLS_ISO8859_1=y
128# CONFIG_ENABLE_MUST_CHECK is not set
129CONFIG_DEBUG_FS=y
130CONFIG_DEBUG_KERNEL=y
131CONFIG_SLUB_DEBUG_ON=y
132CONFIG_DEBUG_KOBJECT=y
133CONFIG_DEBUG_INFO=y
134CONFIG_DEBUG_LIST=y
135CONFIG_DEBUG_USER=y
136CONFIG_DEBUG_ERRORS=y
137CONFIG_DEBUG_LL=y
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 679851a9f589..c73abe4b7e72 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -51,6 +51,7 @@ AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
51obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o 51obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
52obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o 52obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
53obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o 53obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
54obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o
54obj-$(CONFIG_IWMMXT) += iwmmxt.o 55obj-$(CONFIG_IWMMXT) += iwmmxt.o
55obj-$(CONFIG_CPU_HAS_PMU) += pmu.o 56obj-$(CONFIG_CPU_HAS_PMU) += pmu.o
56obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o 57obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 34bbef0d2e7e..36199ffc4cc2 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -915,7 +915,7 @@ __kuser_cmpxchg: @ 0xffff0fc0
915 * A special ghost syscall is used for that (see traps.c). 915 * A special ghost syscall is used for that (see traps.c).
916 */ 916 */
917 stmfd sp!, {r7, lr} 917 stmfd sp!, {r7, lr}
918 ldr r7, =1f @ it's 20 bits 918 ldr r7, 1f @ it's 20 bits
919 swi __ARM_NR_cmpxchg 919 swi __ARM_NR_cmpxchg
920 ldmfd sp!, {r7, pc} 920 ldmfd sp!, {r7, pc}
9211: .word __ARM_NR_cmpxchg 9211: .word __ARM_NR_cmpxchg
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index dd6b369ac69c..6bd82d25683c 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -85,9 +85,11 @@ ENTRY(stext)
85 mrc p15, 0, r9, c0, c0 @ get processor id 85 mrc p15, 0, r9, c0, c0 @ get processor id
86 bl __lookup_processor_type @ r5=procinfo r9=cpuid 86 bl __lookup_processor_type @ r5=procinfo r9=cpuid
87 movs r10, r5 @ invalid processor (r5=0)? 87 movs r10, r5 @ invalid processor (r5=0)?
88 THUMB( it eq ) @ force fixup-able long branch encoding
88 beq __error_p @ yes, error 'p' 89 beq __error_p @ yes, error 'p'
89 bl __lookup_machine_type @ r5=machinfo 90 bl __lookup_machine_type @ r5=machinfo
90 movs r8, r5 @ invalid machine (r5=0)? 91 movs r8, r5 @ invalid machine (r5=0)?
92 THUMB( it eq ) @ force fixup-able long branch encoding
91 beq __error_a @ yes, error 'a' 93 beq __error_a @ yes, error 'a'
92 bl __vet_atags 94 bl __vet_atags
93#ifdef CONFIG_SMP_ON_UP 95#ifdef CONFIG_SMP_ON_UP
@@ -262,6 +264,7 @@ __create_page_tables:
262 mov pc, lr 264 mov pc, lr
263ENDPROC(__create_page_tables) 265ENDPROC(__create_page_tables)
264 .ltorg 266 .ltorg
267 .align
265__enable_mmu_loc: 268__enable_mmu_loc:
266 .long . 269 .long .
267 .long __enable_mmu 270 .long __enable_mmu
@@ -282,6 +285,7 @@ ENTRY(secondary_startup)
282 bl __lookup_processor_type 285 bl __lookup_processor_type
283 movs r10, r5 @ invalid processor? 286 movs r10, r5 @ invalid processor?
284 moveq r0, #'p' @ yes, error 'p' 287 moveq r0, #'p' @ yes, error 'p'
288 THUMB( it eq ) @ force fixup-able long branch encoding
285 beq __error_p 289 beq __error_p
286 290
287 /* 291 /*
@@ -308,6 +312,8 @@ ENTRY(__secondary_switched)
308 b secondary_start_kernel 312 b secondary_start_kernel
309ENDPROC(__secondary_switched) 313ENDPROC(__secondary_switched)
310 314
315 .align
316
311 .type __secondary_data, %object 317 .type __secondary_data, %object
312__secondary_data: 318__secondary_data:
313 .long . 319 .long .
@@ -413,6 +419,7 @@ __fixup_smp_on_up:
413 mov pc, lr 419 mov pc, lr
414ENDPROC(__fixup_smp) 420ENDPROC(__fixup_smp)
415 421
422 .align
4161: .word . 4231: .word .
417 .word __smpalt_begin 424 .word __smpalt_begin
418 .word __smpalt_end 425 .word __smpalt_end
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index b63b528f22a6..7fa3bb0d2397 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -19,6 +19,14 @@
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21 21
22#if defined(CONFIG_CPU_PJ4)
23#define PJ4(code...) code
24#define XSC(code...)
25#else
26#define PJ4(code...)
27#define XSC(code...) code
28#endif
29
22#define MMX_WR0 (0x00) 30#define MMX_WR0 (0x00)
23#define MMX_WR1 (0x08) 31#define MMX_WR1 (0x08)
24#define MMX_WR2 (0x10) 32#define MMX_WR2 (0x10)
@@ -58,11 +66,17 @@
58 66
59ENTRY(iwmmxt_task_enable) 67ENTRY(iwmmxt_task_enable)
60 68
61 mrc p15, 0, r2, c15, c1, 0 69 XSC(mrc p15, 0, r2, c15, c1, 0)
62 tst r2, #0x3 @ CP0 and CP1 accessible? 70 PJ4(mrc p15, 0, r2, c1, c0, 2)
71 @ CP0 and CP1 accessible?
72 XSC(tst r2, #0x3)
73 PJ4(tst r2, #0xf)
63 movne pc, lr @ if so no business here 74 movne pc, lr @ if so no business here
64 orr r2, r2, #0x3 @ enable access to CP0 and CP1 75 @ enable access to CP0 and CP1
65 mcr p15, 0, r2, c15, c1, 0 76 XSC(orr r2, r2, #0x3)
77 XSC(mcr p15, 0, r2, c15, c1, 0)
78 PJ4(orr r2, r2, #0xf)
79 PJ4(mcr p15, 0, r2, c1, c0, 2)
66 80
67 ldr r3, =concan_owner 81 ldr r3, =concan_owner
68 add r0, r10, #TI_IWMMXT_STATE @ get task Concan save area 82 add r0, r10, #TI_IWMMXT_STATE @ get task Concan save area
@@ -179,17 +193,26 @@ ENTRY(iwmmxt_task_disable)
179 teqne r1, r2 @ or specified one? 193 teqne r1, r2 @ or specified one?
180 bne 1f @ no: quit 194 bne 1f @ no: quit
181 195
182 mrc p15, 0, r4, c15, c1, 0 196 @ enable access to CP0 and CP1
183 orr r4, r4, #0x3 @ enable access to CP0 and CP1 197 XSC(mrc p15, 0, r4, c15, c1, 0)
184 mcr p15, 0, r4, c15, c1, 0 198 XSC(orr r4, r4, #0xf)
199 XSC(mcr p15, 0, r4, c15, c1, 0)
200 PJ4(mrc p15, 0, r4, c1, c0, 2)
201 PJ4(orr r4, r4, #0x3)
202 PJ4(mcr p15, 0, r4, c1, c0, 2)
203
185 mov r0, #0 @ nothing to load 204 mov r0, #0 @ nothing to load
186 str r0, [r3] @ no more current owner 205 str r0, [r3] @ no more current owner
187 mrc p15, 0, r2, c2, c0, 0 206 mrc p15, 0, r2, c2, c0, 0
188 mov r2, r2 @ cpwait 207 mov r2, r2 @ cpwait
189 bl concan_save 208 bl concan_save
190 209
191 bic r4, r4, #0x3 @ disable access to CP0 and CP1 210 @ disable access to CP0 and CP1
192 mcr p15, 0, r4, c15, c1, 0 211 XSC(bic r4, r4, #0x3)
212 XSC(mcr p15, 0, r4, c15, c1, 0)
213 PJ4(bic r4, r4, #0xf)
214 PJ4(mcr p15, 0, r4, c1, c0, 2)
215
193 mrc p15, 0, r2, c2, c0, 0 216 mrc p15, 0, r2, c2, c0, 0
194 mov r2, r2 @ cpwait 217 mov r2, r2 @ cpwait
195 218
@@ -277,8 +300,11 @@ ENTRY(iwmmxt_task_restore)
277 */ 300 */
278ENTRY(iwmmxt_task_switch) 301ENTRY(iwmmxt_task_switch)
279 302
280 mrc p15, 0, r1, c15, c1, 0 303 XSC(mrc p15, 0, r1, c15, c1, 0)
281 tst r1, #0x3 @ CP0 and CP1 accessible? 304 PJ4(mrc p15, 0, r1, c1, c0, 2)
305 @ CP0 and CP1 accessible?
306 XSC(tst r1, #0x3)
307 PJ4(tst r1, #0xf)
282 bne 1f @ yes: block them for next task 308 bne 1f @ yes: block them for next task
283 309
284 ldr r2, =concan_owner 310 ldr r2, =concan_owner
@@ -287,8 +313,11 @@ ENTRY(iwmmxt_task_switch)
287 teq r2, r3 @ next task owns it? 313 teq r2, r3 @ next task owns it?
288 movne pc, lr @ no: leave Concan disabled 314 movne pc, lr @ no: leave Concan disabled
289 315
2901: eor r1, r1, #3 @ flip Concan access 3161: @ flip Conan access
291 mcr p15, 0, r1, c15, c1, 0 317 XSC(eor r1, r1, #0x3)
318 XSC(mcr p15, 0, r1, c15, c1, 0)
319 PJ4(eor r1, r1, #0xf)
320 PJ4(mcr p15, 0, r1, c1, c0, 2)
292 321
293 mrc p15, 0, r1, c2, c0, 0 322 mrc p15, 0, r1, c2, c0, 0
294 sub pc, lr, r1, lsr #32 @ cpwait and return 323 sub pc, lr, r1, lsr #32 @ cpwait and return
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c
new file mode 100644
index 000000000000..a4b1b0748fd3
--- /dev/null
+++ b/arch/arm/kernel/pj4-cp0.c
@@ -0,0 +1,94 @@
1/*
2 * linux/arch/arm/kernel/pj4-cp0.c
3 *
4 * PJ4 iWMMXt coprocessor context switching and handling
5 *
6 * Copyright (c) 2010 Marvell International Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <asm/thread_notify.h>
21
22static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
23{
24 struct thread_info *thread = t;
25
26 switch (cmd) {
27 case THREAD_NOTIFY_FLUSH:
28 /*
29 * flush_thread() zeroes thread->fpstate, so no need
30 * to do anything here.
31 *
32 * FALLTHROUGH: Ensure we don't try to overwrite our newly
33 * initialised state information on the first fault.
34 */
35
36 case THREAD_NOTIFY_EXIT:
37 iwmmxt_task_release(thread);
38 break;
39
40 case THREAD_NOTIFY_SWITCH:
41 iwmmxt_task_switch(thread);
42 break;
43 }
44
45 return NOTIFY_DONE;
46}
47
48static struct notifier_block iwmmxt_notifier_block = {
49 .notifier_call = iwmmxt_do,
50};
51
52
53static u32 __init pj4_cp_access_read(void)
54{
55 u32 value;
56
57 __asm__ __volatile__ (
58 "mrc p15, 0, %0, c1, c0, 2\n\t"
59 : "=r" (value));
60 return value;
61}
62
63static void __init pj4_cp_access_write(u32 value)
64{
65 u32 temp;
66
67 __asm__ __volatile__ (
68 "mcr p15, 0, %1, c1, c0, 2\n\t"
69 "mrc p15, 0, %0, c1, c0, 2\n\t"
70 "mov %0, %0\n\t"
71 "sub pc, pc, #4\n\t"
72 : "=r" (temp) : "r" (value));
73}
74
75
76/*
77 * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
78 * switch code handle iWMMXt context switching.
79 */
80static int __init pj4_cp0_init(void)
81{
82 u32 cp_access;
83
84 cp_access = pj4_cp_access_read() & ~0xf;
85 pj4_cp_access_write(cp_access);
86
87 printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n");
88 elf_hwcap |= HWCAP_IWMMXT;
89 thread_register_notifier(&iwmmxt_notifier_block);
90
91 return 0;
92}
93
94late_initcall(pj4_cp0_init);
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index fd26f8d65151..9cf4cbf8f95b 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -59,6 +59,8 @@ relocate_new_kernel:
59 ldr r2,kexec_boot_atags 59 ldr r2,kexec_boot_atags
60 mov pc,lr 60 mov pc,lr
61 61
62 .align
63
62 .globl kexec_start_address 64 .globl kexec_start_address
63kexec_start_address: 65kexec_start_address:
64 .long 0x0 66 .long 0x0
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 821eb842795f..62d686f0b426 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -24,8 +24,8 @@ obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
24 24
25# AT91RM9200 board-specific support 25# AT91RM9200 board-specific support
26obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 26obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
27obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o 27obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o
28obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o 28obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o
29obj-$(CONFIG_MACH_CSB337) += board-csb337.o 29obj-$(CONFIG_MACH_CSB337) += board-csb337.o
30obj-$(CONFIG_MACH_CSB637) += board-csb637.o 30obj-$(CONFIG_MACH_CSB637) += board-csb637.o
31obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o 31obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 9338825cfcd7..7b539228e0ef 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1106,51 +1106,6 @@ static inline void configure_usart3_pins(unsigned pins)
1106static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ 1106static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1107struct platform_device *atmel_default_console_device; /* the serial console device */ 1107struct platform_device *atmel_default_console_device; /* the serial console device */
1108 1108
1109void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1110{
1111 int i;
1112
1113 /* Fill in list of supported UARTs */
1114 for (i = 0; i < config->nr_tty; i++) {
1115 switch (config->tty_map[i]) {
1116 case 0:
1117 configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
1118 at91_uarts[i] = &at91rm9200_uart0_device;
1119 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
1120 break;
1121 case 1:
1122 configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
1123 at91_uarts[i] = &at91rm9200_uart1_device;
1124 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
1125 break;
1126 case 2:
1127 configure_usart2_pins(0);
1128 at91_uarts[i] = &at91rm9200_uart2_device;
1129 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
1130 break;
1131 case 3:
1132 configure_usart3_pins(0);
1133 at91_uarts[i] = &at91rm9200_uart3_device;
1134 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
1135 break;
1136 case 4:
1137 configure_dbgu_pins();
1138 at91_uarts[i] = &at91rm9200_dbgu_device;
1139 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
1140 break;
1141 default:
1142 continue;
1143 }
1144 at91_uarts[i]->id = i; /* update ID number to mapped ID */
1145 }
1146
1147 /* Set serial console device */
1148 if (config->console_tty < ATMEL_MAX_UART)
1149 atmel_default_console_device = at91_uarts[config->console_tty];
1150 if (!atmel_default_console_device)
1151 printk(KERN_INFO "AT91: No default serial console defined.\n");
1152}
1153
1154void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) 1109void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1155{ 1110{
1156 struct platform_device *pdev; 1111 struct platform_device *pdev;
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 46bdc82d3fbf..8a3fc84847c1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -39,24 +39,24 @@
39#include "generic.h" 39#include "generic.h"
40 40
41 41
42/*
43 * Serial port configuration.
44 * 0 .. 3 = USART0 .. USART3
45 * 4 = DBGU
46 */
47static struct at91_uart_config __initdata onearm_uart_config = {
48 .console_tty = 0, /* ttyS0 */
49 .nr_tty = 3,
50 .tty_map = { 4, 0, 1, -1, -1 }, /* ttyS0, ..., ttyS4 */
51};
52
53static void __init onearm_map_io(void) 42static void __init onearm_map_io(void)
54{ 43{
55 /* Initialize processor: 18.432 MHz crystal */ 44 /* Initialize processor: 18.432 MHz crystal */
56 at91rm9200_initialize(18432000, AT91RM9200_PQFP); 45 at91rm9200_initialize(18432000, AT91RM9200_PQFP);
57 46
58 /* Setup the serial ports and console */ 47 /* DBGU on ttyS0. (Rx & Tx only) */
59 at91_init_serial(&onearm_uart_config); 48 at91_register_uart(0, 0, 0);
49
50 /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
51 at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
52
53 /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
54 at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
55 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
56 | ATMEL_UART_RI);
57
58 /* set serial console to ttyS0 (ie, DBGU) */
59 at91_set_serial_console(0);
60} 60}
61 61
62static void __init onearm_init_irq(void) 62static void __init onearm_init_irq(void)
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index c0ce79d431a0..d2e1f4ec1fcc 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -39,17 +39,6 @@
39#include "generic.h" 39#include "generic.h"
40 40
41 41
42/*
43 * Serial port configuration.
44 * 0 .. 3 = USART0 .. USART3
45 * 4 = DBGU
46 */
47static struct at91_uart_config __initdata kafa_uart_config = {
48 .console_tty = 0, /* ttyS0 */
49 .nr_tty = 2,
50 .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
51};
52
53static void __init kafa_map_io(void) 42static void __init kafa_map_io(void)
54{ 43{
55 /* Initialize processor: 18.432 MHz crystal */ 44 /* Initialize processor: 18.432 MHz crystal */
@@ -58,8 +47,14 @@ static void __init kafa_map_io(void)
58 /* Set up the LEDs */ 47 /* Set up the LEDs */
59 at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); 48 at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
60 49
61 /* Setup the serial ports and console */ 50 /* DBGU on ttyS0. (Rx & Tx only) */
62 at91_init_serial(&kafa_uart_config); 51 at91_register_uart(0, 0, 0);
52
53 /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
54 at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
55
56 /* set serial console to ttyS0 (ie, DBGU) */
57 at91_set_serial_console(0);
63} 58}
64 59
65static void __init kafa_init_irq(void) 60static void __init kafa_init_irq(void)
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 9d833bbc592d..55dad3a46547 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -43,24 +43,21 @@
43#include "generic.h" 43#include "generic.h"
44 44
45 45
46/*
47 * Serial port configuration.
48 * 0 .. 3 = USART0 .. USART3
49 * 4 = DBGU
50 */
51static struct at91_uart_config __initdata picotux200_uart_config = {
52 .console_tty = 0, /* ttyS0 */
53 .nr_tty = 2,
54 .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
55};
56
57static void __init picotux200_map_io(void) 46static void __init picotux200_map_io(void)
58{ 47{
59 /* Initialize processor: 18.432 MHz crystal */ 48 /* Initialize processor: 18.432 MHz crystal */
60 at91rm9200_initialize(18432000, AT91RM9200_BGA); 49 at91rm9200_initialize(18432000, AT91RM9200_BGA);
61 50
62 /* Setup the serial ports and console */ 51 /* DBGU on ttyS0. (Rx & Tx only) */
63 at91_init_serial(&picotux200_uart_config); 52 at91_register_uart(0, 0, 0);
53
54 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
55 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
56 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
57 | ATMEL_UART_RI);
58
59 /* set serial console to ttyS0 (ie, DBGU) */
60 at91_set_serial_console(0);
64} 61}
65 62
66static void __init picotux200_init_irq(void) 63static void __init picotux200_init_irq(void)
@@ -77,11 +74,6 @@ static struct at91_usbh_data __initdata picotux200_usbh_data = {
77 .ports = 1, 74 .ports = 1,
78}; 75};
79 76
80// static struct at91_udc_data __initdata picotux200_udc_data = {
81// .vbus_pin = AT91_PIN_PD4,
82// .pullup_pin = AT91_PIN_PD5,
83// };
84
85static struct at91_mmc_data __initdata picotux200_mmc_data = { 77static struct at91_mmc_data __initdata picotux200_mmc_data = {
86 .det_pin = AT91_PIN_PB27, 78 .det_pin = AT91_PIN_PB27,
87 .slot_b = 0, 79 .slot_b = 0,
@@ -89,21 +81,6 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
89 .wp_pin = AT91_PIN_PA17, 81 .wp_pin = AT91_PIN_PA17,
90}; 82};
91 83
92// static struct spi_board_info picotux200_spi_devices[] = {
93// { /* DataFlash chip */
94// .modalias = "mtd_dataflash",
95// .chip_select = 0,
96// .max_speed_hz = 15 * 1000 * 1000,
97// },
98// #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
99// { /* DataFlash card */
100// .modalias = "mtd_dataflash",
101// .chip_select = 3,
102// .max_speed_hz = 15 * 1000 * 1000,
103// },
104// #endif
105// };
106
107#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 84#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
108#define PICOTUX200_FLASH_SIZE SZ_4M 85#define PICOTUX200_FLASH_SIZE SZ_4M
109 86
@@ -135,21 +112,11 @@ static void __init picotux200_board_init(void)
135 at91_add_device_eth(&picotux200_eth_data); 112 at91_add_device_eth(&picotux200_eth_data);
136 /* USB Host */ 113 /* USB Host */
137 at91_add_device_usbh(&picotux200_usbh_data); 114 at91_add_device_usbh(&picotux200_usbh_data);
138 /* USB Device */
139 // at91_add_device_udc(&picotux200_udc_data);
140 // at91_set_multi_drive(picotux200_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
141 /* I2C */ 115 /* I2C */
142 at91_add_device_i2c(NULL, 0); 116 at91_add_device_i2c(NULL, 0);
143 /* SPI */
144 // at91_add_device_spi(picotux200_spi_devices, ARRAY_SIZE(picotux200_spi_devices));
145#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
146 /* DataFlash card */
147 at91_set_gpio_output(AT91_PIN_PB22, 0);
148#else
149 /* MMC */ 117 /* MMC */
150 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ 118 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
151 at91_add_device_mmc(0, &picotux200_mmc_data); 119 at91_add_device_mmc(0, &picotux200_mmc_data);
152#endif
153 /* NOR Flash */ 120 /* NOR Flash */
154 platform_device_register(&picotux200_flash); 121 platform_device_register(&picotux200_flash);
155} 122}
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index e14f0e165680..4c1047c8200d 100644
--- a/arch/arm/mach-at91/board-dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91/board-dk.c 2 * linux/arch/arm/mach-at91/board-rm9200dk.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -91,10 +91,12 @@ static struct at91_cf_data __initdata dk_cf_data = {
91 // .vcc_pin = ... always powered 91 // .vcc_pin = ... always powered
92}; 92};
93 93
94#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
94static struct at91_mmc_data __initdata dk_mmc_data = { 95static struct at91_mmc_data __initdata dk_mmc_data = {
95 .slot_b = 0, 96 .slot_b = 0,
96 .wire4 = 1, 97 .wire4 = 1,
97}; 98};
99#endif
98 100
99static struct spi_board_info dk_spi_devices[] = { 101static struct spi_board_info dk_spi_devices[] = {
100 { /* DataFlash chip */ 102 { /* DataFlash chip */
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 56e92c4bbc2a..9df1be8818c0 100644
--- a/arch/arm/mach-at91/board-ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91/board-ek.c 2 * linux/arch/arm/mach-at91/board-rm9200ek.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -84,12 +84,14 @@ static struct at91_udc_data __initdata ek_udc_data = {
84 .pullup_pin = AT91_PIN_PD5, 84 .pullup_pin = AT91_PIN_PD5,
85}; 85};
86 86
87#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
87static struct at91_mmc_data __initdata ek_mmc_data = { 88static struct at91_mmc_data __initdata ek_mmc_data = {
88 .det_pin = AT91_PIN_PB27, 89 .det_pin = AT91_PIN_PB27,
89 .slot_b = 0, 90 .slot_b = 0,
90 .wire4 = 1, 91 .wire4 = 1,
91 .wp_pin = AT91_PIN_PA17, 92 .wp_pin = AT91_PIN_PA17,
92}; 93};
94#endif
93 95
94static struct spi_board_info ek_spi_devices[] = { 96static struct spi_board_info ek_spi_devices[] = {
95 { /* DataFlash chip */ 97 { /* DataFlash chip */
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 89df00a9d2f7..e0f0080eb639 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -387,7 +387,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
387 * EPSON S1D13806 FB (discontinued chip) 387 * EPSON S1D13806 FB (discontinued chip)
388 * EPSON S1D13506 FB 388 * EPSON S1D13506 FB
389 */ 389 */
390#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) 390#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
391#include <video/s1d13xxxfb.h> 391#include <video/s1d13xxxfb.h>
392 392
393 393
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 58528aa9c8a8..2b499eb343a1 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -137,13 +137,7 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de
137extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); 137extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
138extern void __init at91_set_serial_console(unsigned portnr); 138extern void __init at91_set_serial_console(unsigned portnr);
139 139
140struct at91_uart_config {
141 unsigned short console_tty; /* tty number of serial console */
142 unsigned short nr_tty; /* number of serial tty's */
143 short tty_map[]; /* map UART to tty number */
144};
145extern struct platform_device *atmel_default_console_device; 140extern struct platform_device *atmel_default_console_device;
146extern void __init __deprecated at91_init_serial(struct at91_uart_config *config);
147 141
148struct atmel_uart_data { 142struct atmel_uart_data {
149 short use_dma_tx; /* use transmit DMA? */ 143 short use_dma_tx; /* use transmit DMA? */
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 38088c36936c..78defd71a829 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -369,7 +369,7 @@ static int __init cns3xxx_pcie_init(void)
369{ 369{
370 int i; 370 int i;
371 371
372 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 372 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
373 "imprecise external abort"); 373 "imprecise external abort");
374 374
375 for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { 375 for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 0711d3b620ad..67793a690272 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -37,25 +37,38 @@ config MACH_TTC_DKB
37 Say 'Y' here if you want to support the Marvell PXA910-based 37 Say 'Y' here if you want to support the Marvell PXA910-based
38 TTC_DKB Development Board. 38 TTC_DKB Development Board.
39 39
40config MACH_BROWNSTONE
41 bool "Marvell's Brownstone Development Platform"
42 depends on !CPU_MOHAWK
43 select CPU_MMP2
44 help
45 Say 'Y' here if you want to support the Marvell MMP2-based
46 Brown Development Platform.
47 MMP2-based board can't be co-existed with PXA168-based &
48 PXA910-based development board. Since MMP2 is compatible to
49 ARMv7 architecture.
50
40config MACH_FLINT 51config MACH_FLINT
41 bool "Marvell's Flint Development Platform" 52 bool "Marvell's Flint Development Platform"
53 depends on !CPU_MOHAWK
42 select CPU_MMP2 54 select CPU_MMP2
43 help 55 help
44 Say 'Y' here if you want to support the Marvell MMP2-based 56 Say 'Y' here if you want to support the Marvell MMP2-based
45 Flint Development Platform. 57 Flint Development Platform.
46 MMP2-based board can't be co-existed with PXA168-based & 58 MMP2-based board can't be co-existed with PXA168-based &
47 PXA910-based development board. Since MMP2 is compatible to 59 PXA910-based development board. Since MMP2 is compatible to
48 ARMv6 architecture. 60 ARMv7 architecture.
49 61
50config MACH_MARVELL_JASPER 62config MACH_MARVELL_JASPER
51 bool "Marvell's Jasper Development Platform" 63 bool "Marvell's Jasper Development Platform"
64 depends on !CPU_MOHAWK
52 select CPU_MMP2 65 select CPU_MMP2
53 help 66 help
54 Say 'Y' here if you want to support the Marvell MMP2-base 67 Say 'Y' here if you want to support the Marvell MMP2-base
55 Jasper Development Platform. 68 Jasper Development Platform.
56 MMP2-based board can't be co-existed with PXA168-based & 69 MMP2-based board can't be co-existed with PXA168-based &
57 PXA910-based development board. Since MMP2 is compatible to 70 PXA910-based development board. Since MMP2 is compatible to
58 ARMv6 architecture. 71 ARMv7 architecture.
59 72
60config MACH_TETON_BGA 73config MACH_TETON_BGA
61 bool "Marvell's PXA168 Teton BGA Development Board" 74 bool "Marvell's PXA168 Teton BGA Development Board"
@@ -80,8 +93,7 @@ config CPU_PXA910
80 93
81config CPU_MMP2 94config CPU_MMP2
82 bool 95 bool
83 select CPU_V6 96 select CPU_PJ4
84 select CPU_32v6K
85 help 97 help
86 Select code specific to MMP2. MMP2 is ARMv6 compatible. 98 Select code specific to MMP2. MMP2 is ARMv7 compatible.
87endif 99endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 751cdbf733c8..5c68382141af 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
15obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o 15obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
16obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 16obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o 17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
18obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
18obj-$(CONFIG_MACH_FLINT) += flint.o 19obj-$(CONFIG_MACH_FLINT) += flint.o
19obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o 20obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
20obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o 21obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
new file mode 100644
index 000000000000..7bb78fd5a2a6
--- /dev/null
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -0,0 +1,204 @@
1/*
2 * linux/arch/arm/mach-mmp/brownstone.c
3 *
4 * Support for the Marvell Brownstone Development Platform.
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/gpio.h>
18#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h>
20#include <linux/regulator/fixed.h>
21#include <linux/mfd/max8925.h>
22
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <mach/addr-map.h>
26#include <mach/mfp-mmp2.h>
27#include <mach/mmp2.h>
28#include <mach/irqs.h>
29
30#include "common.h"
31
32#define BROWNSTONE_NR_IRQS (IRQ_BOARD_START + 40)
33
34#define GPIO_5V_ENABLE (89)
35
36static unsigned long brownstone_pin_config[] __initdata = {
37 /* UART1 */
38 GPIO29_UART1_RXD,
39 GPIO30_UART1_TXD,
40
41 /* UART3 */
42 GPIO51_UART3_RXD,
43 GPIO52_UART3_TXD,
44
45 /* DFI */
46 GPIO168_DFI_D0,
47 GPIO167_DFI_D1,
48 GPIO166_DFI_D2,
49 GPIO165_DFI_D3,
50 GPIO107_DFI_D4,
51 GPIO106_DFI_D5,
52 GPIO105_DFI_D6,
53 GPIO104_DFI_D7,
54 GPIO111_DFI_D8,
55 GPIO164_DFI_D9,
56 GPIO163_DFI_D10,
57 GPIO162_DFI_D11,
58 GPIO161_DFI_D12,
59 GPIO110_DFI_D13,
60 GPIO109_DFI_D14,
61 GPIO108_DFI_D15,
62 GPIO143_ND_nCS0,
63 GPIO144_ND_nCS1,
64 GPIO147_ND_nWE,
65 GPIO148_ND_nRE,
66 GPIO150_ND_ALE,
67 GPIO149_ND_CLE,
68 GPIO112_ND_RDY0,
69 GPIO160_ND_RDY1,
70
71 /* PMIC */
72 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
73
74 /* MMC0 */
75 GPIO131_MMC1_DAT3 | MFP_PULL_HIGH,
76 GPIO132_MMC1_DAT2 | MFP_PULL_HIGH,
77 GPIO133_MMC1_DAT1 | MFP_PULL_HIGH,
78 GPIO134_MMC1_DAT0 | MFP_PULL_HIGH,
79 GPIO136_MMC1_CMD | MFP_PULL_HIGH,
80 GPIO139_MMC1_CLK,
81 GPIO140_MMC1_CD | MFP_PULL_LOW,
82 GPIO141_MMC1_WP | MFP_PULL_LOW,
83
84 /* MMC1 */
85 GPIO37_MMC2_DAT3 | MFP_PULL_HIGH,
86 GPIO38_MMC2_DAT2 | MFP_PULL_HIGH,
87 GPIO39_MMC2_DAT1 | MFP_PULL_HIGH,
88 GPIO40_MMC2_DAT0 | MFP_PULL_HIGH,
89 GPIO41_MMC2_CMD | MFP_PULL_HIGH,
90 GPIO42_MMC2_CLK,
91
92 /* MMC2 */
93 GPIO165_MMC3_DAT7 | MFP_PULL_HIGH,
94 GPIO162_MMC3_DAT6 | MFP_PULL_HIGH,
95 GPIO166_MMC3_DAT5 | MFP_PULL_HIGH,
96 GPIO163_MMC3_DAT4 | MFP_PULL_HIGH,
97 GPIO167_MMC3_DAT3 | MFP_PULL_HIGH,
98 GPIO164_MMC3_DAT2 | MFP_PULL_HIGH,
99 GPIO168_MMC3_DAT1 | MFP_PULL_HIGH,
100 GPIO111_MMC3_DAT0 | MFP_PULL_HIGH,
101 GPIO112_MMC3_CMD | MFP_PULL_HIGH,
102 GPIO151_MMC3_CLK,
103
104 /* 5V regulator */
105 GPIO89_GPIO,
106};
107
108static struct regulator_consumer_supply max8649_supply[] = {
109 REGULATOR_SUPPLY("vcc_core", NULL),
110};
111
112static struct regulator_init_data max8649_init_data = {
113 .constraints = {
114 .name = "vcc_core range",
115 .min_uV = 1150000,
116 .max_uV = 1280000,
117 .always_on = 1,
118 .boot_on = 1,
119 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
120 },
121 .num_consumer_supplies = 1,
122 .consumer_supplies = &max8649_supply[0],
123};
124
125static struct max8649_platform_data brownstone_max8649_info = {
126 .mode = 2, /* VID1 = 1, VID0 = 0 */
127 .extclk = 0,
128 .ramp_timing = MAX8649_RAMP_32MV,
129 .regulator = &max8649_init_data,
130};
131
132static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = {
133 REGULATOR_SUPPLY("v_5vp", NULL),
134};
135
136static struct regulator_init_data brownstone_v_5vp_data = {
137 .constraints = {
138 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
139 },
140 .num_consumer_supplies = ARRAY_SIZE(brownstone_v_5vp_supplies),
141 .consumer_supplies = brownstone_v_5vp_supplies,
142};
143
144static struct fixed_voltage_config brownstone_v_5vp = {
145 .supply_name = "v_5vp",
146 .microvolts = 5000000,
147 .gpio = GPIO_5V_ENABLE,
148 .enable_high = 1,
149 .enabled_at_boot = 1,
150 .init_data = &brownstone_v_5vp_data,
151};
152
153static struct platform_device brownstone_v_5vp_device = {
154 .name = "reg-fixed-voltage",
155 .id = 1,
156 .dev = {
157 .platform_data = &brownstone_v_5vp,
158 },
159};
160
161static struct max8925_platform_data brownstone_max8925_info = {
162 .irq_base = IRQ_BOARD_START,
163};
164
165static struct i2c_board_info brownstone_twsi1_info[] = {
166 [0] = {
167 .type = "max8649",
168 .addr = 0x60,
169 .platform_data = &brownstone_max8649_info,
170 },
171 [1] = {
172 .type = "max8925",
173 .addr = 0x3c,
174 .irq = IRQ_MMP2_PMIC,
175 .platform_data = &brownstone_max8925_info,
176 },
177};
178
179static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
180 .max_speed = 25000000,
181};
182
183static void __init brownstone_init(void)
184{
185 mfp_config(ARRAY_AND_SIZE(brownstone_pin_config));
186
187 /* on-chip devices */
188 mmp2_add_uart(1);
189 mmp2_add_uart(3);
190 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
191 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
192
193 /* enable 5v regulator */
194 platform_device_register(&brownstone_v_5vp_device);
195}
196
197MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
198 /* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */
199 .map_io = mmp_map_io,
200 .nr_irqs = BROWNSTONE_NR_IRQS,
201 .init_irq = mmp2_init_irq,
202 .timer = &mmp2_timer,
203 .init_machine = brownstone_init,
204MACHINE_END
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index bdeb6db4d49a..c4fd806b15b4 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -47,7 +47,7 @@ static unsigned long flint_pin_config[] __initdata = {
47 GPIO113_SMC_RDY, 47 GPIO113_SMC_RDY,
48 48
49 /*Ethernet*/ 49 /*Ethernet*/
50 GPIO155_GPIO155, 50 GPIO155_GPIO,
51 51
52 /* DFI */ 52 /* DFI */
53 GPIO168_DFI_D0, 53 GPIO168_DFI_D0,
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 761c2dacc079..117e30366087 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -9,175 +9,175 @@
9#define MFP_DRIVE_FAST (0x8 << 13) 9#define MFP_DRIVE_FAST (0x8 << 13)
10 10
11/* GPIO */ 11/* GPIO */
12#define GPIO0_GPIO0 MFP_CFG(GPIO0, AF0) 12#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
13#define GPIO1_GPIO1 MFP_CFG(GPIO1, AF0) 13#define GPIO1_GPIO MFP_CFG(GPIO1, AF0)
14#define GPIO2_GPIO2 MFP_CFG(GPIO2, AF0) 14#define GPIO2_GPIO MFP_CFG(GPIO2, AF0)
15#define GPIO3_GPIO3 MFP_CFG(GPIO3, AF0) 15#define GPIO3_GPIO MFP_CFG(GPIO3, AF0)
16#define GPIO4_GPIO4 MFP_CFG(GPIO4, AF0) 16#define GPIO4_GPIO MFP_CFG(GPIO4, AF0)
17#define GPIO5_GPIO5 MFP_CFG(GPIO5, AF0) 17#define GPIO5_GPIO MFP_CFG(GPIO5, AF0)
18#define GPIO6_GPIO6 MFP_CFG(GPIO6, AF0) 18#define GPIO6_GPIO MFP_CFG(GPIO6, AF0)
19#define GPIO7_GPIO7 MFP_CFG(GPIO7, AF0) 19#define GPIO7_GPIO MFP_CFG(GPIO7, AF0)
20#define GPIO8_GPIO8 MFP_CFG(GPIO8, AF0) 20#define GPIO8_GPIO MFP_CFG(GPIO8, AF0)
21#define GPIO9_GPIO9 MFP_CFG(GPIO9, AF0) 21#define GPIO9_GPIO MFP_CFG(GPIO9, AF0)
22#define GPIO10_GPIO10 MFP_CFG(GPIO10, AF0) 22#define GPIO10_GPIO MFP_CFG(GPIO10, AF0)
23#define GPIO11_GPIO11 MFP_CFG(GPIO11, AF0) 23#define GPIO11_GPIO MFP_CFG(GPIO11, AF0)
24#define GPIO12_GPIO12 MFP_CFG(GPIO12, AF0) 24#define GPIO12_GPIO MFP_CFG(GPIO12, AF0)
25#define GPIO13_GPIO13 MFP_CFG(GPIO13, AF0) 25#define GPIO13_GPIO MFP_CFG(GPIO13, AF0)
26#define GPIO14_GPIO14 MFP_CFG(GPIO14, AF0) 26#define GPIO14_GPIO MFP_CFG(GPIO14, AF0)
27#define GPIO15_GPIO15 MFP_CFG(GPIO15, AF0) 27#define GPIO15_GPIO MFP_CFG(GPIO15, AF0)
28#define GPIO16_GPIO16 MFP_CFG(GPIO16, AF0) 28#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
29#define GPIO17_GPIO17 MFP_CFG(GPIO17, AF0) 29#define GPIO17_GPIO MFP_CFG(GPIO17, AF0)
30#define GPIO18_GPIO18 MFP_CFG(GPIO18, AF0) 30#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
31#define GPIO19_GPIO19 MFP_CFG(GPIO19, AF0) 31#define GPIO19_GPIO MFP_CFG(GPIO19, AF0)
32#define GPIO20_GPIO20 MFP_CFG(GPIO20, AF0) 32#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
33#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0) 33#define GPIO21_GPIO MFP_CFG(GPIO21, AF0)
34#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0) 34#define GPIO22_GPIO MFP_CFG(GPIO22, AF0)
35#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0) 35#define GPIO23_GPIO MFP_CFG(GPIO23, AF0)
36#define GPIO24_GPIO24 MFP_CFG(GPIO24, AF0) 36#define GPIO24_GPIO MFP_CFG(GPIO24, AF0)
37#define GPIO25_GPIO25 MFP_CFG(GPIO25, AF0) 37#define GPIO25_GPIO MFP_CFG(GPIO25, AF0)
38#define GPIO26_GPIO26 MFP_CFG(GPIO26, AF0) 38#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
39#define GPIO27_GPIO27 MFP_CFG(GPIO27, AF0) 39#define GPIO27_GPIO MFP_CFG(GPIO27, AF0)
40#define GPIO28_GPIO28 MFP_CFG(GPIO28, AF0) 40#define GPIO28_GPIO MFP_CFG(GPIO28, AF0)
41#define GPIO29_GPIO29 MFP_CFG(GPIO29, AF0) 41#define GPIO29_GPIO MFP_CFG(GPIO29, AF0)
42#define GPIO30_GPIO30 MFP_CFG(GPIO30, AF0) 42#define GPIO30_GPIO MFP_CFG(GPIO30, AF0)
43#define GPIO31_GPIO31 MFP_CFG(GPIO31, AF0) 43#define GPIO31_GPIO MFP_CFG(GPIO31, AF0)
44#define GPIO32_GPIO32 MFP_CFG(GPIO32, AF0) 44#define GPIO32_GPIO MFP_CFG(GPIO32, AF0)
45#define GPIO33_GPIO33 MFP_CFG(GPIO33, AF0) 45#define GPIO33_GPIO MFP_CFG(GPIO33, AF0)
46#define GPIO34_GPIO34 MFP_CFG(GPIO34, AF0) 46#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
47#define GPIO35_GPIO35 MFP_CFG(GPIO35, AF0) 47#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
48#define GPIO36_GPIO36 MFP_CFG(GPIO36, AF0) 48#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
49#define GPIO37_GPIO37 MFP_CFG(GPIO37, AF0) 49#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
50#define GPIO38_GPIO38 MFP_CFG(GPIO38, AF0) 50#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
51#define GPIO39_GPIO39 MFP_CFG(GPIO39, AF0) 51#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
52#define GPIO40_GPIO40 MFP_CFG(GPIO40, AF0) 52#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
53#define GPIO41_GPIO41 MFP_CFG(GPIO41, AF0) 53#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
54#define GPIO42_GPIO42 MFP_CFG(GPIO42, AF0) 54#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
55#define GPIO43_GPIO43 MFP_CFG(GPIO43, AF0) 55#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
56#define GPIO44_GPIO44 MFP_CFG(GPIO44, AF0) 56#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
57#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0) 57#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
58#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0) 58#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
59#define GPIO47_GPIO47 MFP_CFG(GPIO47, AF0) 59#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
60#define GPIO48_GPIO48 MFP_CFG(GPIO48, AF0) 60#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
61#define GPIO49_GPIO49 MFP_CFG(GPIO49, AF0) 61#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
62#define GPIO50_GPIO50 MFP_CFG(GPIO50, AF0) 62#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
63#define GPIO51_GPIO51 MFP_CFG(GPIO51, AF0) 63#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
64#define GPIO52_GPIO52 MFP_CFG(GPIO52, AF0) 64#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
65#define GPIO53_GPIO53 MFP_CFG(GPIO53, AF0) 65#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
66#define GPIO54_GPIO54 MFP_CFG(GPIO54, AF0) 66#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
67#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0) 67#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
68#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0) 68#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
69#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0) 69#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
70#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0) 70#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
71#define GPIO59_GPIO59 MFP_CFG(GPIO59, AF0) 71#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
72#define GPIO60_GPIO60 MFP_CFG(GPIO60, AF0) 72#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
73#define GPIO61_GPIO61 MFP_CFG(GPIO61, AF0) 73#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
74#define GPIO62_GPIO62 MFP_CFG(GPIO62, AF0) 74#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
75#define GPIO63_GPIO63 MFP_CFG(GPIO63, AF0) 75#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
76#define GPIO64_GPIO64 MFP_CFG(GPIO64, AF0) 76#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
77#define GPIO65_GPIO65 MFP_CFG(GPIO65, AF0) 77#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
78#define GPIO66_GPIO66 MFP_CFG(GPIO66, AF0) 78#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
79#define GPIO67_GPIO67 MFP_CFG(GPIO67, AF0) 79#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
80#define GPIO68_GPIO68 MFP_CFG(GPIO68, AF0) 80#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
81#define GPIO69_GPIO69 MFP_CFG(GPIO69, AF0) 81#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
82#define GPIO70_GPIO70 MFP_CFG(GPIO70, AF0) 82#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
83#define GPIO71_GPIO71 MFP_CFG(GPIO71, AF0) 83#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
84#define GPIO72_GPIO72 MFP_CFG(GPIO72, AF0) 84#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
85#define GPIO73_GPIO73 MFP_CFG(GPIO73, AF0) 85#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
86#define GPIO74_GPIO74 MFP_CFG(GPIO74, AF0) 86#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
87#define GPIO75_GPIO75 MFP_CFG(GPIO75, AF0) 87#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
88#define GPIO76_GPIO76 MFP_CFG(GPIO76, AF0) 88#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
89#define GPIO77_GPIO77 MFP_CFG(GPIO77, AF0) 89#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
90#define GPIO78_GPIO78 MFP_CFG(GPIO78, AF0) 90#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
91#define GPIO79_GPIO79 MFP_CFG(GPIO79, AF0) 91#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
92#define GPIO80_GPIO80 MFP_CFG(GPIO80, AF0) 92#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
93#define GPIO81_GPIO81 MFP_CFG(GPIO81, AF0) 93#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
94#define GPIO82_GPIO82 MFP_CFG(GPIO82, AF0) 94#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
95#define GPIO83_GPIO83 MFP_CFG(GPIO83, AF0) 95#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
96#define GPIO84_GPIO84 MFP_CFG(GPIO84, AF0) 96#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
97#define GPIO85_GPIO85 MFP_CFG(GPIO85, AF0) 97#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
98#define GPIO86_GPIO86 MFP_CFG(GPIO86, AF0) 98#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
99#define GPIO87_GPIO87 MFP_CFG(GPIO87, AF0) 99#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
100#define GPIO88_GPIO88 MFP_CFG(GPIO88, AF0) 100#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
101#define GPIO89_GPIO89 MFP_CFG(GPIO89, AF0) 101#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
102#define GPIO90_GPIO90 MFP_CFG(GPIO90, AF0) 102#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
103#define GPIO91_GPIO91 MFP_CFG(GPIO91, AF0) 103#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
104#define GPIO92_GPIO92 MFP_CFG(GPIO92, AF0) 104#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
105#define GPIO93_GPIO93 MFP_CFG(GPIO93, AF0) 105#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
106#define GPIO94_GPIO94 MFP_CFG(GPIO94, AF0) 106#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
107#define GPIO95_GPIO95 MFP_CFG(GPIO95, AF0) 107#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
108#define GPIO96_GPIO96 MFP_CFG(GPIO96, AF0) 108#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
109#define GPIO97_GPIO97 MFP_CFG(GPIO97, AF0) 109#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
110#define GPIO98_GPIO98 MFP_CFG(GPIO98, AF0) 110#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
111#define GPIO99_GPIO99 MFP_CFG(GPIO99, AF0) 111#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
112#define GPIO100_GPIO100 MFP_CFG(GPIO100, AF0) 112#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
113#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0) 113#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
114#define GPIO102_GPIO102 MFP_CFG(GPIO102, AF1) 114#define GPIO102_GPIO MFP_CFG(GPIO102, AF1)
115#define GPIO103_GPIO103 MFP_CFG(GPIO103, AF1) 115#define GPIO103_GPIO MFP_CFG(GPIO103, AF1)
116#define GPIO104_GPIO104 MFP_CFG(GPIO104, AF1) 116#define GPIO104_GPIO MFP_CFG(GPIO104, AF1)
117#define GPIO105_GPIO105 MFP_CFG(GPIO105, AF1) 117#define GPIO105_GPIO MFP_CFG(GPIO105, AF1)
118#define GPIO106_GPIO106 MFP_CFG(GPIO106, AF1) 118#define GPIO106_GPIO MFP_CFG(GPIO106, AF1)
119#define GPIO107_GPIO107 MFP_CFG(GPIO107, AF1) 119#define GPIO107_GPIO MFP_CFG(GPIO107, AF1)
120#define GPIO108_GPIO108 MFP_CFG(GPIO108, AF1) 120#define GPIO108_GPIO MFP_CFG(GPIO108, AF1)
121#define GPIO109_GPIO109 MFP_CFG(GPIO109, AF1) 121#define GPIO109_GPIO MFP_CFG(GPIO109, AF1)
122#define GPIO110_GPIO110 MFP_CFG(GPIO110, AF1) 122#define GPIO110_GPIO MFP_CFG(GPIO110, AF1)
123#define GPIO111_GPIO111 MFP_CFG(GPIO111, AF1) 123#define GPIO111_GPIO MFP_CFG(GPIO111, AF1)
124#define GPIO112_GPIO112 MFP_CFG(GPIO112, AF1) 124#define GPIO112_GPIO MFP_CFG(GPIO112, AF1)
125#define GPIO113_GPIO113 MFP_CFG(GPIO113, AF1) 125#define GPIO113_GPIO MFP_CFG(GPIO113, AF1)
126#define GPIO114_GPIO114 MFP_CFG(GPIO114, AF0) 126#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
127#define GPIO115_GPIO115 MFP_CFG(GPIO115, AF0) 127#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
128#define GPIO116_GPIO116 MFP_CFG(GPIO116, AF0) 128#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
129#define GPIO117_GPIO117 MFP_CFG(GPIO117, AF0) 129#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
130#define GPIO118_GPIO118 MFP_CFG(GPIO118, AF0) 130#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
131#define GPIO119_GPIO119 MFP_CFG(GPIO119, AF0) 131#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
132#define GPIO120_GPIO120 MFP_CFG(GPIO120, AF0) 132#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
133#define GPIO121_GPIO121 MFP_CFG(GPIO121, AF0) 133#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
134#define GPIO122_GPIO122 MFP_CFG(GPIO122, AF0) 134#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
135#define GPIO123_GPIO123 MFP_CFG(GPIO123, AF0) 135#define GPIO123_GPIO MFP_CFG(GPIO123, AF0)
136#define GPIO124_GPIO124 MFP_CFG(GPIO124, AF0) 136#define GPIO124_GPIO MFP_CFG(GPIO124, AF0)
137#define GPIO125_GPIO125 MFP_CFG(GPIO125, AF0) 137#define GPIO125_GPIO MFP_CFG(GPIO125, AF0)
138#define GPIO126_GPIO126 MFP_CFG(GPIO126, AF0) 138#define GPIO126_GPIO MFP_CFG(GPIO126, AF0)
139#define GPIO127_GPIO127 MFP_CFG(GPIO127, AF0) 139#define GPIO127_GPIO MFP_CFG(GPIO127, AF0)
140#define GPIO128_GPIO128 MFP_CFG(GPIO128, AF0) 140#define GPIO128_GPIO MFP_CFG(GPIO128, AF0)
141#define GPIO129_GPIO129 MFP_CFG(GPIO129, AF0) 141#define GPIO129_GPIO MFP_CFG(GPIO129, AF0)
142#define GPIO130_GPIO130 MFP_CFG(GPIO130, AF0) 142#define GPIO130_GPIO MFP_CFG(GPIO130, AF0)
143#define GPIO131_GPIO131 MFP_CFG(GPIO131, AF0) 143#define GPIO131_GPIO MFP_CFG(GPIO131, AF0)
144#define GPIO132_GPIO132 MFP_CFG(GPIO132, AF0) 144#define GPIO132_GPIO MFP_CFG(GPIO132, AF0)
145#define GPIO133_GPIO133 MFP_CFG(GPIO133, AF0) 145#define GPIO133_GPIO MFP_CFG(GPIO133, AF0)
146#define GPIO134_GPIO134 MFP_CFG(GPIO134, AF0) 146#define GPIO134_GPIO MFP_CFG(GPIO134, AF0)
147#define GPIO135_GPIO135 MFP_CFG(GPIO135, AF0) 147#define GPIO135_GPIO MFP_CFG(GPIO135, AF0)
148#define GPIO136_GPIO136 MFP_CFG(GPIO136, AF0) 148#define GPIO136_GPIO MFP_CFG(GPIO136, AF0)
149#define GPIO137_GPIO137 MFP_CFG(GPIO137, AF0) 149#define GPIO137_GPIO MFP_CFG(GPIO137, AF0)
150#define GPIO138_GPIO138 MFP_CFG(GPIO138, AF0) 150#define GPIO138_GPIO MFP_CFG(GPIO138, AF0)
151#define GPIO139_GPIO139 MFP_CFG(GPIO139, AF0) 151#define GPIO139_GPIO MFP_CFG(GPIO139, AF0)
152#define GPIO140_GPIO140 MFP_CFG(GPIO140, AF0) 152#define GPIO140_GPIO MFP_CFG(GPIO140, AF0)
153#define GPIO141_GPIO141 MFP_CFG(GPIO141, AF0) 153#define GPIO141_GPIO MFP_CFG(GPIO141, AF0)
154#define GPIO142_GPIO142 MFP_CFG(GPIO142, AF1) 154#define GPIO142_GPIO MFP_CFG(GPIO142, AF1)
155#define GPIO143_GPIO143 MFP_CFG(GPIO143, AF1) 155#define GPIO143_GPIO MFP_CFG(GPIO143, AF1)
156#define GPIO144_GPIO144 MFP_CFG(GPIO144, AF1) 156#define GPIO144_GPIO MFP_CFG(GPIO144, AF1)
157#define GPIO145_GPIO145 MFP_CFG(GPIO145, AF1) 157#define GPIO145_GPIO MFP_CFG(GPIO145, AF1)
158#define GPIO146_GPIO146 MFP_CFG(GPIO146, AF1) 158#define GPIO146_GPIO MFP_CFG(GPIO146, AF1)
159#define GPIO147_GPIO147 MFP_CFG(GPIO147, AF1) 159#define GPIO147_GPIO MFP_CFG(GPIO147, AF1)
160#define GPIO148_GPIO148 MFP_CFG(GPIO148, AF1) 160#define GPIO148_GPIO MFP_CFG(GPIO148, AF1)
161#define GPIO149_GPIO149 MFP_CFG(GPIO149, AF1) 161#define GPIO149_GPIO MFP_CFG(GPIO149, AF1)
162#define GPIO150_GPIO150 MFP_CFG(GPIO150, AF1) 162#define GPIO150_GPIO MFP_CFG(GPIO150, AF1)
163#define GPIO151_GPIO151 MFP_CFG(GPIO151, AF1) 163#define GPIO151_GPIO MFP_CFG(GPIO151, AF1)
164#define GPIO152_GPIO152 MFP_CFG(GPIO152, AF1) 164#define GPIO152_GPIO MFP_CFG(GPIO152, AF1)
165#define GPIO153_GPIO153 MFP_CFG(GPIO153, AF1) 165#define GPIO153_GPIO MFP_CFG(GPIO153, AF1)
166#define GPIO154_GPIO154 MFP_CFG(GPIO154, AF1) 166#define GPIO154_GPIO MFP_CFG(GPIO154, AF1)
167#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1) 167#define GPIO155_GPIO MFP_CFG(GPIO155, AF1)
168#define GPIO156_GPIO156 MFP_CFG(GPIO156, AF1) 168#define GPIO156_GPIO MFP_CFG(GPIO156, AF1)
169#define GPIO157_GPIO157 MFP_CFG(GPIO157, AF1) 169#define GPIO157_GPIO MFP_CFG(GPIO157, AF1)
170#define GPIO158_GPIO158 MFP_CFG(GPIO158, AF1) 170#define GPIO158_GPIO MFP_CFG(GPIO158, AF1)
171#define GPIO159_GPIO159 MFP_CFG(GPIO159, AF1) 171#define GPIO159_GPIO MFP_CFG(GPIO159, AF1)
172#define GPIO160_GPIO160 MFP_CFG(GPIO160, AF1) 172#define GPIO160_GPIO MFP_CFG(GPIO160, AF1)
173#define GPIO161_GPIO161 MFP_CFG(GPIO161, AF1) 173#define GPIO161_GPIO MFP_CFG(GPIO161, AF1)
174#define GPIO162_GPIO162 MFP_CFG(GPIO162, AF1) 174#define GPIO162_GPIO MFP_CFG(GPIO162, AF1)
175#define GPIO163_GPIO163 MFP_CFG(GPIO163, AF1) 175#define GPIO163_GPIO MFP_CFG(GPIO163, AF1)
176#define GPIO164_GPIO164 MFP_CFG(GPIO164, AF1) 176#define GPIO164_GPIO MFP_CFG(GPIO164, AF1)
177#define GPIO165_GPIO165 MFP_CFG(GPIO165, AF1) 177#define GPIO165_GPIO MFP_CFG(GPIO165, AF1)
178#define GPIO166_GPIO166 MFP_CFG(GPIO166, AF1) 178#define GPIO166_GPIO MFP_CFG(GPIO166, AF1)
179#define GPIO167_GPIO167 MFP_CFG(GPIO167, AF1) 179#define GPIO167_GPIO MFP_CFG(GPIO167, AF1)
180#define GPIO168_GPIO168 MFP_CFG(GPIO168, AF1) 180#define GPIO168_GPIO MFP_CFG(GPIO168, AF1)
181 181
182/* DFI */ 182/* DFI */
183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) 183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index dbba6e8a60c4..4aec493640b4 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_MMP2_H 1#ifndef __ASM_MACH_MMP2_H
2#define __ASM_MACH_MMP2_H 2#define __ASM_MACH_MMP2_H
3 3
4#include <plat/sdhci.h>
5
4struct sys_timer; 6struct sys_timer;
5 7
6extern struct sys_timer mmp2_timer; 8extern struct sys_timer mmp2_timer;
@@ -22,6 +24,10 @@ extern struct pxa_device_desc mmp2_device_twsi3;
22extern struct pxa_device_desc mmp2_device_twsi4; 24extern struct pxa_device_desc mmp2_device_twsi4;
23extern struct pxa_device_desc mmp2_device_twsi5; 25extern struct pxa_device_desc mmp2_device_twsi5;
24extern struct pxa_device_desc mmp2_device_twsi6; 26extern struct pxa_device_desc mmp2_device_twsi6;
27extern struct pxa_device_desc mmp2_device_sdh0;
28extern struct pxa_device_desc mmp2_device_sdh1;
29extern struct pxa_device_desc mmp2_device_sdh2;
30extern struct pxa_device_desc mmp2_device_sdh3;
25 31
26static inline int mmp2_add_uart(int id) 32static inline int mmp2_add_uart(int id)
27{ 33{
@@ -63,5 +69,21 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
63 return pxa_register_device(d, data, sizeof(*data)); 69 return pxa_register_device(d, data, sizeof(*data));
64} 70}
65 71
72static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
73{
74 struct pxa_device_desc *d = NULL;
75
76 switch (id) {
77 case 0: d = &mmp2_device_sdh0; break;
78 case 1: d = &mmp2_device_sdh1; break;
79 case 2: d = &mmp2_device_sdh2; break;
80 case 3: d = &mmp2_device_sdh3; break;
81 default:
82 return -EINVAL;
83 }
84
85 return pxa_register_device(d, data, sizeof(*data));
86}
87
66#endif /* __ASM_MACH_MMP2_H */ 88#endif /* __ASM_MACH_MMP2_H */
67 89
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index ac4702357a6e..f7011ef70bf5 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -27,6 +27,8 @@
27#define APMU_DMA APMU_REG(0x064) 27#define APMU_DMA APMU_REG(0x064)
28#define APMU_GEU APMU_REG(0x068) 28#define APMU_GEU APMU_REG(0x068)
29#define APMU_BUS APMU_REG(0x06c) 29#define APMU_BUS APMU_REG(0x06c)
30#define APMU_SDH2 APMU_REG(0x0e8)
31#define APMU_SDH3 APMU_REG(0x0ec)
30 32
31#define APMU_FNCLK_EN (1 << 4) 33#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3) 34#define APMU_AXICLK_EN (1 << 3)
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 2a684fa50773..24172a0aad59 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -67,6 +67,36 @@ static unsigned long jasper_pin_config[] __initdata = {
67 67
68 /* PMIC */ 68 /* PMIC */
69 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL, 69 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
70
71 /* MMC1 */
72 GPIO131_MMC1_DAT3,
73 GPIO132_MMC1_DAT2,
74 GPIO133_MMC1_DAT1,
75 GPIO134_MMC1_DAT0,
76 GPIO136_MMC1_CMD,
77 GPIO139_MMC1_CLK,
78 GPIO140_MMC1_CD,
79 GPIO141_MMC1_WP,
80
81 /* MMC2 */
82 GPIO37_MMC2_DAT3,
83 GPIO38_MMC2_DAT2,
84 GPIO39_MMC2_DAT1,
85 GPIO40_MMC2_DAT0,
86 GPIO41_MMC2_CMD,
87 GPIO42_MMC2_CLK,
88
89 /* MMC3 */
90 GPIO165_MMC3_DAT7,
91 GPIO162_MMC3_DAT6,
92 GPIO166_MMC3_DAT5,
93 GPIO163_MMC3_DAT4,
94 GPIO167_MMC3_DAT3,
95 GPIO164_MMC3_DAT2,
96 GPIO168_MMC3_DAT1,
97 GPIO111_MMC3_DAT0,
98 GPIO112_MMC3_CMD,
99 GPIO151_MMC3_CLK,
70}; 100};
71 101
72static struct regulator_consumer_supply max8649_supply[] = { 102static struct regulator_consumer_supply max8649_supply[] = {
@@ -123,6 +153,10 @@ static struct i2c_board_info jasper_twsi1_info[] = {
123 }, 153 },
124}; 154};
125 155
156static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
157 .max_speed = 25000000,
158};
159
126static void __init jasper_init(void) 160static void __init jasper_init(void)
127{ 161{
128 mfp_config(ARRAY_AND_SIZE(jasper_pin_config)); 162 mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
@@ -131,6 +165,7 @@ static void __init jasper_init(void)
131 mmp2_add_uart(1); 165 mmp2_add_uart(1);
132 mmp2_add_uart(3); 166 mmp2_add_uart(3);
133 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info)); 167 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
168 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
134 169
135 regulator_has_full_constraints(); 170 regulator_has_full_constraints();
136} 171}
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index daf3993349f8..8e6c3ac7f7c1 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -115,6 +115,29 @@ void __init mmp2_init_irq(void)
115 mmp2_init_gpio(); 115 mmp2_init_gpio();
116} 116}
117 117
118static void sdhc_clk_enable(struct clk *clk)
119{
120 uint32_t clk_rst;
121
122 clk_rst = __raw_readl(clk->clk_rst);
123 clk_rst |= clk->enable_val;
124 __raw_writel(clk_rst, clk->clk_rst);
125}
126
127static void sdhc_clk_disable(struct clk *clk)
128{
129 uint32_t clk_rst;
130
131 clk_rst = __raw_readl(clk->clk_rst);
132 clk_rst &= ~clk->enable_val;
133 __raw_writel(clk_rst, clk->clk_rst);
134}
135
136struct clkops sdhc_clk_ops = {
137 .enable = sdhc_clk_enable,
138 .disable = sdhc_clk_disable,
139};
140
118/* APB peripheral clocks */ 141/* APB peripheral clocks */
119static APBC_CLK(uart1, MMP2_UART1, 1, 26000000); 142static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
120static APBC_CLK(uart2, MMP2_UART2, 1, 26000000); 143static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
@@ -126,9 +149,12 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
126static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 149static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
127static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 150static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
128static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
129static APBC_CLK(rtc, MMP2_RTC, 0, 32768);
130 152
131static APMU_CLK(nand, NAND, 0xbf, 100000000); 153static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
155static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
156static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
157static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
132 158
133static struct clk_lookup mmp2_clkregs[] = { 159static struct clk_lookup mmp2_clkregs[] = {
134 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 160 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@@ -142,6 +168,10 @@ static struct clk_lookup mmp2_clkregs[] = {
142 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
143 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
144 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxa.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxa.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxa.2", "PXA-SDHCLK"),
174 INIT_CLKREG(&clk_sdh3, "sdhci-pxa.3", "PXA-SDHCLK"),
145}; 175};
146 176
147static int __init mmp2_init(void) 177static int __init mmp2_init(void)
@@ -192,4 +222,8 @@ MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
192MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); 222MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
193MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); 223MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
194MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); 224MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
225MMP2_DEVICE(sdh0, "sdhci-pxa", 0, MMC, 0xd4280000, 0x120);
226MMP2_DEVICE(sdh1, "sdhci-pxa", 1, MMC2, 0xd4280800, 0x120);
227MMP2_DEVICE(sdh2, "sdhci-pxa", 2, MMC3, 0xd4281000, 0x120);
228MMP2_DEVICE(sdh3, "sdhci-pxa", 3, MMC4, 0xd4281800, 0x120);
195 229
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 46f2d69bef3c..8f92ccd26edf 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -111,6 +111,7 @@ static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
112 112
113static APMU_CLK(nand, NAND, 0x01db, 208000000); 113static APMU_CLK(nand, NAND, 0x01db, 208000000);
114static APMU_CLK(u2o, USB, 0x1b, 480000000);
114 115
115/* device and clock bindings */ 116/* device and clock bindings */
116static struct clk_lookup pxa910_clkregs[] = { 117static struct clk_lookup pxa910_clkregs[] = {
@@ -123,6 +124,7 @@ static struct clk_lookup pxa910_clkregs[] = {
123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 124 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 125 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 126 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
127 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
126}; 128};
127 129
128static int __init pxa910_init(void) 130static int __init pxa910_init(void)
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 86c9b2102952..9db9203667df 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -216,7 +216,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
216 { 216 {
217 .name = "wl1271", 217 .name = "wl1271",
218 .mmc = 3, 218 .mmc = 3,
219 .caps = MMC_CAP_4_BIT_DATA, 219 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
220 .gpio_wp = -EINVAL, 220 .gpio_wp = -EINVAL,
221 .gpio_cd = -EINVAL, 221 .gpio_cd = -EINVAL,
222 .nonremovable = true, 222 .nonremovable = true,
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 40562ddd3ee4..a1939b1e6f82 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -297,7 +297,7 @@ static int __init _omap2_init_reprogram_sdrc(void)
297 return 0; 297 return 0;
298 298
299 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); 299 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
300 if (!dpll3_m2_ck) 300 if (IS_ERR(dpll3_m2_ck))
301 return -EINVAL; 301 return -EINVAL;
302 302
303 rate = clk_get_rate(dpll3_m2_ck); 303 rate = clk_get_rate(dpll3_m2_ck);
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 5e81517a7af2..a8afb610c7d8 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -161,6 +161,23 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
161 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); 161 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
162} 162}
163 163
164void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
165{
166 u32 tick_rate, cycles;
167
168 if (!seconds && !milliseconds)
169 return;
170
171 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
172 cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
173 omap_dm_timer_stop(gptimer_wakeup);
174 omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
175
176 pr_info("PM: Resume timer in %u.%03u secs"
177 " (%d ticks at %d ticks/sec.)\n",
178 seconds, milliseconds, cycles, tick_rate);
179}
180
164#ifdef CONFIG_DEBUG_FS 181#ifdef CONFIG_DEBUG_FS
165#include <linux/debugfs.h> 182#include <linux/debugfs.h>
166#include <linux/seq_file.h> 183#include <linux/seq_file.h>
@@ -354,23 +371,6 @@ void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
354 pwrdm->timer = t; 371 pwrdm->timer = t;
355} 372}
356 373
357void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
358{
359 u32 tick_rate, cycles;
360
361 if (!seconds && !milliseconds)
362 return;
363
364 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
365 cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
366 omap_dm_timer_stop(gptimer_wakeup);
367 omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
368
369 pr_info("PM: Resume timer in %u.%03u secs"
370 " (%d ticks at %d ticks/sec.)\n",
371 seconds, milliseconds, cycles, tick_rate);
372}
373
374static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) 374static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
375{ 375{
376 struct seq_file *s = (struct seq_file *)user; 376 struct seq_file *s = (struct seq_file *)user;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index c85923e56b85..aaeea49b9bdd 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -53,6 +53,19 @@
53#include <plat/powerdomain.h> 53#include <plat/powerdomain.h>
54#include <plat/clockdomain.h> 54#include <plat/clockdomain.h>
55 55
56#ifdef CONFIG_SUSPEND
57static suspend_state_t suspend_state = PM_SUSPEND_ON;
58static inline bool is_suspending(void)
59{
60 return (suspend_state != PM_SUSPEND_ON);
61}
62#else
63static inline bool is_suspending(void)
64{
65 return false;
66}
67#endif
68
56static void (*omap2_sram_idle)(void); 69static void (*omap2_sram_idle)(void);
57static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, 70static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
58 void __iomem *sdrc_power); 71 void __iomem *sdrc_power);
@@ -120,8 +133,9 @@ static void omap2_enter_full_retention(void)
120 goto no_sleep; 133 goto no_sleep;
121 134
122 /* Block console output in case it is on one of the OMAP UARTs */ 135 /* Block console output in case it is on one of the OMAP UARTs */
123 if (try_acquire_console_sem()) 136 if (!is_suspending())
124 goto no_sleep; 137 if (try_acquire_console_sem())
138 goto no_sleep;
125 139
126 omap_uart_prepare_idle(0); 140 omap_uart_prepare_idle(0);
127 omap_uart_prepare_idle(1); 141 omap_uart_prepare_idle(1);
@@ -136,7 +150,8 @@ static void omap2_enter_full_retention(void)
136 omap_uart_resume_idle(1); 150 omap_uart_resume_idle(1);
137 omap_uart_resume_idle(0); 151 omap_uart_resume_idle(0);
138 152
139 release_console_sem(); 153 if (!is_suspending())
154 release_console_sem();
140 155
141no_sleep: 156no_sleep:
142 if (omap2_pm_debug) { 157 if (omap2_pm_debug) {
@@ -284,6 +299,12 @@ out:
284 local_irq_enable(); 299 local_irq_enable();
285} 300}
286 301
302static int omap2_pm_begin(suspend_state_t state)
303{
304 suspend_state = state;
305 return 0;
306}
307
287static int omap2_pm_prepare(void) 308static int omap2_pm_prepare(void)
288{ 309{
289 /* We cannot sleep in idle until we have resumed */ 310 /* We cannot sleep in idle until we have resumed */
@@ -333,10 +354,17 @@ static void omap2_pm_finish(void)
333 enable_hlt(); 354 enable_hlt();
334} 355}
335 356
357static void omap2_pm_end(void)
358{
359 suspend_state = PM_SUSPEND_ON;
360}
361
336static struct platform_suspend_ops omap_pm_ops = { 362static struct platform_suspend_ops omap_pm_ops = {
363 .begin = omap2_pm_begin,
337 .prepare = omap2_pm_prepare, 364 .prepare = omap2_pm_prepare,
338 .enter = omap2_pm_enter, 365 .enter = omap2_pm_enter,
339 .finish = omap2_pm_finish, 366 .finish = omap2_pm_finish,
367 .end = omap2_pm_end,
340 .valid = suspend_valid_only_mem, 368 .valid = suspend_valid_only_mem,
341}; 369};
342 370
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ec8a04b7473..648b8c50d024 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -50,6 +50,19 @@
50#include "sdrc.h" 50#include "sdrc.h"
51#include "control.h" 51#include "control.h"
52 52
53#ifdef CONFIG_SUSPEND
54static suspend_state_t suspend_state = PM_SUSPEND_ON;
55static inline bool is_suspending(void)
56{
57 return (suspend_state != PM_SUSPEND_ON);
58}
59#else
60static inline bool is_suspending(void)
61{
62 return false;
63}
64#endif
65
53/* Scratchpad offsets */ 66/* Scratchpad offsets */
54#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4 67#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
55#define OMAP343X_TABLE_VALUE_OFFSET 0xc0 68#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
@@ -387,10 +400,11 @@ void omap_sram_idle(void)
387 } 400 }
388 401
389 /* Block console output in case it is on one of the OMAP UARTs */ 402 /* Block console output in case it is on one of the OMAP UARTs */
390 if (per_next_state < PWRDM_POWER_ON || 403 if (!is_suspending())
391 core_next_state < PWRDM_POWER_ON) 404 if (per_next_state < PWRDM_POWER_ON ||
392 if (try_acquire_console_sem()) 405 core_next_state < PWRDM_POWER_ON)
393 goto console_still_active; 406 if (try_acquire_console_sem())
407 goto console_still_active;
394 408
395 /* PER */ 409 /* PER */
396 if (per_next_state < PWRDM_POWER_ON) { 410 if (per_next_state < PWRDM_POWER_ON) {
@@ -470,7 +484,8 @@ void omap_sram_idle(void)
470 omap_uart_resume_idle(3); 484 omap_uart_resume_idle(3);
471 } 485 }
472 486
473 release_console_sem(); 487 if (!is_suspending())
488 release_console_sem();
474 489
475console_still_active: 490console_still_active:
476 /* Disable IO-PAD and IO-CHAIN wakeup */ 491 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -514,8 +529,6 @@ out:
514} 529}
515 530
516#ifdef CONFIG_SUSPEND 531#ifdef CONFIG_SUSPEND
517static suspend_state_t suspend_state;
518
519static int omap3_pm_prepare(void) 532static int omap3_pm_prepare(void)
520{ 533{
521 disable_hlt(); 534 disable_hlt();
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 298a22a754e2..f81acee4738d 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -243,13 +243,14 @@
243#define OMAP24XX_EN_GPT1_MASK (1 << 0) 243#define OMAP24XX_EN_GPT1_MASK (1 << 0)
244 244
245/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ 245/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
246#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2) 246#define OMAP24XX_ST_GPIOS_SHIFT 2
247#define OMAP24XX_ST_GPIOS_MASK 2 247#define OMAP24XX_ST_GPIOS_MASK (1 << 2)
248#define OMAP24XX_ST_GPT1_SHIFT (1 << 0) 248#define OMAP24XX_ST_GPT1_SHIFT 0
249#define OMAP24XX_ST_GPT1_MASK 0 249#define OMAP24XX_ST_GPT1_MASK (1 << 0)
250 250
251/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ 251/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
252#define OMAP2430_ST_MDM_SHIFT (1 << 0) 252#define OMAP2430_ST_MDM_SHIFT 0
253#define OMAP2430_ST_MDM_MASK (1 << 0)
253 254
254 255
255/* 3430 register bits shared between CM & PRM registers */ 256/* 3430 register bits shared between CM & PRM registers */
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index dd235ecc9d6c..1df6db6a136e 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -50,6 +50,10 @@ config MACH_SAAR
50 select PXA3xx 50 select PXA3xx
51 select CPU_PXA930 51 select CPU_PXA930
52 52
53config MACH_SAARB
54 bool "PXA955 Handheld Platform (aka SAARB)"
55 select CPU_PXA955
56
53comment "Third Party Dev Platforms (sorted by vendor name)" 57comment "Third Party Dev Platforms (sorted by vendor name)"
54 58
55config ARCH_PXA_IDP 59config ARCH_PXA_IDP
@@ -232,10 +236,6 @@ config MACH_COLIBRI
232 bool "Toradex Colibri PXA270" 236 bool "Toradex Colibri PXA270"
233 select PXA27x 237 select PXA27x
234 238
235config MACH_COLIBRI_PXA270_EVALBOARD
236 bool "Toradex Colibri Evaluation Carrier Board support (PXA270)"
237 depends on MACH_COLIBRI
238
239config MACH_COLIBRI_PXA270_INCOME 239config MACH_COLIBRI_PXA270_INCOME
240 bool "Income s.r.o. PXA270 SBC" 240 bool "Income s.r.o. PXA270 SBC"
241 depends on MACH_COLIBRI 241 depends on MACH_COLIBRI
@@ -253,6 +253,10 @@ config MACH_COLIBRI320
253 select PXA3xx 253 select PXA3xx
254 select CPU_PXA320 254 select CPU_PXA320
255 255
256config MACH_COLIBRI_EVALBOARD
257 bool "Toradex Colibri Evaluation Carrier Board support"
258 depends on MACH_COLIBRI || MACH_COLIBRI300 || MACH_COLIBRI320
259
256config MACH_VPAC270 260config MACH_VPAC270
257 bool "Voipac PXA270" 261 bool "Voipac PXA270"
258 select PXA27x 262 select PXA27x
@@ -651,11 +655,17 @@ config CPU_PXA935
651 help 655 help
652 PXA935 (codename Tavor-P65) 656 PXA935 (codename Tavor-P65)
653 657
654config CPU_PXA950 658config PXA95x
655 bool 659 bool
656 select CPU_PXA930 660 select CPU_PJ4
661 help
662 Select code specific to PXA95x variants
663
664config CPU_PXA955
665 bool
666 select PXA95x
657 help 667 help
658 PXA950 (codename Tavor-PV2) 668 PXA950 (codename MG1)
659 669
660config PXA_SHARP_C7xx 670config PXA_SHARP_C7xx
661 bool 671 bool
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index e2f89c2c6f49..cc39d17b2e07 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -16,9 +16,10 @@ endif
16# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
17 17
18# SoC-specific code 18# SoC-specific code
19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o 20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o 21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
22obj-$(CONFIG_CPU_PXA300) += pxa300.o 23obj-$(CONFIG_CPU_PXA300) += pxa300.o
23obj-$(CONFIG_CPU_PXA320) += pxa320.o 24obj-$(CONFIG_CPU_PXA320) += pxa320.o
24obj-$(CONFIG_CPU_PXA930) += pxa930.o 25obj-$(CONFIG_CPU_PXA930) += pxa930.o
@@ -34,6 +35,7 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o
34obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 35obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
35obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o 36obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o
36obj-$(CONFIG_MACH_SAAR) += saar.o 37obj-$(CONFIG_MACH_SAAR) += saar.o
38obj-$(CONFIG_MACH_SAARB) += saarb.o
37 39
38# 3rd Party Dev Platforms 40# 3rd Party Dev Platforms
39obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 41obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
@@ -60,7 +62,7 @@ obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
60obj-$(CONFIG_MACH_PCM027) += pcm027.o 62obj-$(CONFIG_MACH_PCM027) += pcm027.o
61obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 63obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
62obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o 64obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
63obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o 65obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o
64obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o 66obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
65obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o 67obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
66obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o 68obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 21e188901935..ccb2d0cebcc3 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -567,27 +567,29 @@ static inline void balloon3_i2c_init(void) {}
567 * NAND 567 * NAND
568 ******************************************************************************/ 568 ******************************************************************************/
569#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE) 569#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
570static uint16_t balloon3_ctl =
571 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
572 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
573 BALLOON3_NAND_CONTROL_FLWP;
574
575static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 570static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
576{ 571{
577 struct nand_chip *this = mtd->priv; 572 struct nand_chip *this = mtd->priv;
573 uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
578 574
579 if (ctrl & NAND_CTRL_CHANGE) { 575 if (ctrl & NAND_CTRL_CHANGE) {
580 if (ctrl & NAND_CLE) 576 if (ctrl & NAND_CLE)
581 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE; 577 balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE;
582 else 578 else
583 balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE; 579 balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE;
584 580
585 if (ctrl & NAND_ALE) 581 if (ctrl & NAND_ALE)
586 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE; 582 balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE;
587 else 583 else
588 balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE; 584 balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE;
589 585
590 __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 586 if (balloon3_ctl_clr)
587 __raw_writel(balloon3_ctl_clr,
588 BALLOON3_NAND_CONTROL_REG);
589 if (balloon3_ctl_set)
590 __raw_writel(balloon3_ctl_set,
591 BALLOON3_NAND_CONTROL_REG |
592 BALLOON3_FPGA_SETnCLR);
591 } 593 }
592 594
593 if (cmd != NAND_CMD_NONE) 595 if (cmd != NAND_CMD_NONE)
@@ -599,28 +601,33 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
599 if (chip < 0 || chip > 3) 601 if (chip < 0 || chip > 3)
600 return; 602 return;
601 603
602 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 | 604 /* Assert all nCE lines */
603 BALLOON3_NAND_CONTROL_FLCE1 | 605 __raw_writew(
604 BALLOON3_NAND_CONTROL_FLCE2 | 606 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
605 BALLOON3_NAND_CONTROL_FLCE3; 607 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
608 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
606 609
607 /* Deassert correct nCE line */ 610 /* Deassert correct nCE line */
608 balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip); 611 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
612 BALLOON3_NAND_CONTROL_REG);
613}
609 614
610 __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 615static int balloon3_nand_dev_ready(struct mtd_info *mtd)
616{
617 return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
611} 618}
612 619
613static int balloon3_nand_probe(struct platform_device *pdev) 620static int balloon3_nand_probe(struct platform_device *pdev)
614{ 621{
615 void __iomem *temp_map;
616 uint16_t ver; 622 uint16_t ver;
617 int ret; 623 int ret;
618 624
619 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG); 625 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
626 BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR);
620 627
621 ver = __raw_readw(BALLOON3_FPGA_VER); 628 ver = __raw_readw(BALLOON3_FPGA_VER);
622 if (ver > 0x0201) 629 if (ver < 0x4f08)
623 pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. " 630 pr_warn("The FPGA code, version 0x%04x, is too old. "
624 "NAND support might be broken in this version!", ver); 631 "NAND support might be broken in this version!", ver);
625 632
626 /* Power up the NAND chips */ 633 /* Power up the NAND chips */
@@ -635,7 +642,11 @@ static int balloon3_nand_probe(struct platform_device *pdev)
635 gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1); 642 gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
636 643
637 /* Deassert all nCE lines and write protect line */ 644 /* Deassert all nCE lines and write protect line */
638 __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 645 __raw_writel(
646 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
647 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
648 BALLOON3_NAND_CONTROL_FLWP,
649 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
639 return 0; 650 return 0;
640 651
641err2: 652err2:
@@ -677,7 +688,7 @@ struct platform_nand_data balloon3_nand_pdata = {
677 }, 688 },
678 .ctrl = { 689 .ctrl = {
679 .hwcontrol = 0, 690 .hwcontrol = 0,
680 .dev_ready = 0, 691 .dev_ready = balloon3_nand_dev_ready,
681 .select_chip = balloon3_nand_select_chip, 692 .select_chip = balloon3_nand_select_chip,
682 .cmd_ctrl = balloon3_nand_cmd_ctl, 693 .cmd_ctrl = balloon3_nand_cmd_ctl,
683 .probe = balloon3_nand_probe, 694 .probe = balloon3_nand_probe,
@@ -802,7 +813,7 @@ static struct map_desc balloon3_io_desc[] __initdata = {
802 813
803static void __init balloon3_map_io(void) 814static void __init balloon3_map_io(void)
804{ 815{
805 pxa_map_io(); 816 pxa27x_map_io();
806 iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc)); 817 iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
807} 818}
808 819
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4bd7a3cda48c..4284513f396a 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -149,7 +149,7 @@ static void __init capc7117_init(void)
149MACHINE_START(CAPC7117, 149MACHINE_START(CAPC7117,
150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM") 150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
151 .boot_params = 0xa0000100, 151 .boot_params = 0xa0000100,
152 .map_io = pxa_map_io, 152 .map_io = pxa3xx_map_io,
153 .init_irq = pxa3xx_init_irq, 153 .init_irq = pxa3xx_init_irq,
154 .timer = &pxa_timer, 154 .timer = &pxa_timer,
155 .init_machine = capc7117_init 155 .init_machine = capc7117_init
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
new file mode 100644
index 000000000000..1ce090448493
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -0,0 +1,64 @@
1/*
2 * linux/arch/arm/mach-pxa/clock-pxa2xx.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/sysdev.h>
13
14#include <mach/pxa2xx-regs.h>
15
16#include "clock.h"
17
18void clk_pxa2xx_cken_enable(struct clk *clk)
19{
20 CKEN |= 1 << clk->cken;
21}
22
23void clk_pxa2xx_cken_disable(struct clk *clk)
24{
25 CKEN &= ~(1 << clk->cken);
26}
27
28const struct clkops clk_pxa2xx_cken_ops = {
29 .enable = clk_pxa2xx_cken_enable,
30 .disable = clk_pxa2xx_cken_disable,
31};
32
33#ifdef CONFIG_PM
34static uint32_t saved_cken;
35
36static int pxa2xx_clock_suspend(struct sys_device *d, pm_message_t state)
37{
38 saved_cken = CKEN;
39 return 0;
40}
41
42static int pxa2xx_clock_resume(struct sys_device *d)
43{
44 CKEN = saved_cken;
45 return 0;
46}
47#else
48#define pxa2xx_clock_suspend NULL
49#define pxa2xx_clock_resume NULL
50#endif
51
52struct sysdev_class pxa2xx_clock_sysclass = {
53 .name = "pxa2xx-clock",
54 .suspend = pxa2xx_clock_suspend,
55 .resume = pxa2xx_clock_resume,
56};
57
58static int __init pxa2xx_clock_init(void)
59{
60 if (cpu_is_pxa2xx())
61 return sysdev_class_register(&pxa2xx_clock_sysclass);
62 return 0;
63}
64postcore_initcall(pxa2xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c
new file mode 100644
index 000000000000..1b08a34ab234
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa3xx.c
@@ -0,0 +1,218 @@
1/*
2 * linux/arch/arm/mach-pxa/clock-pxa3xx.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13
14#include <mach/smemc.h>
15#include <mach/pxa3xx-regs.h>
16
17#include "clock.h"
18
19/* Crystal clock: 13MHz */
20#define BASE_CLK 13000000
21
22/* Ring Oscillator Clock: 60MHz */
23#define RO_CLK 60000000
24
25#define ACCR_D0CS (1 << 26)
26#define ACCR_PCCE (1 << 11)
27
28/* crystal frequency to HSIO bus frequency multiplier (HSS) */
29static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
30
31/*
32 * Get the clock frequency as reflected by CCSR and the turbo flag.
33 * We assume these values have been applied via a fcs.
34 * If info is not 0 we also display the current settings.
35 */
36unsigned int pxa3xx_get_clk_frequency_khz(int info)
37{
38 unsigned long acsr, xclkcfg;
39 unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
40
41 /* Read XCLKCFG register turbo bit */
42 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
43 t = xclkcfg & 0x1;
44
45 acsr = ACSR;
46
47 xl = acsr & 0x1f;
48 xn = (acsr >> 8) & 0x7;
49 hss = (acsr >> 14) & 0x3;
50
51 XL = xl * BASE_CLK;
52 XN = xn * XL;
53
54 ro = acsr & ACCR_D0CS;
55
56 CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
57 HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
58
59 if (info) {
60 pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
61 RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
62 (ro) ? "" : "in");
63 pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
64 XL / 1000000, (XL % 1000000) / 10000, xl);
65 pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
66 XN / 1000000, (XN % 1000000) / 10000, xn,
67 (t) ? "" : "in");
68 pr_info("HSIO bus clock: %d.%02dMHz\n",
69 HSS / 1000000, (HSS % 1000000) / 10000);
70 }
71
72 return CLK / 1000;
73}
74
75/*
76 * Return the current AC97 clock frequency.
77 */
78static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
79{
80 unsigned long rate = 312000000;
81 unsigned long ac97_div;
82
83 ac97_div = AC97_DIV;
84
85 /* This may loose precision for some rates but won't for the
86 * standard 24.576MHz.
87 */
88 rate /= (ac97_div >> 12) & 0x7fff;
89 rate *= (ac97_div & 0xfff);
90
91 return rate;
92}
93
94/*
95 * Return the current HSIO bus clock frequency
96 */
97static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
98{
99 unsigned long acsr;
100 unsigned int hss, hsio_clk;
101
102 acsr = ACSR;
103
104 hss = (acsr >> 14) & 0x3;
105 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
106
107 return hsio_clk;
108}
109
110/* crystal frequency to static memory controller multiplier (SMCFS) */
111static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
112static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 };
113
114static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk)
115{
116 unsigned long acsr = ACSR;
117 unsigned long memclkcfg = __raw_readl(MEMCLKCFG);
118 unsigned int smcfs = (acsr >> 23) & 0x7;
119
120 return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] /
121 df_clkdiv[(memclkcfg >> 16) & 0x3];
122}
123
124void clk_pxa3xx_cken_enable(struct clk *clk)
125{
126 unsigned long mask = 1ul << (clk->cken & 0x1f);
127
128 if (clk->cken < 32)
129 CKENA |= mask;
130 else
131 CKENB |= mask;
132}
133
134void clk_pxa3xx_cken_disable(struct clk *clk)
135{
136 unsigned long mask = 1ul << (clk->cken & 0x1f);
137
138 if (clk->cken < 32)
139 CKENA &= ~mask;
140 else
141 CKENB &= ~mask;
142}
143
144const struct clkops clk_pxa3xx_cken_ops = {
145 .enable = clk_pxa3xx_cken_enable,
146 .disable = clk_pxa3xx_cken_disable,
147};
148
149const struct clkops clk_pxa3xx_hsio_ops = {
150 .enable = clk_pxa3xx_cken_enable,
151 .disable = clk_pxa3xx_cken_disable,
152 .getrate = clk_pxa3xx_hsio_getrate,
153};
154
155const struct clkops clk_pxa3xx_ac97_ops = {
156 .enable = clk_pxa3xx_cken_enable,
157 .disable = clk_pxa3xx_cken_disable,
158 .getrate = clk_pxa3xx_ac97_getrate,
159};
160
161const struct clkops clk_pxa3xx_smemc_ops = {
162 .enable = clk_pxa3xx_cken_enable,
163 .disable = clk_pxa3xx_cken_disable,
164 .getrate = clk_pxa3xx_smemc_getrate,
165};
166
167static void clk_pout_enable(struct clk *clk)
168{
169 OSCC |= OSCC_PEN;
170}
171
172static void clk_pout_disable(struct clk *clk)
173{
174 OSCC &= ~OSCC_PEN;
175}
176
177const struct clkops clk_pxa3xx_pout_ops = {
178 .enable = clk_pout_enable,
179 .disable = clk_pout_disable,
180};
181
182#ifdef CONFIG_PM
183static uint32_t cken[2];
184static uint32_t accr;
185
186static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state)
187{
188 cken[0] = CKENA;
189 cken[1] = CKENB;
190 accr = ACCR;
191 return 0;
192}
193
194static int pxa3xx_clock_resume(struct sys_device *d)
195{
196 ACCR = accr;
197 CKENA = cken[0];
198 CKENB = cken[1];
199 return 0;
200}
201#else
202#define pxa3xx_clock_suspend NULL
203#define pxa3xx_clock_resume NULL
204#endif
205
206struct sysdev_class pxa3xx_clock_sysclass = {
207 .name = "pxa3xx-clock",
208 .suspend = pxa3xx_clock_suspend,
209 .resume = pxa3xx_clock_resume,
210};
211
212static int __init pxa3xx_clock_init(void)
213{
214 if (cpu_is_pxa3xx() || cpu_is_pxa95x())
215 return sysdev_class_register(&pxa3xx_clock_sysclass);
216 return 0;
217}
218postcore_initcall(pxa3xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index abba0089a2ae..8184fe2d71c3 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -3,21 +3,12 @@
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/list.h>
7#include <linux/errno.h>
8#include <linux/err.h>
9#include <linux/string.h>
10#include <linux/clk.h> 6#include <linux/clk.h>
11#include <linux/spinlock.h> 7#include <linux/spinlock.h>
12#include <linux/platform_device.h>
13#include <linux/delay.h> 8#include <linux/delay.h>
14 9
15#include <asm/clkdev.h> 10#include <asm/clkdev.h>
16#include <mach/pxa2xx-regs.h>
17#include <mach/hardware.h>
18 11
19#include "devices.h"
20#include "generic.h"
21#include "clock.h" 12#include "clock.h"
22 13
23static DEFINE_SPINLOCK(clocks_lock); 14static DEFINE_SPINLOCK(clocks_lock);
@@ -63,18 +54,19 @@ unsigned long clk_get_rate(struct clk *clk)
63} 54}
64EXPORT_SYMBOL(clk_get_rate); 55EXPORT_SYMBOL(clk_get_rate);
65 56
66 57void clk_dummy_enable(struct clk *clk)
67void clk_cken_enable(struct clk *clk)
68{ 58{
69 CKEN |= 1 << clk->cken;
70} 59}
71 60
72void clk_cken_disable(struct clk *clk) 61void clk_dummy_disable(struct clk *clk)
73{ 62{
74 CKEN &= ~(1 << clk->cken);
75} 63}
76 64
77const struct clkops clk_cken_ops = { 65const struct clkops clk_dummy_ops = {
78 .enable = clk_cken_enable, 66 .enable = clk_dummy_enable,
79 .disable = clk_cken_disable, 67 .disable = clk_dummy_disable,
68};
69
70struct clk clk_dummy = {
71 .ops = &clk_dummy_ops,
80}; 72};
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index d8488742b807..6e949944f2ec 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,3 +1,4 @@
1#include <linux/sysdev.h>
1#include <asm/clkdev.h> 2#include <asm/clkdev.h>
2 3
3struct clkops { 4struct clkops {
@@ -14,6 +15,12 @@ struct clk {
14 unsigned int enabled; 15 unsigned int enabled;
15}; 16};
16 17
18void clk_dummy_enable(struct clk *);
19void clk_dummy_disable(struct clk *);
20
21extern const struct clkops clk_dummy_ops;
22extern struct clk clk_dummy;
23
17#define INIT_CLKREG(_clk,_devname,_conname) \ 24#define INIT_CLKREG(_clk,_devname,_conname) \
18 { \ 25 { \
19 .clk = _clk, \ 26 .clk = _clk, \
@@ -21,14 +28,6 @@ struct clk {
21 .con_id = _conname, \ 28 .con_id = _conname, \
22 } 29 }
23 30
24#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
25struct clk clk_##_name = { \
26 .ops = &clk_cken_ops, \
27 .rate = _rate, \
28 .cken = CKEN_##_cken, \
29 .delay = _delay, \
30 }
31
32#define DEFINE_CK(_name, _cken, _ops) \ 31#define DEFINE_CK(_name, _cken, _ops) \
33struct clk clk_##_name = { \ 32struct clk clk_##_name = { \
34 .ops = _ops, \ 33 .ops = _ops, \
@@ -42,28 +41,38 @@ struct clk clk_##_name = { \
42 .delay = _delay, \ 41 .delay = _delay, \
43 } 42 }
44 43
45extern const struct clkops clk_cken_ops; 44#define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay) \
46
47void clk_cken_enable(struct clk *clk);
48void clk_cken_disable(struct clk *clk);
49
50#ifdef CONFIG_PXA3xx
51#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
52struct clk clk_##_name = { \ 45struct clk clk_##_name = { \
53 .ops = &clk_pxa3xx_cken_ops, \ 46 .ops = &clk_pxa2xx_cken_ops, \
54 .rate = _rate, \ 47 .rate = _rate, \
55 .cken = CKEN_##_cken, \ 48 .cken = CKEN_##_cken, \
56 .delay = _delay, \ 49 .delay = _delay, \
57 } 50 }
58 51
59#define DEFINE_PXA3_CK(_name, _cken, _ops) \ 52extern const struct clkops clk_pxa2xx_cken_ops;
53
54void clk_pxa2xx_cken_enable(struct clk *clk);
55void clk_pxa2xx_cken_disable(struct clk *clk);
56
57extern struct sysdev_class pxa2xx_clock_sysclass;
58
59#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
60#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
60struct clk clk_##_name = { \ 61struct clk clk_##_name = { \
61 .ops = _ops, \ 62 .ops = &clk_pxa3xx_cken_ops, \
63 .rate = _rate, \
62 .cken = CKEN_##_cken, \ 64 .cken = CKEN_##_cken, \
65 .delay = _delay, \
63 } 66 }
64 67
65extern const struct clkops clk_pxa3xx_cken_ops; 68extern const struct clkops clk_pxa3xx_cken_ops;
69extern const struct clkops clk_pxa3xx_hsio_ops;
70extern const struct clkops clk_pxa3xx_ac97_ops;
71extern const struct clkops clk_pxa3xx_pout_ops;
72extern const struct clkops clk_pxa3xx_smemc_ops;
73
66extern void clk_pxa3xx_cken_enable(struct clk *); 74extern void clk_pxa3xx_cken_enable(struct clk *);
67extern void clk_pxa3xx_cken_disable(struct clk *); 75extern void clk_pxa3xx_cken_disable(struct clk *);
68#endif
69 76
77extern struct sysdev_class pxa3xx_clock_sysclass;
78#endif
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index d34b99febeb9..b734d8468168 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -24,6 +24,7 @@
24#include <mach/pxa2xx-regs.h> 24#include <mach/pxa2xx-regs.h>
25#include <mach/audio.h> 25#include <mach/audio.h>
26#include <mach/pxafb.h> 26#include <mach/pxafb.h>
27#include <mach/smemc.h>
27 28
28#include <asm/hardware/it8152.h> 29#include <asm/hardware/it8152.h>
29 30
@@ -392,9 +393,9 @@ static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
392 cmx2xx_pci_suspend(); 393 cmx2xx_pci_suspend();
393 394
394 /* save MSC registers */ 395 /* save MSC registers */
395 sleep_save_msc[0] = MSC0; 396 sleep_save_msc[0] = __raw_readl(MSC0);
396 sleep_save_msc[1] = MSC1; 397 sleep_save_msc[1] = __raw_readl(MSC1);
397 sleep_save_msc[2] = MSC2; 398 sleep_save_msc[2] = __raw_readl(MSC2);
398 399
399 /* setup power saving mode registers */ 400 /* setup power saving mode registers */
400 PCFR = 0x0; 401 PCFR = 0x0;
@@ -416,9 +417,9 @@ static int cmx2xx_resume(struct sys_device *dev)
416 cmx2xx_pci_resume(); 417 cmx2xx_pci_resume();
417 418
418 /* restore MSC registers */ 419 /* restore MSC registers */
419 MSC0 = sleep_save_msc[0]; 420 __raw_writel(sleep_save_msc[0], MSC0);
420 MSC1 = sleep_save_msc[1]; 421 __raw_writel(sleep_save_msc[1], MSC1);
421 MSC2 = sleep_save_msc[2]; 422 __raw_writel(sleep_save_msc[2], MSC2);
422 423
423 return 0; 424 return 0;
424} 425}
@@ -498,7 +499,12 @@ static struct map_desc cmx2xx_io_desc[] __initdata = {
498 499
499static void __init cmx2xx_map_io(void) 500static void __init cmx2xx_map_io(void)
500{ 501{
501 pxa_map_io(); 502 if (cpu_is_pxa25x())
503 pxa25x_map_io();
504
505 if (cpu_is_pxa27x())
506 pxa27x_map_io();
507
502 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); 508 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
503 509
504 it8152_base_address = CMX2XX_IT8152_VIRT; 510 it8152_base_address = CMX2XX_IT8152_VIRT;
@@ -506,7 +512,11 @@ static void __init cmx2xx_map_io(void)
506#else 512#else
507static void __init cmx2xx_map_io(void) 513static void __init cmx2xx_map_io(void)
508{ 514{
509 pxa_map_io(); 515 if (cpu_is_pxa25x())
516 pxa25x_map_io();
517
518 if (cpu_is_pxa27x())
519 pxa27x_map_io();
510} 520}
511#endif 521#endif
512 522
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 922b1075b9de..7984268508b6 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -857,7 +857,7 @@ static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
857 857
858MACHINE_START(CM_X300, "CM-X300 module") 858MACHINE_START(CM_X300, "CM-X300 module")
859 .boot_params = 0xa0000100, 859 .boot_params = 0xa0000100,
860 .map_io = pxa_map_io, 860 .map_io = pxa3xx_map_io,
861 .init_irq = pxa3xx_init_irq, 861 .init_irq = pxa3xx_init_irq,
862 .timer = &pxa_timer, 862 .timer = &pxa_timer,
863 .init_machine = cm_x300_init, 863 .init_machine = cm_x300_init,
diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 0f3b632c3b14..6b2c800a1133 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c 2 * linux/arch/arm/mach-pxa/colibri-evalboard.c
3 * 3 *
4 * Support for Toradex PXA270 based Colibri Evaluation Carrier Board 4 * Support for Toradex Colibri Evaluation Carrier Board
5 * Daniel Mack <daniel@caiaq.de> 5 * Daniel Mack <daniel@caiaq.de>
6 * Marek Vasut <marek.vasut@gmail.com> 6 * Marek Vasut <marek.vasut@gmail.com>
7 * 7 *
@@ -19,6 +19,7 @@
19#include <asm/mach-types.h> 19#include <asm/mach-types.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
22#include <linux/i2c.h>
22 23
23#include <mach/pxa27x.h> 24#include <mach/pxa27x.h>
24#include <mach/colibri.h> 25#include <mach/colibri.h>
@@ -26,86 +27,95 @@
26#include <mach/ohci.h> 27#include <mach/ohci.h>
27#include <mach/pxa27x-udc.h> 28#include <mach/pxa27x-udc.h>
28 29
30#include <plat/i2c.h>
31
29#include "generic.h" 32#include "generic.h"
30#include "devices.h" 33#include "devices.h"
31 34
32/****************************************************************************** 35/******************************************************************************
33 * Pin configuration
34 ******************************************************************************/
35static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
36 /* MMC */
37 GPIO32_MMC_CLK,
38 GPIO92_MMC_DAT_0,
39 GPIO109_MMC_DAT_1,
40 GPIO110_MMC_DAT_2,
41 GPIO111_MMC_DAT_3,
42 GPIO112_MMC_CMD,
43 GPIO0_GPIO, /* SD detect */
44
45 /* FFUART */
46 GPIO39_FFUART_TXD,
47 GPIO34_FFUART_RXD,
48
49 /* UHC */
50 GPIO88_USBH1_PWR,
51 GPIO89_USBH1_PEN,
52 GPIO119_USBH2_PWR,
53 GPIO120_USBH2_PEN,
54};
55
56/******************************************************************************
57 * SD/MMC card controller 36 * SD/MMC card controller
58 ******************************************************************************/ 37 ******************************************************************************/
59#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 38#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
60static struct pxamci_platform_data colibri_pxa270_mci_platform_data = { 39static struct pxamci_platform_data colibri_mci_platform_data = {
61 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 40 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
62 .gpio_power = -1, 41 .gpio_power = -1,
63 .gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT,
64 .gpio_card_ro = -1, 42 .gpio_card_ro = -1,
65 .detect_delay_ms = 200, 43 .detect_delay_ms = 200,
66}; 44};
67 45
68static void __init colibri_pxa270_mmc_init(void) 46static void __init colibri_mmc_init(void)
69{ 47{
70 pxa_set_mci_info(&colibri_pxa270_mci_platform_data); 48 if (machine_is_colibri()) /* PXA270 Colibri */
49 colibri_mci_platform_data.gpio_card_detect =
50 GPIO0_COLIBRI_PXA270_SD_DETECT;
51 if (machine_is_colibri300()) /* PXA300 Colibri */
52 colibri_mci_platform_data.gpio_card_detect =
53 GPIO39_COLIBRI_PXA300_SD_DETECT;
54 else /* PXA320 Colibri */
55 colibri_mci_platform_data.gpio_card_detect =
56 GPIO28_COLIBRI_PXA320_SD_DETECT;
57
58 pxa_set_mci_info(&colibri_mci_platform_data);
71} 59}
72#else 60#else
73static inline void colibri_pxa270_mmc_init(void) {} 61static inline void colibri_mmc_init(void) {}
74#endif 62#endif
75 63
76/****************************************************************************** 64/******************************************************************************
77 * USB Host 65 * USB Host
78 ******************************************************************************/ 66 ******************************************************************************/
79#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 67#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
80static int colibri_pxa270_ohci_init(struct device *dev) 68static int colibri_ohci_init(struct device *dev)
81{ 69{
82 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; 70 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
83 return 0; 71 return 0;
84} 72}
85 73
86static struct pxaohci_platform_data colibri_pxa270_ohci_info = { 74static struct pxaohci_platform_data colibri_ohci_info = {
87 .port_mode = PMM_PERPORT_MODE, 75 .port_mode = PMM_PERPORT_MODE,
88 .flags = ENABLE_PORT1 | ENABLE_PORT2 | 76 .flags = ENABLE_PORT1 |
89 POWER_CONTROL_LOW | POWER_SENSE_LOW, 77 POWER_CONTROL_LOW | POWER_SENSE_LOW,
90 .init = colibri_pxa270_ohci_init, 78 .init = colibri_ohci_init,
91}; 79};
92 80
93static void __init colibri_pxa270_uhc_init(void) 81static void __init colibri_uhc_init(void)
94{ 82{
95 pxa_set_ohci_info(&colibri_pxa270_ohci_info); 83 /* Colibri PXA270 has two usb ports, TBA for 320 */
84 if (machine_is_colibri())
85 colibri_ohci_info.flags |= ENABLE_PORT2;
86
87 pxa_set_ohci_info(&colibri_ohci_info);
96} 88}
97#else 89#else
98static inline void colibri_pxa270_uhc_init(void) {} 90static inline void colibri_uhc_init(void) {}
99#endif 91#endif
100 92
101void __init colibri_pxa270_evalboard_init(void) 93/******************************************************************************
94 * I2C RTC
95 ******************************************************************************/
96#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
97static struct i2c_board_info __initdata colibri_i2c_devs[] = {
98 {
99 I2C_BOARD_INFO("m41t00", 0x68),
100 },
101};
102
103static void __init colibri_rtc_init(void)
104{
105 pxa_set_i2c_info(NULL);
106 i2c_register_board_info(0, ARRAY_AND_SIZE(colibri_i2c_devs));
107}
108#else
109static inline void colibri_rtc_init(void) {}
110#endif
111
112void __init colibri_evalboard_init(void)
102{ 113{
103 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config));
104 pxa_set_ffuart_info(NULL); 114 pxa_set_ffuart_info(NULL);
105 pxa_set_btuart_info(NULL); 115 pxa_set_btuart_info(NULL);
106 pxa_set_stuart_info(NULL); 116 pxa_set_stuart_info(NULL);
107 117
108 colibri_pxa270_mmc_init(); 118 colibri_mmc_init();
109 colibri_pxa270_uhc_init(); 119 colibri_uhc_init();
120 colibri_rtc_init();
110} 121}
111
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 37f0f3ed7c61..07b62a096f17 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -46,52 +46,6 @@
46#define GPIO113_INCOME_TS_IRQ (113) 46#define GPIO113_INCOME_TS_IRQ (113)
47 47
48/****************************************************************************** 48/******************************************************************************
49 * Pin configuration
50 ******************************************************************************/
51static mfp_cfg_t income_pin_config[] __initdata = {
52 /* MMC */
53 GPIO32_MMC_CLK,
54 GPIO92_MMC_DAT_0,
55 GPIO109_MMC_DAT_1,
56 GPIO110_MMC_DAT_2,
57 GPIO111_MMC_DAT_3,
58 GPIO112_MMC_CMD,
59 GPIO0_GPIO, /* SD detect */
60 GPIO1_GPIO, /* SD read-only */
61
62 /* FFUART */
63 GPIO39_FFUART_TXD,
64 GPIO34_FFUART_RXD,
65
66 /* BFUART */
67 GPIO42_BTUART_RXD,
68 GPIO43_BTUART_TXD,
69 GPIO45_BTUART_RTS,
70
71 /* STUART */
72 GPIO46_STUART_RXD,
73 GPIO47_STUART_TXD,
74
75 /* UHC */
76 GPIO88_USBH1_PWR,
77 GPIO89_USBH1_PEN,
78
79 /* LCD */
80 GPIOxx_LCD_TFT_16BPP,
81
82 /* PWM */
83 GPIO16_PWM0_OUT,
84
85 /* I2C */
86 GPIO117_I2C_SCL,
87 GPIO118_I2C_SDA,
88
89 /* LED */
90 GPIO54_GPIO, /* LED A */
91 GPIO55_GPIO, /* LED B */
92};
93
94/******************************************************************************
95 * SD/MMC card controller 49 * SD/MMC card controller
96 ******************************************************************************/ 50 ******************************************************************************/
97#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 51#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
@@ -257,7 +211,6 @@ static inline void income_pwm_init(void) {}
257 211
258void __init colibri_pxa270_income_boardinit(void) 212void __init colibri_pxa270_income_boardinit(void)
259{ 213{
260 pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
261 pxa_set_ffuart_info(NULL); 214 pxa_set_ffuart_info(NULL);
262 pxa_set_btuart_info(NULL); 215 pxa_set_btuart_info(NULL);
263 pxa_set_stuart_info(NULL); 216 pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index bc045100ec15..6fc5d328ba7f 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -33,6 +33,103 @@
33#include "generic.h" 33#include "generic.h"
34 34
35/****************************************************************************** 35/******************************************************************************
36 * Evaluation board MFP
37 ******************************************************************************/
38#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
39static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
40 /* MMC */
41 GPIO32_MMC_CLK,
42 GPIO92_MMC_DAT_0,
43 GPIO109_MMC_DAT_1,
44 GPIO110_MMC_DAT_2,
45 GPIO111_MMC_DAT_3,
46 GPIO112_MMC_CMD,
47 GPIO0_GPIO, /* SD detect */
48
49 /* FFUART */
50 GPIO39_FFUART_TXD,
51 GPIO34_FFUART_RXD,
52
53 /* UHC */
54 GPIO88_USBH1_PWR,
55 GPIO89_USBH1_PEN,
56 GPIO119_USBH2_PWR,
57 GPIO120_USBH2_PEN,
58
59 /* PCMCIA */
60 GPIO85_nPCE_1,
61 GPIO54_nPCE_2,
62 GPIO55_nPREG,
63 GPIO50_nPIOR,
64 GPIO51_nPIOW,
65 GPIO49_nPWE,
66 GPIO48_nPOE,
67 GPIO57_nIOIS16,
68 GPIO56_nPWAIT,
69 GPIO104_PSKTSEL,
70 GPIO53_GPIO, /* RESET */
71 GPIO83_GPIO, /* BVD1 */
72 GPIO82_GPIO, /* BVD2 */
73 GPIO1_GPIO, /* READY */
74 GPIO84_GPIO, /* DETECT */
75 GPIO107_GPIO, /* PPEN */
76
77 /* I2C */
78 GPIO117_I2C_SCL,
79 GPIO118_I2C_SDA,
80};
81#else
82static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {};
83#endif
84
85#ifdef CONFIG_MACH_COLIBRI_PXA270_INCOME
86static mfp_cfg_t income_pin_config[] __initdata = {
87 /* MMC */
88 GPIO32_MMC_CLK,
89 GPIO92_MMC_DAT_0,
90 GPIO109_MMC_DAT_1,
91 GPIO110_MMC_DAT_2,
92 GPIO111_MMC_DAT_3,
93 GPIO112_MMC_CMD,
94 GPIO0_GPIO, /* SD detect */
95 GPIO1_GPIO, /* SD read-only */
96
97 /* FFUART */
98 GPIO39_FFUART_TXD,
99 GPIO34_FFUART_RXD,
100
101 /* BFUART */
102 GPIO42_BTUART_RXD,
103 GPIO43_BTUART_TXD,
104 GPIO45_BTUART_RTS,
105
106 /* STUART */
107 GPIO46_STUART_RXD,
108 GPIO47_STUART_TXD,
109
110 /* UHC */
111 GPIO88_USBH1_PWR,
112 GPIO89_USBH1_PEN,
113
114 /* LCD */
115 GPIOxx_LCD_TFT_16BPP,
116
117 /* PWM */
118 GPIO16_PWM0_OUT,
119
120 /* I2C */
121 GPIO117_I2C_SCL,
122 GPIO118_I2C_SDA,
123
124 /* LED */
125 GPIO54_GPIO, /* LED A */
126 GPIO55_GPIO, /* LED B */
127};
128#else
129static mfp_cfg_t income_pin_config[] __initdata = {};
130#endif
131
132/******************************************************************************
36 * Pin configuration 133 * Pin configuration
37 ******************************************************************************/ 134 ******************************************************************************/
38static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { 135static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
@@ -184,10 +281,13 @@ static void __init colibri_pxa270_init(void)
184 colibri_pxa270_tsc_init(); 281 colibri_pxa270_tsc_init();
185 282
186 switch (colibri_pxa270_baseboard) { 283 switch (colibri_pxa270_baseboard) {
187 case COLIBRI_PXA270_EVALBOARD: 284 case COLIBRI_EVALBOARD:
188 colibri_pxa270_evalboard_init(); 285 pxa2xx_mfp_config(ARRAY_AND_SIZE(
286 colibri_pxa270_evalboard_pin_config));
287 colibri_evalboard_init();
189 break; 288 break;
190 case COLIBRI_PXA270_INCOME: 289 case COLIBRI_PXA270_INCOME:
290 pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
191 colibri_pxa270_income_boardinit(); 291 colibri_pxa270_income_boardinit();
192 break; 292 break;
193 default: 293 default:
@@ -209,7 +309,7 @@ static void __init colibri_pxa270_income_init(void)
209MACHINE_START(COLIBRI, "Toradex Colibri PXA270") 309MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
210 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 310 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
211 .init_machine = colibri_pxa270_init, 311 .init_machine = colibri_pxa270_init,
212 .map_io = pxa_map_io, 312 .map_io = pxa27x_map_io,
213 .init_irq = pxa27x_init_irq, 313 .init_irq = pxa27x_init_irq,
214 .timer = &pxa_timer, 314 .timer = &pxa_timer,
215MACHINE_END 315MACHINE_END
@@ -217,7 +317,7 @@ MACHINE_END
217MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") 317MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
218 .boot_params = 0xa0000100, 318 .boot_params = 0xa0000100,
219 .init_machine = colibri_pxa270_income_init, 319 .init_machine = colibri_pxa270_income_init,
220 .map_io = pxa_map_io, 320 .map_io = pxa27x_map_io,
221 .init_irq = pxa27x_init_irq, 321 .init_irq = pxa27x_init_irq,
222 .timer = &pxa_timer, 322 .timer = &pxa_timer,
223MACHINE_END 323MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index a70b256591e6..fddb16d07eb0 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -31,9 +31,38 @@
31#include "generic.h" 31#include "generic.h"
32#include "devices.h" 32#include "devices.h"
33 33
34
35#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
36static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
37 /* MMC */
38 GPIO7_MMC1_CLK,
39 GPIO14_MMC1_CMD,
40 GPIO3_MMC1_DAT0,
41 GPIO4_MMC1_DAT1,
42 GPIO5_MMC1_DAT2,
43 GPIO6_MMC1_DAT3,
44 GPIO39_GPIO, /* SD detect */
45
46 /* UHC */
47 GPIO0_2_USBH_PEN,
48 GPIO1_2_USBH_PWR,
49 GPIO77_USB_P3_1,
50 GPIO78_USB_P3_2,
51 GPIO79_USB_P3_3,
52 GPIO80_USB_P3_4,
53 GPIO81_USB_P3_5,
54 GPIO82_USB_P3_6,
55
56 /* I2C */
57 GPIO21_I2C_SCL,
58 GPIO22_I2C_SDA,
59};
60#else
61static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {};
62#endif
63
34#if defined(CONFIG_AX88796) 64#if defined(CONFIG_AX88796)
35#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO) 65#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
36
37/* 66/*
38 * Asix AX88796 Ethernet 67 * Asix AX88796 Ethernet
39 */ 68 */
@@ -80,35 +109,6 @@ static void __init colibri_pxa300_init_eth(void)
80static inline void __init colibri_pxa300_init_eth(void) {} 109static inline void __init colibri_pxa300_init_eth(void) {}
81#endif /* CONFIG_AX88796 */ 110#endif /* CONFIG_AX88796 */
82 111
83#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
84static mfp_cfg_t colibri_pxa300_usb_pin_config[] __initdata = {
85 GPIO0_2_USBH_PEN,
86 GPIO1_2_USBH_PWR,
87};
88
89static struct pxaohci_platform_data colibri_pxa300_ohci_info = {
90 .port_mode = PMM_GLOBAL_MODE,
91 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
92};
93
94void __init colibri_pxa300_init_ohci(void)
95{
96 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_usb_pin_config));
97 pxa_set_ohci_info(&colibri_pxa300_ohci_info);
98}
99#else
100static inline void colibri_pxa300_init_ohci(void) {}
101#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
102
103static mfp_cfg_t colibri_pxa300_mmc_pin_config[] __initdata = {
104 GPIO7_MMC1_CLK,
105 GPIO14_MMC1_CMD,
106 GPIO3_MMC1_DAT0,
107 GPIO4_MMC1_DAT1,
108 GPIO5_MMC1_DAT2,
109 GPIO6_MMC1_DAT3,
110};
111
112#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 112#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
113static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = { 113static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = {
114 GPIO54_LCD_LDD_0, 114 GPIO54_LCD_LDD_0,
@@ -171,24 +171,21 @@ static inline void colibri_pxa310_init_ac97(void) {}
171 171
172void __init colibri_pxa300_init(void) 172void __init colibri_pxa300_init(void)
173{ 173{
174 pxa_set_ffuart_info(NULL);
175 pxa_set_btuart_info(NULL);
176 pxa_set_stuart_info(NULL);
177
178 colibri_pxa300_init_eth(); 174 colibri_pxa300_init_eth();
179 colibri_pxa300_init_ohci();
180 colibri_pxa3xx_init_nand(); 175 colibri_pxa3xx_init_nand();
181 colibri_pxa300_init_lcd(); 176 colibri_pxa300_init_lcd();
182 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO)); 177 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
183 colibri_pxa310_init_ac97(); 178 colibri_pxa310_init_ac97();
184 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa300_mmc_pin_config), 179
185 mfp_to_gpio(MFP_PIN_GPIO13)); 180 /* Evalboard init */
181 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_evalboard_pin_config));
182 colibri_evalboard_init();
186} 183}
187 184
188MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") 185MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
189 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 186 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
190 .init_machine = colibri_pxa300_init, 187 .init_machine = colibri_pxa300_init,
191 .map_io = pxa_map_io, 188 .map_io = pxa3xx_map_io,
192 .init_irq = pxa3xx_init_irq, 189 .init_irq = pxa3xx_init_irq,
193 .timer = &pxa_timer, 190 .timer = &pxa_timer,
194MACHINE_END 191MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index ca5f29e2e9cd..ff9ff5f4fc47 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -35,9 +35,72 @@
35#include "generic.h" 35#include "generic.h"
36#include "devices.h" 36#include "devices.h"
37 37
38#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
39static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {
40 /* MMC */
41 GPIO22_MMC1_CLK,
42 GPIO23_MMC1_CMD,
43 GPIO18_MMC1_DAT0,
44 GPIO19_MMC1_DAT1,
45 GPIO20_MMC1_DAT2,
46 GPIO21_MMC1_DAT3,
47 GPIO28_GPIO, /* SD detect */
48
49 /* UART 1 configuration (may be set by bootloader) */
50 GPIO99_UART1_CTS,
51 GPIO104_UART1_RTS,
52 GPIO97_UART1_RXD,
53 GPIO98_UART1_TXD,
54 GPIO101_UART1_DTR,
55 GPIO103_UART1_DSR,
56 GPIO100_UART1_DCD,
57 GPIO102_UART1_RI,
58
59 /* UART 2 configuration */
60 GPIO109_UART2_CTS,
61 GPIO112_UART2_RTS,
62 GPIO110_UART2_RXD,
63 GPIO111_UART2_TXD,
64
65 /* UART 3 configuration */
66 GPIO30_UART3_RXD,
67 GPIO31_UART3_TXD,
68
69 /* UHC */
70 GPIO2_2_USBH_PEN,
71 GPIO3_2_USBH_PWR,
72
73 /* I2C */
74 GPIO32_I2C_SCL,
75 GPIO33_I2C_SDA,
76
77 /* PCMCIA */
78 MFP_CFG(GPIO59, AF7), /* PRST ; AF7 to tristate */
79 MFP_CFG(GPIO61, AF7), /* PCE1 ; AF7 to tristate */
80 MFP_CFG(GPIO60, AF7), /* PCE2 ; AF7 to tristate */
81 MFP_CFG(GPIO62, AF7), /* PCD ; AF7 to tristate */
82 MFP_CFG(GPIO56, AF7), /* PSKTSEL ; AF7 to tristate */
83 GPIO27_GPIO, /* RDnWR ; input/tristate */
84 GPIO50_GPIO, /* PREG ; input/tristate */
85 GPIO2_RDY,
86 GPIO5_NPIOR,
87 GPIO6_NPIOW,
88 GPIO7_NPIOS16,
89 GPIO8_NPWAIT,
90 GPIO29_GPIO, /* PRDY (READY GPIO) */
91 GPIO57_GPIO, /* PPEN (POWER GPIO) */
92 GPIO81_GPIO, /* PCD (DETECT GPIO) */
93 GPIO77_GPIO, /* PRST (RESET GPIO) */
94 GPIO53_GPIO, /* PBVD1 */
95 GPIO79_GPIO, /* PBVD2 */
96 GPIO54_GPIO, /* POE */
97};
98#else
99static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {};
100#endif
101
38#if defined(CONFIG_AX88796) 102#if defined(CONFIG_AX88796)
39#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO) 103#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO)
40
41/* 104/*
42 * Asix AX88796 Ethernet 105 * Asix AX88796 Ethernet
43 */ 106 */
@@ -84,26 +147,6 @@ static void __init colibri_pxa320_init_eth(void)
84static inline void __init colibri_pxa320_init_eth(void) {} 147static inline void __init colibri_pxa320_init_eth(void) {}
85#endif /* CONFIG_AX88796 */ 148#endif /* CONFIG_AX88796 */
86 149
87#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
88static mfp_cfg_t colibri_pxa320_usb_pin_config[] __initdata = {
89 GPIO2_2_USBH_PEN,
90 GPIO3_2_USBH_PWR,
91};
92
93static struct pxaohci_platform_data colibri_pxa320_ohci_info = {
94 .port_mode = PMM_GLOBAL_MODE,
95 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
96};
97
98void __init colibri_pxa320_init_ohci(void)
99{
100 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_usb_pin_config));
101 pxa_set_ohci_info(&colibri_pxa320_ohci_info);
102}
103#else
104static inline void colibri_pxa320_init_ohci(void) {}
105#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
106
107#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 150#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
108static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { 151static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
109 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), 152 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
@@ -140,15 +183,6 @@ static void __init colibri_pxa320_init_udc(void)
140static inline void colibri_pxa320_init_udc(void) {} 183static inline void colibri_pxa320_init_udc(void) {}
141#endif 184#endif
142 185
143static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
144 GPIO22_MMC1_CLK,
145 GPIO23_MMC1_CMD,
146 GPIO18_MMC1_DAT0,
147 GPIO19_MMC1_DAT1,
148 GPIO20_MMC1_DAT2,
149 GPIO21_MMC1_DAT3
150};
151
152#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 186#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
153static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = { 187static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = {
154 GPIO6_2_LCD_LDD_0, 188 GPIO6_2_LCD_LDD_0,
@@ -205,59 +239,24 @@ static inline void __init colibri_pxa320_init_ac97(void)
205static inline void colibri_pxa320_init_ac97(void) {} 239static inline void colibri_pxa320_init_ac97(void) {}
206#endif 240#endif
207 241
208/*
209 * The following configuration is verified to work with the Toradex Orchid
210 * carrier board
211 */
212static mfp_cfg_t colibri_pxa320_uart_pin_config[] __initdata = {
213 /* UART 1 configuration (may be set by bootloader) */
214 GPIO99_UART1_CTS,
215 GPIO104_UART1_RTS,
216 GPIO97_UART1_RXD,
217 GPIO98_UART1_TXD,
218 GPIO101_UART1_DTR,
219 GPIO103_UART1_DSR,
220 GPIO100_UART1_DCD,
221 GPIO102_UART1_RI,
222
223 /* UART 2 configuration */
224 GPIO109_UART2_CTS,
225 GPIO112_UART2_RTS,
226 GPIO110_UART2_RXD,
227 GPIO111_UART2_TXD,
228
229 /* UART 3 configuration */
230 GPIO30_UART3_RXD,
231 GPIO31_UART3_TXD,
232};
233
234static void __init colibri_pxa320_init_uart(void)
235{
236 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_uart_pin_config));
237}
238
239void __init colibri_pxa320_init(void) 242void __init colibri_pxa320_init(void)
240{ 243{
241 pxa_set_ffuart_info(NULL);
242 pxa_set_btuart_info(NULL);
243 pxa_set_stuart_info(NULL);
244
245 colibri_pxa320_init_eth(); 244 colibri_pxa320_init_eth();
246 colibri_pxa320_init_ohci();
247 colibri_pxa3xx_init_nand(); 245 colibri_pxa3xx_init_nand();
248 colibri_pxa320_init_lcd(); 246 colibri_pxa320_init_lcd();
249 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO)); 247 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
250 colibri_pxa320_init_ac97(); 248 colibri_pxa320_init_ac97();
251 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
252 mfp_to_gpio(MFP_PIN_GPIO28));
253 colibri_pxa320_init_uart();
254 colibri_pxa320_init_udc(); 249 colibri_pxa320_init_udc();
250
251 /* Evalboard init */
252 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_evalboard_pin_config));
253 colibri_evalboard_init();
255} 254}
256 255
257MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") 256MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
258 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 257 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
259 .init_machine = colibri_pxa320_init, 258 .init_machine = colibri_pxa320_init,
260 .map_io = pxa_map_io, 259 .map_io = pxa3xx_map_io,
261 .init_irq = pxa3xx_init_irq, 260 .init_irq = pxa3xx_init_irq,
262 .timer = &pxa_timer, 261 .timer = &pxa_timer,
263MACHINE_END 262MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 199afa2ae303..96b2d9fbfef0 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -64,55 +64,6 @@ void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
64} 64}
65#endif 65#endif
66 66
67#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
68static int mmc_detect_pin;
69
70static int colibri_pxa3xx_mci_init(struct device *dev,
71 irq_handler_t colibri_mmc_detect_int,
72 void *data)
73{
74 int ret;
75
76 ret = gpio_request(mmc_detect_pin, "mmc card detect");
77 if (ret)
78 return ret;
79
80 gpio_direction_input(mmc_detect_pin);
81 ret = request_irq(gpio_to_irq(mmc_detect_pin), colibri_mmc_detect_int,
82 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
83 "MMC card detect", data);
84 if (ret) {
85 gpio_free(mmc_detect_pin);
86 return ret;
87 }
88
89 return 0;
90}
91
92static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
93{
94 free_irq(mmc_detect_pin, data);
95 gpio_free(gpio_to_irq(mmc_detect_pin));
96}
97
98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
99 .detect_delay_ms = 200,
100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
101 .init = colibri_pxa3xx_mci_init,
102 .exit = colibri_pxa3xx_mci_exit,
103 .gpio_card_detect = -1,
104 .gpio_card_ro = -1,
105 .gpio_power = -1,
106};
107
108void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
109{
110 pxa3xx_mfp_config(pins, len);
111 mmc_detect_pin = detect_pin;
112 pxa_set_mci_info(&colibri_pxa3xx_mci_platform_data);
113}
114#endif /* CONFIG_MMC_PXA || CONFIG_MMC_PXA_MODULE */
115
116#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 67#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
117static int lcd_bl_pin; 68static int lcd_bl_pin;
118 69
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 821229acabe6..9f3e5af0a0db 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -721,7 +721,7 @@ static void __init fixup_corgi(struct machine_desc *desc,
721#ifdef CONFIG_MACH_CORGI 721#ifdef CONFIG_MACH_CORGI
722MACHINE_START(CORGI, "SHARP Corgi") 722MACHINE_START(CORGI, "SHARP Corgi")
723 .fixup = fixup_corgi, 723 .fixup = fixup_corgi,
724 .map_io = pxa_map_io, 724 .map_io = pxa25x_map_io,
725 .init_irq = pxa25x_init_irq, 725 .init_irq = pxa25x_init_irq,
726 .init_machine = corgi_init, 726 .init_machine = corgi_init,
727 .timer = &pxa_timer, 727 .timer = &pxa_timer,
@@ -731,7 +731,7 @@ MACHINE_END
731#ifdef CONFIG_MACH_SHEPHERD 731#ifdef CONFIG_MACH_SHEPHERD
732MACHINE_START(SHEPHERD, "SHARP Shepherd") 732MACHINE_START(SHEPHERD, "SHARP Shepherd")
733 .fixup = fixup_corgi, 733 .fixup = fixup_corgi,
734 .map_io = pxa_map_io, 734 .map_io = pxa25x_map_io,
735 .init_irq = pxa25x_init_irq, 735 .init_irq = pxa25x_init_irq,
736 .init_machine = corgi_init, 736 .init_machine = corgi_init,
737 .timer = &pxa_timer, 737 .timer = &pxa_timer,
@@ -741,7 +741,7 @@ MACHINE_END
741#ifdef CONFIG_MACH_HUSKY 741#ifdef CONFIG_MACH_HUSKY
742MACHINE_START(HUSKY, "SHARP Husky") 742MACHINE_START(HUSKY, "SHARP Husky")
743 .fixup = fixup_corgi, 743 .fixup = fixup_corgi,
744 .map_io = pxa_map_io, 744 .map_io = pxa25x_map_io,
745 .init_irq = pxa25x_init_irq, 745 .init_irq = pxa25x_init_irq,
746 .init_machine = corgi_init, 746 .init_machine = corgi_init,
747 .timer = &pxa_timer, 747 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 58093d9e07be..6a7aeab42f6c 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -38,8 +38,10 @@
38#include <linux/cpufreq.h> 38#include <linux/cpufreq.h>
39#include <linux/err.h> 39#include <linux/err.h>
40#include <linux/regulator/consumer.h> 40#include <linux/regulator/consumer.h>
41#include <linux/io.h>
41 42
42#include <mach/pxa2xx-regs.h> 43#include <mach/pxa2xx-regs.h>
44#include <mach/smemc.h>
43 45
44#ifdef DEBUG 46#ifdef DEBUG
45static unsigned int freq_debug; 47static unsigned int freq_debug;
@@ -242,7 +244,7 @@ static void pxa27x_guess_max_freq(void)
242 244
243static void init_sdram_rows(void) 245static void init_sdram_rows(void)
244{ 246{
245 uint32_t mdcnfg = MDCNFG; 247 uint32_t mdcnfg = __raw_readl(MDCNFG);
246 unsigned int drac2 = 0, drac0 = 0; 248 unsigned int drac2 = 0, drac0 = 0;
247 249
248 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3)) 250 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
@@ -331,8 +333,8 @@ static int pxa_set_target(struct cpufreq_policy *policy,
331 * we need to preset the smaller DRI before the change. If we're 333 * we need to preset the smaller DRI before the change. If we're
332 * speeding up we need to set the larger DRI value after the change. 334 * speeding up we need to set the larger DRI value after the change.
333 */ 335 */
334 preset_mdrefr = postset_mdrefr = MDREFR; 336 preset_mdrefr = postset_mdrefr = __raw_readl(MDREFR);
335 if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) { 337 if ((preset_mdrefr & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
336 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK); 338 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
337 preset_mdrefr |= mdrefr_dri(new_freq_mem); 339 preset_mdrefr |= mdrefr_dri(new_freq_mem);
338 } 340 }
@@ -370,7 +372,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
3703: nop \n\ 3723: nop \n\
371 " 373 "
372 : "=&r" (unused) 374 : "=&r" (unused)
373 : "r" (&MDREFR), "r" (cclkcfg), 375 : "r" (MDREFR), "r" (cclkcfg),
374 "r" (preset_mdrefr), "r" (postset_mdrefr) 376 "r" (preset_mdrefr), "r" (postset_mdrefr)
375 : "r4", "r5"); 377 : "r4", "r5");
376 local_irq_restore(flags); 378 local_irq_restore(flags);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 57cacaff194d..a305424a967d 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -27,6 +27,7 @@
27#include <mach/ohci.h> 27#include <mach/ohci.h>
28#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
29#include <mach/audio.h> 29#include <mach/audio.h>
30#include <mach/smemc.h>
30 31
31#include "generic.h" 32#include "generic.h"
32#include "devices.h" 33#include "devices.h"
@@ -255,9 +256,9 @@ static struct platform_device *devices[] __initdata = {
255static void __init csb726_init(void) 256static void __init csb726_init(void)
256{ 257{
257 pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config)); 258 pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config));
258/* MSC1 = 0x7ffc3ffc; *//* LAN9215/EXP_CS */ 259/* __raw_writel(0x7ffc3ffc, MSC1); *//* LAN9215/EXP_CS */
259/* MSC2 = 0x06697ff4; *//* none/SM501 */ 260/* __raw_writel(0x06697ff4, MSC2); *//* none/SM501 */
260 MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */ 261 __raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */
261 262
262 pxa_set_ffuart_info(NULL); 263 pxa_set_ffuart_info(NULL);
263 pxa_set_btuart_info(NULL); 264 pxa_set_btuart_info(NULL);
@@ -273,7 +274,7 @@ static void __init csb726_init(void)
273 274
274MACHINE_START(CSB726, "Cogent CSB726") 275MACHINE_START(CSB726, "Cogent CSB726")
275 .boot_params = 0xa0000100, 276 .boot_params = 0xa0000100,
276 .map_io = pxa_map_io, 277 .map_io = pxa27x_map_io,
277 .init_irq = pxa27x_init_irq, 278 .init_irq = pxa27x_init_irq,
278 .init_machine = csb726_init, 279 .init_machine = csb726_init,
279 .timer = &pxa_timer, 280 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index aaa1166df964..022c2fa4af04 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -342,27 +342,6 @@ struct platform_device pxa27x_device_i2c_power = {
342}; 342};
343#endif 343#endif
344 344
345#ifdef CONFIG_PXA3xx
346static struct resource pxa3xx_resources_i2c_power[] = {
347 {
348 .start = 0x40f500c0,
349 .end = 0x40f500d3,
350 .flags = IORESOURCE_MEM,
351 }, {
352 .start = IRQ_PWRI2C,
353 .end = IRQ_PWRI2C,
354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358struct platform_device pxa3xx_device_i2c_power = {
359 .name = "pxa3xx-pwri2c",
360 .id = 1,
361 .resource = pxa3xx_resources_i2c_power,
362 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
363};
364#endif
365
366static struct resource pxai2s_resources[] = { 345static struct resource pxai2s_resources[] = {
367 { 346 {
368 .start = 0x40400000, 347 .start = 0x40400000,
@@ -633,30 +612,35 @@ struct platform_device pxa25x_device_assp = {
633#endif /* CONFIG_PXA25x */ 612#endif /* CONFIG_PXA25x */
634 613
635#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 614#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
636 615static struct resource pxa27x_resource_camera[] = {
637static struct resource pxa27x_resource_keypad[] = {
638 [0] = { 616 [0] = {
639 .start = 0x41500000, 617 .start = 0x50000000,
640 .end = 0x4150004c, 618 .end = 0x50000fff,
641 .flags = IORESOURCE_MEM, 619 .flags = IORESOURCE_MEM,
642 }, 620 },
643 [1] = { 621 [1] = {
644 .start = IRQ_KEYPAD, 622 .start = IRQ_CAMERA,
645 .end = IRQ_KEYPAD, 623 .end = IRQ_CAMERA,
646 .flags = IORESOURCE_IRQ, 624 .flags = IORESOURCE_IRQ,
647 }, 625 },
648}; 626};
649 627
650struct platform_device pxa27x_device_keypad = { 628static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
651 .name = "pxa27x-keypad", 629
652 .id = -1, 630static struct platform_device pxa27x_device_camera = {
653 .resource = pxa27x_resource_keypad, 631 .name = "pxa27x-camera",
654 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), 632 .id = 0, /* This is used to put cameras on this interface */
633 .dev = {
634 .dma_mask = &pxa27x_dma_mask_camera,
635 .coherent_dma_mask = 0xffffffff,
636 },
637 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
638 .resource = pxa27x_resource_camera,
655}; 639};
656 640
657void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) 641void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
658{ 642{
659 pxa_register_device(&pxa27x_device_keypad, info); 643 pxa_register_device(&pxa27x_device_camera, info);
660} 644}
661 645
662static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); 646static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
@@ -689,6 +673,33 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
689{ 673{
690 pxa_register_device(&pxa27x_device_ohci, info); 674 pxa_register_device(&pxa27x_device_ohci, info);
691} 675}
676#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
677
678#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
679static struct resource pxa27x_resource_keypad[] = {
680 [0] = {
681 .start = 0x41500000,
682 .end = 0x4150004c,
683 .flags = IORESOURCE_MEM,
684 },
685 [1] = {
686 .start = IRQ_KEYPAD,
687 .end = IRQ_KEYPAD,
688 .flags = IORESOURCE_IRQ,
689 },
690};
691
692struct platform_device pxa27x_device_keypad = {
693 .name = "pxa27x-keypad",
694 .id = -1,
695 .resource = pxa27x_resource_keypad,
696 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
697};
698
699void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
700{
701 pxa_register_device(&pxa27x_device_keypad, info);
702}
692 703
693static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); 704static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
694 705
@@ -833,79 +844,9 @@ struct platform_device pxa27x_device_pwm1 = {
833 .resource = pxa27x_resource_pwm1, 844 .resource = pxa27x_resource_pwm1,
834 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), 845 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
835}; 846};
836 847#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
837static struct resource pxa27x_resource_camera[] = {
838 [0] = {
839 .start = 0x50000000,
840 .end = 0x50000fff,
841 .flags = IORESOURCE_MEM,
842 },
843 [1] = {
844 .start = IRQ_CAMERA,
845 .end = IRQ_CAMERA,
846 .flags = IORESOURCE_IRQ,
847 },
848};
849
850static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
851
852static struct platform_device pxa27x_device_camera = {
853 .name = "pxa27x-camera",
854 .id = 0, /* This is used to put cameras on this interface */
855 .dev = {
856 .dma_mask = &pxa27x_dma_mask_camera,
857 .coherent_dma_mask = 0xffffffff,
858 },
859 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
860 .resource = pxa27x_resource_camera,
861};
862
863void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
864{
865 pxa_register_device(&pxa27x_device_camera, info);
866}
867#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
868 848
869#ifdef CONFIG_PXA3xx 849#ifdef CONFIG_PXA3xx
870static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
871
872static struct resource pxa3xx_resource_ssp4[] = {
873 [0] = {
874 .start = 0x41a00000,
875 .end = 0x41a0003f,
876 .flags = IORESOURCE_MEM,
877 },
878 [1] = {
879 .start = IRQ_SSP4,
880 .end = IRQ_SSP4,
881 .flags = IORESOURCE_IRQ,
882 },
883 [2] = {
884 /* DRCMR for RX */
885 .start = 2,
886 .end = 2,
887 .flags = IORESOURCE_DMA,
888 },
889 [3] = {
890 /* DRCMR for TX */
891 .start = 3,
892 .end = 3,
893 .flags = IORESOURCE_DMA,
894 },
895};
896
897struct platform_device pxa3xx_device_ssp4 = {
898 /* PXA3xx SSP is basically equivalent to PXA27x */
899 .name = "pxa27x-ssp",
900 .id = 3,
901 .dev = {
902 .dma_mask = &pxa3xx_ssp4_dma_mask,
903 .coherent_dma_mask = DMA_BIT_MASK(32),
904 },
905 .resource = pxa3xx_resource_ssp4,
906 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
907};
908
909static struct resource pxa3xx_resources_mci2[] = { 850static struct resource pxa3xx_resources_mci2[] = {
910 [0] = { 851 [0] = {
911 .start = 0x42000000, 852 .start = 0x42000000,
@@ -984,6 +925,54 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
984 pxa_register_device(&pxa3xx_device_mci3, info); 925 pxa_register_device(&pxa3xx_device_mci3, info);
985} 926}
986 927
928static struct resource pxa3xx_resources_gcu[] = {
929 {
930 .start = 0x54000000,
931 .end = 0x54000fff,
932 .flags = IORESOURCE_MEM,
933 },
934 {
935 .start = IRQ_GCU,
936 .end = IRQ_GCU,
937 .flags = IORESOURCE_IRQ,
938 },
939};
940
941static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
942
943struct platform_device pxa3xx_device_gcu = {
944 .name = "pxa3xx-gcu",
945 .id = -1,
946 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
947 .resource = pxa3xx_resources_gcu,
948 .dev = {
949 .dma_mask = &pxa3xx_gcu_dmamask,
950 .coherent_dma_mask = 0xffffffff,
951 },
952};
953
954#endif /* CONFIG_PXA3xx */
955
956#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
957static struct resource pxa3xx_resources_i2c_power[] = {
958 {
959 .start = 0x40f500c0,
960 .end = 0x40f500d3,
961 .flags = IORESOURCE_MEM,
962 }, {
963 .start = IRQ_PWRI2C,
964 .end = IRQ_PWRI2C,
965 .flags = IORESOURCE_IRQ,
966 },
967};
968
969struct platform_device pxa3xx_device_i2c_power = {
970 .name = "pxa3xx-pwri2c",
971 .id = 1,
972 .resource = pxa3xx_resources_i2c_power,
973 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
974};
975
987static struct resource pxa3xx_resources_nand[] = { 976static struct resource pxa3xx_resources_nand[] = {
988 [0] = { 977 [0] = {
989 .start = 0x43100000, 978 .start = 0x43100000,
@@ -1027,33 +1016,45 @@ void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1027 pxa_register_device(&pxa3xx_device_nand, info); 1016 pxa_register_device(&pxa3xx_device_nand, info);
1028} 1017}
1029 1018
1030static struct resource pxa3xx_resources_gcu[] = { 1019static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1031 { 1020
1032 .start = 0x54000000, 1021static struct resource pxa3xx_resource_ssp4[] = {
1033 .end = 0x54000fff, 1022 [0] = {
1023 .start = 0x41a00000,
1024 .end = 0x41a0003f,
1034 .flags = IORESOURCE_MEM, 1025 .flags = IORESOURCE_MEM,
1035 }, 1026 },
1036 { 1027 [1] = {
1037 .start = IRQ_GCU, 1028 .start = IRQ_SSP4,
1038 .end = IRQ_GCU, 1029 .end = IRQ_SSP4,
1039 .flags = IORESOURCE_IRQ, 1030 .flags = IORESOURCE_IRQ,
1040 }, 1031 },
1032 [2] = {
1033 /* DRCMR for RX */
1034 .start = 2,
1035 .end = 2,
1036 .flags = IORESOURCE_DMA,
1037 },
1038 [3] = {
1039 /* DRCMR for TX */
1040 .start = 3,
1041 .end = 3,
1042 .flags = IORESOURCE_DMA,
1043 },
1041}; 1044};
1042 1045
1043static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); 1046struct platform_device pxa3xx_device_ssp4 = {
1044 1047 /* PXA3xx SSP is basically equivalent to PXA27x */
1045struct platform_device pxa3xx_device_gcu = { 1048 .name = "pxa27x-ssp",
1046 .name = "pxa3xx-gcu", 1049 .id = 3,
1047 .id = -1,
1048 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
1049 .resource = pxa3xx_resources_gcu,
1050 .dev = { 1050 .dev = {
1051 .dma_mask = &pxa3xx_gcu_dmamask, 1051 .dma_mask = &pxa3xx_ssp4_dma_mask,
1052 .coherent_dma_mask = 0xffffffff, 1052 .coherent_dma_mask = DMA_BIT_MASK(32),
1053 }, 1053 },
1054 .resource = pxa3xx_resource_ssp4,
1055 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1054}; 1056};
1055 1057#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1056#endif /* CONFIG_PXA3xx */
1057 1058
1058/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1059/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1059 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1060 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index ed0dbfdb22ed..4cefd1d18afd 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1300,7 +1300,7 @@ static void __init em_x270_init(void)
1300 1300
1301MACHINE_START(EM_X270, "Compulab EM-X270") 1301MACHINE_START(EM_X270, "Compulab EM-X270")
1302 .boot_params = 0xa0000100, 1302 .boot_params = 0xa0000100,
1303 .map_io = pxa_map_io, 1303 .map_io = pxa27x_map_io,
1304 .init_irq = pxa27x_init_irq, 1304 .init_irq = pxa27x_init_irq,
1305 .timer = &pxa_timer, 1305 .timer = &pxa_timer,
1306 .init_machine = em_x270_init, 1306 .init_machine = em_x270_init,
@@ -1308,7 +1308,7 @@ MACHINE_END
1308 1308
1309MACHINE_START(EXEDA, "Compulab eXeda") 1309MACHINE_START(EXEDA, "Compulab eXeda")
1310 .boot_params = 0xa0000100, 1310 .boot_params = 0xa0000100,
1311 .map_io = pxa_map_io, 1311 .map_io = pxa27x_map_io,
1312 .init_irq = pxa27x_init_irq, 1312 .init_irq = pxa27x_init_irq,
1313 .timer = &pxa_timer, 1313 .timer = &pxa_timer,
1314 .init_machine = em_x270_init, 1314 .init_machine = em_x270_init,
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index b25690ccadc4..edca0a043293 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -181,7 +181,7 @@ static void __init e330_init(void)
181MACHINE_START(E330, "Toshiba e330") 181MACHINE_START(E330, "Toshiba e330")
182 /* Maintainer: Ian Molton (spyro@f2s.com) */ 182 /* Maintainer: Ian Molton (spyro@f2s.com) */
183 .boot_params = 0xa0000100, 183 .boot_params = 0xa0000100,
184 .map_io = pxa_map_io, 184 .map_io = pxa25x_map_io,
185 .nr_irqs = ESERIES_NR_IRQS, 185 .nr_irqs = ESERIES_NR_IRQS,
186 .init_irq = pxa25x_init_irq, 186 .init_irq = pxa25x_init_irq,
187 .fixup = eseries_fixup, 187 .fixup = eseries_fixup,
@@ -230,7 +230,7 @@ static void __init e350_init(void)
230MACHINE_START(E350, "Toshiba e350") 230MACHINE_START(E350, "Toshiba e350")
231 /* Maintainer: Ian Molton (spyro@f2s.com) */ 231 /* Maintainer: Ian Molton (spyro@f2s.com) */
232 .boot_params = 0xa0000100, 232 .boot_params = 0xa0000100,
233 .map_io = pxa_map_io, 233 .map_io = pxa25x_map_io,
234 .nr_irqs = ESERIES_NR_IRQS, 234 .nr_irqs = ESERIES_NR_IRQS,
235 .init_irq = pxa25x_init_irq, 235 .init_irq = pxa25x_init_irq,
236 .fixup = eseries_fixup, 236 .fixup = eseries_fixup,
@@ -352,7 +352,7 @@ static void __init e400_init(void)
352MACHINE_START(E400, "Toshiba e400") 352MACHINE_START(E400, "Toshiba e400")
353 /* Maintainer: Ian Molton (spyro@f2s.com) */ 353 /* Maintainer: Ian Molton (spyro@f2s.com) */
354 .boot_params = 0xa0000100, 354 .boot_params = 0xa0000100,
355 .map_io = pxa_map_io, 355 .map_io = pxa25x_map_io,
356 .nr_irqs = ESERIES_NR_IRQS, 356 .nr_irqs = ESERIES_NR_IRQS,
357 .init_irq = pxa25x_init_irq, 357 .init_irq = pxa25x_init_irq,
358 .fixup = eseries_fixup, 358 .fixup = eseries_fixup,
@@ -540,7 +540,7 @@ static void __init e740_init(void)
540MACHINE_START(E740, "Toshiba e740") 540MACHINE_START(E740, "Toshiba e740")
541 /* Maintainer: Ian Molton (spyro@f2s.com) */ 541 /* Maintainer: Ian Molton (spyro@f2s.com) */
542 .boot_params = 0xa0000100, 542 .boot_params = 0xa0000100,
543 .map_io = pxa_map_io, 543 .map_io = pxa25x_map_io,
544 .nr_irqs = ESERIES_NR_IRQS, 544 .nr_irqs = ESERIES_NR_IRQS,
545 .init_irq = pxa25x_init_irq, 545 .init_irq = pxa25x_init_irq,
546 .fixup = eseries_fixup, 546 .fixup = eseries_fixup,
@@ -731,7 +731,7 @@ static void __init e750_init(void)
731MACHINE_START(E750, "Toshiba e750") 731MACHINE_START(E750, "Toshiba e750")
732 /* Maintainer: Ian Molton (spyro@f2s.com) */ 732 /* Maintainer: Ian Molton (spyro@f2s.com) */
733 .boot_params = 0xa0000100, 733 .boot_params = 0xa0000100,
734 .map_io = pxa_map_io, 734 .map_io = pxa25x_map_io,
735 .nr_irqs = ESERIES_NR_IRQS, 735 .nr_irqs = ESERIES_NR_IRQS,
736 .init_irq = pxa25x_init_irq, 736 .init_irq = pxa25x_init_irq,
737 .fixup = eseries_fixup, 737 .fixup = eseries_fixup,
@@ -926,7 +926,7 @@ static void __init e800_init(void)
926MACHINE_START(E800, "Toshiba e800") 926MACHINE_START(E800, "Toshiba e800")
927 /* Maintainer: Ian Molton (spyro@f2s.com) */ 927 /* Maintainer: Ian Molton (spyro@f2s.com) */
928 .boot_params = 0xa0000100, 928 .boot_params = 0xa0000100,
929 .map_io = pxa_map_io, 929 .map_io = pxa25x_map_io,
930 .nr_irqs = ESERIES_NR_IRQS, 930 .nr_irqs = ESERIES_NR_IRQS,
931 .init_irq = pxa25x_init_irq, 931 .init_irq = pxa25x_init_irq,
932 .fixup = eseries_fixup, 932 .fixup = eseries_fixup,
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 142c711f4cda..87cec0abe5b0 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -798,7 +798,7 @@ static void __init a780_init(void)
798 798
799MACHINE_START(EZX_A780, "Motorola EZX A780") 799MACHINE_START(EZX_A780, "Motorola EZX A780")
800 .boot_params = 0xa0000100, 800 .boot_params = 0xa0000100,
801 .map_io = pxa_map_io, 801 .map_io = pxa27x_map_io,
802 .nr_irqs = EZX_NR_IRQS, 802 .nr_irqs = EZX_NR_IRQS,
803 .init_irq = pxa27x_init_irq, 803 .init_irq = pxa27x_init_irq,
804 .timer = &pxa_timer, 804 .timer = &pxa_timer,
@@ -863,7 +863,7 @@ static void __init e680_init(void)
863 863
864MACHINE_START(EZX_E680, "Motorola EZX E680") 864MACHINE_START(EZX_E680, "Motorola EZX E680")
865 .boot_params = 0xa0000100, 865 .boot_params = 0xa0000100,
866 .map_io = pxa_map_io, 866 .map_io = pxa27x_map_io,
867 .nr_irqs = EZX_NR_IRQS, 867 .nr_irqs = EZX_NR_IRQS,
868 .init_irq = pxa27x_init_irq, 868 .init_irq = pxa27x_init_irq,
869 .timer = &pxa_timer, 869 .timer = &pxa_timer,
@@ -928,7 +928,7 @@ static void __init a1200_init(void)
928 928
929MACHINE_START(EZX_A1200, "Motorola EZX A1200") 929MACHINE_START(EZX_A1200, "Motorola EZX A1200")
930 .boot_params = 0xa0000100, 930 .boot_params = 0xa0000100,
931 .map_io = pxa_map_io, 931 .map_io = pxa27x_map_io,
932 .nr_irqs = EZX_NR_IRQS, 932 .nr_irqs = EZX_NR_IRQS,
933 .init_irq = pxa27x_init_irq, 933 .init_irq = pxa27x_init_irq,
934 .timer = &pxa_timer, 934 .timer = &pxa_timer,
@@ -1118,7 +1118,7 @@ static void __init a910_init(void)
1118 1118
1119MACHINE_START(EZX_A910, "Motorola EZX A910") 1119MACHINE_START(EZX_A910, "Motorola EZX A910")
1120 .boot_params = 0xa0000100, 1120 .boot_params = 0xa0000100,
1121 .map_io = pxa_map_io, 1121 .map_io = pxa27x_map_io,
1122 .nr_irqs = EZX_NR_IRQS, 1122 .nr_irqs = EZX_NR_IRQS,
1123 .init_irq = pxa27x_init_irq, 1123 .init_irq = pxa27x_init_irq,
1124 .timer = &pxa_timer, 1124 .timer = &pxa_timer,
@@ -1183,7 +1183,7 @@ static void __init e6_init(void)
1183 1183
1184MACHINE_START(EZX_E6, "Motorola EZX E6") 1184MACHINE_START(EZX_E6, "Motorola EZX E6")
1185 .boot_params = 0xa0000100, 1185 .boot_params = 0xa0000100,
1186 .map_io = pxa_map_io, 1186 .map_io = pxa27x_map_io,
1187 .nr_irqs = EZX_NR_IRQS, 1187 .nr_irqs = EZX_NR_IRQS,
1188 .init_irq = pxa27x_init_irq, 1188 .init_irq = pxa27x_init_irq,
1189 .timer = &pxa_timer, 1189 .timer = &pxa_timer,
@@ -1222,7 +1222,7 @@ static void __init e2_init(void)
1222 1222
1223MACHINE_START(EZX_E2, "Motorola EZX E2") 1223MACHINE_START(EZX_E2, "Motorola EZX E2")
1224 .boot_params = 0xa0000100, 1224 .boot_params = 0xa0000100,
1225 .map_io = pxa_map_io, 1225 .map_io = pxa27x_map_io,
1226 .nr_irqs = EZX_NR_IRQS, 1226 .nr_irqs = EZX_NR_IRQS,
1227 .init_irq = pxa27x_init_irq, 1227 .init_irq = pxa27x_init_irq,
1228 .timer = &pxa_timer, 1228 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 6451e9c3a93f..d6e15f71fc09 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -28,6 +28,8 @@
28 28
29#include <mach/reset.h> 29#include <mach/reset.h>
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <mach/smemc.h>
32#include <mach/pxa3xx-regs.h>
31 33
32#include "generic.h" 34#include "generic.h"
33 35
@@ -35,9 +37,10 @@ void clear_reset_status(unsigned int mask)
35{ 37{
36 if (cpu_is_pxa2xx()) 38 if (cpu_is_pxa2xx())
37 pxa2xx_clear_reset_status(mask); 39 pxa2xx_clear_reset_status(mask);
38 40 else {
39 if (cpu_is_pxa3xx()) 41 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
40 pxa3xx_clear_reset_status(mask); 42 ARSR = mask;
43 }
41} 44}
42 45
43unsigned long get_clock_tick_rate(void) 46unsigned long get_clock_tick_rate(void)
@@ -71,47 +74,17 @@ unsigned int get_clk_frequency_khz(int info)
71EXPORT_SYMBOL(get_clk_frequency_khz); 74EXPORT_SYMBOL(get_clk_frequency_khz);
72 75
73/* 76/*
74 * Return the current memory clock frequency in units of 10kHz
75 */
76unsigned int get_memclk_frequency_10khz(void)
77{
78 if (cpu_is_pxa25x())
79 return pxa25x_get_memclk_frequency_10khz();
80 else if (cpu_is_pxa27x())
81 return pxa27x_get_memclk_frequency_10khz();
82 return 0;
83}
84EXPORT_SYMBOL(get_memclk_frequency_10khz);
85
86/*
87 * Intel PXA2xx internal register mapping. 77 * Intel PXA2xx internal register mapping.
88 * 78 *
89 * Note 1: not all PXA2xx variants implement all those addresses. 79 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
90 * 80 * and cache flush area.
91 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
92 * and cache flush area.
93 */ 81 */
94static struct map_desc standard_io_desc[] __initdata = { 82static struct map_desc common_io_desc[] __initdata = {
95 { /* Devs */ 83 { /* Devs */
96 .virtual = 0xf2000000, 84 .virtual = 0xf2000000,
97 .pfn = __phys_to_pfn(0x40000000), 85 .pfn = __phys_to_pfn(0x40000000),
98 .length = 0x02000000, 86 .length = 0x02000000,
99 .type = MT_DEVICE 87 .type = MT_DEVICE
100 }, { /* Mem Ctl */
101 .virtual = 0xf6000000,
102 .pfn = __phys_to_pfn(0x48000000),
103 .length = 0x00200000,
104 .type = MT_DEVICE
105 }, { /* Camera */
106 .virtual = 0xfa000000,
107 .pfn = __phys_to_pfn(0x50000000),
108 .length = 0x00100000,
109 .type = MT_DEVICE
110 }, { /* IMem ctl */
111 .virtual = 0xfe000000,
112 .pfn = __phys_to_pfn(0x58000000),
113 .length = 0x00100000,
114 .type = MT_DEVICE
115 }, { /* UNCACHED_PHYS_0 */ 88 }, { /* UNCACHED_PHYS_0 */
116 .virtual = 0xff000000, 89 .virtual = 0xff000000,
117 .pfn = __phys_to_pfn(0x00000000), 90 .pfn = __phys_to_pfn(0x00000000),
@@ -122,6 +95,5 @@ static struct map_desc standard_io_desc[] __initdata = {
122 95
123void __init pxa_map_io(void) 96void __init pxa_map_io(void)
124{ 97{
125 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 98 iotable_init(ARRAY_AND_SIZE(common_io_desc));
126 get_clk_frequency_khz(1);
127} 99}
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 4b1ad2769ed7..6205dc9a2b9d 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -20,7 +20,12 @@ extern void __init pxa26x_init_irq(void);
20#endif 20#endif
21extern void __init pxa27x_init_irq(void); 21extern void __init pxa27x_init_irq(void);
22extern void __init pxa3xx_init_irq(void); 22extern void __init pxa3xx_init_irq(void);
23extern void __init pxa95x_init_irq(void);
24
23extern void __init pxa_map_io(void); 25extern void __init pxa_map_io(void);
26extern void __init pxa25x_map_io(void);
27extern void __init pxa27x_map_io(void);
28extern void __init pxa3xx_map_io(void);
24 29
25extern unsigned int get_clk_frequency_khz(int info); 30extern unsigned int get_clk_frequency_khz(int info);
26 31
@@ -32,18 +37,14 @@ extern unsigned int get_clk_frequency_khz(int info);
32 37
33#ifdef CONFIG_PXA25x 38#ifdef CONFIG_PXA25x
34extern unsigned pxa25x_get_clk_frequency_khz(int); 39extern unsigned pxa25x_get_clk_frequency_khz(int);
35extern unsigned pxa25x_get_memclk_frequency_10khz(void);
36#else 40#else
37#define pxa25x_get_clk_frequency_khz(x) (0) 41#define pxa25x_get_clk_frequency_khz(x) (0)
38#define pxa25x_get_memclk_frequency_10khz() (0)
39#endif 42#endif
40 43
41#ifdef CONFIG_PXA27x 44#ifdef CONFIG_PXA27x
42extern unsigned pxa27x_get_clk_frequency_khz(int); 45extern unsigned pxa27x_get_clk_frequency_khz(int);
43extern unsigned pxa27x_get_memclk_frequency_10khz(void);
44#else 46#else
45#define pxa27x_get_clk_frequency_khz(x) (0) 47#define pxa27x_get_clk_frequency_khz(x) (0)
46#define pxa27x_get_memclk_frequency_10khz() (0)
47#endif 48#endif
48 49
49#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) 50#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
@@ -54,10 +55,8 @@ static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
54 55
55#ifdef CONFIG_PXA3xx 56#ifdef CONFIG_PXA3xx
56extern unsigned pxa3xx_get_clk_frequency_khz(int); 57extern unsigned pxa3xx_get_clk_frequency_khz(int);
57extern void pxa3xx_clear_reset_status(unsigned int);
58#else 58#else
59#define pxa3xx_get_clk_frequency_khz(x) (0) 59#define pxa3xx_get_clk_frequency_khz(x) (0)
60static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
61#endif 60#endif
62 61
63extern struct sysdev_class pxa_irq_sysclass; 62extern struct sysdev_class pxa_irq_sysclass;
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 1e2a9a13aec1..6fd319ea5284 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -225,7 +225,7 @@ static void __init gumstix_init(void)
225 225
226MACHINE_START(GUMSTIX, "Gumstix") 226MACHINE_START(GUMSTIX, "Gumstix")
227 .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ 227 .boot_params = 0xa0000100, /* match u-boot bi_boot_params */
228 .map_io = pxa_map_io, 228 .map_io = pxa25x_map_io,
229 .init_irq = pxa25x_init_irq, 229 .init_irq = pxa25x_init_irq,
230 .timer = &pxa_timer, 230 .timer = &pxa_timer,
231 .init_machine = gumstix_init, 231 .init_machine = gumstix_init,
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 7057a1f46db4..657db469de1f 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -32,6 +32,7 @@
32#include <mach/pxa25x.h> 32#include <mach/pxa25x.h>
33#include <mach/h5000.h> 33#include <mach/h5000.h>
34#include <mach/udc.h> 34#include <mach/udc.h>
35#include <mach/smemc.h>
35 36
36#include "generic.h" 37#include "generic.h"
37 38
@@ -172,11 +173,11 @@ static unsigned long h5000_pin_config[] __initdata = {
172 173
173static void fix_msc(void) 174static void fix_msc(void)
174{ 175{
175 MSC0 = 0x129c24f2; 176 __raw_writel(0x129c24f2, MSC0);
176 MSC1 = 0x7ff424fa; 177 __raw_writel(0x7ff424fa, MSC1);
177 MSC2 = 0x7ff47ff4; 178 __raw_writel(0x7ff47ff4, MSC2);
178 179
179 MDREFR |= 0x02080000; 180 __raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR);
180} 181}
181 182
182/* 183/*
@@ -202,7 +203,7 @@ static void __init h5000_init(void)
202 203
203MACHINE_START(H5400, "HP iPAQ H5000") 204MACHINE_START(H5400, "HP iPAQ H5000")
204 .boot_params = 0xa0000100, 205 .boot_params = 0xa0000100,
205 .map_io = pxa_map_io, 206 .map_io = pxa25x_map_io,
206 .init_irq = pxa25x_init_irq, 207 .init_irq = pxa25x_init_irq,
207 .timer = &pxa_timer, 208 .timer = &pxa_timer,
208 .init_machine = h5000_init, 209 .init_machine = h5000_init,
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index 01b7f07ebad2..e8603eba54bd 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -160,7 +160,7 @@ static void __init himalaya_init(void)
160 160
161MACHINE_START(HIMALAYA, "HTC Himalaya") 161MACHINE_START(HIMALAYA, "HTC Himalaya")
162 .boot_params = 0xa0000100, 162 .boot_params = 0xa0000100,
163 .map_io = pxa_map_io, 163 .map_io = pxa25x_map_io,
164 .init_irq = pxa25x_init_irq, 164 .init_irq = pxa25x_init_irq,
165 .init_machine = himalaya_init, 165 .init_machine = himalaya_init,
166 .timer = &pxa_timer, 166 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 76d93a25bab6..cacb21b7014d 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -871,7 +871,7 @@ static void __init hx4700_init(void)
871 871
872MACHINE_START(H4700, "HP iPAQ HX4700") 872MACHINE_START(H4700, "HP iPAQ HX4700")
873 .boot_params = 0xa0000100, 873 .boot_params = 0xa0000100,
874 .map_io = pxa_map_io, 874 .map_io = pxa27x_map_io,
875 .nr_irqs = HX4700_NR_IRQS, 875 .nr_irqs = HX4700_NR_IRQS,
876 .init_irq = pxa27x_init_irq, 876 .init_irq = pxa27x_init_irq,
877 .init_machine = hx4700_init, 877 .init_machine = hx4700_init,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index d51ee3d25e70..ac6ee12e400e 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -192,7 +192,7 @@ static void __init icontrol_init(void)
192 192
193MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") 193MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
194 .boot_params = 0xa0000100, 194 .boot_params = 0xa0000100,
195 .map_io = pxa_map_io, 195 .map_io = pxa3xx_map_io,
196 .init_irq = pxa3xx_init_irq, 196 .init_irq = pxa3xx_init_irq,
197 .timer = &pxa_timer, 197 .timer = &pxa_timer,
198 .init_machine = icontrol_init 198 .init_machine = icontrol_init
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index e773dceeabc6..dd40e4a9291c 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -187,7 +187,7 @@ static struct map_desc idp_io_desc[] __initdata = {
187 187
188static void __init idp_map_io(void) 188static void __init idp_map_io(void)
189{ 189{
190 pxa_map_io(); 190 pxa25x_map_io();
191 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); 191 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
192} 192}
193 193
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
new file mode 100644
index 000000000000..f4c03659168c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -0,0 +1,48 @@
1#ifndef __ASM_MACH_ADDR_MAP_H
2#define __ASM_MACH_ADDR_MAP_H
3
4/*
5 * Chip Selects
6 */
7#define PXA_CS0_PHYS 0x00000000
8#define PXA_CS1_PHYS 0x04000000
9#define PXA_CS2_PHYS 0x08000000
10#define PXA_CS3_PHYS 0x0C000000
11#define PXA_CS4_PHYS 0x10000000
12#define PXA_CS5_PHYS 0x14000000
13
14#define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
15#define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
16#define PXA3xx_CS2_PHYS 0x10000000
17#define PXA3xx_CS3_PHYS 0x14000000
18
19/*
20 * Peripheral Bus
21 */
22#define PERIPH_PHYS 0x40000000
23#define PERIPH_VIRT 0xf2000000
24#define PERIPH_SIZE 0x02000000
25
26/*
27 * Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
28 */
29#define PXA2XX_SMEMC_PHYS 0x48000000
30#define PXA3XX_SMEMC_PHYS 0x4a000000
31#define SMEMC_VIRT 0xf6000000
32#define SMEMC_SIZE 0x00100000
33
34/*
35 * Dynamic Memory Controller (only on PXA3xx)
36 */
37#define DMEMC_PHYS 0x48100000
38#define DMEMC_VIRT 0xf6100000
39#define DMEMC_SIZE 0x00100000
40
41/*
42 * Internal Memory Controller (PXA27x and later)
43 */
44#define IMEMC_PHYS 0x58000000
45#define IMEMC_VIRT 0xfe000000
46#define IMEMC_SIZE 0x00100000
47
48#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 561562b4360b..7074e76146c9 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -26,6 +26,8 @@ enum balloon3_features {
26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ 26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */
27#define BALLOON3_FPGA_LENGTH 0x01000000 27#define BALLOON3_FPGA_LENGTH 0x01000000
28 28
29#define BALLOON3_FPGA_SETnCLR (0x1000)
30
29/* FPGA / CPLD registers for CF socket */ 31/* FPGA / CPLD registers for CF socket */
30#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 32#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
31#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 33#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
@@ -35,7 +37,7 @@ enum balloon3_features {
35#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) 37#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
36#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) 38#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
37#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) 39#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
38#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010) 40#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
39#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) 41#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
40 42
41/* fpga/cpld interrupt control register */ 43/* fpga/cpld interrupt control register */
@@ -174,7 +176,7 @@ enum balloon3_features {
174#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
175#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
176 178
177#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 4) 179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
178 180
179extern int balloon3_has(enum balloon3_features feature); 181extern int balloon3_has(enum balloon3_features feature);
180 182
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 58dada11054f..388a96f1ef93 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -9,14 +9,14 @@
9 */ 9 */
10 10
11enum { 11enum {
12 COLIBRI_PXA270_EVALBOARD = 0, 12 COLIBRI_EVALBOARD = 0,
13 COLIBRI_PXA270_INCOME, 13 COLIBRI_PXA270_INCOME,
14}; 14};
15 15
16#if defined(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) 16#if defined(CONFIG_MACH_COLIBRI_EVALBOARD)
17extern void colibri_pxa270_evalboard_init(void); 17extern void colibri_evalboard_init(void);
18#else 18#else
19static inline void colibri_pxa270_evalboard_init(void) {} 19static inline void colibri_evalboard_init(void) {}
20#endif 20#endif
21 21
22#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME) 22#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME)
@@ -59,5 +59,11 @@ static inline void colibri_pxa3xx_init_nand(void) {}
59#define GPIO0_COLIBRI_PXA270_SD_DETECT 0 59#define GPIO0_COLIBRI_PXA270_SD_DETECT 0
60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113 60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
61 61
62/* GPIO definitions for Colibri PXA300/310 */
63#define GPIO39_COLIBRI_PXA300_SD_DETECT 39
64
65/* GPIO definitions for Colibri PXA320 */
66#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
67
62#endif /* _COLIBRI_H_ */ 68#endif /* _COLIBRI_H_ */
63 69
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 814f1458a06a..6957ba56025b 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARCH_HARDWARE_H 13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H 14#define __ASM_ARCH_HARDWARE_H
15 15
16#include <mach/addr-map.h>
17
16/* 18/*
17 * Workarounds for at least 2 errata so far require this. 19 * Workarounds for at least 2 errata so far require this.
18 * The mapping is set in mach-pxa/generic.c. 20 * The mapping is set in mach-pxa/generic.c.
@@ -193,14 +195,15 @@
193#define __cpu_is_pxa935(id) (0) 195#define __cpu_is_pxa935(id) (0)
194#endif 196#endif
195 197
196#ifdef CONFIG_CPU_PXA950 198#ifdef CONFIG_CPU_PXA955
197#define __cpu_is_pxa950(id) \ 199#define __cpu_is_pxa955(id) \
198 ({ \ 200 ({ \
199 unsigned int _id = (id) >> 4 & 0xfff; \ 201 unsigned int _id = (id) >> 4 & 0xfff; \
200 _id == 0x697; \ 202 _id == 0x581 || _id == 0xc08 \
201 }) 203 || _id == 0xb76; \
204 })
202#else 205#else
203#define __cpu_is_pxa950(id) (0) 206#define __cpu_is_pxa955(id) (0)
204#endif 207#endif
205 208
206#define cpu_is_pxa210() \ 209#define cpu_is_pxa210() \
@@ -253,16 +256,15 @@
253 __cpu_is_pxa935(read_cpuid_id()); \ 256 __cpu_is_pxa935(read_cpuid_id()); \
254 }) 257 })
255 258
256#define cpu_is_pxa950() \ 259#define cpu_is_pxa955() \
257 ({ \ 260 ({ \
258 __cpu_is_pxa950(read_cpuid_id()); \ 261 __cpu_is_pxa955(read_cpuid_id()); \
259 }) 262 })
260 263
261 264
262/* 265/*
263 * CPUID Core Generation Bit 266 * CPUID Core Generation Bit
264 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x 267 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
265 * == 0x3 for pxa300/pxa310/pxa320
266 */ 268 */
267#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) 269#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
268#define __cpu_is_pxa2xx(id) \ 270#define __cpu_is_pxa2xx(id) \
@@ -277,8 +279,10 @@
277#ifdef CONFIG_PXA3xx 279#ifdef CONFIG_PXA3xx
278#define __cpu_is_pxa3xx(id) \ 280#define __cpu_is_pxa3xx(id) \
279 ({ \ 281 ({ \
280 unsigned int _id = (id) >> 13 & 0x7; \ 282 __cpu_is_pxa300(id) \
281 _id == 0x3; \ 283 || __cpu_is_pxa310(id) \
284 || __cpu_is_pxa320(id) \
285 || __cpu_is_pxa93x(id); \
282 }) 286 })
283#else 287#else
284#define __cpu_is_pxa3xx(id) (0) 288#define __cpu_is_pxa3xx(id) (0)
@@ -287,13 +291,22 @@
287#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935) 291#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935)
288#define __cpu_is_pxa93x(id) \ 292#define __cpu_is_pxa93x(id) \
289 ({ \ 293 ({ \
290 unsigned int _id = (id) >> 4 & 0xfff; \ 294 __cpu_is_pxa930(id) \
291 _id == 0x683 || _id == 0x693; \ 295 || __cpu_is_pxa935(id); \
292 }) 296 })
293#else 297#else
294#define __cpu_is_pxa93x(id) (0) 298#define __cpu_is_pxa93x(id) (0)
295#endif 299#endif
296 300
301#ifdef CONFIG_PXA95x
302#define __cpu_is_pxa95x(id) \
303 ({ \
304 __cpu_is_pxa955(id); \
305 })
306#else
307#define __cpu_is_pxa95x(id) (0)
308#endif
309
297#define cpu_is_pxa2xx() \ 310#define cpu_is_pxa2xx() \
298 ({ \ 311 ({ \
299 __cpu_is_pxa2xx(read_cpuid_id()); \ 312 __cpu_is_pxa2xx(read_cpuid_id()); \
@@ -308,6 +321,12 @@
308 ({ \ 321 ({ \
309 __cpu_is_pxa93x(read_cpuid_id()); \ 322 __cpu_is_pxa93x(read_cpuid_id()); \
310 }) 323 })
324
325#define cpu_is_pxa95x() \
326 ({ \
327 __cpu_is_pxa95x(read_cpuid_id()); \
328 })
329
311/* 330/*
312 * return current memory and LCD clock frequency in units of 10kHz 331 * return current memory and LCD clock frequency in units of 10kHz
313 */ 332 */
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index d372caa75dc7..a4285fc00878 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -21,16 +21,14 @@
21 21
22#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) 22#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
23 23
24#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
25#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ 24#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
26#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ 25#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
27#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ 26#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI,PXA27x) */
28#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ 27#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
29#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ 28#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */
30#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ 29#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt (PXA27x) */
30#define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
31#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ 31#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */
32#endif
33
34#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ 32#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
35#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ 33#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
36#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ 34#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
@@ -38,7 +36,8 @@
38#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ 36#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
39#define IRQ_USB PXA_IRQ(11) /* USB Service */ 37#define IRQ_USB PXA_IRQ(11) /* USB Service */
40#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ 38#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */
41#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ 39#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt (PXA27x) */
40#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */
42#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ 41#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */
43#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ 42#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */
44#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ 43#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */
@@ -47,6 +46,7 @@
47#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ 46#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */
48#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ 47#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */
49#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ 48#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
49#define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */
50#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ 50#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */
51#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ 51#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */
52#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ 52#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/
@@ -60,19 +60,17 @@
60#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ 60#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
61#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ 61#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
62 62
63#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
64#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ 63#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
65#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ 64#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
66#endif
67
68#ifdef CONFIG_PXA3xx
69#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
70#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ 65#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
71#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */ 66#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
72#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ 67#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
68#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
73#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ 69#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
74#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller */ 70#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */
71#define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */
75#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ 72#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
73#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball (PXA930) */
76#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ 74#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
77#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ 75#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
78#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ 76#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
@@ -80,30 +78,14 @@
80#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ 78#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
81#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ 79#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
82#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ 80#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
83#endif
84 81
85#ifdef CONFIG_CPU_PXA935
86#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */ 82#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
87#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */ 83#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
88 84#define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */
89#define IRQ_MMC3_PXA935 PXA_IRQ(72) /* MMC3 Controller (PXA935) */ 85#define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */
90#define IRQ_MMC4_PXA935 PXA_IRQ(73) /* MMC4 Controller (PXA935) */ 86#define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */
91#define IRQ_MMC5_PXA935 PXA_IRQ(74) /* MMC5 Controller (PXA935) */ 87#define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */
92
93#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
94#endif
95
96#ifdef CONFIG_CPU_PXA930
97#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
98#define IRQ_ACIPC0 PXA_IRQ(5)
99#define IRQ_ACIPC1 PXA_IRQ(40)
100#define IRQ_ACIPC2 PXA_IRQ(19)
101#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball */
102#endif
103
104#ifdef CONFIG_CPU_PXA950
105#define IRQ_GC500 PXA_IRQ(70) /* Graphics Controller (PXA950) */
106#endif
107 89
108#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
109#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_GPIO_IRQ_NUM (192)
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 4fcddd9cab76..ee6ced1cea7f 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -17,72 +17,6 @@
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19/* 19/*
20 * PXA Chip selects
21 */
22
23#define PXA_CS0_PHYS 0x00000000
24#define PXA_CS1_PHYS 0x04000000
25#define PXA_CS2_PHYS 0x08000000
26#define PXA_CS3_PHYS 0x0C000000
27#define PXA_CS4_PHYS 0x10000000
28#define PXA_CS5_PHYS 0x14000000
29
30/*
31 * Memory controller
32 */
33
34#define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */
35#define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */
36#define MSC0 __REG(0x48000008) /* Static Memory Control Register 0 */
37#define MSC1 __REG(0x4800000C) /* Static Memory Control Register 1 */
38#define MSC2 __REG(0x48000010) /* Static Memory Control Register 2 */
39#define MECR __REG(0x48000014) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
40#define SXLCR __REG(0x48000018) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
41#define SXCNFG __REG(0x4800001C) /* Synchronous Static Memory Control Register */
42#define SXMRS __REG(0x48000024) /* MRS value to be written to Synchronous Flash or SMROM */
43#define MCMEM0 __REG(0x48000028) /* Card interface Common Memory Space Socket 0 Timing */
44#define MCMEM1 __REG(0x4800002C) /* Card interface Common Memory Space Socket 1 Timing */
45#define MCATT0 __REG(0x48000030) /* Card interface Attribute Space Socket 0 Timing Configuration */
46#define MCATT1 __REG(0x48000034) /* Card interface Attribute Space Socket 1 Timing Configuration */
47#define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */
48#define MCIO1 __REG(0x4800003C) /* Card interface I/O Space Socket 1 Timing Configuration */
49#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */
50#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
51
52/*
53 * More handy macros for PCMCIA
54 *
55 * Arg is socket number
56 */
57#define MCMEM(s) __REG2(0x48000028, (s)<<2 ) /* Card interface Common Memory Space Socket s Timing */
58#define MCATT(s) __REG2(0x48000030, (s)<<2 ) /* Card interface Attribute Space Socket s Timing Configuration */
59#define MCIO(s) __REG2(0x48000038, (s)<<2 ) /* Card interface I/O Space Socket s Timing Configuration */
60
61/* MECR register defines */
62#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
63#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
64
65#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
66#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
67#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
68#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
69
70#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
71#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
72#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
73#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
74#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
75#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
76#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
77#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
78#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
79#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
80#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
81#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
82#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
83#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
84
85/*
86 * Power Manager 20 * Power Manager
87 */ 21 */
88 22
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index e91d63cfe811..e4fb4668c26e 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -16,15 +16,6 @@
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17
18/* 18/*
19 * Static Chip Selects
20 */
21
22#define PXA300_CS0_PHYS (0x00000000) /* PXA300/PXA310 _only_ */
23#define PXA300_CS1_PHYS (0x30000000) /* PXA300/PXA310 _only_ */
24#define PXA3xx_CS2_PHYS (0x10000000)
25#define PXA3xx_CS3_PHYS (0x14000000)
26
27/*
28 * Oscillator Configuration Register (OSCC) 19 * Oscillator Configuration Register (OSCC)
29 */ 20 */
30#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */ 21#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h
index 68464ce1c1ea..662288eb6f95 100644
--- a/arch/arm/mach-pxa/include/mach/regs-intc.h
+++ b/arch/arm/mach-pxa/include/mach/regs-intc.h
@@ -27,8 +27,4 @@
27#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ 27#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */
28#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ 28#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */
29 29
30#define IPR(x) __REG(0x40D0001C + (x < 32 ? (x << 2) \
31 : (x < 64 ? (0x94 + ((x - 32) << 2)) \
32 : (0x128 + ((x - 64) << 2)))))
33
34#endif /* __ASM_MACH_REGS_INTC_H */ 30#endif /* __ASM_MACH_REGS_INTC_H */
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
new file mode 100644
index 000000000000..654adc90c9a0
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -0,0 +1,74 @@
1/*
2 * Static memory controller register definitions for PXA CPUs
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __SMEMC_REGS_H
12#define __SMEMC_REGS_H
13
14#define PXA2XX_SMEMC_BASE 0x48000000
15#define PXA3XX_SMEMC_BASE 0x4a000000
16#define SMEMC_VIRT 0xf6000000
17
18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
20#define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
21#define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
22#define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
23#define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
24#define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
25#define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
26#define SXMRS (SMEMC_VIRT + 0x24) /* MRS value to be written to Synchronous Flash or SMROM */
27#define MCMEM0 (SMEMC_VIRT + 0x28) /* Card interface Common Memory Space Socket 0 Timing */
28#define MCMEM1 (SMEMC_VIRT + 0x2C) /* Card interface Common Memory Space Socket 1 Timing */
29#define MCATT0 (SMEMC_VIRT + 0x30) /* Card interface Attribute Space Socket 0 Timing Configuration */
30#define MCATT1 (SMEMC_VIRT + 0x34) /* Card interface Attribute Space Socket 1 Timing Configuration */
31#define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */
32#define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */
33#define MDMRS (SMEMC_VIRT + 0x40) /* MRS value to be written to SDRAM */
34#define BOOT_DEF (SMEMC_VIRT + 0x44) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
35#define MEMCLKCFG (SMEMC_VIRT + 0x68) /* Clock Configuration */
36#define CSADRCFG0 (SMEMC_VIRT + 0x80) /* Address Configuration Register for CS0 */
37#define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */
38#define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */
39#define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */
40
41/*
42 * More handy macros for PCMCIA
43 *
44 * Arg is socket number
45 */
46#define MCMEM(s) (SMEMC_VIRT + 0x28 + ((s)<<2)) /* Card interface Common Memory Space Socket s Timing */
47#define MCATT(s) (SMEMC_VIRT + 0x30 + ((s)<<2)) /* Card interface Attribute Space Socket s Timing Configuration */
48#define MCIO(s) (SMEMC_VIRT + 0x38 + ((s)<<2)) /* Card interface I/O Space Socket s Timing Configuration */
49
50/* MECR register defines */
51#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
52#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
53
54#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
55#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
56#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
57#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
58
59#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
60#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
61#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
62#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
63#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
64#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
65#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
66#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
67#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
68#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
69#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
70#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
71#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
72#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
73
74#endif
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 1beb40f692fc..54e91c9e71c8 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -16,20 +16,31 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/sysdev.h> 18#include <linux/sysdev.h>
19#include <linux/io.h>
20#include <linux/irq.h>
19 21
20#include <mach/hardware.h> 22#include <mach/hardware.h>
21#include <asm/irq.h> 23#include <mach/irqs.h>
22#include <asm/mach/irq.h>
23#include <mach/gpio.h> 24#include <mach/gpio.h>
24#include <mach/regs-intc.h>
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define MAX_INTERNAL_IRQS 128 28#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000)
29
30#define ICIP (0x000)
31#define ICMR (0x004)
32#define ICLR (0x008)
33#define ICFR (0x00c)
34#define ICPR (0x010)
35#define ICCR (0x014)
36#define ICHP (0x018)
37#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \
38 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
39 (0x144 + (((i) - 64) << 2)))
40#define IPR_VALID (1 << 31)
41#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
29 42
30#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) 43#define MAX_INTERNAL_IRQS 128
31#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
32#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
33 44
34/* 45/*
35 * This is for peripheral IRQs internal to the PXA chip. 46 * This is for peripheral IRQs internal to the PXA chip.
@@ -37,14 +48,27 @@
37 48
38static int pxa_internal_irq_nr; 49static int pxa_internal_irq_nr;
39 50
51static inline int cpu_has_ipr(void)
52{
53 return !cpu_is_pxa25x();
54}
55
40static void pxa_mask_irq(unsigned int irq) 56static void pxa_mask_irq(unsigned int irq)
41{ 57{
42 _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); 58 void __iomem *base = get_irq_chip_data(irq);
59 uint32_t icmr = __raw_readl(base + ICMR);
60
61 icmr &= ~(1 << IRQ_BIT(irq));
62 __raw_writel(icmr, base + ICMR);
43} 63}
44 64
45static void pxa_unmask_irq(unsigned int irq) 65static void pxa_unmask_irq(unsigned int irq)
46{ 66{
47 _ICMR(irq) |= 1 << IRQ_BIT(irq); 67 void __iomem *base = get_irq_chip_data(irq);
68 uint32_t icmr = __raw_readl(base + ICMR);
69
70 icmr |= 1 << IRQ_BIT(irq);
71 __raw_writel(icmr, base + ICMR);
48} 72}
49 73
50static struct irq_chip pxa_internal_irq_chip = { 74static struct irq_chip pxa_internal_irq_chip = {
@@ -86,12 +110,16 @@ static void pxa_ack_low_gpio(unsigned int irq)
86 110
87static void pxa_mask_low_gpio(unsigned int irq) 111static void pxa_mask_low_gpio(unsigned int irq)
88{ 112{
89 ICMR &= ~(1 << (irq - PXA_IRQ(0))); 113 struct irq_desc *desc = irq_to_desc(irq);
114
115 desc->chip->mask(irq);
90} 116}
91 117
92static void pxa_unmask_low_gpio(unsigned int irq) 118static void pxa_unmask_low_gpio(unsigned int irq)
93{ 119{
94 ICMR |= 1 << (irq - PXA_IRQ(0)); 120 struct irq_desc *desc = irq_to_desc(irq);
121
122 desc->chip->unmask(irq);
95} 123}
96 124
97static struct irq_chip pxa_low_gpio_chip = { 125static struct irq_chip pxa_low_gpio_chip = {
@@ -120,33 +148,45 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
120 pxa_low_gpio_chip.set_wake = fn; 148 pxa_low_gpio_chip.set_wake = fn;
121} 149}
122 150
151static inline void __iomem *irq_base(int i)
152{
153 static unsigned long phys_base[] = {
154 0x40d00000,
155 0x40d0009c,
156 0x40d00130,
157 };
158
159 return (void __iomem *)io_p2v(phys_base[i >> 5]);
160}
161
123void __init pxa_init_irq(int irq_nr, set_wake_t fn) 162void __init pxa_init_irq(int irq_nr, set_wake_t fn)
124{ 163{
125 int irq, i; 164 int irq, i, n;
126 165
127 BUG_ON(irq_nr > MAX_INTERNAL_IRQS); 166 BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
128 167
129 pxa_internal_irq_nr = irq_nr; 168 pxa_internal_irq_nr = irq_nr;
130 169
131 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { 170 for (n = 0; n < irq_nr; n += 32) {
132 _ICMR(irq) = 0; /* disable all IRQs */ 171 void __iomem *base = irq_base(n);
133 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ 172
134 } 173 __raw_writel(0, base + ICMR); /* disable all IRQs */
135 174 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */
136 /* initialize interrupt priority */ 175 for (i = n; (i < (n + 32)) && (i < irq_nr); i++) {
137 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 176 /* initialize interrupt priority */
138 for (i = 0; i < irq_nr; i++) 177 if (cpu_has_ipr())
139 IPR(i) = i | (1 << 31); 178 __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
179
180 irq = PXA_IRQ(i);
181 set_irq_chip(irq, &pxa_internal_irq_chip);
182 set_irq_chip_data(irq, base);
183 set_irq_handler(irq, handle_level_irq);
184 set_irq_flags(irq, IRQF_VALID);
185 }
140 } 186 }
141 187
142 /* only unmasked interrupts kick us out of idle */ 188 /* only unmasked interrupts kick us out of idle */
143 ICCR = 1; 189 __raw_writel(1, irq_base(0) + ICCR);
144
145 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) {
146 set_irq_chip(irq, &pxa_internal_irq_chip);
147 set_irq_handler(irq, handle_level_irq);
148 set_irq_flags(irq, IRQF_VALID);
149 }
150 190
151 pxa_internal_irq_chip.set_wake = fn; 191 pxa_internal_irq_chip.set_wake = fn;
152 pxa_init_low_gpio_irq(fn); 192 pxa_init_low_gpio_irq(fn);
@@ -158,16 +198,18 @@ static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
158 198
159static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) 199static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
160{ 200{
161 int i, irq = PXA_IRQ(0); 201 int i;
162 202
163 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 203 for (i = 0; i < pxa_internal_irq_nr; i += 32) {
164 saved_icmr[i] = _ICMR(irq); 204 void __iomem *base = irq_base(i);
165 _ICMR(irq) = 0; 205
206 saved_icmr[i] = __raw_readl(base + ICMR);
207 __raw_writel(0, base + ICMR);
166 } 208 }
167 209
168 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 210 if (cpu_has_ipr()) {
169 for (i = 0; i < pxa_internal_irq_nr; i++) 211 for (i = 0; i < pxa_internal_irq_nr; i++)
170 saved_ipr[i] = IPR(i); 212 saved_ipr[i] = __raw_readl(IRQ_BASE + IPR(i));
171 } 213 }
172 214
173 return 0; 215 return 0;
@@ -175,19 +217,20 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
175 217
176static int pxa_irq_resume(struct sys_device *dev) 218static int pxa_irq_resume(struct sys_device *dev)
177{ 219{
178 int i, irq = PXA_IRQ(0); 220 int i;
179 221
180 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 222 for (i = 0; i < pxa_internal_irq_nr; i += 32) {
181 for (i = 0; i < pxa_internal_irq_nr; i++) 223 void __iomem *base = irq_base(i);
182 IPR(i) = saved_ipr[i];
183 }
184 224
185 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 225 __raw_writel(saved_icmr[i], base + ICMR);
186 _ICMR(irq) = saved_icmr[i]; 226 __raw_writel(0, base + ICLR);
187 _ICLR(irq) = 0;
188 } 227 }
189 228
190 ICCR = 1; 229 if (!cpu_is_pxa25x())
230 for (i = 0; i < pxa_internal_irq_nr; i++)
231 __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));
232
233 __raw_writel(1, IRQ_BASE + ICCR);
191 return 0; 234 return 0;
192} 235}
193#else 236#else
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 41aa89e35772..719c260597e7 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -438,7 +438,7 @@ static void __init littleton_init(void)
438 438
439MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") 439MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
440 .boot_params = 0xa0000100, 440 .boot_params = 0xa0000100,
441 .map_io = pxa_map_io, 441 .map_io = pxa3xx_map_io,
442 .nr_irqs = LITTLETON_NR_IRQS, 442 .nr_irqs = LITTLETON_NR_IRQS,
443 .init_irq = pxa3xx_init_irq, 443 .init_irq = pxa3xx_init_irq,
444 .timer = &pxa_timer, 444 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 623af0232a54..8ab62a677807 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -46,6 +46,7 @@
46#include <mach/mmc.h> 46#include <mach/mmc.h>
47#include <mach/irda.h> 47#include <mach/irda.h>
48#include <mach/ohci.h> 48#include <mach/ohci.h>
49#include <mach/smemc.h>
49 50
50#include "generic.h" 51#include "generic.h"
51#include "devices.h" 52#include "devices.h"
@@ -463,7 +464,7 @@ static void __init lpd270_init(void)
463 pxa_set_btuart_info(NULL); 464 pxa_set_btuart_info(NULL);
464 pxa_set_stuart_info(NULL); 465 pxa_set_stuart_info(NULL);
465 466
466 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 467 lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
467 lpd270_flash_data[1].width = 4; 468 lpd270_flash_data[1].width = 4;
468 469
469 /* 470 /*
@@ -495,7 +496,7 @@ static struct map_desc lpd270_io_desc[] __initdata = {
495 496
496static void __init lpd270_map_io(void) 497static void __init lpd270_map_io(void)
497{ 498{
498 pxa_map_io(); 499 pxa27x_map_io();
499 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); 500 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
500 501
501 /* for use I SRAM as framebuffer. */ 502 /* for use I SRAM as framebuffer. */
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1499493cd070..d3375486c8cd 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -50,6 +50,7 @@
50#include <mach/pxafb.h> 50#include <mach/pxafb.h>
51#include <mach/mmc.h> 51#include <mach/mmc.h>
52#include <mach/pm.h> 52#include <mach/pm.h>
53#include <mach/smemc.h>
53 54
54#include "generic.h" 55#include "generic.h"
55#include "clock.h" 56#include "clock.h"
@@ -525,7 +526,7 @@ static void __init lubbock_init(void)
525 pxa_set_ac97_info(NULL); 526 pxa_set_ac97_info(NULL);
526 527
527 lubbock_flash_data[0].width = lubbock_flash_data[1].width = 528 lubbock_flash_data[0].width = lubbock_flash_data[1].width =
528 (BOOT_DEF & 1) ? 2 : 4; 529 (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
529 /* Compensate for the nROMBT switch which swaps the flash banks */ 530 /* Compensate for the nROMBT switch which swaps the flash banks */
530 printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n", 531 printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
531 flashboot?"Flash":"ROM", flashboot); 532 flashboot?"Flash":"ROM", flashboot);
@@ -549,7 +550,7 @@ static struct map_desc lubbock_io_desc[] __initdata = {
549 550
550static void __init lubbock_map_io(void) 551static void __init lubbock_map_io(void)
551{ 552{
552 pxa_map_io(); 553 pxa25x_map_io();
553 iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); 554 iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
554 555
555 PCFR |= PCFR_OPDE; 556 PCFR |= PCFR_OPDE;
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 90663760307a..41198f0dc3ac 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -765,7 +765,7 @@ static void __init magician_init(void)
765 765
766MACHINE_START(MAGICIAN, "HTC Magician") 766MACHINE_START(MAGICIAN, "HTC Magician")
767 .boot_params = 0xa0000100, 767 .boot_params = 0xa0000100,
768 .map_io = pxa_map_io, 768 .map_io = pxa27x_map_io,
769 .nr_irqs = MAGICIAN_NR_IRQS, 769 .nr_irqs = MAGICIAN_NR_IRQS,
770 .init_irq = pxa27x_init_irq, 770 .init_irq = pxa27x_init_irq,
771 .init_machine = magician_init, 771 .init_machine = magician_init,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index a980a5c93e49..740c03590e3b 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -51,6 +51,7 @@
51#include <mach/irda.h> 51#include <mach/irda.h>
52#include <mach/ohci.h> 52#include <mach/ohci.h>
53#include <plat/pxa27x_keypad.h> 53#include <plat/pxa27x_keypad.h>
54#include <mach/smemc.h>
54 55
55#include "generic.h" 56#include "generic.h"
56#include "devices.h" 57#include "devices.h"
@@ -565,7 +566,7 @@ static void __init mainstone_init(void)
565 pxa_set_btuart_info(NULL); 566 pxa_set_btuart_info(NULL);
566 pxa_set_stuart_info(NULL); 567 pxa_set_stuart_info(NULL);
567 568
568 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 569 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
569 mst_flash_data[1].width = 4; 570 mst_flash_data[1].width = 4;
570 571
571 /* Compensate for SW7 which swaps the flash banks */ 572 /* Compensate for SW7 which swaps the flash banks */
@@ -614,7 +615,7 @@ static struct map_desc mainstone_io_desc[] __initdata = {
614 615
615static void __init mainstone_map_io(void) 616static void __init mainstone_map_io(void)
616{ 617{
617 pxa_map_io(); 618 pxa27x_map_io();
618 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); 619 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
619 620
620 /* for use I SRAM as framebuffer. */ 621 /* for use I SRAM as framebuffer. */
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index f5fb915e1315..faafea3542fb 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -819,7 +819,7 @@ static void mioa701_machine_exit(void)
819 819
820MACHINE_START(MIOA701, "MIO A701") 820MACHINE_START(MIOA701, "MIO A701")
821 .boot_params = 0xa0000100, 821 .boot_params = 0xa0000100,
822 .map_io = &pxa_map_io, 822 .map_io = &pxa27x_map_io,
823 .init_irq = &pxa27x_init_irq, 823 .init_irq = &pxa27x_init_irq,
824 .init_machine = mioa701_machine_init, 824 .init_machine = mioa701_machine_init,
825 .timer = &pxa_timer, 825 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 116167aaba68..59cce78aebd1 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -94,7 +94,7 @@ static void __init mp900c_init(void)
94MACHINE_START(NEC_MP900, "MobilePro900/C") 94MACHINE_START(NEC_MP900, "MobilePro900/C")
95 .boot_params = 0xa0220100, 95 .boot_params = 0xa0220100,
96 .timer = &pxa_timer, 96 .timer = &pxa_timer,
97 .map_io = pxa_map_io, 97 .map_io = pxa25x_map_io,
98 .init_irq = pxa25x_init_irq, 98 .init_irq = pxa25x_init_irq,
99 .init_machine = mp900c_init, 99 .init_machine = mp900c_init,
100MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index ce092c521e6d..a6f898cbfac9 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -313,7 +313,7 @@ static struct map_desc palmld_io_desc[] __initdata = {
313 313
314static void __init palmld_map_io(void) 314static void __init palmld_map_io(void)
315{ 315{
316 pxa_map_io(); 316 pxa27x_map_io();
317 iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc)); 317 iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc));
318} 318}
319 319
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 862da812cd10..df4d7d009fbb 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -203,7 +203,7 @@ static void __init palmt5_init(void)
203 203
204MACHINE_START(PALMT5, "Palm Tungsten|T5") 204MACHINE_START(PALMT5, "Palm Tungsten|T5")
205 .boot_params = 0xa0000100, 205 .boot_params = 0xa0000100,
206 .map_io = pxa_map_io, 206 .map_io = pxa27x_map_io,
207 .reserve = palmt5_reserve, 207 .reserve = palmt5_reserve,
208 .init_irq = pxa27x_init_irq, 208 .init_irq = pxa27x_init_irq,
209 .timer = &pxa_timer, 209 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 2131d5860919..a09a2374697b 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -25,6 +25,7 @@
25#include <linux/power_supply.h> 25#include <linux/power_supply.h>
26#include <linux/gpio_keys.h> 26#include <linux/gpio_keys.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/usb/gpio_vbus.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -116,6 +117,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
116/****************************************************************************** 117/******************************************************************************
117 * SD/MMC card controller 118 * SD/MMC card controller
118 ******************************************************************************/ 119 ******************************************************************************/
120#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
119static struct pxamci_platform_data palmtc_mci_platform_data = { 121static struct pxamci_platform_data palmtc_mci_platform_data = {
120 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 122 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
121 .gpio_power = GPIO_NR_PALMTC_SD_POWER, 123 .gpio_power = GPIO_NR_PALMTC_SD_POWER,
@@ -124,9 +126,18 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
124 .detect_delay_ms = 200, 126 .detect_delay_ms = 200,
125}; 127};
126 128
129static void __init palmtc_mmc_init(void)
130{
131 pxa_set_mci_info(&palmtc_mci_platform_data);
132}
133#else
134static inline void palmtc_mmc_init(void) {}
135#endif
136
127/****************************************************************************** 137/******************************************************************************
128 * GPIO keys 138 * GPIO keys
129 ******************************************************************************/ 139 ******************************************************************************/
140#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
130static struct gpio_keys_button palmtc_pxa_buttons[] = { 141static struct gpio_keys_button palmtc_pxa_buttons[] = {
131 {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1}, 142 {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
132}; 143};
@@ -144,9 +155,18 @@ static struct platform_device palmtc_pxa_keys = {
144 }, 155 },
145}; 156};
146 157
158static void __init palmtc_keys_init(void)
159{
160 platform_device_register(&palmtc_pxa_keys);
161}
162#else
163static inline void palmtc_keys_init(void) {}
164#endif
165
147/****************************************************************************** 166/******************************************************************************
148 * Backlight 167 * Backlight
149 ******************************************************************************/ 168 ******************************************************************************/
169#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
150static int palmtc_backlight_init(struct device *dev) 170static int palmtc_backlight_init(struct device *dev)
151{ 171{
152 int ret; 172 int ret;
@@ -196,17 +216,35 @@ static struct platform_device palmtc_backlight = {
196 }, 216 },
197}; 217};
198 218
219static void __init palmtc_pwm_init(void)
220{
221 platform_device_register(&palmtc_backlight);
222}
223#else
224static inline void palmtc_pwm_init(void) {}
225#endif
226
199/****************************************************************************** 227/******************************************************************************
200 * IrDA 228 * IrDA
201 ******************************************************************************/ 229 ******************************************************************************/
230#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
202static struct pxaficp_platform_data palmtc_ficp_platform_data = { 231static struct pxaficp_platform_data palmtc_ficp_platform_data = {
203 .gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE, 232 .gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE,
204 .transceiver_cap = IR_SIRMODE | IR_OFF, 233 .transceiver_cap = IR_SIRMODE | IR_OFF,
205}; 234};
206 235
236static void __init palmtc_irda_init(void)
237{
238 pxa_set_ficp_info(&palmtc_ficp_platform_data);
239}
240#else
241static inline void palmtc_irda_init(void) {}
242#endif
243
207/****************************************************************************** 244/******************************************************************************
208 * Keyboard 245 * Keyboard
209 ******************************************************************************/ 246 ******************************************************************************/
247#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
210static const uint32_t palmtc_matrix_keys[] = { 248static const uint32_t palmtc_matrix_keys[] = {
211 KEY(0, 0, KEY_F1), 249 KEY(0, 0, KEY_F1),
212 KEY(0, 1, KEY_X), 250 KEY(0, 1, KEY_X),
@@ -290,27 +328,103 @@ static struct platform_device palmtc_keyboard = {
290 .platform_data = &palmtc_keypad_platform_data, 328 .platform_data = &palmtc_keypad_platform_data,
291 }, 329 },
292}; 330};
331static void __init palmtc_mkp_init(void)
332{
333 platform_device_register(&palmtc_keyboard);
334}
335#else
336static inline void palmtc_mkp_init(void) {}
337#endif
293 338
294/****************************************************************************** 339/******************************************************************************
295 * UDC 340 * UDC
296 ******************************************************************************/ 341 ******************************************************************************/
297static struct pxa2xx_udc_mach_info palmtc_udc_info __initdata = { 342#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
343static struct gpio_vbus_mach_info palmtc_udc_info = {
298 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N, 344 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
299 .gpio_vbus_inverted = 1, 345 .gpio_vbus_inverted = 1,
300 .gpio_pullup = GPIO_NR_PALMTC_USB_POWER, 346 .gpio_pullup = GPIO_NR_PALMTC_USB_POWER,
301}; 347};
302 348
349static struct platform_device palmtc_gpio_vbus = {
350 .name = "gpio-vbus",
351 .id = -1,
352 .dev = {
353 .platform_data = &palmtc_udc_info,
354 },
355};
356
357static void __init palmtc_udc_init(void)
358{
359 platform_device_register(&palmtc_gpio_vbus);
360};
361#else
362static inline void palmtc_udc_init(void) {}
363#endif
364
303/****************************************************************************** 365/******************************************************************************
304 * Touchscreen / Battery / GPIO-extender 366 * Touchscreen / Battery / GPIO-extender
305 ******************************************************************************/ 367 ******************************************************************************/
306static struct platform_device palmtc_ucb1400_core = { 368#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
369 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
370static struct platform_device palmtc_ucb1400_device = {
307 .name = "ucb1400_core", 371 .name = "ucb1400_core",
308 .id = -1, 372 .id = -1,
309}; 373};
310 374
375static void __init palmtc_ts_init(void)
376{
377 pxa_set_ac97_info(NULL);
378 platform_device_register(&palmtc_ucb1400_device);
379}
380#else
381static inline void palmtc_ts_init(void) {}
382#endif
383
384/******************************************************************************
385 * LEDs
386 ******************************************************************************/
387#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
388struct gpio_led palmtc_gpio_leds[] = {
389{
390 .name = "palmtc:green:user",
391 .default_trigger = "none",
392 .gpio = GPIO_NR_PALMTC_LED_POWER,
393 .active_low = 1,
394}, {
395 .name = "palmtc:vibra:vibra",
396 .default_trigger = "none",
397 .gpio = GPIO_NR_PALMTC_VIBRA_POWER,
398 .active_low = 1,
399}
400
401};
402
403static struct gpio_led_platform_data palmtc_gpio_led_info = {
404 .leds = palmtc_gpio_leds,
405 .num_leds = ARRAY_SIZE(palmtc_gpio_leds),
406};
407
408static struct platform_device palmtc_leds = {
409 .name = "leds-gpio",
410 .id = -1,
411 .dev = {
412 .platform_data = &palmtc_gpio_led_info,
413 }
414};
415
416static void __init palmtc_leds_init(void)
417{
418 platform_device_register(&palmtc_leds);
419}
420#else
421static inline void palmtc_leds_init(void) {}
422#endif
423
311/****************************************************************************** 424/******************************************************************************
312 * NOR Flash 425 * NOR Flash
313 ******************************************************************************/ 426 ******************************************************************************/
427#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
314static struct resource palmtc_flash_resource = { 428static struct resource palmtc_flash_resource = {
315 .start = PXA_CS0_PHYS, 429 .start = PXA_CS0_PHYS,
316 .end = PXA_CS0_PHYS + SZ_16M - 1, 430 .end = PXA_CS0_PHYS + SZ_16M - 1,
@@ -356,24 +470,33 @@ static struct platform_device palmtc_flash = {
356 }, 470 },
357}; 471};
358 472
473static void __init palmtc_nor_init(void)
474{
475 platform_device_register(&palmtc_flash);
476}
477#else
478static inline void palmtc_nor_init(void) {}
479#endif
480
359/****************************************************************************** 481/******************************************************************************
360 * Framebuffer 482 * Framebuffer
361 ******************************************************************************/ 483 ******************************************************************************/
484#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
362static struct pxafb_mode_info palmtc_lcd_modes[] = { 485static struct pxafb_mode_info palmtc_lcd_modes[] = {
363{ 486 {
364 .pixclock = 115384, 487 .pixclock = 115384,
365 .xres = 320, 488 .xres = 320,
366 .yres = 320, 489 .yres = 320,
367 .bpp = 16, 490 .bpp = 16,
368 491
369 .left_margin = 27, 492 .left_margin = 27,
370 .right_margin = 7, 493 .right_margin = 7,
371 .upper_margin = 7, 494 .upper_margin = 7,
372 .lower_margin = 8, 495 .lower_margin = 8,
373 496
374 .hsync_len = 6, 497 .hsync_len = 6,
375 .vsync_len = 1, 498 .vsync_len = 1,
376}, 499 },
377}; 500};
378 501
379static struct pxafb_mach_info palmtc_lcd_screen = { 502static struct pxafb_mach_info palmtc_lcd_screen = {
@@ -382,17 +505,17 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
382 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 505 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
383}; 506};
384 507
508static void __init palmtc_lcd_init(void)
509{
510 set_pxa_fb_info(&palmtc_lcd_screen);
511}
512#else
513static inline void palmtc_lcd_init(void) {}
514#endif
515
385/****************************************************************************** 516/******************************************************************************
386 * Machine init 517 * Machine init
387 ******************************************************************************/ 518 ******************************************************************************/
388static struct platform_device *devices[] __initdata = {
389 &palmtc_backlight,
390 &palmtc_ucb1400_core,
391 &palmtc_keyboard,
392 &palmtc_pxa_keys,
393 &palmtc_flash,
394};
395
396static void __init palmtc_init(void) 519static void __init palmtc_init(void)
397{ 520{
398 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config)); 521 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
@@ -402,18 +525,21 @@ static void __init palmtc_init(void)
402 pxa_set_stuart_info(NULL); 525 pxa_set_stuart_info(NULL);
403 pxa_set_hwuart_info(NULL); 526 pxa_set_hwuart_info(NULL);
404 527
405 set_pxa_fb_info(&palmtc_lcd_screen); 528 palmtc_mmc_init();
406 pxa_set_mci_info(&palmtc_mci_platform_data); 529 palmtc_keys_init();
407 pxa_set_udc_info(&palmtc_udc_info); 530 palmtc_pwm_init();
408 pxa_set_ac97_info(NULL); 531 palmtc_irda_init();
409 pxa_set_ficp_info(&palmtc_ficp_platform_data); 532 palmtc_mkp_init();
410 533 palmtc_udc_init();
411 platform_add_devices(devices, ARRAY_SIZE(devices)); 534 palmtc_ts_init();
535 palmtc_nor_init();
536 palmtc_lcd_init();
537 palmtc_leds_init();
412}; 538};
413 539
414MACHINE_START(PALMTC, "Palm Tungsten|C") 540MACHINE_START(PALMTC, "Palm Tungsten|C")
415 .boot_params = 0xa0000100, 541 .boot_params = 0xa0000100,
416 .map_io = pxa_map_io, 542 .map_io = pxa25x_map_io,
417 .init_irq = pxa25x_init_irq, 543 .init_irq = pxa25x_init_irq,
418 .timer = &pxa_timer, 544 .timer = &pxa_timer,
419 .init_machine = palmtc_init 545 .init_machine = palmtc_init
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index a9dae7bc35d9..3f25014a136c 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -374,7 +374,7 @@ static void __init palmte2_init(void)
374 374
375MACHINE_START(PALMTE2, "Palm Tungsten|E2") 375MACHINE_START(PALMTE2, "Palm Tungsten|E2")
376 .boot_params = 0xa0000100, 376 .boot_params = 0xa0000100,
377 .map_io = pxa_map_io, 377 .map_io = pxa25x_map_io,
378 .init_irq = pxa25x_init_irq, 378 .init_irq = pxa25x_init_irq,
379 .timer = &pxa_timer, 379 .timer = &pxa_timer,
380 .init_machine = palmte2_init 380 .init_machine = palmte2_init
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 00e2d7ba84ed..8aadad55fbe4 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -442,7 +442,7 @@ static void __init centro_init(void)
442 442
443MACHINE_START(TREO680, "Palm Treo 680") 443MACHINE_START(TREO680, "Palm Treo 680")
444 .boot_params = 0xa0000100, 444 .boot_params = 0xa0000100,
445 .map_io = pxa_map_io, 445 .map_io = pxa27x_map_io,
446 .reserve = treo_reserve, 446 .reserve = treo_reserve,
447 .init_irq = pxa27x_init_irq, 447 .init_irq = pxa27x_init_irq,
448 .timer = &pxa_timer, 448 .timer = &pxa_timer,
@@ -451,7 +451,7 @@ MACHINE_END
451 451
452MACHINE_START(CENTRO, "Palm Centro 685") 452MACHINE_START(CENTRO, "Palm Centro 685")
453 .boot_params = 0xa0000100, 453 .boot_params = 0xa0000100,
454 .map_io = pxa_map_io, 454 .map_io = pxa27x_map_io,
455 .reserve = treo_reserve, 455 .reserve = treo_reserve,
456 .init_irq = pxa27x_init_irq, 456 .init_irq = pxa27x_init_irq,
457 .timer = &pxa_timer, 457 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index d2060a1d1d68..595f002066cc 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {}
241/****************************************************************************** 241/******************************************************************************
242 * NAND Flash 242 * NAND Flash
243 ******************************************************************************/ 243 ******************************************************************************/
244#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) 244#if defined(CONFIG_MTD_NAND_PLATFORM) || \
245 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
245static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, 246static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
246 unsigned int ctrl) 247 unsigned int ctrl)
247{ 248{
@@ -333,7 +334,7 @@ static struct map_desc palmtx_io_desc[] __initdata = {
333 334
334static void __init palmtx_map_io(void) 335static void __init palmtx_map_io(void)
335{ 336{
336 pxa_map_io(); 337 pxa27x_map_io();
337 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); 338 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
338} 339}
339 340
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index af6203fbca9c..7bf4017326e3 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -280,7 +280,7 @@ static void __init palmz72_init(void)
280 280
281MACHINE_START(PALMZ72, "Palm Zire72") 281MACHINE_START(PALMZ72, "Palm Zire72")
282 .boot_params = 0xa0000100, 282 .boot_params = 0xa0000100,
283 .map_io = pxa_map_io, 283 .map_io = pxa27x_map_io,
284 .init_irq = pxa27x_init_irq, 284 .init_irq = pxa27x_init_irq,
285 .timer = &pxa_timer, 285 .timer = &pxa_timer,
286 .init_machine = palmz72_init 286 .init_machine = palmz72_init
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index c77e8f30a439..8547c9abc40a 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -244,7 +244,7 @@ static void __init pcm027_init(void)
244 244
245static void __init pcm027_map_io(void) 245static void __init pcm027_map_io(void)
246{ 246{
247 pxa_map_io(); 247 pxa27x_map_io();
248 248
249 /* initialize sleep mode regs (wake-up sources, etc) */ 249 /* initialize sleep mode regs (wake-up sources, etc) */
250 PGSR0 = 0x01308000; 250 PGSR0 = 0x01308000;
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 93a191c889df..8451790cb48d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -466,7 +466,7 @@ static void __init fixup_poodle(struct machine_desc *desc,
466 466
467MACHINE_START(POODLE, "SHARP Poodle") 467MACHINE_START(POODLE, "SHARP Poodle")
468 .fixup = fixup_poodle, 468 .fixup = fixup_poodle,
469 .map_io = pxa_map_io, 469 .map_io = pxa25x_map_io,
470 .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ 470 .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */
471 .init_irq = pxa25x_init_irq, 471 .init_irq = pxa25x_init_irq,
472 .timer = &pxa_timer, 472 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index de53f2e4aa39..3f5241c84894 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -23,6 +23,7 @@
23#include <linux/suspend.h> 23#include <linux/suspend.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25 25
26#include <asm/mach/map.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
28#include <mach/gpio.h> 29#include <mach/gpio.h>
@@ -30,6 +31,7 @@
30#include <mach/reset.h> 31#include <mach/reset.h>
31#include <mach/pm.h> 32#include <mach/pm.h>
32#include <mach/dma.h> 33#include <mach/dma.h>
34#include <mach/smemc.h>
33 35
34#include "generic.h" 36#include "generic.h"
35#include "devices.h" 37#include "devices.h"
@@ -90,23 +92,21 @@ unsigned int pxa25x_get_clk_frequency_khz(int info)
90 return (turbo & 1) ? (N/1000) : (M/1000); 92 return (turbo & 1) ? (N/1000) : (M/1000);
91} 93}
92 94
93/* 95static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
94 * Return the current memory clock frequency in units of 10kHz
95 */
96unsigned int pxa25x_get_memclk_frequency_10khz(void)
97{ 96{
98 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; 97 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
99} 98}
100 99
101static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk) 100static const struct clkops clk_pxa25x_mem_ops = {
102{ 101 .enable = clk_dummy_enable,
103 return pxa25x_get_memclk_frequency_10khz() * 10000; 102 .disable = clk_dummy_disable,
104} 103 .getrate = clk_pxa25x_mem_getrate,
104};
105 105
106static const struct clkops clk_pxa25x_lcd_ops = { 106static const struct clkops clk_pxa25x_lcd_ops = {
107 .enable = clk_cken_enable, 107 .enable = clk_pxa2xx_cken_enable,
108 .disable = clk_cken_disable, 108 .disable = clk_pxa2xx_cken_disable,
109 .getrate = clk_pxa25x_lcd_getrate, 109 .getrate = clk_pxa25x_mem_getrate,
110}; 110};
111 111
112static unsigned long gpio12_config_32k[] = { 112static unsigned long gpio12_config_32k[] = {
@@ -160,31 +160,30 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
160 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz 160 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
161 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) 161 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
162 */ 162 */
163static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
164
165static struct clk_lookup pxa25x_hwuart_clkreg =
166 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
167 163
168/* 164/*
169 * PXA 2xx clock declarations. 165 * PXA 2xx clock declarations.
170 */ 166 */
167static DEFINE_PXA2_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
168static DEFINE_PXA2_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
169static DEFINE_PXA2_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
170static DEFINE_PXA2_CKEN(pxa25x_stuart, STUART, 14745600, 1);
171static DEFINE_PXA2_CKEN(pxa25x_usb, USB, 47923000, 5);
172static DEFINE_PXA2_CKEN(pxa25x_mmc, MMC, 19169000, 0);
173static DEFINE_PXA2_CKEN(pxa25x_i2c, I2C, 31949000, 0);
174static DEFINE_PXA2_CKEN(pxa25x_ssp, SSP, 3686400, 0);
175static DEFINE_PXA2_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
176static DEFINE_PXA2_CKEN(pxa25x_assp, ASSP, 3686400, 0);
177static DEFINE_PXA2_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
178static DEFINE_PXA2_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
179static DEFINE_PXA2_CKEN(pxa25x_ac97, AC97, 24576000, 0);
180static DEFINE_PXA2_CKEN(pxa25x_i2s, I2S, 14745600, 0);
181static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);
182
171static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops); 183static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
172static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
173static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
174static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
175static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
176static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0); 184static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
177static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0); 185static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
178static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0); 186static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
179static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
180static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
181static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
182static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
183static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
184static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
185static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
186static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
187static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
188 187
189static struct clk_lookup pxa25x_clkregs[] = { 188static struct clk_lookup pxa25x_clkregs[] = {
190 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL), 189 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
@@ -205,8 +204,12 @@ static struct clk_lookup pxa25x_clkregs[] = {
205 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"), 204 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
206 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 205 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
207 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 206 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
207 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
208}; 208};
209 209
210static struct clk_lookup pxa25x_hwuart_clkreg =
211 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
212
210#ifdef CONFIG_PM 213#ifdef CONFIG_PM
211 214
212#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 215#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
@@ -219,20 +222,17 @@ static struct clk_lookup pxa25x_clkregs[] = {
219 */ 222 */
220enum { 223enum {
221 SLEEP_SAVE_PSTR, 224 SLEEP_SAVE_PSTR,
222 SLEEP_SAVE_CKEN,
223 SLEEP_SAVE_COUNT 225 SLEEP_SAVE_COUNT
224}; 226};
225 227
226 228
227static void pxa25x_cpu_pm_save(unsigned long *sleep_save) 229static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
228{ 230{
229 SAVE(CKEN);
230 SAVE(PSTR); 231 SAVE(PSTR);
231} 232}
232 233
233static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) 234static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
234{ 235{
235 RESTORE(CKEN);
236 RESTORE(PSTR); 236 RESTORE(PSTR);
237} 237}
238 238
@@ -320,6 +320,22 @@ void __init pxa26x_init_irq(void)
320} 320}
321#endif 321#endif
322 322
323static struct map_desc pxa25x_io_desc[] __initdata = {
324 { /* Mem Ctl */
325 .virtual = SMEMC_VIRT,
326 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
327 .length = 0x00200000,
328 .type = MT_DEVICE
329 },
330};
331
332void __init pxa25x_map_io(void)
333{
334 pxa_map_io();
335 iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
336 pxa25x_get_clk_frequency_khz(1);
337}
338
323static struct platform_device *pxa25x_devices[] __initdata = { 339static struct platform_device *pxa25x_devices[] __initdata = {
324 &pxa25x_device_udc, 340 &pxa25x_device_udc,
325 &pxa_device_pmu, 341 &pxa_device_pmu,
@@ -339,7 +355,9 @@ static struct sys_device pxa25x_sysdev[] = {
339 .cls = &pxa2xx_mfp_sysclass, 355 .cls = &pxa2xx_mfp_sysclass,
340 }, { 356 }, {
341 .cls = &pxa_gpio_sysclass, 357 .cls = &pxa_gpio_sysclass,
342 }, 358 }, {
359 .cls = &pxa2xx_clock_sysclass,
360 }
343}; 361};
344 362
345static int __init pxa25x_init(void) 363static int __init pxa25x_init(void)
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d1fbf29d561c..b2130b7a7b52 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -17,7 +17,9 @@
17#include <linux/suspend.h> 17#include <linux/suspend.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/io.h>
20 21
22#include <asm/mach/map.h>
21#include <mach/hardware.h> 23#include <mach/hardware.h>
22#include <asm/irq.h> 24#include <asm/irq.h>
23#include <mach/irqs.h> 25#include <mach/irqs.h>
@@ -27,6 +29,8 @@
27#include <mach/ohci.h> 29#include <mach/ohci.h>
28#include <mach/pm.h> 30#include <mach/pm.h>
29#include <mach/dma.h> 31#include <mach/dma.h>
32#include <mach/smemc.h>
33
30#include <plat/i2c.h> 34#include <plat/i2c.h>
31 35
32#include "generic.h" 36#include "generic.h"
@@ -107,10 +111,9 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
107} 111}
108 112
109/* 113/*
110 * Return the current mem clock frequency in units of 10kHz as 114 * Return the current mem clock frequency as reflected by CCCR[A], B, and L
111 * reflected by CCCR[A], B, and L
112 */ 115 */
113unsigned int pxa27x_get_memclk_frequency_10khz(void) 116static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
114{ 117{
115 unsigned long ccsr, clkcfg; 118 unsigned long ccsr, clkcfg;
116 unsigned int l, L, m, M; 119 unsigned int l, L, m, M;
@@ -129,9 +132,15 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
129 L = l * BASE_CLK; 132 L = l * BASE_CLK;
130 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); 133 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
131 134
132 return (M / 10000); 135 return M;
133} 136}
134 137
138static const struct clkops clk_pxa27x_mem_ops = {
139 .enable = clk_dummy_enable,
140 .disable = clk_dummy_disable,
141 .getrate = clk_pxa27x_mem_getrate,
142};
143
135/* 144/*
136 * Return the current LCD clock frequency in units of 10kHz as 145 * Return the current LCD clock frequency in units of 10kHz as
137 */ 146 */
@@ -157,36 +166,38 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
157} 166}
158 167
159static const struct clkops clk_pxa27x_lcd_ops = { 168static const struct clkops clk_pxa27x_lcd_ops = {
160 .enable = clk_cken_enable, 169 .enable = clk_pxa2xx_cken_enable,
161 .disable = clk_cken_disable, 170 .disable = clk_pxa2xx_cken_disable,
162 .getrate = clk_pxa27x_lcd_getrate, 171 .getrate = clk_pxa27x_lcd_getrate,
163}; 172};
164 173
174static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
175static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
176static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1);
177static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0);
178static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0);
179static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5);
180static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0);
181static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0);
182static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
183static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
184static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
185static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
186static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
187static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
188static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
189static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
190static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0);
191static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
192static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0);
193static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0);
194static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
195static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0);
196static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);
197
165static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops); 198static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
166static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops); 199static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
167static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1); 200static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
168static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
169static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
170static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
171static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
172static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
173static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
174static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
175static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
176static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
177static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
178static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
179static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
180static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
181static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
182static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
183static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
184static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
185static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
186static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
187static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
188static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
189static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
190 201
191static struct clk_lookup pxa27x_clkregs[] = { 202static struct clk_lookup pxa27x_clkregs[] = {
192 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL), 203 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
@@ -215,6 +226,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
215 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"), 226 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
216 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 227 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
217 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 228 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
229 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
218}; 230};
219 231
220#ifdef CONFIG_PM 232#ifdef CONFIG_PM
@@ -246,7 +258,6 @@ int __init pxa27x_set_pwrmode(unsigned int mode)
246 */ 258 */
247enum { 259enum {
248 SLEEP_SAVE_PSTR, 260 SLEEP_SAVE_PSTR,
249 SLEEP_SAVE_CKEN,
250 SLEEP_SAVE_MDREFR, 261 SLEEP_SAVE_MDREFR,
251 SLEEP_SAVE_PCFR, 262 SLEEP_SAVE_PCFR,
252 SLEEP_SAVE_COUNT 263 SLEEP_SAVE_COUNT
@@ -254,21 +265,19 @@ enum {
254 265
255void pxa27x_cpu_pm_save(unsigned long *sleep_save) 266void pxa27x_cpu_pm_save(unsigned long *sleep_save)
256{ 267{
257 SAVE(MDREFR); 268 sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
258 SAVE(PCFR); 269 SAVE(PCFR);
259 270
260 SAVE(CKEN);
261 SAVE(PSTR); 271 SAVE(PSTR);
262} 272}
263 273
264void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 274void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
265{ 275{
266 RESTORE(MDREFR); 276 __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
267 RESTORE(PCFR); 277 RESTORE(PCFR);
268 278
269 PSSR = PSSR_RDH | PSSR_PH; 279 PSSR = PSSR_RDH | PSSR_PH;
270 280
271 RESTORE(CKEN);
272 RESTORE(PSTR); 281 RESTORE(PSTR);
273} 282}
274 283
@@ -370,6 +379,27 @@ void __init pxa27x_init_irq(void)
370 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake); 379 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
371} 380}
372 381
382static struct map_desc pxa27x_io_desc[] __initdata = {
383 { /* Mem Ctl */
384 .virtual = SMEMC_VIRT,
385 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
386 .length = 0x00200000,
387 .type = MT_DEVICE
388 }, { /* IMem ctl */
389 .virtual = 0xfe000000,
390 .pfn = __phys_to_pfn(0x58000000),
391 .length = 0x00100000,
392 .type = MT_DEVICE
393 },
394};
395
396void __init pxa27x_map_io(void)
397{
398 pxa_map_io();
399 iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
400 pxa27x_get_clk_frequency_khz(1);
401}
402
373/* 403/*
374 * device registration specific to PXA27x. 404 * device registration specific to PXA27x.
375 */ 405 */
@@ -405,7 +435,9 @@ static struct sys_device pxa27x_sysdev[] = {
405 .cls = &pxa2xx_mfp_sysclass, 435 .cls = &pxa2xx_mfp_sysclass,
406 }, { 436 }, {
407 .cls = &pxa_gpio_sysclass, 437 .cls = &pxa_gpio_sysclass,
408 }, 438 }, {
439 .cls = &pxa2xx_clock_sysclass,
440 }
409}; 441};
410 442
411static int __init pxa27x_init(void) 443static int __init pxa27x_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index d1c747cdacf8..e14818f5d950 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/sysdev.h> 23#include <linux/sysdev.h>
24 24
25#include <asm/mach/map.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <mach/gpio.h> 27#include <mach/gpio.h>
27#include <mach/pxa3xx-regs.h> 28#include <mach/pxa3xx-regs.h>
@@ -30,193 +31,16 @@
30#include <mach/pm.h> 31#include <mach/pm.h>
31#include <mach/dma.h> 32#include <mach/dma.h>
32#include <mach/regs-intc.h> 33#include <mach/regs-intc.h>
34#include <mach/smemc.h>
33#include <plat/i2c.h> 35#include <plat/i2c.h>
34 36
35#include "generic.h" 37#include "generic.h"
36#include "devices.h" 38#include "devices.h"
37#include "clock.h" 39#include "clock.h"
38 40
39/* Crystal clock: 13MHz */
40#define BASE_CLK 13000000
41
42/* Ring Oscillator Clock: 60MHz */
43#define RO_CLK 60000000
44
45#define ACCR_D0CS (1 << 26)
46#define ACCR_PCCE (1 << 11)
47
48#define PECR_IE(n) ((1 << ((n) * 2)) << 28) 41#define PECR_IE(n) ((1 << ((n) * 2)) << 28)
49#define PECR_IS(n) ((1 << ((n) * 2)) << 29) 42#define PECR_IS(n) ((1 << ((n) * 2)) << 29)
50 43
51/* crystal frequency to static memory controller multiplier (SMCFS) */
52static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
53
54/* crystal frequency to HSIO bus frequency multiplier (HSS) */
55static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
56
57/*
58 * Get the clock frequency as reflected by CCSR and the turbo flag.
59 * We assume these values have been applied via a fcs.
60 * If info is not 0 we also display the current settings.
61 */
62unsigned int pxa3xx_get_clk_frequency_khz(int info)
63{
64 unsigned long acsr, xclkcfg;
65 unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
66
67 /* Read XCLKCFG register turbo bit */
68 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
69 t = xclkcfg & 0x1;
70
71 acsr = ACSR;
72
73 xl = acsr & 0x1f;
74 xn = (acsr >> 8) & 0x7;
75 hss = (acsr >> 14) & 0x3;
76
77 XL = xl * BASE_CLK;
78 XN = xn * XL;
79
80 ro = acsr & ACCR_D0CS;
81
82 CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
83 HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
84
85 if (info) {
86 pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
87 RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
88 (ro) ? "" : "in");
89 pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
90 XL / 1000000, (XL % 1000000) / 10000, xl);
91 pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
92 XN / 1000000, (XN % 1000000) / 10000, xn,
93 (t) ? "" : "in");
94 pr_info("HSIO bus clock: %d.%02dMHz\n",
95 HSS / 1000000, (HSS % 1000000) / 10000);
96 }
97
98 return CLK / 1000;
99}
100
101void pxa3xx_clear_reset_status(unsigned int mask)
102{
103 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
104 ARSR = mask;
105}
106
107/*
108 * Return the current AC97 clock frequency.
109 */
110static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
111{
112 unsigned long rate = 312000000;
113 unsigned long ac97_div;
114
115 ac97_div = AC97_DIV;
116
117 /* This may loose precision for some rates but won't for the
118 * standard 24.576MHz.
119 */
120 rate /= (ac97_div >> 12) & 0x7fff;
121 rate *= (ac97_div & 0xfff);
122
123 return rate;
124}
125
126/*
127 * Return the current HSIO bus clock frequency
128 */
129static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
130{
131 unsigned long acsr;
132 unsigned int hss, hsio_clk;
133
134 acsr = ACSR;
135
136 hss = (acsr >> 14) & 0x3;
137 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
138
139 return hsio_clk;
140}
141
142void clk_pxa3xx_cken_enable(struct clk *clk)
143{
144 unsigned long mask = 1ul << (clk->cken & 0x1f);
145
146 if (clk->cken < 32)
147 CKENA |= mask;
148 else
149 CKENB |= mask;
150}
151
152void clk_pxa3xx_cken_disable(struct clk *clk)
153{
154 unsigned long mask = 1ul << (clk->cken & 0x1f);
155
156 if (clk->cken < 32)
157 CKENA &= ~mask;
158 else
159 CKENB &= ~mask;
160}
161
162const struct clkops clk_pxa3xx_cken_ops = {
163 .enable = clk_pxa3xx_cken_enable,
164 .disable = clk_pxa3xx_cken_disable,
165};
166
167static const struct clkops clk_pxa3xx_hsio_ops = {
168 .enable = clk_pxa3xx_cken_enable,
169 .disable = clk_pxa3xx_cken_disable,
170 .getrate = clk_pxa3xx_hsio_getrate,
171};
172
173static const struct clkops clk_pxa3xx_ac97_ops = {
174 .enable = clk_pxa3xx_cken_enable,
175 .disable = clk_pxa3xx_cken_disable,
176 .getrate = clk_pxa3xx_ac97_getrate,
177};
178
179static void clk_pout_enable(struct clk *clk)
180{
181 OSCC |= OSCC_PEN;
182}
183
184static void clk_pout_disable(struct clk *clk)
185{
186 OSCC &= ~OSCC_PEN;
187}
188
189static const struct clkops clk_pout_ops = {
190 .enable = clk_pout_enable,
191 .disable = clk_pout_disable,
192};
193
194static void clk_dummy_enable(struct clk *clk)
195{
196}
197
198static void clk_dummy_disable(struct clk *clk)
199{
200}
201
202static const struct clkops clk_dummy_ops = {
203 .enable = clk_dummy_enable,
204 .disable = clk_dummy_disable,
205};
206
207static struct clk clk_pxa3xx_pout = {
208 .ops = &clk_pout_ops,
209 .rate = 13000000,
210 .delay = 70,
211};
212
213static struct clk clk_dummy = {
214 .ops = &clk_dummy_ops,
215};
216
217static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
218static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
219static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
220static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1); 44static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
221static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1); 45static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
222static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1); 46static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
@@ -234,6 +58,12 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
234static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 58static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
235static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 59static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
236 60
61static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
62static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
63static DEFINE_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
64static DEFINE_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
65static DEFINE_CLK(pxa3xx_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
66
237static struct clk_lookup pxa3xx_clkregs[] = { 67static struct clk_lookup pxa3xx_clkregs[] = {
238 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), 68 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
239 /* Power I2C clock is always on */ 69 /* Power I2C clock is always on */
@@ -258,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
258 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL), 88 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
259 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
260 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 90 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
91 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
261}; 92};
262 93
263#ifdef CONFIG_PM 94#ifdef CONFIG_PM
@@ -268,30 +99,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
268static void __iomem *sram; 99static void __iomem *sram;
269static unsigned long wakeup_src; 100static unsigned long wakeup_src;
270 101
271#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
272#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
273
274enum { SLEEP_SAVE_CKENA,
275 SLEEP_SAVE_CKENB,
276 SLEEP_SAVE_ACCR,
277
278 SLEEP_SAVE_COUNT,
279};
280
281static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
282{
283 SAVE(CKENA);
284 SAVE(CKENB);
285 SAVE(ACCR);
286}
287
288static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save)
289{
290 RESTORE(ACCR);
291 RESTORE(CKENA);
292 RESTORE(CKENB);
293}
294
295/* 102/*
296 * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic 103 * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic
297 * memory controller has to be reinitialised, so we place some code 104 * memory controller has to be reinitialised, so we place some code
@@ -390,9 +197,6 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
390} 197}
391 198
392static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { 199static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
393 .save_count = SLEEP_SAVE_COUNT,
394 .save = pxa3xx_cpu_pm_save,
395 .restore = pxa3xx_cpu_pm_restore,
396 .valid = pxa3xx_cpu_pm_valid, 200 .valid = pxa3xx_cpu_pm_valid,
397 .enter = pxa3xx_cpu_pm_enter, 201 .enter = pxa3xx_cpu_pm_enter,
398}; 202};
@@ -580,6 +384,22 @@ void __init pxa3xx_init_irq(void)
580 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); 384 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
581} 385}
582 386
387static struct map_desc pxa3xx_io_desc[] __initdata = {
388 { /* Mem Ctl */
389 .virtual = SMEMC_VIRT,
390 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
391 .length = 0x00200000,
392 .type = MT_DEVICE
393 }
394};
395
396void __init pxa3xx_map_io(void)
397{
398 pxa_map_io();
399 iotable_init(ARRAY_AND_SIZE(pxa3xx_io_desc));
400 pxa3xx_get_clk_frequency_khz(1);
401}
402
583/* 403/*
584 * device registration specific to PXA3xx. 404 * device registration specific to PXA3xx.
585 */ 405 */
@@ -615,7 +435,9 @@ static struct sys_device pxa3xx_sysdev[] = {
615 .cls = &pxa3xx_mfp_sysclass, 435 .cls = &pxa3xx_mfp_sysclass,
616 }, { 436 }, {
617 .cls = &pxa_gpio_sysclass, 437 .cls = &pxa_gpio_sysclass,
618 }, 438 }, {
439 .cls = &pxa3xx_clock_sysclass,
440 }
619}; 441};
620 442
621static int __init pxa3xx_init(void) 443static int __init pxa3xx_init(void)
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
index 7d29dd3af79d..8aeacf908784 100644
--- a/arch/arm/mach-pxa/pxa930.c
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -192,7 +192,7 @@ static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = {
192 192
193static int __init pxa930_init(void) 193static int __init pxa930_init(void)
194{ 194{
195 if (cpu_is_pxa930() || cpu_is_pxa935() || cpu_is_pxa950()) { 195 if (cpu_is_pxa93x()) {
196 mfp_init_base(io_p2v(MFPR_BASE)); 196 mfp_init_base(io_p2v(MFPR_BASE));
197 mfp_init_addr(pxa930_mfp_addr_map); 197 mfp_init_addr(pxa930_mfp_addr_map);
198 } 198 }
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
new file mode 100644
index 000000000000..437980f72710
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -0,0 +1,308 @@
1/*
2 * linux/arch/arm/mach-pxa/pxa95x.c
3 *
4 * code specific to PXA95x aka MGx
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/pm.h>
17#include <linux/platform_device.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21
22#include <mach/hardware.h>
23#include <mach/gpio.h>
24#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h>
26#include <mach/reset.h>
27#include <mach/pm.h>
28#include <mach/dma.h>
29#include <mach/regs-intc.h>
30#include <plat/i2c.h>
31
32#include "generic.h"
33#include "devices.h"
34#include "clock.h"
35
36static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
37
38 MFP_ADDR(GPIO0, 0x02e0),
39 MFP_ADDR(GPIO1, 0x02dc),
40 MFP_ADDR(GPIO2, 0x02e8),
41 MFP_ADDR(GPIO3, 0x02d8),
42 MFP_ADDR(GPIO4, 0x02e4),
43 MFP_ADDR(GPIO5, 0x02ec),
44 MFP_ADDR(GPIO6, 0x02f8),
45 MFP_ADDR(GPIO7, 0x02fc),
46 MFP_ADDR(GPIO8, 0x0300),
47 MFP_ADDR(GPIO9, 0x02d4),
48 MFP_ADDR(GPIO10, 0x02f4),
49 MFP_ADDR(GPIO11, 0x02f0),
50 MFP_ADDR(GPIO12, 0x0304),
51 MFP_ADDR(GPIO13, 0x0310),
52 MFP_ADDR(GPIO14, 0x0308),
53 MFP_ADDR(GPIO15, 0x030c),
54 MFP_ADDR(GPIO16, 0x04e8),
55 MFP_ADDR(GPIO17, 0x04f4),
56 MFP_ADDR(GPIO18, 0x04f8),
57 MFP_ADDR(GPIO19, 0x04fc),
58 MFP_ADDR(GPIO20, 0x0518),
59 MFP_ADDR(GPIO21, 0x051c),
60 MFP_ADDR(GPIO22, 0x04ec),
61 MFP_ADDR(GPIO23, 0x0500),
62 MFP_ADDR(GPIO24, 0x04f0),
63 MFP_ADDR(GPIO25, 0x0504),
64 MFP_ADDR(GPIO26, 0x0510),
65 MFP_ADDR(GPIO27, 0x0514),
66 MFP_ADDR(GPIO28, 0x0520),
67 MFP_ADDR(GPIO29, 0x0600),
68 MFP_ADDR(GPIO30, 0x0618),
69 MFP_ADDR(GPIO31, 0x0610),
70 MFP_ADDR(GPIO32, 0x060c),
71 MFP_ADDR(GPIO33, 0x061c),
72 MFP_ADDR(GPIO34, 0x0620),
73 MFP_ADDR(GPIO35, 0x0628),
74 MFP_ADDR(GPIO36, 0x062c),
75 MFP_ADDR(GPIO37, 0x0630),
76 MFP_ADDR(GPIO38, 0x0634),
77 MFP_ADDR(GPIO39, 0x0638),
78 MFP_ADDR(GPIO40, 0x063c),
79 MFP_ADDR(GPIO41, 0x0614),
80 MFP_ADDR(GPIO42, 0x0624),
81 MFP_ADDR(GPIO43, 0x0608),
82 MFP_ADDR(GPIO44, 0x0604),
83 MFP_ADDR(GPIO45, 0x050c),
84 MFP_ADDR(GPIO46, 0x0508),
85 MFP_ADDR(GPIO47, 0x02bc),
86 MFP_ADDR(GPIO48, 0x02b4),
87 MFP_ADDR(GPIO49, 0x02b8),
88 MFP_ADDR(GPIO50, 0x02c8),
89 MFP_ADDR(GPIO51, 0x02c0),
90 MFP_ADDR(GPIO52, 0x02c4),
91 MFP_ADDR(GPIO53, 0x02d0),
92 MFP_ADDR(GPIO54, 0x02cc),
93 MFP_ADDR(GPIO55, 0x029c),
94 MFP_ADDR(GPIO56, 0x02a0),
95 MFP_ADDR(GPIO57, 0x0294),
96 MFP_ADDR(GPIO58, 0x0298),
97 MFP_ADDR(GPIO59, 0x02a4),
98 MFP_ADDR(GPIO60, 0x02a8),
99 MFP_ADDR(GPIO61, 0x02b0),
100 MFP_ADDR(GPIO62, 0x02ac),
101 MFP_ADDR(GPIO63, 0x0640),
102 MFP_ADDR(GPIO64, 0x065c),
103 MFP_ADDR(GPIO65, 0x0648),
104 MFP_ADDR(GPIO66, 0x0644),
105 MFP_ADDR(GPIO67, 0x0674),
106 MFP_ADDR(GPIO68, 0x0658),
107 MFP_ADDR(GPIO69, 0x0654),
108 MFP_ADDR(GPIO70, 0x0660),
109 MFP_ADDR(GPIO71, 0x0668),
110 MFP_ADDR(GPIO72, 0x0664),
111 MFP_ADDR(GPIO73, 0x0650),
112 MFP_ADDR(GPIO74, 0x066c),
113 MFP_ADDR(GPIO75, 0x064c),
114 MFP_ADDR(GPIO76, 0x0670),
115 MFP_ADDR(GPIO77, 0x0678),
116 MFP_ADDR(GPIO78, 0x067c),
117 MFP_ADDR(GPIO79, 0x0694),
118 MFP_ADDR(GPIO80, 0x069c),
119 MFP_ADDR(GPIO81, 0x06a0),
120 MFP_ADDR(GPIO82, 0x06a4),
121 MFP_ADDR(GPIO83, 0x0698),
122 MFP_ADDR(GPIO84, 0x06bc),
123 MFP_ADDR(GPIO85, 0x06b4),
124 MFP_ADDR(GPIO86, 0x06b0),
125 MFP_ADDR(GPIO87, 0x06c0),
126 MFP_ADDR(GPIO88, 0x06c4),
127 MFP_ADDR(GPIO89, 0x06ac),
128 MFP_ADDR(GPIO90, 0x0680),
129 MFP_ADDR(GPIO91, 0x0684),
130 MFP_ADDR(GPIO92, 0x0688),
131 MFP_ADDR(GPIO93, 0x0690),
132 MFP_ADDR(GPIO94, 0x068c),
133 MFP_ADDR(GPIO95, 0x06a8),
134 MFP_ADDR(GPIO96, 0x06b8),
135 MFP_ADDR(GPIO97, 0x0410),
136 MFP_ADDR(GPIO98, 0x0418),
137 MFP_ADDR(GPIO99, 0x041c),
138 MFP_ADDR(GPIO100, 0x0414),
139 MFP_ADDR(GPIO101, 0x0408),
140 MFP_ADDR(GPIO102, 0x0324),
141 MFP_ADDR(GPIO103, 0x040c),
142 MFP_ADDR(GPIO104, 0x0400),
143 MFP_ADDR(GPIO105, 0x0328),
144 MFP_ADDR(GPIO106, 0x0404),
145
146 MFP_ADDR(GPIO159, 0x0524),
147 MFP_ADDR(GPIO163, 0x0534),
148 MFP_ADDR(GPIO167, 0x0544),
149 MFP_ADDR(GPIO168, 0x0548),
150 MFP_ADDR(GPIO169, 0x054c),
151 MFP_ADDR(GPIO170, 0x0550),
152 MFP_ADDR(GPIO171, 0x0554),
153 MFP_ADDR(GPIO172, 0x0558),
154 MFP_ADDR(GPIO173, 0x055c),
155
156 MFP_ADDR(nXCVREN, 0x0204),
157 MFP_ADDR(DF_CLE_nOE, 0x020c),
158 MFP_ADDR(DF_nADV1_ALE, 0x0218),
159 MFP_ADDR(DF_SCLK_E, 0x0214),
160 MFP_ADDR(DF_SCLK_S, 0x0210),
161 MFP_ADDR(nBE0, 0x021c),
162 MFP_ADDR(nBE1, 0x0220),
163 MFP_ADDR(DF_nADV2_ALE, 0x0224),
164 MFP_ADDR(DF_INT_RnB, 0x0228),
165 MFP_ADDR(DF_nCS0, 0x022c),
166 MFP_ADDR(DF_nCS1, 0x0230),
167 MFP_ADDR(nLUA, 0x0254),
168 MFP_ADDR(nLLA, 0x0258),
169 MFP_ADDR(DF_nWE, 0x0234),
170 MFP_ADDR(DF_nRE_nOE, 0x0238),
171 MFP_ADDR(DF_ADDR0, 0x024c),
172 MFP_ADDR(DF_ADDR1, 0x0250),
173 MFP_ADDR(DF_ADDR2, 0x025c),
174 MFP_ADDR(DF_ADDR3, 0x0260),
175 MFP_ADDR(DF_IO0, 0x023c),
176 MFP_ADDR(DF_IO1, 0x0240),
177 MFP_ADDR(DF_IO2, 0x0244),
178 MFP_ADDR(DF_IO3, 0x0248),
179 MFP_ADDR(DF_IO4, 0x0264),
180 MFP_ADDR(DF_IO5, 0x0268),
181 MFP_ADDR(DF_IO6, 0x026c),
182 MFP_ADDR(DF_IO7, 0x0270),
183 MFP_ADDR(DF_IO8, 0x0274),
184 MFP_ADDR(DF_IO9, 0x0278),
185 MFP_ADDR(DF_IO10, 0x027c),
186 MFP_ADDR(DF_IO11, 0x0280),
187 MFP_ADDR(DF_IO12, 0x0284),
188 MFP_ADDR(DF_IO13, 0x0288),
189 MFP_ADDR(DF_IO14, 0x028c),
190 MFP_ADDR(DF_IO15, 0x0290),
191
192 MFP_ADDR(GSIM_UIO, 0x0314),
193 MFP_ADDR(GSIM_UCLK, 0x0318),
194 MFP_ADDR(GSIM_UDET, 0x031c),
195 MFP_ADDR(GSIM_nURST, 0x0320),
196
197 MFP_ADDR(PMIC_INT, 0x06c8),
198
199 MFP_ADDR(RDY, 0x0200),
200
201 MFP_ADDR_END,
202};
203
204static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
205static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
206static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
207static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
208static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
209static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
210static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
211static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
215static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
216static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
217
218static struct clk_lookup pxa95x_clkregs[] = {
219 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
220 /* Power I2C clock is always on */
221 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
222 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
223 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
224 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
225 INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
226 INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
227 INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
228 INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
229 INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
230 INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
231 INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
232 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
233 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
234 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
235};
236
237void __init pxa95x_init_irq(void)
238{
239 pxa_init_irq(96, NULL);
240 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
241}
242
243/*
244 * device registration specific to PXA93x.
245 */
246
247void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248{
249 pxa_register_device(&pxa3xx_device_i2c_power, info);
250}
251
252static struct platform_device *devices[] __initdata = {
253 &sa1100_device_rtc,
254 &pxa_device_rtc,
255 &pxa27x_device_ssp1,
256 &pxa27x_device_ssp2,
257 &pxa27x_device_ssp3,
258 &pxa3xx_device_ssp4,
259 &pxa27x_device_pwm0,
260 &pxa27x_device_pwm1,
261};
262
263static struct sys_device pxa95x_sysdev[] = {
264 {
265 .cls = &pxa_irq_sysclass,
266 }, {
267 .cls = &pxa_gpio_sysclass,
268 }, {
269 .cls = &pxa3xx_clock_sysclass,
270 }
271};
272
273static int __init pxa95x_init(void)
274{
275 int ret = 0, i;
276
277 if (cpu_is_pxa95x()) {
278 mfp_init_base(io_p2v(MFPR_BASE));
279 mfp_init_addr(pxa95x_mfp_addr_map);
280
281 reset_status = ARSR;
282
283 /*
284 * clear RDH bit every time after reset
285 *
286 * Note: the last 3 bits DxS are write-1-to-clear so carefully
287 * preserve them here in case they will be referenced later
288 */
289 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
290
291 clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
292
293 if ((ret = pxa_init_dma(IRQ_DMA, 32)))
294 return ret;
295
296 for (i = 0; i < ARRAY_SIZE(pxa95x_sysdev); i++) {
297 ret = sysdev_register(&pxa95x_sysdev[i]);
298 if (ret)
299 pr_err("failed to register sysdev[%d]\n", i);
300 }
301
302 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
303 }
304
305 return ret;
306}
307
308postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4121d03ea2c3..8361151be054 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -588,6 +588,9 @@ static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
588 .num_modes = 1, 588 .num_modes = 1,
589 .video_mem_size = 0x400000, 589 .video_mem_size = 0x400000,
590 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 590 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
591#ifdef CONFIG_PXA3XX_GCU
592 .acceleration_enabled = 1,
593#endif
591}; 594};
592 595
593static void __init raumfeld_lcd_init(void) 596static void __init raumfeld_lcd_init(void)
@@ -616,6 +619,8 @@ static void __init raumfeld_lcd_init(void)
616 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n"); 619 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
617 else 620 else
618 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1); 621 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
622
623 platform_device_register(&pxa3xx_device_gcu);
619} 624}
620 625
621/** 626/**
@@ -1085,7 +1090,7 @@ static void __init raumfeld_speaker_init(void)
1085MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") 1090MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1086 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1091 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1087 .init_machine = raumfeld_controller_init, 1092 .init_machine = raumfeld_controller_init,
1088 .map_io = pxa_map_io, 1093 .map_io = pxa3xx_map_io,
1089 .init_irq = pxa3xx_init_irq, 1094 .init_irq = pxa3xx_init_irq,
1090 .timer = &pxa_timer, 1095 .timer = &pxa_timer,
1091MACHINE_END 1096MACHINE_END
@@ -1095,7 +1100,7 @@ MACHINE_END
1095MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") 1100MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1096 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1101 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1097 .init_machine = raumfeld_connector_init, 1102 .init_machine = raumfeld_connector_init,
1098 .map_io = pxa_map_io, 1103 .map_io = pxa3xx_map_io,
1099 .init_irq = pxa3xx_init_irq, 1104 .init_irq = pxa3xx_init_irq,
1100 .timer = &pxa_timer, 1105 .timer = &pxa_timer,
1101MACHINE_END 1106MACHINE_END
@@ -1105,7 +1110,7 @@ MACHINE_END
1105MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") 1110MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1106 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1111 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1107 .init_machine = raumfeld_speaker_init, 1112 .init_machine = raumfeld_speaker_init,
1108 .map_io = pxa_map_io, 1113 .map_io = pxa3xx_map_io,
1109 .init_irq = pxa3xx_init_irq, 1114 .init_irq = pxa3xx_init_irq,
1110 .timer = &pxa_timer, 1115 .timer = &pxa_timer,
1111MACHINE_END 1116MACHINE_END
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index ffa50e633ee6..c1ca8cb467fc 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -597,7 +597,7 @@ static void __init saar_init(void)
597MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") 597MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
598 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 598 /* Maintainer: Eric Miao <eric.miao@marvell.com> */
599 .boot_params = 0xa0000100, 599 .boot_params = 0xa0000100,
600 .map_io = pxa_map_io, 600 .map_io = pxa3xx_map_io,
601 .init_irq = pxa3xx_init_irq, 601 .init_irq = pxa3xx_init_irq,
602 .timer = &pxa_timer, 602 .timer = &pxa_timer,
603 .init_machine = saar_init, 603 .init_machine = saar_init,
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
new file mode 100644
index 000000000000..e497922f761a
--- /dev/null
+++ b/arch/arm/mach-pxa/saarb.c
@@ -0,0 +1,114 @@
1/*
2 * linux/arch/arm/mach-pxa/saarb.c
3 *
4 * Support for the Marvell Handheld Platform (aka SAARB)
5 *
6 * Copyright (C) 2007-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/i2c.h>
16#include <linux/mfd/88pm860x.h>
17
18#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20
21#include <mach/irqs.h>
22#include <mach/hardware.h>
23#include <mach/mfp.h>
24#include <mach/mfp-pxa930.h>
25#include <mach/gpio.h>
26
27#include <plat/i2c.h>
28
29#include "generic.h"
30
31#define SAARB_NR_IRQS (IRQ_BOARD_START + 40)
32
33static struct pm860x_touch_pdata saarb_touch = {
34 .gpadc_prebias = 1,
35 .slot_cycle = 1,
36 .tsi_prebias = 6,
37 .pen_prebias = 16,
38 .pen_prechg = 2,
39 .res_x = 300,
40};
41
42static struct pm860x_backlight_pdata saarb_backlight[] = {
43 {
44 .id = PM8606_ID_BACKLIGHT,
45 .iset = PM8606_WLED_CURRENT(24),
46 .flags = PM8606_BACKLIGHT1,
47 },
48 {},
49};
50
51static struct pm860x_led_pdata saarb_led[] = {
52 {
53 .id = PM8606_ID_LED,
54 .iset = PM8606_LED_CURRENT(12),
55 .flags = PM8606_LED1_RED,
56 }, {
57 .id = PM8606_ID_LED,
58 .iset = PM8606_LED_CURRENT(12),
59 .flags = PM8606_LED1_GREEN,
60 }, {
61 .id = PM8606_ID_LED,
62 .iset = PM8606_LED_CURRENT(12),
63 .flags = PM8606_LED1_BLUE,
64 }, {
65 .id = PM8606_ID_LED,
66 .iset = PM8606_LED_CURRENT(12),
67 .flags = PM8606_LED2_RED,
68 }, {
69 .id = PM8606_ID_LED,
70 .iset = PM8606_LED_CURRENT(12),
71 .flags = PM8606_LED2_GREEN,
72 }, {
73 .id = PM8606_ID_LED,
74 .iset = PM8606_LED_CURRENT(12),
75 .flags = PM8606_LED2_BLUE,
76 },
77};
78
79static struct pm860x_platform_data saarb_pm8607_info = {
80 .touch = &saarb_touch,
81 .backlight = &saarb_backlight[0],
82 .led = &saarb_led[0],
83 .companion_addr = 0x10,
84 .irq_mode = 0,
85 .irq_base = IRQ_BOARD_START,
86
87 .i2c_port = GI2C_PORT,
88};
89
90static struct i2c_board_info saarb_i2c_info[] = {
91 {
92 .type = "88PM860x",
93 .addr = 0x34,
94 .platform_data = &saarb_pm8607_info,
95 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
96 },
97};
98
99static void __init saarb_init(void)
100{
101 pxa_set_ffuart_info(NULL);
102 pxa_set_i2c_info(NULL);
103 i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
104}
105
106MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
107 .boot_params = 0xa0000100,
108 .map_io = pxa_map_io,
109 .nr_irqs = SAARB_NR_IRQS,
110 .init_irq = pxa95x_init_irq,
111 .timer = &pxa_timer,
112 .init_machine = saarb_init,
113MACHINE_END
114
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 52c30b01a671..2f5b08aeb52e 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -14,7 +14,7 @@
14#include <linux/linkage.h> 14#include <linux/linkage.h>
15#include <asm/assembler.h> 15#include <asm/assembler.h>
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17#include <mach/smemc.h>
18#include <mach/pxa2xx-regs.h> 18#include <mach/pxa2xx-regs.h>
19 19
20#define MDREFR_KDIV 0x200a4000 // all banks 20#define MDREFR_KDIV 0x200a4000 // all banks
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index d6f6904132a6..232b7316ec08 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -9,50 +9,37 @@
9#include <linux/sysdev.h> 9#include <linux/sysdev.h>
10 10
11#include <mach/hardware.h> 11#include <mach/hardware.h>
12 12#include <mach/smemc.h>
13#define SMEMC_PHYS_BASE (0x4A000000)
14#define SMEMC_PHYS_SIZE (0x90)
15
16#define MSC0 (0x08) /* Static Memory Controller Register 0 */
17#define MSC1 (0x0C) /* Static Memory Controller Register 1 */
18#define SXCNFG (0x1C) /* Synchronous Static Memory Control Register */
19#define MEMCLKCFG (0x68) /* Clock Configuration */
20#define CSADRCFG0 (0x80) /* Address Configuration Register for CS0 */
21#define CSADRCFG1 (0x84) /* Address Configuration Register for CS1 */
22#define CSADRCFG2 (0x88) /* Address Configuration Register for CS2 */
23#define CSADRCFG3 (0x8C) /* Address Configuration Register for CS3 */
24 13
25#ifdef CONFIG_PM 14#ifdef CONFIG_PM
26static void __iomem *smemc_mmio_base;
27
28static unsigned long msc[2]; 15static unsigned long msc[2];
29static unsigned long sxcnfg, memclkcfg; 16static unsigned long sxcnfg, memclkcfg;
30static unsigned long csadrcfg[4]; 17static unsigned long csadrcfg[4];
31 18
32static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state) 19static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
33{ 20{
34 msc[0] = __raw_readl(smemc_mmio_base + MSC0); 21 msc[0] = __raw_readl(MSC0);
35 msc[1] = __raw_readl(smemc_mmio_base + MSC1); 22 msc[1] = __raw_readl(MSC1);
36 sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG); 23 sxcnfg = __raw_readl(SXCNFG);
37 memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG); 24 memclkcfg = __raw_readl(MEMCLKCFG);
38 csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0); 25 csadrcfg[0] = __raw_readl(CSADRCFG0);
39 csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1); 26 csadrcfg[1] = __raw_readl(CSADRCFG1);
40 csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2); 27 csadrcfg[2] = __raw_readl(CSADRCFG2);
41 csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3); 28 csadrcfg[3] = __raw_readl(CSADRCFG3);
42 29
43 return 0; 30 return 0;
44} 31}
45 32
46static int pxa3xx_smemc_resume(struct sys_device *dev) 33static int pxa3xx_smemc_resume(struct sys_device *dev)
47{ 34{
48 __raw_writel(msc[0], smemc_mmio_base + MSC0); 35 __raw_writel(msc[0], MSC0);
49 __raw_writel(msc[1], smemc_mmio_base + MSC1); 36 __raw_writel(msc[1], MSC1);
50 __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG); 37 __raw_writel(sxcnfg, SXCNFG);
51 __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG); 38 __raw_writel(memclkcfg, MEMCLKCFG);
52 __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0); 39 __raw_writel(csadrcfg[0], CSADRCFG0);
53 __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1); 40 __raw_writel(csadrcfg[1], CSADRCFG1);
54 __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2); 41 __raw_writel(csadrcfg[2], CSADRCFG2);
55 __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3); 42 __raw_writel(csadrcfg[3], CSADRCFG3);
56 43
57 return 0; 44 return 0;
58} 45}
@@ -73,10 +60,6 @@ static int __init smemc_init(void)
73 int ret = 0; 60 int ret = 0;
74 61
75 if (cpu_is_pxa3xx()) { 62 if (cpu_is_pxa3xx()) {
76 smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE);
77 if (smemc_mmio_base == NULL)
78 return -ENODEV;
79
80 ret = sysdev_class_register(&smemc_sysclass); 63 ret = sysdev_class_register(&smemc_sysclass);
81 if (ret) 64 if (ret)
82 return ret; 65 return ret;
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index f736119f1ebf..0499a69e7673 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -27,6 +27,7 @@
27#include <linux/mtd/sharpsl.h> 27#include <linux/mtd/sharpsl.h>
28#include <linux/input/matrix_keypad.h> 28#include <linux/input/matrix_keypad.h>
29#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
30#include <linux/io.h>
30 31
31#include <asm/setup.h> 32#include <asm/setup.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
@@ -44,6 +45,7 @@
44#include <mach/pxa2xx_spi.h> 45#include <mach/pxa2xx_spi.h>
45#include <mach/spitz.h> 46#include <mach/spitz.h>
46#include <mach/sharpsl_pm.h> 47#include <mach/sharpsl_pm.h>
48#include <mach/smemc.h>
47 49
48#include <plat/i2c.h> 50#include <plat/i2c.h>
49 51
@@ -929,9 +931,10 @@ static void spitz_poweroff(void)
929 931
930static void spitz_restart(char mode, const char *cmd) 932static void spitz_restart(char mode, const char *cmd)
931{ 933{
934 uint32_t msc0 = __raw_readl(MSC0);
932 /* Bootloader magic for a reboot */ 935 /* Bootloader magic for a reboot */
933 if ((MSC0 & 0xffff0000) == 0x7ff00000) 936 if ((msc0 & 0xffff0000) == 0x7ff00000)
934 MSC0 = (MSC0 & 0xffff) | 0x7ee00000; 937 __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
935 938
936 spitz_poweroff(); 939 spitz_poweroff();
937} 940}
@@ -980,7 +983,7 @@ static void __init spitz_fixup(struct machine_desc *desc,
980#ifdef CONFIG_MACH_SPITZ 983#ifdef CONFIG_MACH_SPITZ
981MACHINE_START(SPITZ, "SHARP Spitz") 984MACHINE_START(SPITZ, "SHARP Spitz")
982 .fixup = spitz_fixup, 985 .fixup = spitz_fixup,
983 .map_io = pxa_map_io, 986 .map_io = pxa27x_map_io,
984 .init_irq = pxa27x_init_irq, 987 .init_irq = pxa27x_init_irq,
985 .init_machine = spitz_init, 988 .init_machine = spitz_init,
986 .timer = &pxa_timer, 989 .timer = &pxa_timer,
@@ -990,7 +993,7 @@ MACHINE_END
990#ifdef CONFIG_MACH_BORZOI 993#ifdef CONFIG_MACH_BORZOI
991MACHINE_START(BORZOI, "SHARP Borzoi") 994MACHINE_START(BORZOI, "SHARP Borzoi")
992 .fixup = spitz_fixup, 995 .fixup = spitz_fixup,
993 .map_io = pxa_map_io, 996 .map_io = pxa27x_map_io,
994 .init_irq = pxa27x_init_irq, 997 .init_irq = pxa27x_init_irq,
995 .init_machine = spitz_init, 998 .init_machine = spitz_init,
996 .timer = &pxa_timer, 999 .timer = &pxa_timer,
@@ -1000,7 +1003,7 @@ MACHINE_END
1000#ifdef CONFIG_MACH_AKITA 1003#ifdef CONFIG_MACH_AKITA
1001MACHINE_START(AKITA, "SHARP Akita") 1004MACHINE_START(AKITA, "SHARP Akita")
1002 .fixup = spitz_fixup, 1005 .fixup = spitz_fixup,
1003 .map_io = pxa_map_io, 1006 .map_io = pxa27x_map_io,
1004 .init_irq = pxa27x_init_irq, 1007 .init_irq = pxa27x_init_irq,
1005 .init_machine = spitz_init, 1008 .init_machine = spitz_init,
1006 .timer = &pxa_timer, 1009 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 738adc1773fd..3498a1423943 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -48,6 +48,7 @@
48#include <mach/udc.h> 48#include <mach/udc.h>
49#include <mach/pxa2xx_spi.h> 49#include <mach/pxa2xx_spi.h>
50#include <mach/pxa27x-udc.h> 50#include <mach/pxa27x-udc.h>
51#include <mach/smemc.h>
51 52
52#include <linux/spi/spi.h> 53#include <linux/spi/spi.h>
53#include <linux/mfd/da903x.h> 54#include <linux/mfd/da903x.h>
@@ -976,7 +977,7 @@ static void __init stargate2_init(void)
976{ 977{
977 /* This is probably a board specific hack as this must be set 978 /* This is probably a board specific hack as this must be set
978 prior to connecting the MFP stuff up. */ 979 prior to connecting the MFP stuff up. */
979 MECR &= ~MECR_NOS; 980 __raw_writel(__raw_readl(MECR) & ~MECR_NOS, MECR);
980 981
981 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); 982 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
982 983
@@ -998,7 +999,7 @@ static void __init stargate2_init(void)
998 999
999#ifdef CONFIG_MACH_INTELMOTE2 1000#ifdef CONFIG_MACH_INTELMOTE2
1000MACHINE_START(INTELMOTE2, "IMOTE 2") 1001MACHINE_START(INTELMOTE2, "IMOTE 2")
1001 .map_io = pxa_map_io, 1002 .map_io = pxa27x_map_io,
1002 .init_irq = pxa27x_init_irq, 1003 .init_irq = pxa27x_init_irq,
1003 .timer = &pxa_timer, 1004 .timer = &pxa_timer,
1004 .init_machine = imote2_init, 1005 .init_machine = imote2_init,
@@ -1008,7 +1009,7 @@ MACHINE_END
1008 1009
1009#ifdef CONFIG_MACH_STARGATE2 1010#ifdef CONFIG_MACH_STARGATE2
1010MACHINE_START(STARGATE2, "Stargate 2") 1011MACHINE_START(STARGATE2, "Stargate 2")
1011 .map_io = pxa_map_io, 1012 .map_io = pxa27x_map_io,
1012 .nr_irqs = STARGATE_NR_IRQS, 1013 .nr_irqs = STARGATE_NR_IRQS,
1013 .init_irq = pxa27x_init_irq, 1014 .init_irq = pxa27x_init_irq,
1014 .timer = &pxa_timer, 1015 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 2ea7545273ad..9cecf8366db8 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -490,7 +490,7 @@ static void __init tavorevb_init(void)
490MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") 490MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
491 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 491 /* Maintainer: Eric Miao <eric.miao@marvell.com> */
492 .boot_params = 0xa0000100, 492 .boot_params = 0xa0000100,
493 .map_io = pxa_map_io, 493 .map_io = pxa3xx_map_io,
494 .init_irq = pxa3xx_init_irq, 494 .init_irq = pxa3xx_init_irq,
495 .timer = &pxa_timer, 495 .timer = &pxa_timer,
496 .init_machine = tavorevb_init, 496 .init_machine = tavorevb_init,
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index dc3011697bbf..70191a9450eb 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -127,7 +127,7 @@ static void __init evb3_init(void)
127 127
128MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") 128MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
129 .boot_params = 0xa0000100, 129 .boot_params = 0xa0000100,
130 .map_io = pxa_map_io, 130 .map_io = pxa3xx_map_io,
131 .nr_irqs = TAVOREVB3_NR_IRQS, 131 .nr_irqs = TAVOREVB3_NR_IRQS,
132 .init_irq = pxa3xx_init_irq, 132 .init_irq = pxa3xx_init_irq,
133 .timer = &pxa_timer, 133 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0ee1df49606d..57d61ee9b226 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -46,6 +46,7 @@
46#include <mach/tosa_bt.h> 46#include <mach/tosa_bt.h>
47#include <mach/pxa2xx_spi.h> 47#include <mach/pxa2xx_spi.h>
48#include <mach/audio.h> 48#include <mach/audio.h>
49#include <mach/smemc.h>
49 50
50#include <asm/mach/arch.h> 51#include <asm/mach/arch.h>
51#include <mach/tosa.h> 52#include <mach/tosa.h>
@@ -893,9 +894,11 @@ static void tosa_poweroff(void)
893 894
894static void tosa_restart(char mode, const char *cmd) 895static void tosa_restart(char mode, const char *cmd)
895{ 896{
897 uint32_t msc0 = __raw_readl(MSC0);
898
896 /* Bootloader magic for a reboot */ 899 /* Bootloader magic for a reboot */
897 if((MSC0 & 0xffff0000) == 0x7ff00000) 900 if((msc0 & 0xffff0000) == 0x7ff00000)
898 MSC0 = (MSC0 & 0xffff) | 0x7ee00000; 901 __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
899 902
900 tosa_poweroff(); 903 tosa_poweroff();
901} 904}
@@ -953,7 +956,7 @@ static void __init fixup_tosa(struct machine_desc *desc,
953 956
954MACHINE_START(TOSA, "SHARP Tosa") 957MACHINE_START(TOSA, "SHARP Tosa")
955 .fixup = fixup_tosa, 958 .fixup = fixup_tosa,
956 .map_io = pxa_map_io, 959 .map_io = pxa25x_map_io,
957 .nr_irqs = TOSA_NR_IRQS, 960 .nr_irqs = TOSA_NR_IRQS,
958 .init_irq = pxa25x_init_irq, 961 .init_irq = pxa25x_init_irq,
959 .init_machine = tosa_init, 962 .init_machine = tosa_init,
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 565d062f51d5..43fc9ca14594 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -47,6 +47,7 @@
47#include <mach/mmc.h> 47#include <mach/mmc.h>
48#include <mach/irda.h> 48#include <mach/irda.h>
49#include <mach/ohci.h> 49#include <mach/ohci.h>
50#include <mach/smemc.h>
50#include <plat/i2c.h> 51#include <plat/i2c.h>
51 52
52#include "generic.h" 53#include "generic.h"
@@ -539,10 +540,10 @@ static void __init trizeps4_init(void)
539 540
540static void __init trizeps4_map_io(void) 541static void __init trizeps4_map_io(void)
541{ 542{
542 pxa_map_io(); 543 pxa27x_map_io();
543 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); 544 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
544 545
545 if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) { 546 if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) {
546 /* if flash is 16 bit wide its a Trizeps4 WL */ 547 /* if flash is 16 bit wide its a Trizeps4 WL */
547 __machine_arch_type = MACH_TYPE_TRIZEPS4WL; 548 __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
548 trizeps4_flash_data[0].width = 2; 549 trizeps4_flash_data[0].width = 2;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 438fc9a5ed59..de69b203afa7 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -983,7 +983,7 @@ static struct map_desc viper_io_desc[] __initdata = {
983 983
984static void __init viper_map_io(void) 984static void __init viper_map_io(void)
985{ 985{
986 pxa_map_io(); 986 pxa25x_map_io();
987 987
988 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); 988 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
989 989
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index f45ac0961778..b9b579715ff6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -719,7 +719,7 @@ static void __init vpac270_init(void)
719 719
720MACHINE_START(VPAC270, "Voipac PXA270") 720MACHINE_START(VPAC270, "Voipac PXA270")
721 .boot_params = 0xa0000100, 721 .boot_params = 0xa0000100,
722 .map_io = pxa_map_io, 722 .map_io = pxa27x_map_io,
723 .init_irq = pxa27x_init_irq, 723 .init_irq = pxa27x_init_irq,
724 .timer = &pxa_timer, 724 .timer = &pxa_timer,
725 .init_machine = vpac270_init 725 .init_machine = vpac270_init
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 3260ce73d327..51c0281c6e0a 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -31,6 +31,7 @@
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/pxa2xx-regs.h> 32#include <mach/pxa2xx-regs.h>
33#include <mach/mfp-pxa25x.h> 33#include <mach/mfp-pxa25x.h>
34#include <mach/smemc.h>
34 35
35#include "generic.h" 36#include "generic.h"
36 37
@@ -172,9 +173,9 @@ static void __init xcep_init(void)
172 173
173 /* See Intel XScale Developer's Guide for details */ 174 /* See Intel XScale Developer's Guide for details */
174 /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */ 175 /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
175 MSC1 = (MSC1 & 0xffff) | 0xD5540000; 176 __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
176 /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */ 177 /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
177 MSC2 = (MSC2 & 0xffff) | 0x72A00000; 178 __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
178 179
179 platform_add_devices(ARRAY_AND_SIZE(devices)); 180 platform_add_devices(ARRAY_AND_SIZE(devices));
180 pxa_set_i2c_info(&xcep_i2c_platform_data); 181 pxa_set_i2c_info(&xcep_i2c_platform_data);
@@ -183,7 +184,7 @@ static void __init xcep_init(void)
183MACHINE_START(XCEP, "Iskratel XCEP") 184MACHINE_START(XCEP, "Iskratel XCEP")
184 .boot_params = 0xa0000100, 185 .boot_params = 0xa0000100,
185 .init_machine = xcep_init, 186 .init_machine = xcep_init,
186 .map_io = pxa_map_io, 187 .map_io = pxa25x_map_io,
187 .init_irq = pxa25x_init_irq, 188 .init_irq = pxa25x_init_irq,
188 .timer = &pxa_timer, 189 .timer = &pxa_timer,
189MACHINE_END 190MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index fefde9848d82..527c2a1ed310 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -704,7 +704,7 @@ static void __init z2_init(void)
704 704
705MACHINE_START(ZIPIT2, "Zipit Z2") 705MACHINE_START(ZIPIT2, "Zipit Z2")
706 .boot_params = 0xa0000100, 706 .boot_params = 0xa0000100,
707 .map_io = pxa_map_io, 707 .map_io = pxa27x_map_io,
708 .init_irq = pxa27x_init_irq, 708 .init_irq = pxa27x_init_irq,
709 .timer = &pxa_timer, 709 .timer = &pxa_timer,
710 .init_machine = z2_init, 710 .init_machine = z2_init,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index dea46a2d089b..c87f2b35ee05 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -47,6 +47,7 @@
47#include <mach/audio.h> 47#include <mach/audio.h>
48#include <mach/arcom-pcmcia.h> 48#include <mach/arcom-pcmcia.h>
49#include <mach/zeus.h> 49#include <mach/zeus.h>
50#include <mach/smemc.h>
50 51
51#include "generic.h" 52#include "generic.h"
52 53
@@ -823,13 +824,16 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
823static void __init zeus_init(void) 824static void __init zeus_init(void)
824{ 825{
825 u16 dm9000_msc = DM9K_MSC_VALUE; 826 u16 dm9000_msc = DM9K_MSC_VALUE;
827 u32 msc0, msc1;
826 828
827 system_rev = __raw_readw(ZEUS_CPLD_VERSION); 829 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
828 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); 830 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
829 831
830 /* Fix timings for dm9000s (CS1/CS2)*/ 832 /* Fix timings for dm9000s (CS1/CS2)*/
831 MSC0 = (MSC0 & 0xffff) | (dm9000_msc << 16); 833 msc0 = __raw_readl(MSC0) & 0x0000ffff | (dm9000_msc << 16);
832 MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; 834 msc1 = __raw_readl(MSC1) & 0xffff0000 | dm9000_msc;
835 __raw_writel(msc0, MSC0);
836 __raw_writel(msc1, MSC1);
833 837
834 pm_power_off = zeus_power_off; 838 pm_power_off = zeus_power_off;
835 zeus_setup_apm(); 839 zeus_setup_apm();
@@ -883,7 +887,7 @@ static struct map_desc zeus_io_desc[] __initdata = {
883 887
884static void __init zeus_map_io(void) 888static void __init zeus_map_io(void)
885{ 889{
886 pxa_map_io(); 890 pxa27x_map_io();
887 891
888 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc)); 892 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
889 893
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 702f7a68e87d..a4c784aab764 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -423,7 +423,7 @@ static void __init zylonite_init(void)
423 423
424MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") 424MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
425 .boot_params = 0xa0000100, 425 .boot_params = 0xa0000100,
426 .map_io = pxa_map_io, 426 .map_io = pxa3xx_map_io,
427 .nr_irqs = ZYLONITE_NR_IRQS, 427 .nr_irqs = ZYLONITE_NR_IRQS,
428 .init_irq = pxa3xx_init_irq, 428 .init_irq = pxa3xx_init_irq,
429 .timer = &pxa_timer, 429 .timer = &pxa_timer,
diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S
index 4075473cf68a..b34be4554d40 100644
--- a/arch/arm/mach-realview/headsmp.S
+++ b/arch/arm/mach-realview/headsmp.S
@@ -35,5 +35,6 @@ pen: ldr r7, [r6]
35 */ 35 */
36 b secondary_startup 36 b secondary_startup
37 37
38 .align
381: .long . 391: .long .
39 .long pen_release 40 .long pen_release
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index cef6a65637bd..fa2e5bffbb8e 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -16,7 +16,7 @@ config CPU_S3C2412
16config CPU_S3C2412_ONLY 16config CPU_S3C2412_ONLY
17 bool 17 bool
18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ 18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \
19 !CPU_2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ 19 !CPU_S3C2416 && !CPU_S3C2440 && !CPU_S3C2442 && \
20 !CPU_S3C2443 && CPU_S3C2412 20 !CPU_S3C2443 && CPU_S3C2412
21 default y if CPU_S3C2412 21 default y if CPU_S3C2412
22 22
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig
index 87b9c9f003bd..27b3e7c9d613 100644
--- a/arch/arm/mach-s3c2416/Kconfig
+++ b/arch/arm/mach-s3c2416/Kconfig
@@ -35,9 +35,12 @@ menu "S3C2416 Machines"
35config MACH_SMDK2416 35config MACH_SMDK2416
36 bool "SMDK2416" 36 bool "SMDK2416"
37 select CPU_S3C2416 37 select CPU_S3C2416
38 select MACH_SMDK
38 select S3C_DEV_FB 39 select S3C_DEV_FB
39 select S3C_DEV_HSMMC 40 select S3C_DEV_HSMMC
40 select S3C_DEV_HSMMC1 41 select S3C_DEV_HSMMC1
42 select S3C_DEV_NAND
43 select S3C_DEV_USB_HOST
41 select S3C2416_PM if PM 44 select S3C2416_PM if PM
42 help 45 help
43 Say Y here if you are using an SMDK2416 46 Say Y here if you are using an SMDK2416
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index ff024a6c0f85..a0cb2581894f 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -18,6 +18,7 @@ config CPU_S3C2440
18config CPU_S3C2442 18config CPU_S3C2442
19 bool 19 bool
20 select CPU_ARM920T 20 select CPU_ARM920T
21 select S3C_GPIO_PULL_DOWN
21 select S3C2410_CLOCK 22 select S3C2410_CLOCK
22 select S3C2410_GPIO 23 select S3C2410_GPIO
23 select S3C2410_PM if PM 24 select S3C2410_PM if PM
@@ -178,6 +179,9 @@ config MACH_MINI2440
178 bool "MINI2440 development board" 179 bool "MINI2440 development board"
179 select CPU_S3C2440 180 select CPU_S3C2440
180 select EEPROM_AT24 181 select EEPROM_AT24
182 select NEW_LEDS
183 select LEDS_CLASS
184 select LEDS_TRIGGER
181 select LEDS_TRIGGER_BACKLIGHT 185 select LEDS_TRIGGER_BACKLIGHT
182 select S3C_DEV_NAND 186 select S3C_DEV_NAND
183 select S3C_DEV_USB_HOST 187 select S3C_DEV_USB_HOST
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index d50f3ae6173d..f7663f731ea0 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -46,9 +46,6 @@ int __init s3c2440_init(void)
46{ 46{
47 printk("S3C2440: Initialising architecture\n"); 47 printk("S3C2440: Initialising architecture\n");
48 48
49 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
50 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
51
52 /* change irq for watchdog */ 49 /* change irq for watchdog */
53 50
54 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 51 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
@@ -58,3 +55,11 @@ int __init s3c2440_init(void)
58 55
59 return sysdev_register(&s3c2440_sysdev); 56 return sysdev_register(&s3c2440_sysdev);
60} 57}
58
59void __init s3c2440_map_io(void)
60{
61 s3c244x_map_io();
62
63 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
64 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
65}
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 188ad1e57dc0..ecf813546554 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -32,6 +32,7 @@
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/ioport.h> 33#include <linux/ioport.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/gpio.h>
35#include <linux/clk.h> 36#include <linux/clk.h>
36#include <linux/io.h> 37#include <linux/io.h>
37 38
@@ -43,6 +44,11 @@
43 44
44#include <plat/clock.h> 45#include <plat/clock.h>
45#include <plat/cpu.h> 46#include <plat/cpu.h>
47#include <plat/s3c244x.h>
48
49#include <plat/gpio-core.h>
50#include <plat/gpio-cfg.h>
51#include <plat/gpio-cfg-helpers.h>
46 52
47/* S3C2442 extended clock support */ 53/* S3C2442 extended clock support */
48 54
@@ -163,3 +169,11 @@ int __init s3c2442_init(void)
163 169
164 return sysdev_register(&s3c2442_sysdev); 170 return sysdev_register(&s3c2442_sysdev);
165} 171}
172
173void __init s3c2442_map_io(void)
174{
175 s3c244x_map_io();
176
177 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1down;
178 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1down;
179}
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 4fef723126fa..31babec90cec 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -5,6 +5,7 @@
5config CPU_S3C2443 5config CPU_S3C2443
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T
8 select S3C2443_DMA if S3C2410_DMA 9 select S3C2443_DMA if S3C2410_DMA
9 select CPU_LLSERIAL_S3C2440 10 select CPU_LLSERIAL_S3C2440
10 select SAMSUNG_CLKSRC 11 select SAMSUNG_CLKSRC
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 8ea3bffb4e00..a0e7c12868bd 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -21,8 +21,8 @@
21#include <mach/io.h> 21#include <mach/io.h>
22 22
23 .macro addruart, rp, rv 23 .macro addruart, rp, rv
24 ldreq \rp, =IO_APB_PHYS @ physical 24 ldr \rp, =IO_APB_PHYS @ physical
25 ldrne \rv, =IO_APB_VIRT @ virtual 25 ldr \rv, =IO_APB_VIRT @ virtual
26#if defined(CONFIG_TEGRA_DEBUG_UART_NONE) 26#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
27#error "A debug UART must be selected in the kernel config to use DEBUG_LL" 27#error "A debug UART must be selected in the kernel config to use DEBUG_LL"
28#elif defined(CONFIG_TEGRA_DEBUG_UARTA) 28#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/mach-vexpress/headsmp.S
index 8a78ff68e1ee..7a3f0632947c 100644
--- a/arch/arm/mach-vexpress/headsmp.S
+++ b/arch/arm/mach-vexpress/headsmp.S
@@ -35,5 +35,6 @@ pen: ldr r7, [r6]
35 */ 35 */
36 b secondary_startup 36 b secondary_startup
37 37
38 .align
381: .long . 391: .long .
39 .long pen_release 40 .long pen_release
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 4414a01e1e8a..a099efed0e63 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -382,6 +382,12 @@ config CPU_FEROCEON_OLD_ID
382 for which the CPU ID is equal to the ARM926 ID. 382 for which the CPU ID is equal to the ARM926 ID.
383 Relevant for Feroceon-1850 and early Feroceon-2850. 383 Relevant for Feroceon-1850 and early Feroceon-2850.
384 384
385# Marvell PJ4
386config CPU_PJ4
387 bool
388 select CPU_V7
389 select ARM_THUMBEE
390
385# ARMv6 391# ARMv6
386config CPU_V6 392config CPU_V6
387 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE 393 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE
@@ -789,7 +795,7 @@ config CACHE_PL310
789 795
790config CACHE_TAUROS2 796config CACHE_TAUROS2
791 bool "Enable the Tauros2 L2 cache controller" 797 bool "Enable the Tauros2 L2 cache controller"
792 depends on (ARCH_DOVE || ARCH_MMP) 798 depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
793 default y 799 default y
794 select OUTER_CACHE 800 select OUTER_CACHE
795 help 801 help
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 99fa688dfadd..c96fa1b3f49f 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area)
203 * - end - virtual end address of region 203 * - end - virtual end address of region
204 */ 204 */
205v6_dma_inv_range: 205v6_dma_inv_range:
206#ifdef CONFIG_DMA_CACHE_RWFO
207 ldrb r2, [r0] @ read for ownership
208 strb r2, [r0] @ write for ownership
209#endif
206 tst r0, #D_CACHE_LINE_SIZE - 1 210 tst r0, #D_CACHE_LINE_SIZE - 1
207 bic r0, r0, #D_CACHE_LINE_SIZE - 1 211 bic r0, r0, #D_CACHE_LINE_SIZE - 1
208#ifdef HARVARD_CACHE 212#ifdef HARVARD_CACHE
@@ -211,6 +215,10 @@ v6_dma_inv_range:
211 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line 215 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
212#endif 216#endif
213 tst r1, #D_CACHE_LINE_SIZE - 1 217 tst r1, #D_CACHE_LINE_SIZE - 1
218#ifdef CONFIG_DMA_CACHE_RWFO
219 ldrneb r2, [r1, #-1] @ read for ownership
220 strneb r2, [r1, #-1] @ write for ownership
221#endif
214 bic r1, r1, #D_CACHE_LINE_SIZE - 1 222 bic r1, r1, #D_CACHE_LINE_SIZE - 1
215#ifdef HARVARD_CACHE 223#ifdef HARVARD_CACHE
216 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line 224 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line
@@ -218,10 +226,6 @@ v6_dma_inv_range:
218 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 226 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
219#endif 227#endif
2201: 2281:
221#ifdef CONFIG_DMA_CACHE_RWFO
222 ldr r2, [r0] @ read for ownership
223 str r2, [r0] @ write for ownership
224#endif
225#ifdef HARVARD_CACHE 229#ifdef HARVARD_CACHE
226 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 230 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
227#else 231#else
@@ -229,6 +233,10 @@ v6_dma_inv_range:
229#endif 233#endif
230 add r0, r0, #D_CACHE_LINE_SIZE 234 add r0, r0, #D_CACHE_LINE_SIZE
231 cmp r0, r1 235 cmp r0, r1
236#ifdef CONFIG_DMA_CACHE_RWFO
237 ldrlo r2, [r0] @ read for ownership
238 strlo r2, [r0] @ write for ownership
239#endif
232 blo 1b 240 blo 1b
233 mov r0, #0 241 mov r0, #0
234 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 242 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
@@ -263,12 +271,12 @@ v6_dma_clean_range:
263 * - end - virtual end address of region 271 * - end - virtual end address of region
264 */ 272 */
265ENTRY(v6_dma_flush_range) 273ENTRY(v6_dma_flush_range)
266 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2671:
268#ifdef CONFIG_DMA_CACHE_RWFO 274#ifdef CONFIG_DMA_CACHE_RWFO
269 ldr r2, [r0] @ read for ownership 275 ldrb r2, [r0] @ read for ownership
270 str r2, [r0] @ write for ownership 276 strb r2, [r0] @ write for ownership
271#endif 277#endif
278 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2791:
272#ifdef HARVARD_CACHE 280#ifdef HARVARD_CACHE
273 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 281 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
274#else 282#else
@@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range)
276#endif 284#endif
277 add r0, r0, #D_CACHE_LINE_SIZE 285 add r0, r0, #D_CACHE_LINE_SIZE
278 cmp r0, r1 286 cmp r0, r1
287#ifdef CONFIG_DMA_CACHE_RWFO
288 ldrlob r2, [r0] @ read for ownership
289 strlob r2, [r0] @ write for ownership
290#endif
279 blo 1b 291 blo 1b
280 mov r0, #0 292 mov r0, #0
281 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 293 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index a3ebf7a4f49b..6136e68ce953 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -173,15 +173,22 @@ ENTRY(v7_coherent_user_range)
173 UNWIND(.fnstart ) 173 UNWIND(.fnstart )
174 dcache_line_size r2, r3 174 dcache_line_size r2, r3
175 sub r3, r2, #1 175 sub r3, r2, #1
176 bic r0, r0, r3 176 bic r12, r0, r3
1771: 1771:
178 USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification 178 USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification
179 add r12, r12, r2
180 cmp r12, r1
181 blo 1b
179 dsb 182 dsb
180 USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line 183 icache_line_size r2, r3
181 add r0, r0, r2 184 sub r3, r2, #1
185 bic r12, r0, r3
1822: 1862:
183 cmp r0, r1 187 USER( mcr p15, 0, r12, c7, c5, 1 ) @ invalidate I line
184 blo 1b 188 add r12, r12, r2
189 cmp r12, r1
190 blo 2b
1913:
185 mov r0, #0 192 mov r0, #0
186 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable 193 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable
187 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB 194 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB
@@ -194,10 +201,10 @@ ENTRY(v7_coherent_user_range)
194 * isn't mapped, just try the next page. 201 * isn't mapped, just try the next page.
195 */ 202 */
1969001: 2039001:
197 mov r0, r0, lsr #12 204 mov r12, r12, lsr #12
198 mov r0, r0, lsl #12 205 mov r12, r12, lsl #12
199 add r0, r0, #4096 206 add r12, r12, #4096
200 b 2b 207 b 3b
201 UNWIND(.fnend ) 208 UNWIND(.fnend )
202ENDPROC(v7_coherent_kern_range) 209ENDPROC(v7_coherent_kern_range)
203ENDPROC(v7_coherent_user_range) 210ENDPROC(v7_coherent_user_range)
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 7d63beaf9745..b795afd0a2c6 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -61,17 +61,27 @@
61 .endm 61 .endm
62 62
63/* 63/*
64 * cache_line_size - get the cache line size from the CSIDR register 64 * dcache_line_size - get the minimum D-cache line size from the CTR register
65 * (available on ARMv7+). It assumes that the CSSR register was configured 65 * on ARMv7.
66 * to access the L1 data cache CSIDR.
67 */ 66 */
68 .macro dcache_line_size, reg, tmp 67 .macro dcache_line_size, reg, tmp
69 mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR 68 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
70 and \tmp, \tmp, #7 @ cache line size encoding 69 lsr \tmp, \tmp, #16
71 mov \reg, #16 @ size offset 70 and \tmp, \tmp, #0xf @ cache line size encoding
71 mov \reg, #4 @ bytes per word
72 mov \reg, \reg, lsl \tmp @ actual cache line size 72 mov \reg, \reg, lsl \tmp @ actual cache line size
73 .endm 73 .endm
74 74
75/*
76 * icache_line_size - get the minimum I-cache line size from the CTR register
77 * on ARMv7.
78 */
79 .macro icache_line_size, reg, tmp
80 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
81 and \tmp, \tmp, #0xf @ cache line size encoding
82 mov \reg, #4 @ bytes per word
83 mov \reg, \reg, lsl \tmp @ actual cache line size
84 .endm
75 85
76/* 86/*
77 * Sanity check the PTE configuration for the code below - which makes 87 * Sanity check the PTE configuration for the code below - which makes
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 53cbe2225153..9b9ff5d949fd 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -381,7 +381,7 @@ __v7_ca9mp_proc_info:
381 PMD_SECT_XN | \ 381 PMD_SECT_XN | \
382 PMD_SECT_AP_WRITE | \ 382 PMD_SECT_AP_WRITE | \
383 PMD_SECT_AP_READ 383 PMD_SECT_AP_READ
384 b __v7_ca9mp_setup 384 W(b) __v7_ca9mp_setup
385 .long cpu_arch_name 385 .long cpu_arch_name
386 .long cpu_elf_name 386 .long cpu_elf_name
387 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS 387 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
@@ -413,7 +413,7 @@ __v7_proc_info:
413 PMD_SECT_XN | \ 413 PMD_SECT_XN | \
414 PMD_SECT_AP_WRITE | \ 414 PMD_SECT_AP_WRITE | \
415 PMD_SECT_AP_READ 415 PMD_SECT_AP_READ
416 b __v7_setup 416 W(b) __v7_setup
417 .long cpu_arch_name 417 .long cpu_arch_name
418 .long cpu_elf_name 418 .long cpu_elf_name
419 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS 419 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 85d3e55ca4a9..558cdfaf76b6 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,6 +18,7 @@
18#include <linux/time.h> 18#include <linux/time.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/timex.h> 20#include <linux/timex.h>
21#include <linux/sched.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/clocksource.h> 23#include <linux/clocksource.h>
23#include <linux/clockchips.h> 24#include <linux/clockchips.h>
@@ -36,7 +37,7 @@
36/* 37/*
37 * IOP clocksource (free-running timer 1). 38 * IOP clocksource (free-running timer 1).
38 */ 39 */
39static cycle_t iop_clocksource_read(struct clocksource *unused) 40static cycle_t notrace iop_clocksource_read(struct clocksource *unused)
40{ 41{
41 return 0xffffffffu - read_tcr1(); 42 return 0xffffffffu - read_tcr1();
42} 43}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 155fe43a672b..8722a136f3a5 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/err.h>
19 20
20#include <plat/common.h> 21#include <plat/common.h>
21#include <plat/board.h> 22#include <plat/board.h>
@@ -164,7 +165,7 @@ static int __init omap_init_clocksource_32k(void)
164 return -ENODEV; 165 return -ENODEV;
165 166
166 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); 167 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
167 if (sync_32k_ick) 168 if (!IS_ERR(sync_32k_ick))
168 clk_enable(sync_32k_ick); 169 clk_enable(sync_32k_ick);
169 170
170 clocksource_32k.mult = clocksource_hz2mult(32768, 171 clocksource_32k.mult = clocksource_hz2mult(32768,
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index e2c8eebe6b3a..74dac419d328 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -166,7 +166,7 @@ static void __init omap_detect_sram(void)
166 cpu_is_omap1710()) 166 cpu_is_omap1710())
167 omap_sram_size = 0x4000; /* 16K */ 167 omap_sram_size = 0x4000; /* 16K */
168 else if (cpu_is_omap1611()) 168 else if (cpu_is_omap1611())
169 omap_sram_size = 0x3e800; /* 250K */ 169 omap_sram_size = SZ_256K;
170 else { 170 else {
171 printk(KERN_ERR "Could not detect SRAM size\n"); 171 printk(KERN_ERR "Could not detect SRAM size\n");
172 omap_sram_size = 0x4000; 172 omap_sram_size = 0x4000;
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 4aacdd12c9cc..3aca5ba0f876 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -6,6 +6,7 @@ obj-y := dma.o
6 6
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o 7obj-$(CONFIG_GENERIC_GPIO) += gpio.o
8obj-$(CONFIG_PXA3xx) += mfp.o 8obj-$(CONFIG_PXA3xx) += mfp.o
9obj-$(CONFIG_PXA95x) += mfp.o
9obj-$(CONFIG_ARCH_MMP) += mfp.o 10obj-$(CONFIG_ARCH_MMP) += mfp.o
10 11
11obj-$(CONFIG_HAVE_PWM) += pwm.o 12obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 9e604c80618f..75f656471240 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
423 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ 423 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
424 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) 424 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
425 425
426#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP) 426#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
427/* 427/*
428 * each MFP pin will have a MFPR register, since the offset of the 428 * each MFP pin will have a MFPR register, since the offset of the
429 * register varies between processors, the processor specific code 429 * register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
470void mfp_config(unsigned long *mfp_cfgs, int num); 470void mfp_config(unsigned long *mfp_cfgs, int num);
471void mfp_config_run(void); 471void mfp_config_run(void);
472void mfp_config_lpm(void); 472void mfp_config_lpm(void);
473#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */ 473#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
474 474
475#endif /* __ASM_PLAT_MFP_H */ 475#endif /* __ASM_PLAT_MFP_H */
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 76d0858c3cbb..4a10c0f684b2 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
88 { 88 {
89 .idcode = 0x32440000, 89 .idcode = 0x32440000,
90 .idmask = 0xffffffff, 90 .idmask = 0xffffffff,
91 .map_io = s3c244x_map_io, 91 .map_io = s3c2440_map_io,
92 .init_clocks = s3c244x_init_clocks, 92 .init_clocks = s3c244x_init_clocks,
93 .init_uarts = s3c244x_init_uarts, 93 .init_uarts = s3c244x_init_uarts,
94 .init = s3c2440_init, 94 .init = s3c2440_init,
@@ -97,7 +97,7 @@ static struct cpu_table cpu_ids[] __initdata = {
97 { 97 {
98 .idcode = 0x32440001, 98 .idcode = 0x32440001,
99 .idmask = 0xffffffff, 99 .idmask = 0xffffffff,
100 .map_io = s3c244x_map_io, 100 .map_io = s3c2440_map_io,
101 .init_clocks = s3c244x_init_clocks, 101 .init_clocks = s3c244x_init_clocks,
102 .init_uarts = s3c244x_init_uarts, 102 .init_uarts = s3c244x_init_uarts,
103 .init = s3c2440_init, 103 .init = s3c2440_init,
@@ -106,7 +106,7 @@ static struct cpu_table cpu_ids[] __initdata = {
106 { 106 {
107 .idcode = 0x32440aaa, 107 .idcode = 0x32440aaa,
108 .idmask = 0xffffffff, 108 .idmask = 0xffffffff,
109 .map_io = s3c244x_map_io, 109 .map_io = s3c2442_map_io,
110 .init_clocks = s3c244x_init_clocks, 110 .init_clocks = s3c244x_init_clocks,
111 .init_uarts = s3c244x_init_uarts, 111 .init_uarts = s3c244x_init_uarts,
112 .init = s3c2442_init, 112 .init = s3c2442_init,
@@ -115,7 +115,7 @@ static struct cpu_table cpu_ids[] __initdata = {
115 { 115 {
116 .idcode = 0x32440aab, 116 .idcode = 0x32440aab,
117 .idmask = 0xffffffff, 117 .idmask = 0xffffffff,
118 .map_io = s3c244x_map_io, 118 .map_io = s3c2442_map_io,
119 .init_clocks = s3c244x_init_clocks, 119 .init_clocks = s3c244x_init_clocks,
120 .init_uarts = s3c244x_init_uarts, 120 .init_uarts = s3c244x_init_uarts,
121 .init = s3c2442_init, 121 .init = s3c2442_init,
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 24c6f5a30596..243b6411050d 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,8 +82,6 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { 82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
83 .set_config = s3c_gpio_setcfg_s3c24xx, 83 .set_config = s3c_gpio_setcfg_s3c24xx,
84 .get_config = s3c_gpio_getcfg_s3c24xx, 84 .get_config = s3c_gpio_getcfg_s3c24xx,
85 .set_pull = s3c_gpio_setpull_1up,
86 .get_pull = s3c_gpio_getpull_1up,
87}; 85};
88 86
89struct s3c_gpio_chip s3c24xx_gpios[] = { 87struct s3c_gpio_chip s3c24xx_gpios[] = {
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 307248d1ccbb..89e8d0a25f87 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -21,17 +21,22 @@ extern void s3c244x_init_clocks(int xtal);
21#else 21#else
22#define s3c244x_init_clocks NULL 22#define s3c244x_init_clocks NULL
23#define s3c244x_init_uarts NULL 23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL
25#endif 24#endif
26 25
27#ifdef CONFIG_CPU_S3C2440 26#ifdef CONFIG_CPU_S3C2440
28extern int s3c2440_init(void); 27extern int s3c2440_init(void);
28
29extern void s3c2440_map_io(void);
29#else 30#else
30#define s3c2440_init NULL 31#define s3c2440_init NULL
32#define s3c2440_map_io NULL
31#endif 33#endif
32 34
33#ifdef CONFIG_CPU_S3C2442 35#ifdef CONFIG_CPU_S3C2442
34extern int s3c2442_init(void); 36extern int s3c2442_init(void);
37
38extern void s3c2442_map_io(void);
35#else 39#else
36#define s3c2442_init NULL 40#define s3c2442_init NULL
41#define s3c2442_map_io NULL
37#endif 42#endif
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index b732b773b9af..0aa32f242ee4 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -280,18 +280,17 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
280} 280}
281#endif 281#endif
282 282
283#ifdef CONFIG_S3C_GPIO_PULL_UP 283#if defined(CONFIG_S3C_GPIO_PULL_UP) || defined(CONFIG_S3C_GPIO_PULL_DOWN)
284int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, 284static int s3c_gpio_setpull_1(struct s3c_gpio_chip *chip,
285 unsigned int off, s3c_gpio_pull_t pull) 285 unsigned int off, s3c_gpio_pull_t pull,
286 s3c_gpio_pull_t updown)
286{ 287{
287 void __iomem *reg = chip->base + 0x08; 288 void __iomem *reg = chip->base + 0x08;
288 u32 pup = __raw_readl(reg); 289 u32 pup = __raw_readl(reg);
289 290
290 pup = __raw_readl(reg); 291 if (pull == updown)
291
292 if (pup == S3C_GPIO_PULL_UP)
293 pup &= ~(1 << off); 292 pup &= ~(1 << off);
294 else if (pup == S3C_GPIO_PULL_NONE) 293 else if (pull == S3C_GPIO_PULL_NONE)
295 pup |= (1 << off); 294 pup |= (1 << off);
296 else 295 else
297 return -EINVAL; 296 return -EINVAL;
@@ -300,17 +299,45 @@ int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
300 return 0; 299 return 0;
301} 300}
302 301
303s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, 302static s3c_gpio_pull_t s3c_gpio_getpull_1(struct s3c_gpio_chip *chip,
304 unsigned int off) 303 unsigned int off, s3c_gpio_pull_t updown)
305{ 304{
306 void __iomem *reg = chip->base + 0x08; 305 void __iomem *reg = chip->base + 0x08;
307 u32 pup = __raw_readl(reg); 306 u32 pup = __raw_readl(reg);
308 307
309 pup &= (1 << off); 308 pup &= (1 << off);
310 return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP; 309 return pup ? S3C_GPIO_PULL_NONE : updown;
310}
311#endif /* CONFIG_S3C_GPIO_PULL_UP || CONFIG_S3C_GPIO_PULL_DOWN */
312
313#ifdef CONFIG_S3C_GPIO_PULL_UP
314s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
315 unsigned int off)
316{
317 return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP);
318}
319
320int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
321 unsigned int off, s3c_gpio_pull_t pull)
322{
323 return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP);
311} 324}
312#endif /* CONFIG_S3C_GPIO_PULL_UP */ 325#endif /* CONFIG_S3C_GPIO_PULL_UP */
313 326
327#ifdef CONFIG_S3C_GPIO_PULL_DOWN
328s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip,
329 unsigned int off)
330{
331 return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN);
332}
333
334int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip,
335 unsigned int off, s3c_gpio_pull_t pull)
336{
337 return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN);
338}
339#endif /* CONFIG_S3C_GPIO_PULL_DOWN */
340
314#ifdef CONFIG_S5P_GPIO_DRVSTR 341#ifdef CONFIG_S5P_GPIO_DRVSTR
315s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) 342s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
316{ 343{
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 8fd65d8b5863..0d2c5703f1ee 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -210,6 +210,17 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
210 unsigned int off); 210 unsigned int off);
211 211
212/** 212/**
213 * s3c_gpio_getpull_1down() - Get configuration for choice of down or none
214 * @chip: The gpio chip that the GPIO pin belongs to
215 * @off: The offset to the pin to get the configuration of.
216 *
217 * This helper function reads the state of the pull-down resistor for the
218 * given GPIO in the same case as s3c_gpio_setpull_1down.
219*/
220extern s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip,
221 unsigned int off);
222
223/**
213 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. 224 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
214 * @chip: The gpio chip that is being configured. 225 * @chip: The gpio chip that is being configured.
215 * @off: The offset for the GPIO being configured. 226 * @off: The offset for the GPIO being configured.
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 55590a4d87c9..2fea897ebeb1 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Thu Sep 9 22:43:01 2010 15# Last update: Sun Dec 12 23:24:27 2010
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2321,7 +2321,7 @@ mx31txtr MACH_MX31TXTR MX31TXTR 2332
2321u380 MACH_U380 U380 2333 2321u380 MACH_U380 U380 2333
2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334 2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334
2323npcmx50 MACH_NPCMX50 NPCMX50 2335 2323npcmx50 MACH_NPCMX50 NPCMX50 2335
2324mx51_lange51 MACH_MX51_LANGE51 MX51_LANGE51 2336 2324mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336
2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337 2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337
2326riom MACH_RIOM RIOM 2338 2326riom MACH_RIOM RIOM 2338
2327comcas MACH_COMCAS COMCAS 2339 2327comcas MACH_COMCAS COMCAS 2339
@@ -2355,7 +2355,7 @@ at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366
2355csb732 MACH_CSB732 CSB732 2367 2355csb732 MACH_CSB732 CSB732 2367
2356u8500 MACH_U8500 U8500 2368 2356u8500 MACH_U8500 U8500 2368
2357huqiu MACH_HUQIU HUQIU 2369 2357huqiu MACH_HUQIU HUQIU 2369
2358mx51_kunlun MACH_MX51_KUNLUN MX51_KUNLUN 2370 2358mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370
2359pmt1g MACH_PMT1G PMT1G 2371 2359pmt1g MACH_PMT1G PMT1G 2371
2360htcelf MACH_HTCELF HTCELF 2372 2360htcelf MACH_HTCELF HTCELF 2372
2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373 2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373
@@ -2971,7 +2971,7 @@ premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986 2971wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987 2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988 2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal MACH_UNIVERSAL UNIVERSAL 2989 2974universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989
2975real6410 MACH_REAL6410 REAL6410 2990 2975real6410 MACH_REAL6410 REAL6410 2990
2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991
2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992
@@ -3044,3 +3044,178 @@ harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059
3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060
3045spear900 MACH_SPEAR900 SPEAR900 3061 3045spear900 MACH_SPEAR900 SPEAR900 3061
3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062
3047rdstor MACH_RDSTOR RDSTOR 3063
3048usdloader MACH_USDLOADER USDLOADER 3064
3049tsoploader MACH_TSOPLOADER TSOPLOADER 3065
3050kronos MACH_KRONOS KRONOS 3066
3051ffcore MACH_FFCORE FFCORE 3067
3052mone MACH_MONE MONE 3068
3053unit2s MACH_UNIT2S UNIT2S 3069
3054acer_a5 MACH_ACER_A5 ACER_A5 3070
3055etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071
3056stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072
3057p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073
3058tulip MACH_TULIP TULIP 3074
3059sunflower MACH_SUNFLOWER SUNFLOWER 3075
3060rib MACH_RIB RIB 3076
3061clod MACH_CLOD CLOD 3077
3062rump MACH_RUMP RUMP 3078
3063tenderloin MACH_TENDERLOIN TENDERLOIN 3079
3064shortloin MACH_SHORTLOIN SHORTLOIN 3080
3065crespo MACH_CRESPO CRESPO 3081
3066antares MACH_ANTARES ANTARES 3082
3067wb40n MACH_WB40N WB40N 3083
3068herring MACH_HERRING HERRING 3084
3069naxy400 MACH_NAXY400 NAXY400 3085
3070naxy1200 MACH_NAXY1200 NAXY1200 3086
3071vpr200 MACH_VPR200 VPR200 3087
3072bug20 MACH_BUG20 BUG20 3088
3073goflexnet MACH_GOFLEXNET GOFLEXNET 3089
3074torbreck MACH_TORBRECK TORBRECK 3090
3075saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091
3076callisto MACH_CALLISTO CALLISTO 3092
3077multhsu MACH_MULTHSU MULTHSU 3093
3078saluda MACH_SALUDA SALUDA 3094
3079pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095
3080vc0718 MACH_VC0718 VC0718 3096
3081mvblx MACH_MVBLX MVBLX 3097
3082inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098
3083inhand_fury MACH_INHAND_FURY INHAND_FURY 3099
3084inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100
3085hdnvp MACH_HDNVP HDNVP 3101
3086softwinner MACH_SOFTWINNER SOFTWINNER 3102
3087prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103
3088nas6210 MACH_NAS6210 NAS6210 3104
3089unisdev MACH_UNISDEV UNISDEV 3105
3090sbca11 MACH_SBCA11 SBCA11 3106
3091saga MACH_SAGA SAGA 3107
3092ns_k330 MACH_NS_K330 NS_K330 3108
3093tanna MACH_TANNA TANNA 3109
3094imate8502 MACH_IMATE8502 IMATE8502 3110
3095aspen MACH_ASPEN ASPEN 3111
3096daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112
3097zmx25 MACH_ZMX25 ZMX25 3113
3098maple1 MACH_MAPLE1 MAPLE1 3114
3099qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115
3100qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116
3101abilene MACH_ABILENE ABILENE 3117
3102eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118
3103iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119
3104coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120
3105santiago MACH_SANTIAGO SANTIAGO 3121
3106mx257sol MACH_MX257SOL MX257SOL 3122
3107strasbourg MACH_STRASBOURG STRASBOURG 3123
3108msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124
3109smartqv5 MACH_SMARTQV5 SMARTQV5 3125
3110smartqv3 MACH_SMARTQV3 SMARTQV3 3126
3111smartqv7 MACH_SMARTQV7 SMARTQV7 3127
3112paz00 MACH_PAZ00 PAZ00 3128
3113acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
3114htcwillow MACH_HTCWILLOW HTCWILLOW 3130
3115fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131
3116hdgu MACH_HDGU HDGU 3132
3117pyramid MACH_PYRAMID PYRAMID 3133
3118epiphan MACH_EPIPHAN EPIPHAN 3134
3119omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135
3120gurnard MACH_GURNARD GURNARD 3136
3121gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137
3122bcm2708 MACH_BCM2708 BCM2708 3138
3123mx51_ggc MACH_MX51_GGC MX51_GGC 3139
3124sharespace MACH_SHARESPACE SHARESPACE 3140
3125haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141
3126simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142
3127crux MACH_CRUX CRUX 3143
3128mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144
3129charon MACH_CHARON CHARON 3145
3130picocom3 MACH_PICOCOM3 PICOCOM3 3146
3131picocom4 MACH_PICOCOM4 PICOCOM4 3147
3132serrano MACH_SERRANO SERRANO 3148
3133doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149
3134evsy MACH_EVSY EVSY 3150
3135huashan MACH_HUASHAN HUASHAN 3151
3136lausanne MACH_LAUSANNE LAUSANNE 3152
3137emerald MACH_EMERALD EMERALD 3153
3138tqma35 MACH_TQMA35 TQMA35 3154
3139marvel MACH_MARVEL MARVEL 3155
3140manuae MACH_MANUAE MANUAE 3156
3141chacha MACH_CHACHA CHACHA 3157
3142lemon MACH_LEMON LEMON 3158
3143csc MACH_CSC CSC 3159
3144gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160
3145t20 MACH_T20 T20 3161
3146hdmini MACH_HDMINI HDMINI 3162
3147sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163
3148express MACH_EXPRESS EXPRESS 3164
3149express_kt MACH_EXPRESS_KT EXPRESS_KT 3165
3150maximasp MACH_MAXIMASP MAXIMASP 3166
3151nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167
3152nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168
3153sunfire MACH_SUNFIRE SUNFIRE 3169
3154arowana MACH_AROWANA AROWANA 3170
3155tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171
3156tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172
3157edison MACH_EDISON EDISON 3173
3158svp8500v1 MACH_SVP8500V1 SVP8500V1 3174
3159svp8500v2 MACH_SVP8500V2 SVP8500V2 3175
3160svp5500 MACH_SVP5500 SVP5500 3176
3161b5500 MACH_B5500 B5500 3177
3162s5500 MACH_S5500 S5500 3178
3163icon MACH_ICON ICON 3179
3164elephant MACH_ELEPHANT ELEPHANT 3180
3165msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181
3166shooter MACH_SHOOTER SHOOTER 3182
3167spade_lte MACH_SPADE_LTE SPADE_LTE 3183
3168philhwani MACH_PHILHWANI PHILHWANI 3184
3169gsncomm MACH_GSNCOMM GSNCOMM 3185
3170strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186
3171mmm MACH_MMM MMM 3187
3172davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188
3173ag5evm MACH_AG5EVM AG5EVM 3189
3174sc575plc MACH_SC575PLC SC575PLC 3190
3175sc575hmi MACH_SC575IPC SC575IPC 3191
3176omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192
3177g7 MACH_G7 G7 3193
3178top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194
3179top9000_su MACH_TOP9000_SU TOP9000_SU 3195
3180utm300 MACH_UTM300 UTM300 3196
3181tsunagi MACH_TSUNAGI TSUNAGI 3197
3182ts75xx MACH_TS75XX TS75XX 3198
3183msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199
3184ts47xx MACH_TS47XX TS47XX 3200
3185da850_k5 MACH_DA850_K5 DA850_K5 3201
3186ax502 MACH_AX502 AX502 3202
3187igep0032 MACH_IGEP0032 IGEP0032 3203
3188antero MACH_ANTERO ANTERO 3204
3189synergy MACH_SYNERGY SYNERGY 3205
3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
3192punica MACH_PUNICA PUNICA 3208
3193sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209
3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
3195mackerel MACH_MACKEREL MACKEREL 3211
3196fa9x27 MACH_FA9X27 FA9X27 3213
3197ns2816tb MACH_NS2816TB NS2816TB 3214
3198ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215
3199ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216
3200kaen MACH_KAEN KAEN 3217
3201nv1000 MACH_NV1000 NV1000 3218
3202nuc950ts MACH_NUC950TS NUC950TS 3219
3203nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
3204ast2200 MACH_AST2200 AST2200 3221
3205lead MACH_LEAD LEAD 3222
3206unino1 MACH_UNINO1 UNINO1 3223
3207greeco MACH_GREECO GREECO 3224
3208verdi MACH_VERDI VERDI 3225
3209dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226
3210quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227
3211abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228
3212svcid MACH_SVCID SVCID 3229
3213msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
3214msm8960_rumi3 MACH_MSM8960_RUMI3 MSM8960_RUMI3 3231
3215icon_g MACH_ICON_G ICON_G 3232
3216mb3 MACH_MB3 MB3 3233
3217gsia18s MACH_GSIA18S GSIA18S 3234
3218pivicc MACH_PIVICC PIVICC 3235
3219pcm048 MACH_PCM048 PCM048 3236
3220dds MACH_DDS DDS 3237
3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index d66cead97d28..9897dcfc16d6 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -206,6 +206,7 @@ ENTRY(vfp_save_state)
206 mov pc, lr 206 mov pc, lr
207ENDPROC(vfp_save_state) 207ENDPROC(vfp_save_state)
208 208
209 .align
209last_VFP_context_address: 210last_VFP_context_address:
210 .word last_VFP_context 211 .word last_VFP_context
211 212
diff --git a/arch/mn10300/include/asm/syscall.h b/arch/mn10300/include/asm/syscall.h
new file mode 100644
index 000000000000..b44b0bb75a01
--- /dev/null
+++ b/arch/mn10300/include/asm/syscall.h
@@ -0,0 +1,117 @@
1/* Access to user system call parameters and results
2 *
3 * See asm-generic/syscall.h for function descriptions.
4 *
5 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
6 * Written by David Howells (dhowells@redhat.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13
14#ifndef _ASM_SYSCALL_H
15#define _ASM_SYSCALL_H
16
17#include <linux/sched.h>
18#include <linux/err.h>
19
20extern const unsigned long sys_call_table[];
21
22static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
23{
24 return regs->orig_d0;
25}
26
27static inline void syscall_rollback(struct task_struct *task,
28 struct pt_regs *regs)
29{
30 regs->d0 = regs->orig_d0;
31}
32
33static inline long syscall_get_error(struct task_struct *task,
34 struct pt_regs *regs)
35{
36 unsigned long error = regs->d0;
37 return IS_ERR_VALUE(error) ? error : 0;
38}
39
40static inline long syscall_get_return_value(struct task_struct *task,
41 struct pt_regs *regs)
42{
43 return regs->d0;
44}
45
46static inline void syscall_set_return_value(struct task_struct *task,
47 struct pt_regs *regs,
48 int error, long val)
49{
50 regs->d0 = (long) error ?: val;
51}
52
53static inline void syscall_get_arguments(struct task_struct *task,
54 struct pt_regs *regs,
55 unsigned int i, unsigned int n,
56 unsigned long *args)
57{
58 switch (i) {
59 case 0:
60 if (!n--) break;
61 *args++ = regs->a0;
62 case 1:
63 if (!n--) break;
64 *args++ = regs->d1;
65 case 2:
66 if (!n--) break;
67 *args++ = regs->a3;
68 case 3:
69 if (!n--) break;
70 *args++ = regs->a2;
71 case 4:
72 if (!n--) break;
73 *args++ = regs->d3;
74 case 5:
75 if (!n--) break;
76 *args++ = regs->d2;
77 case 6:
78 if (!n--) break;
79 default:
80 BUG();
81 break;
82 }
83}
84
85static inline void syscall_set_arguments(struct task_struct *task,
86 struct pt_regs *regs,
87 unsigned int i, unsigned int n,
88 const unsigned long *args)
89{
90 switch (i) {
91 case 0:
92 if (!n--) break;
93 regs->a0 = *args++;
94 case 1:
95 if (!n--) break;
96 regs->d1 = *args++;
97 case 2:
98 if (!n--) break;
99 regs->a3 = *args++;
100 case 3:
101 if (!n--) break;
102 regs->a2 = *args++;
103 case 4:
104 if (!n--) break;
105 regs->d3 = *args++;
106 case 5:
107 if (!n--) break;
108 regs->d2 = *args++;
109 case 6:
110 if (!n--) break;
111 default:
112 BUG();
113 break;
114 }
115}
116
117#endif /* _ASM_SYSCALL_H */
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
index 0d5d63c91dc3..f28dc99c6f72 100644
--- a/arch/mn10300/kernel/gdb-io-serial.c
+++ b/arch/mn10300/kernel/gdb-io-serial.c
@@ -73,7 +73,8 @@ void gdbstub_io_init(void)
73 GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI; 73 GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI;
74 74
75 /* permit level 0 IRQs to take place */ 75 /* permit level 0 IRQs to take place */
76 local_change_intr_mask_level(NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); 76 arch_local_change_intr_mask_level(
77 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1));
77} 78}
78 79
79/* 80/*
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
index 97dfda23342c..abdeea153c89 100644
--- a/arch/mn10300/kernel/gdb-io-ttysm.c
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -87,7 +87,8 @@ void __init gdbstub_io_init(void)
87 tmp = *gdbstub_port->_control; 87 tmp = *gdbstub_port->_control;
88 88
89 /* permit level 0 IRQs only */ 89 /* permit level 0 IRQs only */
90 local_change_intr_mask_level(NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); 90 arch_local_change_intr_mask_level(
91 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1));
91} 92}
92 93
93/* 94/*
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
index a5fc3f05309b..b169d99d9f20 100644
--- a/arch/mn10300/kernel/gdb-stub.c
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -1194,7 +1194,8 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1194 1194
1195 asm volatile("mov mdr,%0" : "=d"(mdr)); 1195 asm volatile("mov mdr,%0" : "=d"(mdr));
1196 local_save_flags(epsw); 1196 local_save_flags(epsw);
1197 local_change_intr_mask_level(NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); 1197 arch_local_change_intr_mask_level(
1198 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1));
1198 1199
1199 gdbstub_store_fpu(); 1200 gdbstub_store_fpu();
1200 1201
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 5024f643b3b1..d7d94b845dc2 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -75,9 +75,6 @@ static void cpu_unmask_irq(unsigned int irq)
75 smp_send_all_nop(); 75 smp_send_all_nop();
76} 76}
77 77
78void no_ack_irq(unsigned int irq) { }
79void no_end_irq(unsigned int irq) { }
80
81void cpu_ack_irq(unsigned int irq) 78void cpu_ack_irq(unsigned int irq)
82{ 79{
83 unsigned long mask = EIEM_MASK(irq); 80 unsigned long mask = EIEM_MASK(irq);
@@ -241,7 +238,7 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
241 238
242 /* for iosapic interrupts */ 239 /* for iosapic interrupts */
243 if (type) { 240 if (type) {
244 set_irq_chip_and_handler(irq, type, handle_level_irq); 241 set_irq_chip_and_handler(irq, type, handle_percpu_irq);
245 set_irq_chip_data(irq, data); 242 set_irq_chip_data(irq, data);
246 cpu_unmask_irq(irq); 243 cpu_unmask_irq(irq);
247 } 244 }
@@ -392,7 +389,7 @@ static void claim_cpu_irqs(void)
392 int i; 389 int i;
393 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { 390 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
394 set_irq_chip_and_handler(i, &cpu_interrupt_type, 391 set_irq_chip_and_handler(i, &cpu_interrupt_type,
395 handle_level_irq); 392 handle_percpu_irq);
396 } 393 }
397 394
398 set_irq_handler(TIMER_IRQ, handle_percpu_irq); 395 set_irq_handler(TIMER_IRQ, handle_percpu_irq);
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 35c827e94e31..609a331878e7 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -98,7 +98,6 @@ void
98sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) 98sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)
99{ 99{
100 struct rt_sigframe __user *frame; 100 struct rt_sigframe __user *frame;
101 struct siginfo si;
102 sigset_t set; 101 sigset_t set;
103 unsigned long usp = (regs->gr[30] & ~(0x01UL)); 102 unsigned long usp = (regs->gr[30] & ~(0x01UL));
104 unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE; 103 unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE;
@@ -178,13 +177,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)
178 177
179give_sigsegv: 178give_sigsegv:
180 DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n"); 179 DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n");
181 si.si_signo = SIGSEGV; 180 force_sig(SIGSEGV, current);
182 si.si_errno = 0;
183 si.si_code = SI_KERNEL;
184 si.si_pid = task_pid_vnr(current);
185 si.si_uid = current_uid();
186 si.si_addr = &frame->uc;
187 force_sig_info(SIGSEGV, &si, current);
188 return; 181 return;
189} 182}
190 183
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 56c8687b29b3..7eff9b7347c0 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -19,6 +19,7 @@
19#include <linux/kernel_stat.h> 19#include <linux/kernel_stat.h>
20#include <linux/rcupdate.h> 20#include <linux/rcupdate.h>
21#include <linux/posix-timers.h> 21#include <linux/posix-timers.h>
22#include <linux/cpu.h>
22 23
23#include <asm/s390_ext.h> 24#include <asm/s390_ext.h>
24#include <asm/timer.h> 25#include <asm/timer.h>
@@ -566,6 +567,23 @@ void init_cpu_vtimer(void)
566 __ctl_set_bit(0,10); 567 __ctl_set_bit(0,10);
567} 568}
568 569
570static int __cpuinit s390_nohz_notify(struct notifier_block *self,
571 unsigned long action, void *hcpu)
572{
573 struct s390_idle_data *idle;
574 long cpu = (long) hcpu;
575
576 idle = &per_cpu(s390_idle, cpu);
577 switch (action) {
578 case CPU_DYING:
579 case CPU_DYING_FROZEN:
580 idle->nohz_delay = 0;
581 default:
582 break;
583 }
584 return NOTIFY_OK;
585}
586
569void __init vtime_init(void) 587void __init vtime_init(void)
570{ 588{
571 /* request the cpu timer external interrupt */ 589 /* request the cpu timer external interrupt */
@@ -574,5 +592,6 @@ void __init vtime_init(void)
574 592
575 /* Enable cpu timer interrupts on the boot cpu. */ 593 /* Enable cpu timer interrupts on the boot cpu. */
576 init_cpu_vtimer(); 594 init_cpu_vtimer();
595 cpu_notifier(s390_nohz_notify, 0);
577} 596}
578 597
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 7f217b3a50a8..2e9d78d21fd3 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -22,7 +22,8 @@ config SUPERH
22 select HAVE_SPARSE_IRQ 22 select HAVE_SPARSE_IRQ
23 select RTC_LIB 23 select RTC_LIB
24 select GENERIC_ATOMIC64 24 select GENERIC_ATOMIC64
25 select GENERIC_HARDIRQS_NO_DEPRECATED 25 # Support the deprecated APIs until MFD and GPIOLIB catch up.
26 select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB
26 help 27 help
27 The SuperH is a RISC processor targeted for use in embedded systems 28 The SuperH is a RISC processor targeted for use in embedded systems
28 and consumer electronics; it was also used in the Sega Dreamcast 29 and consumer electronics; it was also used in the Sega Dreamcast
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 2eaeb9e59585..f48c492a68d3 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = {
720}; 720};
721 721
722/* FSI */ 722/* FSI */
723/*
724 * FSI-B use external clock which came from da7210.
725 * So, we should change parent of fsi
726 */
727#define FCLKBCR 0xa415000c
728static void fsimck_init(struct clk *clk)
729{
730 u32 status = __raw_readl(clk->enable_reg);
731
732 /* use external clock */
733 status &= ~0x000000ff;
734 status |= 0x00000080;
735
736 __raw_writel(status, clk->enable_reg);
737}
738
739static struct clk_ops fsimck_clk_ops = {
740 .init = fsimck_init,
741};
742
743static struct clk fsimckb_clk = {
744 .ops = &fsimck_clk_ops,
745 .enable_reg = (void __iomem *)FCLKBCR,
746 .rate = 0, /* unknown */
747};
748
749static struct sh_fsi_platform_info fsi_info = { 723static struct sh_fsi_platform_info fsi_info = {
750 .portb_flags = SH_FSI_BRS_INV | 724 .portb_flags = SH_FSI_BRS_INV |
751 SH_FSI_OUT_SLAVE_MODE | 725 SH_FSI_OUT_SLAVE_MODE |
@@ -1264,10 +1238,10 @@ static int __init arch_setup(void)
1264 /* change parent of FSI B */ 1238 /* change parent of FSI B */
1265 clk = clk_get(NULL, "fsib_clk"); 1239 clk = clk_get(NULL, "fsib_clk");
1266 if (!IS_ERR(clk)) { 1240 if (!IS_ERR(clk)) {
1267 clk_register(&fsimckb_clk); 1241 /* 48kHz dummy clock was used to make sure 1/1 divide */
1268 clk_set_parent(clk, &fsimckb_clk); 1242 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1269 clk_set_rate(clk, 11000); 1243 clk_set_parent(clk, &sh7724_fsimckb_clk);
1270 clk_set_rate(&fsimckb_clk, 11000); 1244 clk_set_rate(clk, 48000);
1271 clk_put(clk); 1245 clk_put(clk);
1272 } 1246 }
1273 1247
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index c31d228fdfc6..527a0cd956b5 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -283,31 +283,6 @@ static struct platform_device ceu1_device = {
283}; 283};
284 284
285/* FSI */ 285/* FSI */
286/*
287 * FSI-A use external clock which came from ak464x.
288 * So, we should change parent of fsi
289 */
290#define FCLKACR 0xa4150008
291static void fsimck_init(struct clk *clk)
292{
293 u32 status = __raw_readl(clk->enable_reg);
294
295 /* use external clock */
296 status &= ~0x000000ff;
297 status |= 0x00000080;
298 __raw_writel(status, clk->enable_reg);
299}
300
301static struct clk_ops fsimck_clk_ops = {
302 .init = fsimck_init,
303};
304
305static struct clk fsimcka_clk = {
306 .ops = &fsimck_clk_ops,
307 .enable_reg = (void __iomem *)FCLKACR,
308 .rate = 0, /* unknown */
309};
310
311/* change J20, J21, J22 pin to 1-2 connection to use slave mode */ 286/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
312static struct sh_fsi_platform_info fsi_info = { 287static struct sh_fsi_platform_info fsi_info = {
313 .porta_flags = SH_FSI_BRS_INV | 288 .porta_flags = SH_FSI_BRS_INV |
@@ -852,37 +827,29 @@ static int __init devices_setup(void)
852 gpio_request(GPIO_FN_KEYOUT0, NULL); 827 gpio_request(GPIO_FN_KEYOUT0, NULL);
853 828
854 /* enable FSI */ 829 /* enable FSI */
855 gpio_request(GPIO_FN_FSIMCKB, NULL);
856 gpio_request(GPIO_FN_FSIMCKA, NULL); 830 gpio_request(GPIO_FN_FSIMCKA, NULL);
831 gpio_request(GPIO_FN_FSIIASD, NULL);
857 gpio_request(GPIO_FN_FSIOASD, NULL); 832 gpio_request(GPIO_FN_FSIOASD, NULL);
858 gpio_request(GPIO_FN_FSIIABCK, NULL); 833 gpio_request(GPIO_FN_FSIIABCK, NULL);
859 gpio_request(GPIO_FN_FSIIALRCK, NULL); 834 gpio_request(GPIO_FN_FSIIALRCK, NULL);
860 gpio_request(GPIO_FN_FSIOABCK, NULL); 835 gpio_request(GPIO_FN_FSIOABCK, NULL);
861 gpio_request(GPIO_FN_FSIOALRCK, NULL); 836 gpio_request(GPIO_FN_FSIOALRCK, NULL);
862 gpio_request(GPIO_FN_CLKAUDIOAO, NULL); 837 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
863 gpio_request(GPIO_FN_FSIIBSD, NULL);
864 gpio_request(GPIO_FN_FSIOBSD, NULL);
865 gpio_request(GPIO_FN_FSIIBBCK, NULL);
866 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
867 gpio_request(GPIO_FN_FSIOBBCK, NULL);
868 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
869 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
870 gpio_request(GPIO_FN_FSIIASD, NULL);
871 838
872 /* set SPU2 clock to 83.4 MHz */ 839 /* set SPU2 clock to 83.4 MHz */
873 clk = clk_get(NULL, "spu_clk"); 840 clk = clk_get(NULL, "spu_clk");
874 if (clk) { 841 if (!IS_ERR(clk)) {
875 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 842 clk_set_rate(clk, clk_round_rate(clk, 83333333));
876 clk_put(clk); 843 clk_put(clk);
877 } 844 }
878 845
879 /* change parent of FSI A */ 846 /* change parent of FSI A */
880 clk = clk_get(NULL, "fsia_clk"); 847 clk = clk_get(NULL, "fsia_clk");
881 if (clk) { 848 if (!IS_ERR(clk)) {
882 clk_register(&fsimcka_clk); 849 /* 48kHz dummy clock was used to make sure 1/1 divide */
883 clk_set_parent(clk, &fsimcka_clk); 850 clk_set_rate(&sh7724_fsimcka_clk, 48000);
884 clk_set_rate(clk, 11000); 851 clk_set_parent(clk, &sh7724_fsimcka_clk);
885 clk_set_rate(&fsimcka_clk, 11000); 852 clk_set_rate(clk, 48000);
886 clk_put(clk); 853 clk_put(clk);
887 } 854 }
888 855
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index 1f4e562c5e8c..82e1eabeac98 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -96,7 +96,7 @@ void kmap_coherent_init(void);
96void *kmap_coherent(struct page *page, unsigned long addr); 96void *kmap_coherent(struct page *page, unsigned long addr);
97void kunmap_coherent(void *kvaddr); 97void kunmap_coherent(void *kvaddr);
98 98
99#define PG_dcache_dirty PG_arch_1 99#define PG_dcache_clean PG_arch_1
100 100
101void cpu_cache_init(void); 101void cpu_cache_init(void);
102 102
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 903cd618eb74..d6741fca89a4 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -368,8 +368,9 @@
368#define __NR_sendmsg 355 368#define __NR_sendmsg 355
369#define __NR_recvmsg 356 369#define __NR_recvmsg 356
370#define __NR_recvmmsg 357 370#define __NR_recvmmsg 357
371#define __NR_accept4 358
371 372
372#define NR_syscalls 358 373#define NR_syscalls 359
373 374
374#ifdef __KERNEL__ 375#ifdef __KERNEL__
375 376
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 4c27b68789b3..7eb435999426 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -303,4 +303,7 @@ enum {
303 SHDMA_SLAVE_SDHI1_RX, 303 SHDMA_SLAVE_SDHI1_RX,
304}; 304};
305 305
306extern struct clk sh7724_fsimcka_clk;
307extern struct clk sh7724_fsimckb_clk;
308
306#endif /* __ASM_SH7724_H__ */ 309#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 0fe2e9329cb2..271c0b325a9a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -111,12 +111,21 @@ static struct clk div3_clk = {
111 .parent = &pll_clk, 111 .parent = &pll_clk,
112}; 112};
113 113
114/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
115struct clk sh7724_fsimcka_clk = {
116};
117
118struct clk sh7724_fsimckb_clk = {
119};
120
114static struct clk *main_clks[] = { 121static struct clk *main_clks[] = {
115 &r_clk, 122 &r_clk,
116 &extal_clk, 123 &extal_clk,
117 &fll_clk, 124 &fll_clk,
118 &pll_clk, 125 &pll_clk,
119 &div3_clk, 126 &div3_clk,
127 &sh7724_fsimcka_clk,
128 &sh7724_fsimckb_clk,
120}; 129};
121 130
122static void div4_kick(struct clk *clk) 131static void div4_kick(struct clk *clk)
@@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = {
154 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), 163 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
155}; 164};
156 165
157enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 166enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
158 167
159static struct clk div6_clks[DIV6_NR] = { 168static struct clk div6_clks[DIV6_NR] = {
160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), 169 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
163 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), 170 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
164 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), 171 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
165}; 172};
166 173
174enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
175
176/* Indices are important - they are the actual src selecting values */
177static struct clk *fclkacr_parent[] = {
178 [0] = &div3_clk,
179 [1] = NULL,
180 [2] = &sh7724_fsimcka_clk,
181 [3] = NULL,
182};
183
184static struct clk *fclkbcr_parent[] = {
185 [0] = &div3_clk,
186 [1] = NULL,
187 [2] = &sh7724_fsimckb_clk,
188 [3] = NULL,
189};
190
191static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
192 [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0,
193 fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
194 [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0,
195 fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
196};
197
167static struct clk mstp_clks[HWBLK_NR] = { 198static struct clk mstp_clks[HWBLK_NR] = {
168 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), 199 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
169 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), 200 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
@@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = {
240 271
241 /* DIV6 clocks */ 272 /* DIV6 clocks */
242 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), 273 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
243 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), 274 CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
244 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), 275 CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
245 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), 276 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
246 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), 277 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
247 278
@@ -376,6 +407,9 @@ int __init arch_clk_init(void)
376 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 407 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
377 408
378 if (!ret) 409 if (!ret)
410 ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
411
412 if (!ret)
379 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); 413 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
380 414
381 return ret; 415 return ret;
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index e872e81add8a..6fc347ebe59d 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -375,3 +375,4 @@ ENTRY(sys_call_table)
375 .long sys_sendmsg /* 355 */ 375 .long sys_sendmsg /* 355 */
376 .long sys_recvmsg 376 .long sys_recvmsg
377 .long sys_recvmmsg 377 .long sys_recvmmsg
378 .long sys_accept4
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 2cfae81914aa..92eb98633ab0 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -114,7 +114,7 @@ static void sh4_flush_dcache_page(void *arg)
114 struct address_space *mapping = page_mapping(page); 114 struct address_space *mapping = page_mapping(page);
115 115
116 if (mapping && !mapping_mapped(mapping)) 116 if (mapping && !mapping_mapped(mapping))
117 set_bit(PG_dcache_dirty, &page->flags); 117 clear_bit(PG_dcache_clean, &page->flags);
118 else 118 else
119#endif 119#endif
120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY | 120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
@@ -239,7 +239,7 @@ static void sh4_flush_cache_page(void *args)
239 * another ASID than the current one. 239 * another ASID than the current one.
240 */ 240 */
241 map_coherent = (current_cpu_data.dcache.n_aliases && 241 map_coherent = (current_cpu_data.dcache.n_aliases &&
242 !test_bit(PG_dcache_dirty, &page->flags) && 242 test_bit(PG_dcache_clean, &page->flags) &&
243 page_mapped(page)); 243 page_mapped(page));
244 if (map_coherent) 244 if (map_coherent)
245 vaddr = kmap_coherent(page, address); 245 vaddr = kmap_coherent(page, address);
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index f498da1cce7a..7729cca727eb 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -139,7 +139,7 @@ static void sh7705_flush_dcache_page(void *arg)
139 struct address_space *mapping = page_mapping(page); 139 struct address_space *mapping = page_mapping(page);
140 140
141 if (mapping && !mapping_mapped(mapping)) 141 if (mapping && !mapping_mapped(mapping))
142 set_bit(PG_dcache_dirty, &page->flags); 142 clear_bit(PG_dcache_clean, &page->flags);
143 else 143 else
144 __flush_dcache_page(__pa(page_address(page))); 144 __flush_dcache_page(__pa(page_address(page)));
145} 145}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index ba401d137bb9..88d3dc3d30d5 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -60,14 +60,14 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
60 unsigned long len) 60 unsigned long len)
61{ 61{
62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
63 !test_bit(PG_dcache_dirty, &page->flags)) { 63 test_bit(PG_dcache_clean, &page->flags)) {
64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
65 memcpy(vto, src, len); 65 memcpy(vto, src, len);
66 kunmap_coherent(vto); 66 kunmap_coherent(vto);
67 } else { 67 } else {
68 memcpy(dst, src, len); 68 memcpy(dst, src, len);
69 if (boot_cpu_data.dcache.n_aliases) 69 if (boot_cpu_data.dcache.n_aliases)
70 set_bit(PG_dcache_dirty, &page->flags); 70 clear_bit(PG_dcache_clean, &page->flags);
71 } 71 }
72 72
73 if (vma->vm_flags & VM_EXEC) 73 if (vma->vm_flags & VM_EXEC)
@@ -79,14 +79,14 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
79 unsigned long len) 79 unsigned long len)
80{ 80{
81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
82 !test_bit(PG_dcache_dirty, &page->flags)) { 82 test_bit(PG_dcache_clean, &page->flags)) {
83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
84 memcpy(dst, vfrom, len); 84 memcpy(dst, vfrom, len);
85 kunmap_coherent(vfrom); 85 kunmap_coherent(vfrom);
86 } else { 86 } else {
87 memcpy(dst, src, len); 87 memcpy(dst, src, len);
88 if (boot_cpu_data.dcache.n_aliases) 88 if (boot_cpu_data.dcache.n_aliases)
89 set_bit(PG_dcache_dirty, &page->flags); 89 clear_bit(PG_dcache_clean, &page->flags);
90 } 90 }
91} 91}
92 92
@@ -98,7 +98,7 @@ void copy_user_highpage(struct page *to, struct page *from,
98 vto = kmap_atomic(to, KM_USER1); 98 vto = kmap_atomic(to, KM_USER1);
99 99
100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && 100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
101 !test_bit(PG_dcache_dirty, &from->flags)) { 101 test_bit(PG_dcache_clean, &from->flags)) {
102 vfrom = kmap_coherent(from, vaddr); 102 vfrom = kmap_coherent(from, vaddr);
103 copy_page(vto, vfrom); 103 copy_page(vto, vfrom);
104 kunmap_coherent(vfrom); 104 kunmap_coherent(vfrom);
@@ -141,7 +141,7 @@ void __update_cache(struct vm_area_struct *vma,
141 141
142 page = pfn_to_page(pfn); 142 page = pfn_to_page(pfn);
143 if (pfn_valid(pfn)) { 143 if (pfn_valid(pfn)) {
144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 144 int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags);
145 if (dirty) 145 if (dirty)
146 __flush_purge_region(page_address(page), PAGE_SIZE); 146 __flush_purge_region(page_address(page), PAGE_SIZE);
147 } 147 }
@@ -153,7 +153,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
153 153
154 if (pages_do_alias(addr, vmaddr)) { 154 if (pages_do_alias(addr, vmaddr)) {
155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
156 !test_bit(PG_dcache_dirty, &page->flags)) { 156 test_bit(PG_dcache_clean, &page->flags)) {
157 void *kaddr; 157 void *kaddr;
158 158
159 kaddr = kmap_coherent(page, vmaddr); 159 kaddr = kmap_coherent(page, vmaddr);
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c
index 15d74ea42094..ec29e14ec5a8 100644
--- a/arch/sh/mm/kmap.c
+++ b/arch/sh/mm/kmap.c
@@ -34,7 +34,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
34 enum fixed_addresses idx; 34 enum fixed_addresses idx;
35 unsigned long vaddr; 35 unsigned long vaddr;
36 36
37 BUG_ON(test_bit(PG_dcache_dirty, &page->flags)); 37 BUG_ON(!test_bit(PG_dcache_clean, &page->flags));
38 38
39 pagefault_disable(); 39 pagefault_disable();
40 40
diff --git a/arch/sparc/include/asm/openprom.h b/arch/sparc/include/asm/openprom.h
index 81cd43432dc0..47eaafad15ce 100644
--- a/arch/sparc/include/asm/openprom.h
+++ b/arch/sparc/include/asm/openprom.h
@@ -39,7 +39,7 @@ struct linux_dev_v2_funcs {
39 int (*v2_dev_open)(char *devpath); 39 int (*v2_dev_open)(char *devpath);
40 void (*v2_dev_close)(int d); 40 void (*v2_dev_close)(int d);
41 int (*v2_dev_read)(int d, char *buf, int nbytes); 41 int (*v2_dev_read)(int d, char *buf, int nbytes);
42 int (*v2_dev_write)(int d, char *buf, int nbytes); 42 int (*v2_dev_write)(int d, const char *buf, int nbytes);
43 int (*v2_dev_seek)(int d, int hi, int lo); 43 int (*v2_dev_seek)(int d, int hi, int lo);
44 44
45 /* Never issued (multistage load support) */ 45 /* Never issued (multistage load support) */
diff --git a/arch/sparc/include/asm/oplib_32.h b/arch/sparc/include/asm/oplib_32.h
index 51296a6f5005..9e5c64084b86 100644
--- a/arch/sparc/include/asm/oplib_32.h
+++ b/arch/sparc/include/asm/oplib_32.h
@@ -60,25 +60,6 @@ extern char *prom_getbootargs(void);
60extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); 60extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes);
61extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); 61extern void prom_unmapio(char *virt_addr, unsigned int num_bytes);
62 62
63/* Device operations. */
64
65/* Open the device described by the passed string. Note, that the format
66 * of the string is different on V0 vs. V2->higher proms. The caller must
67 * know what he/she is doing! Returns the device descriptor, an int.
68 */
69extern int prom_devopen(char *device_string);
70
71/* Close a previously opened device described by the passed integer
72 * descriptor.
73 */
74extern int prom_devclose(int device_handle);
75
76/* Do a seek operation on the device described by the passed integer
77 * descriptor.
78 */
79extern void prom_seek(int device_handle, unsigned int seek_hival,
80 unsigned int seek_lowval);
81
82/* Miscellaneous routines, don't really fit in any category per se. */ 63/* Miscellaneous routines, don't really fit in any category per se. */
83 64
84/* Reboot the machine with the command line passed. */ 65/* Reboot the machine with the command line passed. */
@@ -121,19 +102,8 @@ extern int prom_getrev(void);
121/* Get the prom firmware revision. */ 102/* Get the prom firmware revision. */
122extern int prom_getprev(void); 103extern int prom_getprev(void);
123 104
124/* Character operations to/from the console.... */ 105/* Write a buffer of characters to the console. */
125 106extern void prom_console_write_buf(const char *buf, int len);
126/* Non-blocking get character from console. */
127extern int prom_nbgetchar(void);
128
129/* Non-blocking put character to console. */
130extern int prom_nbputchar(char character);
131
132/* Blocking get character from console. */
133extern char prom_getchar(void);
134
135/* Blocking put character to console. */
136extern void prom_putchar(char character);
137 107
138/* Prom's internal routines, don't use in kernel/boot code. */ 108/* Prom's internal routines, don't use in kernel/boot code. */
139extern void prom_printf(const char *fmt, ...); 109extern void prom_printf(const char *fmt, ...);
@@ -238,7 +208,6 @@ extern int prom_node_has_property(phandle node, char *property);
238extern int prom_setprop(phandle node, const char *prop_name, char *prop_value, 208extern int prom_setprop(phandle node, const char *prop_name, char *prop_value,
239 int value_size); 209 int value_size);
240 210
241extern phandle prom_pathtoinode(char *path);
242extern phandle prom_inst2pkg(int); 211extern phandle prom_inst2pkg(int);
243 212
244/* Dorking with Bus ranges... */ 213/* Dorking with Bus ranges... */
diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h
index c9cc078e3e31..8cd0df34e82b 100644
--- a/arch/sparc/include/asm/oplib_64.h
+++ b/arch/sparc/include/asm/oplib_64.h
@@ -67,27 +67,6 @@ extern void prom_init(void *cif_handler, void *cif_stack);
67/* Boot argument acquisition, returns the boot command line string. */ 67/* Boot argument acquisition, returns the boot command line string. */
68extern char *prom_getbootargs(void); 68extern char *prom_getbootargs(void);
69 69
70/* Device utilities. */
71
72/* Device operations. */
73
74/* Open the device described by the passed string. Note, that the format
75 * of the string is different on V0 vs. V2->higher proms. The caller must
76 * know what he/she is doing! Returns the device descriptor, an int.
77 */
78extern int prom_devopen(const char *device_string);
79
80/* Close a previously opened device described by the passed integer
81 * descriptor.
82 */
83extern int prom_devclose(int device_handle);
84
85/* Do a seek operation on the device described by the passed integer
86 * descriptor.
87 */
88extern void prom_seek(int device_handle, unsigned int seek_hival,
89 unsigned int seek_lowval);
90
91/* Miscellaneous routines, don't really fit in any category per se. */ 70/* Miscellaneous routines, don't really fit in any category per se. */
92 71
93/* Reboot the machine with the command line passed. */ 72/* Reboot the machine with the command line passed. */
@@ -109,33 +88,14 @@ extern void prom_halt(void) __attribute__ ((noreturn));
109/* Halt and power-off the machine. */ 88/* Halt and power-off the machine. */
110extern void prom_halt_power_off(void) __attribute__ ((noreturn)); 89extern void prom_halt_power_off(void) __attribute__ ((noreturn));
111 90
112/* Set the PROM 'sync' callback function to the passed function pointer.
113 * When the user gives the 'sync' command at the prom prompt while the
114 * kernel is still active, the prom will call this routine.
115 *
116 */
117typedef int (*callback_func_t)(long *cmd);
118extern void prom_setcallback(callback_func_t func_ptr);
119
120/* Acquire the IDPROM of the root node in the prom device tree. This 91/* Acquire the IDPROM of the root node in the prom device tree. This
121 * gets passed a buffer where you would like it stuffed. The return value 92 * gets passed a buffer where you would like it stuffed. The return value
122 * is the format type of this idprom or 0xff on error. 93 * is the format type of this idprom or 0xff on error.
123 */ 94 */
124extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); 95extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
125 96
126/* Character operations to/from the console.... */ 97/* Write a buffer of characters to the console. */
127 98extern void prom_console_write_buf(const char *buf, int len);
128/* Non-blocking get character from console. */
129extern int prom_nbgetchar(void);
130
131/* Non-blocking put character to console. */
132extern int prom_nbputchar(char character);
133
134/* Blocking get character from console. */
135extern char prom_getchar(void);
136
137/* Blocking put character to console. */
138extern void prom_putchar(char character);
139 99
140/* Prom's internal routines, don't use in kernel/boot code. */ 100/* Prom's internal routines, don't use in kernel/boot code. */
141extern void prom_printf(const char *fmt, ...); 101extern void prom_printf(const char *fmt, ...);
@@ -279,9 +239,7 @@ extern phandle prom_finddevice(const char *name);
279extern int prom_setprop(phandle node, const char *prop_name, char *prop_value, 239extern int prom_setprop(phandle node, const char *prop_name, char *prop_value,
280 int value_size); 240 int value_size);
281 241
282extern phandle prom_pathtoinode(const char *path);
283extern phandle prom_inst2pkg(int); 242extern phandle prom_inst2pkg(int);
284extern int prom_service_exists(const char *service_name);
285extern void prom_sun4v_guest_soft_state(void); 243extern void prom_sun4v_guest_soft_state(void);
286 244
287extern int prom_ihandle2path(int handle, char *buffer, int bufsize); 245extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index 2d51527d810f..f01c42661ee5 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -114,7 +114,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)
114 if (leon3_gptimer_regs && leon3_irqctrl_regs) { 114 if (leon3_gptimer_regs && leon3_irqctrl_regs) {
115 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].val, 0); 115 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].val, 0);
116 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].rld, 116 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].rld,
117 (((1000000 / 100) - 1))); 117 (((1000000 / HZ) - 1)));
118 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].ctrl, 0); 118 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].ctrl, 0);
119 119
120#ifdef CONFIG_SMP 120#ifdef CONFIG_SMP
@@ -128,7 +128,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)
128 } 128 }
129 129
130 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].val, 0); 130 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].val, 0);
131 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].rld, (((1000000/100) - 1))); 131 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].rld, (((1000000/HZ) - 1)));
132 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].ctrl, 0); 132 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[1].ctrl, 0);
133# endif 133# endif
134 134
diff --git a/arch/sparc/prom/Makefile b/arch/sparc/prom/Makefile
index 1b8c073adb44..816c0fa12dc0 100644
--- a/arch/sparc/prom/Makefile
+++ b/arch/sparc/prom/Makefile
@@ -6,7 +6,6 @@ ccflags := -Werror
6 6
7lib-y := bootstr_$(BITS).o 7lib-y := bootstr_$(BITS).o
8lib-$(CONFIG_SPARC32) += devmap.o 8lib-$(CONFIG_SPARC32) += devmap.o
9lib-y += devops_$(BITS).o
10lib-y += init_$(BITS).o 9lib-y += init_$(BITS).o
11lib-$(CONFIG_SPARC32) += memory.o 10lib-$(CONFIG_SPARC32) += memory.o
12lib-y += misc_$(BITS).o 11lib-y += misc_$(BITS).o
diff --git a/arch/sparc/prom/console_32.c b/arch/sparc/prom/console_32.c
index 5340264b78f5..48863108a44c 100644
--- a/arch/sparc/prom/console_32.c
+++ b/arch/sparc/prom/console_32.c
@@ -16,63 +16,26 @@
16 16
17extern void restore_current(void); 17extern void restore_current(void);
18 18
19/* Non blocking get character from console input device, returns -1
20 * if no input was taken. This can be used for polling.
21 */
22int
23prom_nbgetchar(void)
24{
25 static char inc;
26 int i = -1;
27 unsigned long flags;
28
29 spin_lock_irqsave(&prom_lock, flags);
30 switch(prom_vers) {
31 case PROM_V0:
32 i = (*(romvec->pv_nbgetchar))();
33 break;
34 case PROM_V2:
35 case PROM_V3:
36 if( (*(romvec->pv_v2devops).v2_dev_read)(*romvec->pv_v2bootargs.fd_stdin , &inc, 0x1) == 1) {
37 i = inc;
38 } else {
39 i = -1;
40 }
41 break;
42 default:
43 i = -1;
44 break;
45 };
46 restore_current();
47 spin_unlock_irqrestore(&prom_lock, flags);
48 return i; /* Ugh, we could spin forever on unsupported proms ;( */
49}
50
51/* Non blocking put character to console device, returns -1 if 19/* Non blocking put character to console device, returns -1 if
52 * unsuccessful. 20 * unsuccessful.
53 */ 21 */
54int 22static int prom_nbputchar(const char *buf)
55prom_nbputchar(char c)
56{ 23{
57 static char outc;
58 unsigned long flags; 24 unsigned long flags;
59 int i = -1; 25 int i = -1;
60 26
61 spin_lock_irqsave(&prom_lock, flags); 27 spin_lock_irqsave(&prom_lock, flags);
62 switch(prom_vers) { 28 switch(prom_vers) {
63 case PROM_V0: 29 case PROM_V0:
64 i = (*(romvec->pv_nbputchar))(c); 30 i = (*(romvec->pv_nbputchar))(*buf);
65 break; 31 break;
66 case PROM_V2: 32 case PROM_V2:
67 case PROM_V3: 33 case PROM_V3:
68 outc = c; 34 if ((*(romvec->pv_v2devops).v2_dev_write)(*romvec->pv_v2bootargs.fd_stdout,
69 if( (*(romvec->pv_v2devops).v2_dev_write)(*romvec->pv_v2bootargs.fd_stdout, &outc, 0x1) == 1) 35 buf, 0x1) == 1)
70 i = 0; 36 i = 0;
71 else
72 i = -1;
73 break; 37 break;
74 default: 38 default:
75 i = -1;
76 break; 39 break;
77 }; 40 };
78 restore_current(); 41 restore_current();
@@ -80,18 +43,14 @@ prom_nbputchar(char c)
80 return i; /* Ugh, we could spin forever on unsupported proms ;( */ 43 return i; /* Ugh, we could spin forever on unsupported proms ;( */
81} 44}
82 45
83/* Blocking version of get character routine above. */ 46void prom_console_write_buf(const char *buf, int len)
84char
85prom_getchar(void)
86{ 47{
87 int character; 48 while (len) {
88 while((character = prom_nbgetchar()) == -1) ; 49 int n = prom_nbputchar(buf);
89 return (char) character; 50 if (n)
51 continue;
52 len--;
53 buf++;
54 }
90} 55}
91 56
92/* Blocking version of put character routine above. */
93void
94prom_putchar(char c)
95{
96 while(prom_nbputchar(c) == -1) ;
97}
diff --git a/arch/sparc/prom/console_64.c b/arch/sparc/prom/console_64.c
index 10322dc2f557..ed39e75828bd 100644
--- a/arch/sparc/prom/console_64.c
+++ b/arch/sparc/prom/console_64.c
@@ -15,85 +15,34 @@
15 15
16extern int prom_stdin, prom_stdout; 16extern int prom_stdin, prom_stdout;
17 17
18/* Non blocking get character from console input device, returns -1 18static int __prom_console_write_buf(const char *buf, int len)
19 * if no input was taken. This can be used for polling.
20 */
21inline int
22prom_nbgetchar(void)
23{
24 unsigned long args[7];
25 char inc;
26
27 args[0] = (unsigned long) "read";
28 args[1] = 3;
29 args[2] = 1;
30 args[3] = (unsigned int) prom_stdin;
31 args[4] = (unsigned long) &inc;
32 args[5] = 1;
33 args[6] = (unsigned long) -1;
34
35 p1275_cmd_direct(args);
36
37 if (args[6] == 1)
38 return inc;
39 return -1;
40}
41
42/* Non blocking put character to console device, returns -1 if
43 * unsuccessful.
44 */
45inline int
46prom_nbputchar(char c)
47{ 19{
48 unsigned long args[7]; 20 unsigned long args[7];
49 char outc; 21 int ret;
50
51 outc = c;
52 22
53 args[0] = (unsigned long) "write"; 23 args[0] = (unsigned long) "write";
54 args[1] = 3; 24 args[1] = 3;
55 args[2] = 1; 25 args[2] = 1;
56 args[3] = (unsigned int) prom_stdout; 26 args[3] = (unsigned int) prom_stdout;
57 args[4] = (unsigned long) &outc; 27 args[4] = (unsigned long) buf;
58 args[5] = 1; 28 args[5] = (unsigned int) len;
59 args[6] = (unsigned long) -1; 29 args[6] = (unsigned long) -1;
60 30
61 p1275_cmd_direct(args); 31 p1275_cmd_direct(args);
62 32
63 if (args[6] == 1) 33 ret = (int) args[6];
64 return 0; 34 if (ret < 0)
65 else
66 return -1; 35 return -1;
36 return ret;
67} 37}
68 38
69/* Blocking version of get character routine above. */ 39void prom_console_write_buf(const char *buf, int len)
70char
71prom_getchar(void)
72{
73 int character;
74 while((character = prom_nbgetchar()) == -1) ;
75 return (char) character;
76}
77
78/* Blocking version of put character routine above. */
79void
80prom_putchar(char c)
81{ 40{
82 prom_nbputchar(c); 41 while (len) {
83} 42 int n = __prom_console_write_buf(buf, len);
84 43 if (n < 0)
85void 44 continue;
86prom_puts(const char *s, int len) 45 len -= n;
87{ 46 buf += len;
88 unsigned long args[7]; 47 }
89
90 args[0] = (unsigned long) "write";
91 args[1] = 3;
92 args[2] = 1;
93 args[3] = (unsigned int) prom_stdout;
94 args[4] = (unsigned long) s;
95 args[5] = len;
96 args[6] = (unsigned long) -1;
97
98 p1275_cmd_direct(args);
99} 48}
diff --git a/arch/sparc/prom/devops_32.c b/arch/sparc/prom/devops_32.c
deleted file mode 100644
index 9c5d4687242a..000000000000
--- a/arch/sparc/prom/devops_32.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * devops.c: Device operations using the PROM.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 */
6#include <linux/types.h>
7#include <linux/kernel.h>
8#include <linux/sched.h>
9
10#include <asm/openprom.h>
11#include <asm/oplib.h>
12
13extern void restore_current(void);
14
15/* Open the device described by the string 'dstr'. Returns the handle
16 * to that device used for subsequent operations on that device.
17 * Returns -1 on failure.
18 */
19int
20prom_devopen(char *dstr)
21{
22 int handle;
23 unsigned long flags;
24 spin_lock_irqsave(&prom_lock, flags);
25 switch(prom_vers) {
26 case PROM_V0:
27 handle = (*(romvec->pv_v0devops.v0_devopen))(dstr);
28 if(handle == 0) handle = -1;
29 break;
30 case PROM_V2:
31 case PROM_V3:
32 handle = (*(romvec->pv_v2devops.v2_dev_open))(dstr);
33 break;
34 default:
35 handle = -1;
36 break;
37 };
38 restore_current();
39 spin_unlock_irqrestore(&prom_lock, flags);
40
41 return handle;
42}
43
44/* Close the device described by device handle 'dhandle'. */
45int
46prom_devclose(int dhandle)
47{
48 unsigned long flags;
49 spin_lock_irqsave(&prom_lock, flags);
50 switch(prom_vers) {
51 case PROM_V0:
52 (*(romvec->pv_v0devops.v0_devclose))(dhandle);
53 break;
54 case PROM_V2:
55 case PROM_V3:
56 (*(romvec->pv_v2devops.v2_dev_close))(dhandle);
57 break;
58 default:
59 break;
60 };
61 restore_current();
62 spin_unlock_irqrestore(&prom_lock, flags);
63 return 0;
64}
65
66/* Seek to specified location described by 'seekhi' and 'seeklo'
67 * for device 'dhandle'.
68 */
69void
70prom_seek(int dhandle, unsigned int seekhi, unsigned int seeklo)
71{
72 unsigned long flags;
73 spin_lock_irqsave(&prom_lock, flags);
74 switch(prom_vers) {
75 case PROM_V0:
76 (*(romvec->pv_v0devops.v0_seekdev))(dhandle, seekhi, seeklo);
77 break;
78 case PROM_V2:
79 case PROM_V3:
80 (*(romvec->pv_v2devops.v2_dev_seek))(dhandle, seekhi, seeklo);
81 break;
82 default:
83 break;
84 };
85 restore_current();
86 spin_unlock_irqrestore(&prom_lock, flags);
87}
diff --git a/arch/sparc/prom/devops_64.c b/arch/sparc/prom/devops_64.c
deleted file mode 100644
index a017119e7ef1..000000000000
--- a/arch/sparc/prom/devops_64.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * devops.c: Device operations using the PROM.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7#include <linux/types.h>
8#include <linux/kernel.h>
9#include <linux/sched.h>
10
11#include <asm/openprom.h>
12#include <asm/oplib.h>
13
14/* Open the device described by the string 'dstr'. Returns the handle
15 * to that device used for subsequent operations on that device.
16 * Returns 0 on failure.
17 */
18int
19prom_devopen(const char *dstr)
20{
21 unsigned long args[5];
22
23 args[0] = (unsigned long) "open";
24 args[1] = 1;
25 args[2] = 1;
26 args[3] = (unsigned long) dstr;
27 args[4] = (unsigned long) -1;
28
29 p1275_cmd_direct(args);
30
31 return (int) args[4];
32}
33
34/* Close the device described by device handle 'dhandle'. */
35int
36prom_devclose(int dhandle)
37{
38 unsigned long args[4];
39
40 args[0] = (unsigned long) "close";
41 args[1] = 1;
42 args[2] = 0;
43 args[3] = (unsigned int) dhandle;
44
45 p1275_cmd_direct(args);
46
47 return 0;
48}
49
50/* Seek to specified location described by 'seekhi' and 'seeklo'
51 * for device 'dhandle'.
52 */
53void
54prom_seek(int dhandle, unsigned int seekhi, unsigned int seeklo)
55{
56 unsigned long args[7];
57
58 args[0] = (unsigned long) "seek";
59 args[1] = 3;
60 args[2] = 1;
61 args[3] = (unsigned int) dhandle;
62 args[4] = seekhi;
63 args[5] = seeklo;
64 args[6] = (unsigned long) -1;
65
66 p1275_cmd_direct(args);
67}
diff --git a/arch/sparc/prom/misc_64.c b/arch/sparc/prom/misc_64.c
index d24bc44e361e..e4f31d4d3715 100644
--- a/arch/sparc/prom/misc_64.c
+++ b/arch/sparc/prom/misc_64.c
@@ -18,7 +18,7 @@
18#include <asm/system.h> 18#include <asm/system.h>
19#include <asm/ldc.h> 19#include <asm/ldc.h>
20 20
21int prom_service_exists(const char *service_name) 21static int prom_service_exists(const char *service_name)
22{ 22{
23 unsigned long args[5]; 23 unsigned long args[5];
24 24
@@ -150,20 +150,6 @@ void prom_halt_power_off(void)
150 prom_halt(); 150 prom_halt();
151} 151}
152 152
153/* Set prom sync handler to call function 'funcp'. */
154void prom_setcallback(callback_func_t funcp)
155{
156 unsigned long args[5];
157 if (!funcp)
158 return;
159 args[0] = (unsigned long) "set-callback";
160 args[1] = 1;
161 args[2] = 1;
162 args[3] = (unsigned long) funcp;
163 args[4] = (unsigned long) -1;
164 p1275_cmd_direct(args);
165}
166
167/* Get the idprom and stuff it into buffer 'idbuf'. Returns the 153/* Get the idprom and stuff it into buffer 'idbuf'. Returns the
168 * format type. 'num_bytes' is the number of bytes that your idbuf 154 * format type. 'num_bytes' is the number of bytes that your idbuf
169 * has space for. Returns 0xff on error. 155 * has space for. Returns 0xff on error.
diff --git a/arch/sparc/prom/printf.c b/arch/sparc/prom/printf.c
index ca869266b9f3..d9682f06b3b0 100644
--- a/arch/sparc/prom/printf.c
+++ b/arch/sparc/prom/printf.c
@@ -15,22 +15,45 @@
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <linux/spinlock.h>
18 19
19#include <asm/openprom.h> 20#include <asm/openprom.h>
20#include <asm/oplib.h> 21#include <asm/oplib.h>
21 22
23#define CONSOLE_WRITE_BUF_SIZE 1024
24
22static char ppbuf[1024]; 25static char ppbuf[1024];
26static char console_write_buf[CONSOLE_WRITE_BUF_SIZE];
27static DEFINE_RAW_SPINLOCK(console_write_lock);
23 28
24void notrace prom_write(const char *buf, unsigned int n) 29void notrace prom_write(const char *buf, unsigned int n)
25{ 30{
26 char ch; 31 unsigned int dest_len;
32 unsigned long flags;
33 char *dest;
34
35 dest = console_write_buf;
36 raw_spin_lock_irqsave(&console_write_lock, flags);
27 37
28 while (n != 0) { 38 dest_len = 0;
29 --n; 39 while (n-- != 0) {
30 if ((ch = *buf++) == '\n') 40 char ch = *buf++;
31 prom_putchar('\r'); 41 if (ch == '\n') {
32 prom_putchar(ch); 42 *dest++ = '\r';
43 dest_len++;
44 }
45 *dest++ = ch;
46 dest_len++;
47 if (dest_len >= CONSOLE_WRITE_BUF_SIZE - 1) {
48 prom_console_write_buf(console_write_buf, dest_len);
49 dest = console_write_buf;
50 dest_len = 0;
51 }
33 } 52 }
53 if (dest_len)
54 prom_console_write_buf(console_write_buf, dest_len);
55
56 raw_spin_unlock_irqrestore(&console_write_lock, flags);
34} 57}
35 58
36void notrace prom_printf(const char *fmt, ...) 59void notrace prom_printf(const char *fmt, ...)
diff --git a/arch/sparc/prom/tree_32.c b/arch/sparc/prom/tree_32.c
index 63e08e149774..535e2e69ac1d 100644
--- a/arch/sparc/prom/tree_32.c
+++ b/arch/sparc/prom/tree_32.c
@@ -342,19 +342,3 @@ phandle prom_inst2pkg(int inst)
342 if (node == -1) return 0; 342 if (node == -1) return 0;
343 return node; 343 return node;
344} 344}
345
346/* Return 'node' assigned to a particular prom 'path'
347 * FIXME: Should work for v0 as well
348 */
349phandle prom_pathtoinode(char *path)
350{
351 phandle node;
352 int inst;
353
354 inst = prom_devopen (path);
355 if (inst == -1) return 0;
356 node = prom_inst2pkg (inst);
357 prom_devclose (inst);
358 if (node == -1) return 0;
359 return node;
360}
diff --git a/arch/sparc/prom/tree_64.c b/arch/sparc/prom/tree_64.c
index 691be68932f8..d93660048376 100644
--- a/arch/sparc/prom/tree_64.c
+++ b/arch/sparc/prom/tree_64.c
@@ -374,24 +374,6 @@ inline phandle prom_inst2pkg(int inst)
374 return node; 374 return node;
375} 375}
376 376
377/* Return 'node' assigned to a particular prom 'path'
378 * FIXME: Should work for v0 as well
379 */
380phandle prom_pathtoinode(const char *path)
381{
382 phandle node;
383 int inst;
384
385 inst = prom_devopen (path);
386 if (inst == 0)
387 return 0;
388 node = prom_inst2pkg(inst);
389 prom_devclose(inst);
390 if (node == -1)
391 return 0;
392 return node;
393}
394
395int prom_ihandle2path(int handle, char *buffer, int bufsize) 377int prom_ihandle2path(int handle, char *buffer, int bufsize)
396{ 378{
397 unsigned long args[7]; 379 unsigned long args[7];
diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c
index cbcc8d8ea93a..7a6e68e4f748 100644
--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c
+++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c
@@ -10,6 +10,7 @@
10 * by the Free Software Foundation. 10 * by the Free Software Foundation.
11 */ 11 */
12 12
13#include <linux/err.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
diff --git a/arch/x86/include/asm/pvclock.h b/arch/x86/include/asm/pvclock.h
index 7f7e577a0e39..31d84acc1512 100644
--- a/arch/x86/include/asm/pvclock.h
+++ b/arch/x86/include/asm/pvclock.h
@@ -11,6 +11,7 @@ unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src);
11void pvclock_read_wallclock(struct pvclock_wall_clock *wall, 11void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
12 struct pvclock_vcpu_time_info *vcpu, 12 struct pvclock_vcpu_time_info *vcpu,
13 struct timespec *ts); 13 struct timespec *ts);
14void pvclock_resume(void);
14 15
15/* 16/*
16 * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction, 17 * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c
index 008b91eefa18..42eb3300dfc6 100644
--- a/arch/x86/kernel/pvclock.c
+++ b/arch/x86/kernel/pvclock.c
@@ -83,6 +83,11 @@ unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src)
83 83
84static atomic64_t last_value = ATOMIC64_INIT(0); 84static atomic64_t last_value = ATOMIC64_INIT(0);
85 85
86void pvclock_resume(void)
87{
88 atomic64_set(&last_value, 0);
89}
90
86cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) 91cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src)
87{ 92{
88 struct pvclock_shadow_time shadow; 93 struct pvclock_shadow_time shadow;
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
index d7b5109f7a9c..25cd4a07d09f 100644
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -70,6 +70,9 @@ static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
70struct xen_pci_frontend_ops *xen_pci_frontend; 70struct xen_pci_frontend_ops *xen_pci_frontend;
71EXPORT_SYMBOL_GPL(xen_pci_frontend); 71EXPORT_SYMBOL_GPL(xen_pci_frontend);
72 72
73#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
74 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
75
73static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, 76static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
74 struct msi_msg *msg) 77 struct msi_msg *msg)
75{ 78{
@@ -83,12 +86,7 @@ static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
83 MSI_ADDR_REDIRECTION_CPU | 86 MSI_ADDR_REDIRECTION_CPU |
84 MSI_ADDR_DEST_ID(pirq); 87 MSI_ADDR_DEST_ID(pirq);
85 88
86 msg->data = 89 msg->data = XEN_PIRQ_MSI_DATA;
87 MSI_DATA_TRIGGER_EDGE |
88 MSI_DATA_LEVEL_ASSERT |
89 /* delivery mode reserved */
90 (3 << 8) |
91 MSI_DATA_VECTOR(0);
92} 90}
93 91
94static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 92static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
@@ -98,8 +96,23 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
98 struct msi_msg msg; 96 struct msi_msg msg;
99 97
100 list_for_each_entry(msidesc, &dev->msi_list, list) { 98 list_for_each_entry(msidesc, &dev->msi_list, list) {
99 __read_msi_msg(msidesc, &msg);
100 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
101 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
102 if (xen_irq_from_pirq(pirq) >= 0 && msg.data == XEN_PIRQ_MSI_DATA) {
103 xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ?
104 "msi-x" : "msi", &irq, &pirq, XEN_ALLOC_IRQ);
105 if (irq < 0)
106 goto error;
107 ret = set_irq_msi(irq, msidesc);
108 if (ret < 0)
109 goto error_while;
110 printk(KERN_DEBUG "xen: msi already setup: msi --> irq=%d"
111 " pirq=%d\n", irq, pirq);
112 return 0;
113 }
101 xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? 114 xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ?
102 "msi-x" : "msi", &irq, &pirq); 115 "msi-x" : "msi", &irq, &pirq, (XEN_ALLOC_IRQ | XEN_ALLOC_PIRQ));
103 if (irq < 0 || pirq < 0) 116 if (irq < 0 || pirq < 0)
104 goto error; 117 goto error;
105 printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq); 118 printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq);
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 02c710bebf7a..44dcad43989d 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1021,10 +1021,6 @@ static void xen_reboot(int reason)
1021{ 1021{
1022 struct sched_shutdown r = { .reason = reason }; 1022 struct sched_shutdown r = { .reason = reason };
1023 1023
1024#ifdef CONFIG_SMP
1025 stop_other_cpus();
1026#endif
1027
1028 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) 1024 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1029 BUG(); 1025 BUG();
1030} 1026}
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index a1feff9e59b6..44924e551fde 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -2415,8 +2415,6 @@ void __init xen_init_mmu_ops(void)
2415 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; 2415 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2416 pv_mmu_ops = xen_mmu_ops; 2416 pv_mmu_ops = xen_mmu_ops;
2417 2417
2418 vmap_lazy_unmap = false;
2419
2420 memset(dummy_mapping, 0xff, PAGE_SIZE); 2418 memset(dummy_mapping, 0xff, PAGE_SIZE);
2421} 2419}
2422 2420
diff --git a/arch/x86/xen/platform-pci-unplug.c b/arch/x86/xen/platform-pci-unplug.c
index 0f456386cce5..25c52f94a27c 100644
--- a/arch/x86/xen/platform-pci-unplug.c
+++ b/arch/x86/xen/platform-pci-unplug.c
@@ -68,7 +68,7 @@ static int __init check_platform_magic(void)
68 return 0; 68 return 0;
69} 69}
70 70
71void __init xen_unplug_emulated_devices(void) 71void xen_unplug_emulated_devices(void)
72{ 72{
73 int r; 73 int r;
74 74
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 01afd8a94607..b5a7f928234b 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -181,24 +181,21 @@ char * __init xen_memory_setup(void)
181 for (i = 0; i < memmap.nr_entries; i++) { 181 for (i = 0; i < memmap.nr_entries; i++) {
182 unsigned long long end = map[i].addr + map[i].size; 182 unsigned long long end = map[i].addr + map[i].size;
183 183
184 if (map[i].type == E820_RAM) { 184 if (map[i].type == E820_RAM && end > mem_end) {
185 if (map[i].addr < mem_end && end > mem_end) { 185 /* RAM off the end - may be partially included */
186 /* Truncate region to max_mem. */ 186 u64 delta = min(map[i].size, end - mem_end);
187 u64 delta = end - mem_end;
188 187
189 map[i].size -= delta; 188 map[i].size -= delta;
190 extra_pages += PFN_DOWN(delta); 189 end -= delta;
191 190
192 end = mem_end; 191 extra_pages += PFN_DOWN(delta);
193 }
194 } 192 }
195 193
196 if (end > xen_extra_mem_start) 194 if (map[i].size > 0 && end > xen_extra_mem_start)
197 xen_extra_mem_start = end; 195 xen_extra_mem_start = end;
198 196
199 /* If region is non-RAM or below mem_end, add what remains */ 197 /* Add region if any remains */
200 if ((map[i].type != E820_RAM || map[i].addr < mem_end) && 198 if (map[i].size > 0)
201 map[i].size > 0)
202 e820_add_region(map[i].addr, map[i].size, map[i].type); 199 e820_add_region(map[i].addr, map[i].size, map[i].type);
203 } 200 }
204 201
@@ -252,20 +249,6 @@ char * __init xen_memory_setup(void)
252 return "Xen"; 249 return "Xen";
253} 250}
254 251
255static void xen_idle(void)
256{
257 local_irq_disable();
258
259 if (need_resched())
260 local_irq_enable();
261 else {
262 current_thread_info()->status &= ~TS_POLLING;
263 smp_mb__after_clear_bit();
264 safe_halt();
265 current_thread_info()->status |= TS_POLLING;
266 }
267}
268
269/* 252/*
270 * Set the bit indicating "nosegneg" library variants should be used. 253 * Set the bit indicating "nosegneg" library variants should be used.
271 * We only need to bother in pure 32-bit mode; compat 32-bit processes 254 * We only need to bother in pure 32-bit mode; compat 32-bit processes
@@ -362,7 +345,11 @@ void __init xen_arch_setup(void)
362 MAX_GUEST_CMDLINE > COMMAND_LINE_SIZE ? 345 MAX_GUEST_CMDLINE > COMMAND_LINE_SIZE ?
363 COMMAND_LINE_SIZE : MAX_GUEST_CMDLINE); 346 COMMAND_LINE_SIZE : MAX_GUEST_CMDLINE);
364 347
365 pm_idle = xen_idle; 348 /* Set up idle, making sure it calls safe_halt() pvop */
349#ifdef CONFIG_X86_32
350 boot_cpu_data.hlt_works_ok = 1;
351#endif
352 pm_idle = default_idle;
366 353
367 fiddle_vdso(); 354 fiddle_vdso();
368} 355}
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 1d789d56877c..9bbd63a129b5 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -31,6 +31,7 @@ void xen_hvm_post_suspend(int suspend_cancelled)
31 int cpu; 31 int cpu;
32 xen_hvm_init_shared_info(); 32 xen_hvm_init_shared_info();
33 xen_callback_vector(); 33 xen_callback_vector();
34 xen_unplug_emulated_devices();
34 if (xen_feature(XENFEAT_hvm_safe_pvclock)) { 35 if (xen_feature(XENFEAT_hvm_safe_pvclock)) {
35 for_each_online_cpu(cpu) { 36 for_each_online_cpu(cpu) {
36 xen_setup_runstate_info(cpu); 37 xen_setup_runstate_info(cpu);
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index b2bb5aa3b054..5da5e53fb94c 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -426,6 +426,8 @@ void xen_timer_resume(void)
426{ 426{
427 int cpu; 427 int cpu;
428 428
429 pvclock_resume();
430
429 if (xen_clockevent != &xen_vcpuop_clockevent) 431 if (xen_clockevent != &xen_vcpuop_clockevent)
430 return; 432 return;
431 433
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 64044747348e..9d41bf985757 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -43,7 +43,7 @@ void xen_vcpu_restore(void);
43 43
44void xen_callback_vector(void); 44void xen_callback_vector(void);
45void xen_hvm_init_shared_info(void); 45void xen_hvm_init_shared_info(void);
46void __init xen_unplug_emulated_devices(void); 46void xen_unplug_emulated_devices(void);
47 47
48void __init xen_build_dynamic_phys_to_machine(void); 48void __init xen_build_dynamic_phys_to_machine(void);
49 49