Merge branch 'pcmcia' of git://git.linaro.org/people/rmk/linux-arm

Pull #3 ARM updates from Russell King:
 "This adds gpio support to soc_common, allowing an amount of code to be
  deleted from each PCMCIA socket driver for the PXA/SA11x0 SoCs."

* 'pcmcia' of git://git.linaro.org/people/rmk/linux-arm:
  PCMCIA: sa1111: rename sa1111 socket drivers to have sa1111_ prefix.
  PCMCIA: make lubbock socket driver part of sa1111_cs
  PCMCIA: add Kconfig control for building sa11xx_base.c
  PCMCIA: sa1111: jornada720: no need to disable IRQs around sa1111_set_io
  PCMCIA: sa1111: pass along sa1111_pcmcia_configure_socket() failure code
  PCMCIA: soc_common: remove explicit wrprot initialization in socket drivers
  PCMCIA: soc_common: remove soc_pcmcia_*_irqs functions
  PCMCIA: sa11x0: h3600: convert to use new irq/gpio management
  PCMCIA: sa11x0: simpad: convert to use new irq/gpio management
  PCMCIA: sa11x0: shannon: convert to use new irq/gpio management
  PCMCIA: sa11x0: nanoengine: convert reset handling to use GPIO subsystem
  PCMCIA: sa11x0: nanoengine: convert to use new irq/gpio management
  PCMCIA: sa11x0: cerf: convert reset handling to use GPIO subsystem
  PCMCIA: sa11x0: cerf: convert to use new irq/gpio management
  PCMCIA: sa11x0: assabet: convert to use new irq/gpio management
  PCMCIA: sa1111: use new per-socket irq/gpio infrastructure
  PCMCIA: pxa: convert PXA socket drivers to use new irq/gpio management
  PCMCIA: soc_common: add GPIO support for card status signals
  PCMCIA: soc_common: move common initialization into soc_common

6 files changed, 23 insertions, 38 deletions

diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index f02fa1e6ba86..954641e6c8b1 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -174,7 +174,6 @@ enum balloon3_features {
 
 #define BALLOON3_AUX_NIRQ       PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
 #define BALLOON3_CODEC_IRQ      PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
-#define BALLOON3_S0_CD_IRQ      PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
 
 #define BALLOON3_NR_IRQS        (IRQ_BOARD_START + 16)
 
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h
index 28c2cf50c259..307391488c22 100644
--- a/arch/arm/mach-sa1100/include/mach/assabet.h
+++ b/arch/arm/mach-sa1100/include/mach/assabet.h
@@ -85,21 +85,18 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #define ASSABET_BSR_RAD_RI      (1 << 31)
 
 
-/* GPIOs for which the generic definition doesn't say much */
+/* GPIOs (bitmasks) for which the generic definition doesn't say much */
 #define ASSABET_GPIO_RADIO_IRQ          GPIO_GPIO (14)  /* Radio interrupt request  */
 #define ASSABET_GPIO_PS_MODE_SYNC       GPIO_GPIO (16)  /* Power supply mode/sync   */
 #define ASSABET_GPIO_STEREO_64FS_CLK    GPIO_GPIO (19)  /* SSP UDA1341 clock input  */
-#define ASSABET_GPIO_CF_IRQ             GPIO_GPIO (21)  /* CF IRQ   */
-#define ASSABET_GPIO_CF_CD              GPIO_GPIO (22)  /* CF CD */
-#define ASSABET_GPIO_CF_BVD2            GPIO_GPIO (24)  /* CF BVD */
 #define ASSABET_GPIO_GFX_IRQ            GPIO_GPIO (24)  /* Graphics IRQ */
-#define ASSABET_GPIO_CF_BVD1            GPIO_GPIO (25)  /* CF BVD */
 #define ASSABET_GPIO_BATT_LOW           GPIO_GPIO (26)  /* Low battery */
 #define ASSABET_GPIO_RCLK               GPIO_GPIO (26)  /* CCLK/2  */
 
-#define ASSABET_IRQ_GPIO_CF_IRQ         IRQ_GPIO21
-#define ASSABET_IRQ_GPIO_CF_CD          IRQ_GPIO22
-#define ASSABET_IRQ_GPIO_CF_BVD2        IRQ_GPIO24
-#define ASSABET_IRQ_GPIO_CF_BVD1        IRQ_GPIO25
+/* These are gpiolib GPIO numbers, not bitmasks */
+#define ASSABET_GPIO_CF_IRQ             21      /* CF IRQ */
+#define ASSABET_GPIO_CF_CD              22      /* CF CD  */
+#define ASSABET_GPIO_CF_BVD2            24      /* CF BVD / IOSPKR */
+#define ASSABET_GPIO_CF_BVD1            25      /* CF BVD / IOSTSCHG */
 
 #endif
diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h
index c3ac3d0f9465..88fd9c006ce0 100644
--- a/arch/arm/mach-sa1100/include/mach/cerf.h
+++ b/arch/arm/mach-sa1100/include/mach/cerf.h
@@ -14,15 +14,10 @@
 #define CERF_ETH_IO                     0xf0000000
 #define CERF_ETH_IRQ IRQ_GPIO26
 
-#define CERF_GPIO_CF_BVD2               GPIO_GPIO (19)
-#define CERF_GPIO_CF_BVD1               GPIO_GPIO (20)
-#define CERF_GPIO_CF_RESET              GPIO_GPIO (21)
-#define CERF_GPIO_CF_IRQ                GPIO_GPIO (22)
-#define CERF_GPIO_CF_CD                 GPIO_GPIO (23)
-
-#define CERF_IRQ_GPIO_CF_BVD2           IRQ_GPIO19
-#define CERF_IRQ_GPIO_CF_BVD1           IRQ_GPIO20
-#define CERF_IRQ_GPIO_CF_IRQ            IRQ_GPIO22
-#define CERF_IRQ_GPIO_CF_CD             IRQ_GPIO23
+#define CERF_GPIO_CF_BVD2               19
+#define CERF_GPIO_CF_BVD1               20
+#define CERF_GPIO_CF_RESET              21
+#define CERF_GPIO_CF_IRQ                22
+#define CERF_GPIO_CF_CD                 23
 
 #endif // _INCLUDE_CERF_H_
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
index 14f8382d0665..5ebd469a31f2 100644
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h
@@ -16,12 +16,12 @@
 
 #include <mach/irqs.h>
 
-#define GPIO_PC_READY0  GPIO_GPIO(11) /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1  GPIO_GPIO(12) /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0     GPIO_GPIO(13) /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1     GPIO_GPIO(14) /* detect for socket 1 (active low) */
-#define GPIO_PC_RESET0  GPIO_GPIO(15) /* reset socket 0 */
-#define GPIO_PC_RESET1  GPIO_GPIO(16) /* reset socket 1 */
+#define GPIO_PC_READY0  11 /* ready for socket 0 (active high)*/
+#define GPIO_PC_READY1  12 /* ready for socket 1 (active high) */
+#define GPIO_PC_CD0     13 /* detect for socket 0 (active low) */
+#define GPIO_PC_CD1     14 /* detect for socket 1 (active low) */
+#define GPIO_PC_RESET0  15 /* reset socket 0 */
+#define GPIO_PC_RESET1  16 /* reset socket 1 */
 
 #define NANOENGINE_IRQ_GPIO_PCI         IRQ_GPIO0
 #define NANOENGINE_IRQ_GPIO_PC_READY0   IRQ_GPIO11
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h
index ec27d6e12140..019f857a7938 100644
--- a/arch/arm/mach-sa1100/include/mach/shannon.h
+++ b/arch/arm/mach-sa1100/include/mach/shannon.h
@@ -23,14 +23,10 @@
 #define SHANNON_GPIO_SENSE_12V          GPIO_GPIO (21)  /* Input, 12v flash unprotect detected */
 #define SHANNON_GPIO_DISP_EN            GPIO_GPIO (22)  /* out */
 /* XXX GPIO 23 unaccounted for */
-#define SHANNON_GPIO_EJECT_0            GPIO_GPIO (24)  /* in */
-#define SHANNON_IRQ_GPIO_EJECT_0        IRQ_GPIO24
-#define SHANNON_GPIO_EJECT_1            GPIO_GPIO (25)  /* in */
-#define SHANNON_IRQ_GPIO_EJECT_1        IRQ_GPIO25
-#define SHANNON_GPIO_RDY_0              GPIO_GPIO (26)  /* in */
-#define SHANNON_IRQ_GPIO_RDY_0          IRQ_GPIO26
-#define SHANNON_GPIO_RDY_1              GPIO_GPIO (27)  /* in */
-#define SHANNON_IRQ_GPIO_RDY_1          IRQ_GPIO27
+#define SHANNON_GPIO_EJECT_0            24              /* in */
+#define SHANNON_GPIO_EJECT_1            25              /* in */
+#define SHANNON_GPIO_RDY_0              26              /* in */
+#define SHANNON_GPIO_RDY_1              27              /* in */
 
 /* MCP UCB codec GPIO pins... */
 
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
index db28118103eb..cdea671e8931 100644
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ b/arch/arm/mach-sa1100/include/mach/simpad.h
@@ -39,10 +39,8 @@
 
 
 /*---  PCMCIA  ---*/
-#define GPIO_CF_CD              GPIO_GPIO24
-#define GPIO_CF_IRQ             GPIO_GPIO1
-#define IRQ_GPIO_CF_IRQ         IRQ_GPIO1
-#define IRQ_GPIO_CF_CD          IRQ_GPIO24
+#define GPIO_CF_CD              24
+#define GPIO_CF_IRQ             1
 
 /*--- SmartCard ---*/
 #define GPIO_SMART_CARD         GPIO_GPIO10