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authorJohn David Anglin <dave.anglin@bell.net>2012-05-16 05:14:52 -0400
committerJames Bottomley <JBottomley@Parallels.com>2012-05-16 08:15:06 -0400
commit207f583d7179f707f402c36a7bda5ca1fd03ad5b (patch)
treec598fc21706f110c7a1578ef3bf17b9fd01005df /arch
parent5e185581d7c46ddd33cd9c01106d1fc86efb9376 (diff)
[PARISC] fix crash in flush_icache_page_asm on PA1.1
As pointed out by serveral people, PA1.1 only has a type 26 instruction meaning that the space register must be explicitly encoded. Not giving an explicit space means that the compiler uses the type 24 version which is PA2.0 only resulting in an illegal instruction crash. This regression was caused by commit f311847c2fcebd81912e2f0caf8a461dec28db41 Author: James Bottomley <James.Bottomley@HansenPartnership.com> Date: Wed Dec 22 10:22:11 2010 -0600 parisc: flush pages through tmpalias space Reported-by: Helge Deller <deller@gmx.de> Signed-off-by: John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org #2.6.39+ Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/parisc/kernel/pacache.S38
1 files changed, 20 insertions, 18 deletions
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 93ff3d90edd1..5d7218ad885c 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)
692 692
693 /* Purge any old translation */ 693 /* Purge any old translation */
694 694
695 pitlb (%sr0,%r28) 695 pitlb (%sr4,%r28)
696 696
697 ldil L%icache_stride, %r1 697 ldil L%icache_stride, %r1
698 ldw R%icache_stride(%r1), %r1 698 ldw R%icache_stride(%r1), %r1
@@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)
706 sub %r25, %r1, %r25 706 sub %r25, %r1, %r25
707 707
708 708
7091: fic,m %r1(%r28) 709 /* fic only has the type 26 form on PA1.1, requiring an
710 fic,m %r1(%r28) 710 * explicit space specification, so use %sr4 */
711 fic,m %r1(%r28) 7111: fic,m %r1(%sr4,%r28)
712 fic,m %r1(%r28) 712 fic,m %r1(%sr4,%r28)
713 fic,m %r1(%r28) 713 fic,m %r1(%sr4,%r28)
714 fic,m %r1(%r28) 714 fic,m %r1(%sr4,%r28)
715 fic,m %r1(%r28) 715 fic,m %r1(%sr4,%r28)
716 fic,m %r1(%r28) 716 fic,m %r1(%sr4,%r28)
717 fic,m %r1(%r28) 717 fic,m %r1(%sr4,%r28)
718 fic,m %r1(%r28) 718 fic,m %r1(%sr4,%r28)
719 fic,m %r1(%r28) 719 fic,m %r1(%sr4,%r28)
720 fic,m %r1(%r28) 720 fic,m %r1(%sr4,%r28)
721 fic,m %r1(%r28) 721 fic,m %r1(%sr4,%r28)
722 fic,m %r1(%r28) 722 fic,m %r1(%sr4,%r28)
723 fic,m %r1(%r28) 723 fic,m %r1(%sr4,%r28)
724 fic,m %r1(%sr4,%r28)
725 fic,m %r1(%sr4,%r28)
724 cmpb,COND(<<) %r28, %r25,1b 726 cmpb,COND(<<) %r28, %r25,1b
725 fic,m %r1(%r28) 727 fic,m %r1(%sr4,%r28)
726 728
727 sync 729 sync
728 bv %r0(%r2) 730 bv %r0(%r2)
729 pitlb (%sr0,%r25) 731 pitlb (%sr4,%r25)
730 .exit 732 .exit
731 733
732 .procend 734 .procend