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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-12-15 19:24:25 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-12-15 19:24:25 -0500
commit1e7342e7789fa2ca9202701467428726cbcfd649 (patch)
treee0ad000924e9875bd2ea17bd0e04382491765a09 /arch
parent78c5c68a4cf4329d17abfa469345ddf323d4fd62 (diff)
parent228d55053397e6d5325ca179c7ffe331de2846d3 (diff)
Merge remote-tracking branch 'jwb/next' into next
Conflicts: arch/powerpc/platforms/40x/ppc40x_simple.c
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/Makefile5
-rw-r--r--arch/powerpc/boot/dcr.h6
-rw-r--r--arch/powerpc/boot/div64.S52
-rw-r--r--arch/powerpc/boot/dts/currituck.dts237
-rw-r--r--arch/powerpc/boot/dts/klondike.dts227
-rw-r--r--arch/powerpc/boot/treeboot-currituck.c119
-rwxr-xr-xarch/powerpc/boot/wrapper3
-rw-r--r--arch/powerpc/configs/40x/klondike_defconfig55
-rw-r--r--arch/powerpc/configs/44x/currituck_defconfig110
-rw-r--r--arch/powerpc/include/asm/reg.h1
-rw-r--r--arch/powerpc/kernel/cputable.c27
-rw-r--r--arch/powerpc/kernel/head_44x.S2
-rw-r--r--arch/powerpc/mm/44x_mmu.c4
-rw-r--r--arch/powerpc/platforms/40x/Kconfig11
-rw-r--r--arch/powerpc/platforms/40x/ppc40x_simple.c1
-rw-r--r--arch/powerpc/platforms/44x/Kconfig14
-rw-r--r--arch/powerpc/platforms/44x/Makefile1
-rw-r--r--arch/powerpc/platforms/44x/currituck.c204
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c85
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.h7
20 files changed, 1158 insertions, 13 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 80c133c88565..15986e70799c 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -45,6 +45,7 @@ $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
45$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405 45$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
46$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 46$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
47$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405 47$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
48$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
48$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 49$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
49 50
50 51
@@ -79,7 +80,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
79 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ 80 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
80 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ 81 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
81 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \ 82 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
82 gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c 83 gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \
84 treeboot-currituck.c
83src-boot := $(src-wlib) $(src-plat) empty.c 85src-boot := $(src-wlib) $(src-plat) empty.c
84 86
85src-boot := $(addprefix $(obj)/, $(src-boot)) 87src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -213,6 +215,7 @@ image-$(CONFIG_WARP) += cuImage.warp
213image-$(CONFIG_YOSEMITE) += cuImage.yosemite 215image-$(CONFIG_YOSEMITE) += cuImage.yosemite
214image-$(CONFIG_ISS4xx) += treeImage.iss4xx \ 216image-$(CONFIG_ISS4xx) += treeImage.iss4xx \
215 treeImage.iss4xx-mpic 217 treeImage.iss4xx-mpic
218image-$(CONFIG_CURRITUCK) += treeImage.currituck
216 219
217# Board ports in arch/powerpc/platform/8xx/Kconfig 220# Board ports in arch/powerpc/platform/8xx/Kconfig
218image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads 221image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 645a7c964e5f..cc73f7a95e26 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -9,6 +9,12 @@
9 }) 9 })
10#define mtdcr(rn, val) \ 10#define mtdcr(rn, val) \
11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val)) 11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
12#define mfdcrx(rn) \
13 ({ \
14 unsigned long rval; \
15 asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
16 rval; \
17 })
12 18
13/* 440GP/440GX SDRAM controller DCRs */ 19/* 440GP/440GX SDRAM controller DCRs */
14#define DCRN_SDRAM0_CFGADDR 0x010 20#define DCRN_SDRAM0_CFGADDR 0x010
diff --git a/arch/powerpc/boot/div64.S b/arch/powerpc/boot/div64.S
index d271ab542673..bbcb8a4cc121 100644
--- a/arch/powerpc/boot/div64.S
+++ b/arch/powerpc/boot/div64.S
@@ -57,3 +57,55 @@ __div64_32:
57 stw r8,4(r3) 57 stw r8,4(r3)
58 mr r3,r6 # return the remainder in r3 58 mr r3,r6 # return the remainder in r3
59 blr 59 blr
60
61/*
62 * Extended precision shifts.
63 *
64 * Updated to be valid for shift counts from 0 to 63 inclusive.
65 * -- Gabriel
66 *
67 * R3/R4 has 64 bit value
68 * R5 has shift count
69 * result in R3/R4
70 *
71 * ashrdi3: arithmetic right shift (sign propagation)
72 * lshrdi3: logical right shift
73 * ashldi3: left shift
74 */
75 .globl __ashrdi3
76__ashrdi3:
77 subfic r6,r5,32
78 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
79 addi r7,r5,32 # could be xori, or addi with -32
80 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
81 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
82 sraw r7,r3,r7 # t2 = MSW >> (count-32)
83 or r4,r4,r6 # LSW |= t1
84 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
85 sraw r3,r3,r5 # MSW = MSW >> count
86 or r4,r4,r7 # LSW |= t2
87 blr
88
89 .globl __ashldi3
90__ashldi3:
91 subfic r6,r5,32
92 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
93 addi r7,r5,32 # could be xori, or addi with -32
94 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
95 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
96 or r3,r3,r6 # MSW |= t1
97 slw r4,r4,r5 # LSW = LSW << count
98 or r3,r3,r7 # MSW |= t2
99 blr
100
101 .globl __lshrdi3
102__lshrdi3:
103 subfic r6,r5,32
104 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
105 addi r7,r5,32 # could be xori, or addi with -32
106 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
107 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
108 or r4,r4,r6 # LSW |= t1
109 srw r3,r3,r5 # MSW = MSW >> count
110 or r4,r4,r7 # LSW |= t2
111 blr
diff --git a/arch/powerpc/boot/dts/currituck.dts b/arch/powerpc/boot/dts/currituck.dts
new file mode 100644
index 000000000000..b801dd06e573
--- /dev/null
+++ b/arch/powerpc/boot/dts/currituck.dts
@@ -0,0 +1,237 @@
1/*
2 * Device Tree Source for IBM Embedded PPC 476 Platform
3 *
4 * Copyright © 2011 Tony Breeds IBM Corporation
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/memreserve/ 0x01f00000 0x00100000; // spin table
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <2>;
18 model = "ibm,currituck";
19 compatible = "ibm,currituck";
20 dcr-parent = <&{/cpus/cpu@0}>;
21
22 aliases {
23 serial0 = &UART0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 model = "PowerPC,476";
33 reg = <0>;
34 clock-frequency = <1600000000>; // 1.6 GHz
35 timebase-frequency = <100000000>; // 100Mhz
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <32768>;
39 d-cache-size = <32768>;
40 dcr-controller;
41 dcr-access-method = "native";
42 status = "ok";
43 };
44 cpu@1 {
45 device_type = "cpu";
46 model = "PowerPC,476";
47 reg = <1>;
48 clock-frequency = <1600000000>; // 1.6 GHz
49 timebase-frequency = <100000000>; // 100Mhz
50 i-cache-line-size = <32>;
51 d-cache-line-size = <32>;
52 i-cache-size = <32768>;
53 d-cache-size = <32768>;
54 dcr-controller;
55 dcr-access-method = "native";
56 status = "disabled";
57 enable-method = "spin-table";
58 cpu-release-addr = <0x0 0x01f00000>;
59 };
60 };
61
62 memory {
63 device_type = "memory";
64 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
65 };
66
67 MPIC: interrupt-controller {
68 compatible = "chrp,open-pic";
69 interrupt-controller;
70 dcr-reg = <0xffc00000 0x00040000>;
71 #address-cells = <0>;
72 #size-cells = <0>;
73 #interrupt-cells = <2>;
74
75 };
76
77 plb {
78 compatible = "ibm,plb6";
79 #address-cells = <2>;
80 #size-cells = <2>;
81 ranges;
82 clock-frequency = <200000000>; // 200Mhz
83
84 POB0: opb {
85 compatible = "ibm,opb-4xx", "ibm,opb";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 /* Wish there was a nicer way of specifying a full
89 * 32-bit range
90 */
91 ranges = <0x00000000 0x00000200 0x00000000 0x80000000
92 0x80000000 0x00000200 0x80000000 0x80000000>;
93 clock-frequency = <100000000>;
94
95 UART0: serial@10000000 {
96 device_type = "serial";
97 compatible = "ns16750", "ns16550";
98 reg = <0x10000000 0x00000008>;
99 virtual-reg = <0xe1000000>;
100 clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
101 current-speed = <115200>;
102 interrupt-parent = <&MPIC>;
103 interrupts = <34 2>;
104 };
105
106 IIC0: i2c@00000000 {
107 compatible = "ibm,iic-currituck", "ibm,iic";
108 reg = <0x0 0x00000014>;
109 interrupt-parent = <&MPIC>;
110 interrupts = <79 2>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 rtc@68 {
114 compatible = "stm,m41t80", "m41st85";
115 reg = <0x68>;
116 };
117 };
118 };
119
120 PCIE0: pciex@10100000000 { // 4xGBIF1
121 device_type = "pci";
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
126 primary;
127 port = <0x0>; /* port number */
128 reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */
129 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
130 dcr-reg = <0x80 0x20>;
131
132// pci_space < pci_addr > < cpu_addr > < size >
133 ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
134 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>;
135
136 /* Inbound starting at 0 to memsize filled in by zImage */
137 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
138
139 /* This drives busses 0 to 0xf */
140 bus-range = <0x0 0xf>;
141
142 /* Legacy interrupts (note the weird polarity, the bridge seems
143 * to invert PCIe legacy interrupts).
144 * We are de-swizzling here because the numbers are actually for
145 * port of the root complex virtual P2P bridge. But I want
146 * to avoid putting a node for it in the tree, so the numbers
147 * below are basically de-swizzled numbers.
148 * The real slot is on idsel 0, so the swizzling is 1:1
149 */
150 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
151 interrupt-map = <
152 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */
153 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */
154 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */
155 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>;
156 };
157
158 PCIE1: pciex@30100000000 { // 4xGBIF0
159 device_type = "pci";
160 #interrupt-cells = <1>;
161 #size-cells = <2>;
162 #address-cells = <3>;
163 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
164 primary;
165 port = <0x1>; /* port number */
166 reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */
167 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
168 dcr-reg = <0x60 0x20>;
169
170 ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000
171 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>;
172
173 /* Inbound starting at 0 to memsize filled in by zImage */
174 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
175
176 /* This drives busses 0 to 0xf */
177 bus-range = <0x0 0xf>;
178
179 /* Legacy interrupts (note the weird polarity, the bridge seems
180 * to invert PCIe legacy interrupts).
181 * We are de-swizzling here because the numbers are actually for
182 * port of the root complex virtual P2P bridge. But I want
183 * to avoid putting a node for it in the tree, so the numbers
184 * below are basically de-swizzled numbers.
185 * The real slot is on idsel 0, so the swizzling is 1:1
186 */
187 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
188 interrupt-map = <
189 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */
190 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */
191 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */
192 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>;
193 };
194
195 PCIE2: pciex@38100000000 { // 2xGBIF0
196 device_type = "pci";
197 #interrupt-cells = <1>;
198 #size-cells = <2>;
199 #address-cells = <3>;
200 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
201 primary;
202 port = <0x2>; /* port number */
203 reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */
204 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
205 dcr-reg = <0xA0 0x20>;
206
207 ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000
208 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>;
209
210 /* Inbound starting at 0 to memsize filled in by zImage */
211 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
212
213 /* This drives busses 0 to 0xf */
214 bus-range = <0x0 0xf>;
215
216 /* Legacy interrupts (note the weird polarity, the bridge seems
217 * to invert PCIe legacy interrupts).
218 * We are de-swizzling here because the numbers are actually for
219 * port of the root complex virtual P2P bridge. But I want
220 * to avoid putting a node for it in the tree, so the numbers
221 * below are basically de-swizzled numbers.
222 * The real slot is on idsel 0, so the swizzling is 1:1
223 */
224 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
225 interrupt-map = <
226 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */
227 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */
228 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */
229 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>;
230 };
231
232 };
233
234 chosen {
235 linux,stdout-path = &UART0;
236 };
237};
diff --git a/arch/powerpc/boot/dts/klondike.dts b/arch/powerpc/boot/dts/klondike.dts
new file mode 100644
index 000000000000..8c9429033618
--- /dev/null
+++ b/arch/powerpc/boot/dts/klondike.dts
@@ -0,0 +1,227 @@
1/*
2 * Device Tree for Klondike (APM8018X) board.
3 *
4 * Copyright (c) 2010, Applied Micro Circuits Corporation
5 * Author: Tanmay Inamdar <tinamdar@apm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 *
22 */
23
24/dts-v1/;
25
26/ {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 model = "apm,klondike";
30 compatible = "apm,klondike";
31 dcr-parent = <&{/cpus/cpu@0}>;
32
33 aliases {
34 ethernet0 = &EMAC0;
35 ethernet1 = &EMAC1;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 cpu@0 {
43 device_type = "cpu";
44 model = "PowerPC,apm8018x";
45 reg = <0x00000000>;
46 clock-frequency = <300000000>; /* Filled in by U-Boot */
47 timebase-frequency = <300000000>; /* Filled in by U-Boot */
48 i-cache-line-size = <32>;
49 d-cache-line-size = <32>;
50 i-cache-size = <16384>; /* 16 kB */
51 d-cache-size = <16384>; /* 16 kB */
52 dcr-controller;
53 dcr-access-method = "native";
54 };
55 };
56
57 memory {
58 device_type = "memory";
59 reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
60 };
61
62 UIC0: interrupt-controller {
63 compatible = "ibm,uic";
64 interrupt-controller;
65 cell-index = <0>;
66 dcr-reg = <0x0c0 0x010>;
67 #address-cells = <0>;
68 #size-cells = <0>;
69 #interrupt-cells = <2>;
70 };
71
72 UIC1: interrupt-controller1 {
73 compatible = "ibm,uic";
74 interrupt-controller;
75 cell-index = <1>;
76 dcr-reg = <0x0d0 0x010>;
77 #address-cells = <0>;
78 #size-cells = <0>;
79 #interrupt-cells = <2>;
80 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
81 interrupt-parent = <&UIC0>;
82 };
83
84 UIC2: interrupt-controller2 {
85 compatible = "ibm,uic";
86 interrupt-controller;
87 cell-index = <2>;
88 dcr-reg = <0x0e0 0x010>;
89 #address-cells = <0>;
90 #size-cells = <0>;
91 #interrupt-cells = <2>;
92 interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
93 interrupt-parent = <&UIC0>;
94 };
95
96 UIC3: interrupt-controller3 {
97 compatible = "ibm,uic";
98 interrupt-controller;
99 cell-index = <3>;
100 dcr-reg = <0x0f0 0x010>;
101 #address-cells = <0>;
102 #size-cells = <0>;
103 #interrupt-cells = <2>;
104 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
105 interrupt-parent = <&UIC0>;
106 };
107
108 plb {
109 compatible = "ibm,plb4";
110 #address-cells = <1>;
111 #size-cells = <1>;
112 ranges;
113 clock-frequency = <0>; /* Filled in by U-Boot */
114
115 SDRAM0: memory-controller {
116 compatible = "ibm,sdram-apm8018x";
117 dcr-reg = <0x010 0x002>;
118 };
119
120 MAL0: mcmal {
121 compatible = "ibm,mcmal2";
122 dcr-reg = <0x180 0x062>;
123 num-tx-chans = <2>;
124 num-rx-chans = <16>;
125 #address-cells = <0>;
126 #size-cells = <0>;
127 interrupt-parent = <&UIC1>;
128 interrupts = </*TXEOB*/ 0x6 0x4
129 /*RXEOB*/ 0x7 0x4
130 /*SERR*/ 0x1 0x4
131 /*TXDE*/ 0x2 0x4
132 /*RXDE*/ 0x3 0x4>;
133 };
134
135 POB0: opb {
136 compatible = "ibm,opb";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 ranges = <0x20000000 0x20000000 0x30000000
140 0x50000000 0x50000000 0x10000000
141 0x60000000 0x60000000 0x10000000
142 0xFE000000 0xFE000000 0x00010000>;
143 dcr-reg = <0x100 0x020>;
144 clock-frequency = <300000000>; /* Filled in by U-Boot */
145
146 RGMII0: emac-rgmii@400a2000 {
147 compatible = "ibm,rgmii";
148 reg = <0x400a2000 0x00000010>;
149 has-mdio;
150 };
151
152 TAH0: emac-tah@400a3000 {
153 compatible = "ibm,tah";
154 reg = <0x400a3000 0x100>;
155 };
156
157 TAH1: emac-tah@400a4000 {
158 compatible = "ibm,tah";
159 reg = <0x400a4000 0x100>;
160 };
161
162 EMAC0: ethernet@400a0000 {
163 compatible = "ibm,emac4", "ibm-emac4sync";
164 interrupt-parent = <&EMAC0>;
165 interrupts = <0x0>;
166 #interrupt-cells = <1>;
167 #address-cells = <0>;
168 #size-cells = <0>;
169 interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
170 reg = <0x400a0000 0x00000100>;
171 local-mac-address = [000000000000]; /* Filled in by U-Boot */
172 mal-device = <&MAL0>;
173 mal-tx-channel = <0x0>;
174 mal-rx-channel = <0x0>;
175 cell-index = <0>;
176 max-frame-size = <9000>;
177 rx-fifo-size = <4096>;
178 tx-fifo-size = <2048>;
179 phy-mode = "rgmii";
180 phy-address = <0x2>;
181 turbo = "no";
182 phy-map = <0x00000000>;
183 rgmii-device = <&RGMII0>;
184 rgmii-channel = <0>;
185 tah-device = <&TAH0>;
186 tah-channel = <0>;
187 has-inverted-stacr-oc;
188 has-new-stacr-staopc;
189 };
190
191 EMAC1: ethernet@400a1000 {
192 compatible = "ibm,emac4", "ibm-emac4sync";
193 status = "disabled";
194 interrupt-parent = <&EMAC1>;
195 interrupts = <0x0>;
196 #interrupt-cells = <1>;
197 #address-cells = <0>;
198 #size-cells = <0>;
199 interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
200 reg = <0x400a1000 0x00000100>;
201 local-mac-address = [000000000000]; /* Filled in by U-Boot */
202 mal-device = <&MAL0>;
203 mal-tx-channel = <1>;
204 mal-rx-channel = <8>;
205 cell-index = <1>;
206 max-frame-size = <9000>;
207 rx-fifo-size = <4096>;
208 tx-fifo-size = <2048>;
209 phy-mode = "rgmii";
210 phy-address = <0x3>;
211 turbo = "no";
212 phy-map = <0x00000000>;
213 rgmii-device = <&RGMII0>;
214 rgmii-channel = <1>;
215 tah-device = <&TAH1>;
216 tah-channel = <0>;
217 has-inverted-stacr-oc;
218 has-new-stacr-staopc;
219 mdio-device = <&EMAC0>;
220 };
221 };
222 };
223
224 chosen {
225 linux,stdout-path = "/plb/opb/serial@50001000";
226 };
227};
diff --git a/arch/powerpc/boot/treeboot-currituck.c b/arch/powerpc/boot/treeboot-currituck.c
new file mode 100644
index 000000000000..925ae43b7467
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-currituck.c
@@ -0,0 +1,119 @@
1/*
2 * Copyright © 2011 Tony Breeds IBM Corporation
3 *
4 * Based on earlier code:
5 * Copyright (C) Paul Mackerras 1997.
6 *
7 * Matt Porter <mporter@kernel.crashing.org>
8 * Copyright 2002-2005 MontaVista Software Inc.
9 *
10 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
11 * Copyright (c) 2003, 2004 Zultys Technologies
12 *
13 * Copyright 2007 David Gibson, IBM Corporation.
14 * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
15 * Copyright © 2011 David Kleikamp IBM Corporation
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 */
22#include <stdarg.h>
23#include <stddef.h>
24#include "types.h"
25#include "elf.h"
26#include "string.h"
27#include "stdio.h"
28#include "page.h"
29#include "ops.h"
30#include "reg.h"
31#include "io.h"
32#include "dcr.h"
33#include "4xx.h"
34#include "44x.h"
35#include "libfdt.h"
36
37BSS_STACK(4096);
38
39#define MAX_RANKS 0x4
40#define DDR3_MR0CF 0x80010011U
41
42static unsigned long long ibm_currituck_memsize;
43static unsigned long long ibm_currituck_detect_memsize(void)
44{
45 u32 reg;
46 unsigned i;
47 unsigned long long memsize = 0;
48
49 for(i = 0; i < MAX_RANKS; i++){
50 reg = mfdcrx(DDR3_MR0CF + i);
51
52 if (!(reg & 1))
53 continue;
54
55 reg &= 0x0000f000;
56 reg >>= 12;
57 memsize += (0x800000ULL << reg);
58 }
59
60 return memsize;
61}
62
63static void ibm_currituck_fixups(void)
64{
65 void *devp = finddevice("/");
66 u32 dma_ranges[7];
67
68 dt_fixup_memory(0x0ULL, ibm_currituck_memsize);
69
70 while ((devp = find_node_by_devtype(devp, "pci"))) {
71 if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) {
72 printf("%s: Failed to get dma-ranges\r\n", __func__);
73 continue;
74 }
75
76 dma_ranges[5] = ibm_currituck_memsize >> 32;
77 dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL;
78
79 setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
80 }
81}
82
83#define SPRN_PIR 0x11E /* Processor Indentification Register */
84void platform_init(void)
85{
86 unsigned long end_of_ram, avail_ram;
87 u32 pir_reg;
88 int node, size;
89 const u32 *timebase;
90
91 ibm_currituck_memsize = ibm_currituck_detect_memsize();
92 if (ibm_currituck_memsize >> 32)
93 end_of_ram = ~0UL;
94 else
95 end_of_ram = ibm_currituck_memsize;
96 avail_ram = end_of_ram - (unsigned long)_end;
97
98 simple_alloc_init(_end, avail_ram, 128, 64);
99 platform_ops.fixups = ibm_currituck_fixups;
100 platform_ops.exit = ibm44x_dbcr_reset;
101 pir_reg = mfspr(SPRN_PIR);
102
103 /* Make sure FDT blob is sane */
104 if (fdt_check_header(_dtb_start) != 0)
105 fatal("Invalid device tree blob\n");
106
107 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
108 "cpu", sizeof("cpu"));
109 if (!node)
110 fatal("Cannot find cpu node\n");
111 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
112 if (timebase && (size == 4))
113 timebase_period_ns = 1000000000 / *timebase;
114
115 fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
116 fdt_init(_dtb_start);
117
118 serial_console_init();
119}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 14cd4bca8b8a..eb78e437ec1b 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -244,6 +244,9 @@ gamecube|wii)
244 link_address='0x600000' 244 link_address='0x600000'
245 platformo="$object/$platform-head.o $object/$platform.o" 245 platformo="$object/$platform-head.o $object/$platform.o"
246 ;; 246 ;;
247treeboot-currituck)
248 link_address='0x1000000'
249 ;;
247treeboot-iss4xx-mpic) 250treeboot-iss4xx-mpic)
248 platformo="$object/treeboot-iss4xx.o" 251 platformo="$object/treeboot-iss4xx.o"
249 ;; 252 ;;
diff --git a/arch/powerpc/configs/40x/klondike_defconfig b/arch/powerpc/configs/40x/klondike_defconfig
new file mode 100644
index 000000000000..c0d228dc73dc
--- /dev/null
+++ b/arch/powerpc/configs/40x/klondike_defconfig
@@ -0,0 +1,55 @@
1CONFIG_40x=y
2CONFIG_EXPERIMENTAL=y
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_SYSFS_DEPRECATED=y
6CONFIG_SYSFS_DEPRECATED_V2=y
7CONFIG_BLK_DEV_INITRD=y
8CONFIG_SYSCTL_SYSCALL=y
9CONFIG_EMBEDDED=y
10CONFIG_SLAB=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13# CONFIG_WALNUT is not set
14CONFIG_APM8018X=y
15# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
16CONFIG_MATH_EMULATION=y
17# CONFIG_MIGRATION is not set
18# CONFIG_SUSPEND is not set
19CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
20CONFIG_PROC_DEVICETREE=y
21CONFIG_BLK_DEV_RAM=y
22CONFIG_BLK_DEV_RAM_SIZE=35000
23CONFIG_SCSI=y
24CONFIG_BLK_DEV_SD=y
25CONFIG_CHR_DEV_SG=y
26CONFIG_SCSI_SAS_ATTRS=y
27# CONFIG_INPUT is not set
28# CONFIG_SERIO is not set
29# CONFIG_VT is not set
30# CONFIG_UNIX98_PTYS is not set
31# CONFIG_LEGACY_PTYS is not set
32# CONFIG_DEVKMEM is not set
33# CONFIG_HW_RANDOM is not set
34# CONFIG_HWMON is not set
35# CONFIG_USB_SUPPORT is not set
36# CONFIG_IOMMU_SUPPORT is not set
37CONFIG_EXT2_FS=y
38CONFIG_EXT3_FS=y
39# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
40CONFIG_EXT4_FS=y
41CONFIG_MSDOS_FS=y
42CONFIG_VFAT_FS=y
43CONFIG_PROC_KCORE=y
44CONFIG_TMPFS=y
45CONFIG_CRAMFS=y
46CONFIG_NLS_CODEPAGE_437=y
47CONFIG_NLS_ASCII=y
48CONFIG_NLS_ISO8859_1=y
49CONFIG_NLS_UTF8=y
50CONFIG_AVERAGE=y
51CONFIG_MAGIC_SYSRQ=y
52# CONFIG_SCHED_DEBUG is not set
53# CONFIG_DEBUG_BUGVERBOSE is not set
54CONFIG_SYSCTL_SYSCALL_CHECK=y
55# CONFIG_FTRACE is not set
diff --git a/arch/powerpc/configs/44x/currituck_defconfig b/arch/powerpc/configs/44x/currituck_defconfig
new file mode 100644
index 000000000000..4192322f8a7f
--- /dev/null
+++ b/arch/powerpc/configs/44x/currituck_defconfig
@@ -0,0 +1,110 @@
1CONFIG_44x=y
2CONFIG_SMP=y
3CONFIG_EXPERIMENTAL=y
4CONFIG_SYSVIPC=y
5CONFIG_POSIX_MQUEUE=y
6CONFIG_SPARSE_IRQ=y
7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_EXPERT=y
9CONFIG_KALLSYMS_ALL=y
10CONFIG_PROFILING=y
11CONFIG_OPROFILE=y
12CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_PPC_47x=y
16# CONFIG_EBONY is not set
17CONFIG_CURRITUCK=y
18CONFIG_HIGHMEM=y
19CONFIG_HZ_100=y
20CONFIG_MATH_EMULATION=y
21CONFIG_IRQ_ALL_CPUS=y
22CONFIG_CMDLINE_BOOL=y
23CONFIG_CMDLINE=""
24# CONFIG_SUSPEND is not set
25CONFIG_NET=y
26CONFIG_PACKET=y
27CONFIG_UNIX=y
28CONFIG_INET=y
29CONFIG_IP_PNP=y
30CONFIG_IP_PNP_DHCP=y
31CONFIG_IP_PNP_BOOTP=y
32# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
33# CONFIG_INET_XFRM_MODE_TUNNEL is not set
34# CONFIG_INET_XFRM_MODE_BEET is not set
35# CONFIG_INET_LRO is not set
36# CONFIG_IPV6 is not set
37CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
38CONFIG_DEVTMPFS=y
39CONFIG_DEVTMPFS_MOUNT=y
40CONFIG_CONNECTOR=y
41CONFIG_MTD=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_JEDECPROBE=y
45CONFIG_MTD_CFI_AMDSTD=y
46CONFIG_MTD_PHYSMAP_OF=y
47CONFIG_PROC_DEVICETREE=y
48CONFIG_BLK_DEV_RAM=y
49CONFIG_BLK_DEV_RAM_SIZE=35000
50# CONFIG_SCSI_PROC_FS is not set
51CONFIG_BLK_DEV_SD=y
52# CONFIG_SCSI_LOWLEVEL is not set
53CONFIG_ATA=y
54# CONFIG_SATA_PMP is not set
55CONFIG_SATA_SIL24=y
56# CONFIG_ATA_SFF is not set
57CONFIG_NETDEVICES=y
58CONFIG_E1000E=y
59# CONFIG_NETDEV_10000 is not set
60# CONFIG_INPUT is not set
61# CONFIG_SERIO is not set
62# CONFIG_VT is not set
63CONFIG_SERIAL_8250=y
64CONFIG_SERIAL_8250_CONSOLE=y
65CONFIG_SERIAL_8250_EXTENDED=y
66CONFIG_SERIAL_8250_SHARE_IRQ=y
67CONFIG_SERIAL_OF_PLATFORM=y
68# CONFIG_HW_RANDOM is not set
69CONFIG_I2C=y
70CONFIG_I2C_IBM_IIC=y
71# CONFIG_HWMON is not set
72CONFIG_THERMAL=y
73CONFIG_USB=y
74CONFIG_USB_DEBUG=y
75CONFIG_USB_EHCI_HCD=y
76CONFIG_USB_OHCI_HCD=y
77CONFIG_RTC_CLASS=y
78CONFIG_RTC_DRV_M41T80=y
79CONFIG_EXT2_FS=y
80CONFIG_EXT3_FS=y
81# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
82CONFIG_EXT3_FS_POSIX_ACL=y
83CONFIG_EXT3_FS_SECURITY=y
84CONFIG_PROC_KCORE=y
85CONFIG_TMPFS=y
86CONFIG_CRAMFS=y
87CONFIG_NFS_FS=y
88CONFIG_NFS_V3=y
89CONFIG_NFS_V3_ACL=y
90CONFIG_NFS_V4=y
91CONFIG_NLS_DEFAULT="n"
92CONFIG_MAGIC_SYSRQ=y
93CONFIG_DEBUG_FS=y
94CONFIG_DEBUG_KERNEL=y
95CONFIG_DETECT_HUNG_TASK=y
96CONFIG_DEBUG_INFO=y
97CONFIG_SYSCTL_SYSCALL_CHECK=y
98CONFIG_XMON=y
99CONFIG_XMON_DEFAULT=y
100CONFIG_PPC_EARLY_DEBUG=y
101CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0x10000000
102CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x200
103CONFIG_CRYPTO=y
104CONFIG_CRYPTO_CBC=y
105CONFIG_CRYPTO_ECB=y
106CONFIG_CRYPTO_PCBC=y
107CONFIG_CRYPTO_MD5=y
108CONFIG_CRYPTO_DES=y
109# CONFIG_CRYPTO_ANSI_CPRNG is not set
110# CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 559da199edb5..7fdc2c0b7fa0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -951,6 +951,7 @@
951#define PVR_403GCX 0x00201400 951#define PVR_403GCX 0x00201400
952#define PVR_405GP 0x40110000 952#define PVR_405GP 0x40110000
953#define PVR_476 0x11a52000 953#define PVR_476 0x11a52000
954#define PVR_476FPE 0x7ff50000
954#define PVR_STB03XXX 0x40310000 955#define PVR_STB03XXX 0x40310000
955#define PVR_NP405H 0x41410000 956#define PVR_NP405H 0x41410000
956#define PVR_NP405L 0x41610000 957#define PVR_NP405L 0x41610000
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index edae5bb06f1f..81db9e2a8a20 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1505,6 +1505,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1505 .machine_check = machine_check_4xx, 1505 .machine_check = machine_check_4xx,
1506 .platform = "ppc405", 1506 .platform = "ppc405",
1507 }, 1507 },
1508 { /* APM8018X */
1509 .pvr_mask = 0xffff0000,
1510 .pvr_value = 0x7ff11432,
1511 .cpu_name = "APM8018X",
1512 .cpu_features = CPU_FTRS_40X,
1513 .cpu_user_features = PPC_FEATURE_32 |
1514 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1515 .mmu_features = MMU_FTR_TYPE_40x,
1516 .icache_bsize = 32,
1517 .dcache_bsize = 32,
1518 .machine_check = machine_check_4xx,
1519 .platform = "ppc405",
1520 },
1508 { /* default match */ 1521 { /* default match */
1509 .pvr_mask = 0x00000000, 1522 .pvr_mask = 0x00000000,
1510 .pvr_value = 0x00000000, 1523 .pvr_value = 0x00000000,
@@ -1830,6 +1843,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
1830 .machine_check = machine_check_47x, 1843 .machine_check = machine_check_47x,
1831 .platform = "ppc470", 1844 .platform = "ppc470",
1832 }, 1845 },
1846 { /* 476fpe */
1847 .pvr_mask = 0xffff0000,
1848 .pvr_value = 0x7ff50000,
1849 .cpu_name = "476fpe",
1850 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1851 .cpu_user_features = COMMON_USER_BOOKE |
1852 PPC_FEATURE_HAS_FPU,
1853 .mmu_features = MMU_FTR_TYPE_47x |
1854 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1855 .icache_bsize = 32,
1856 .dcache_bsize = 128,
1857 .machine_check = machine_check_47x,
1858 .platform = "ppc470",
1859 },
1833 { /* 476 iss */ 1860 { /* 476 iss */
1834 .pvr_mask = 0xffff0000, 1861 .pvr_mask = 0xffff0000,
1835 .pvr_value = 0x00050000, 1862 .pvr_value = 0x00050000,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b725dab0f88a..bb7a9c7a4c05 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -732,6 +732,8 @@ _GLOBAL(init_cpu_state)
732 /* We use the PVR to differenciate 44x cores from 476 */ 732 /* We use the PVR to differenciate 44x cores from 476 */
733 mfspr r3,SPRN_PVR 733 mfspr r3,SPRN_PVR
734 srwi r3,r3,16 734 srwi r3,r3,16
735 cmplwi cr0,r3,PVR_476FPE@h
736 beq head_start_47x
735 cmplwi cr0,r3,PVR_476@h 737 cmplwi cr0,r3,PVR_476@h
736 beq head_start_47x 738 beq head_start_47x
737 cmplwi cr0,r3,PVR_476_ISS@h 739 cmplwi cr0,r3,PVR_476_ISS@h
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index f60e006d90c3..5d4e3fff6d6d 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -78,11 +78,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
78 "tlbwe %1,%3,%5\n" 78 "tlbwe %1,%3,%5\n"
79 "tlbwe %0,%3,%6\n" 79 "tlbwe %0,%3,%6\n"
80 : 80 :
81#ifdef CONFIG_PPC47x
82 : "r" (PPC47x_TLB2_S_RWX),
83#else
84 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), 81 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
85#endif
86 "r" (phys), 82 "r" (phys),
87 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M), 83 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
88 "r" (entry), 84 "r" (entry),
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index bac24a09131b..baae85584b1c 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -196,3 +196,14 @@ config IBM405_ERR51
196# bool 196# bool
197# depends on !STB03xxx && PPC4xx_DMA 197# depends on !STB03xxx && PPC4xx_DMA
198# default y 198# default y
199#
200
201config APM8018X
202 bool "APM8018X"
203 depends on 40x
204 default n
205 select PPC40x_SIMPLE
206 help
207 This option enables support for the AppliedMicro APM8018X evaluation
208 board.
209
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
index ecac237827ef..97612068fae3 100644
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -55,6 +55,7 @@ static const char *board[] __initdata = {
55 "amcc,haleakala", 55 "amcc,haleakala",
56 "amcc,kilauea", 56 "amcc,kilauea",
57 "amcc,makalu", 57 "amcc,makalu",
58 "apm,klondike",
58 "est,hotfoot", 59 "est,hotfoot",
59 "plathome,obs600" 60 "plathome,obs600"
60}; 61};
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 762322ce24a9..5d5aaf6c91aa 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -186,6 +186,16 @@ config ISS4xx
186 help 186 help
187 This option enables support for the IBM ISS simulation environment 187 This option enables support for the IBM ISS simulation environment
188 188
189config CURRITUCK
190 bool "IBM Currituck (476fpe) Support"
191 depends on PPC_47x
192 default n
193 select SWIOTLB
194 select 476FPE
195 select PPC4xx_PCI_EXPRESS
196 help
197 This option enables support for the IBM Currituck (476fpe) evaluation board
198
189config ICON 199config ICON
190 bool "Icon" 200 bool "Icon"
191 depends on 44x 201 depends on 44x
@@ -308,6 +318,10 @@ config 460SX
308 select IBM_EMAC_ZMII 318 select IBM_EMAC_ZMII
309 select IBM_EMAC_TAH 319 select IBM_EMAC_TAH
310 320
321config 476FPE
322 bool
323 select PPC_FPU
324
311config APM821xx 325config APM821xx
312 bool 326 bool
313 select PPC_FPU 327 select PPC_FPU
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 553db6007217..d03833abec09 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
10obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o 10obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
11obj-$(CONFIG_ISS4xx) += iss4xx.o 11obj-$(CONFIG_ISS4xx) += iss4xx.o
12obj-$(CONFIG_CANYONLANDS)+= canyonlands.o 12obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
13obj-$(CONFIG_CURRITUCK) += currituck.o
diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c
new file mode 100644
index 000000000000..1fdf56916873
--- /dev/null
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -0,0 +1,204 @@
1/*
2 * Currituck board specific routines
3 *
4 * Copyright © 2011 Tony Breeds IBM Corporation
5 *
6 * Based on earlier code:
7 * Matt Porter <mporter@kernel.crashing.org>
8 * Copyright 2002-2005 MontaVista Software Inc.
9 *
10 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
11 * Copyright (c) 2003-2005 Zultys Technologies
12 *
13 * Rewritten and ported to the merged powerpc tree:
14 * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
15 * Copyright © 2011 David Kliekamp IBM Corporation
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2 of the License, or (at your
20 * option) any later version.
21 */
22
23#include <linux/init.h>
24#include <linux/memblock.h>
25#include <linux/of.h>
26#include <linux/of_platform.h>
27#include <linux/rtc.h>
28
29#include <asm/machdep.h>
30#include <asm/prom.h>
31#include <asm/udbg.h>
32#include <asm/time.h>
33#include <asm/uic.h>
34#include <asm/ppc4xx.h>
35#include <asm/mpic.h>
36#include <asm/mmu.h>
37
38#include <linux/pci.h>
39
40static __initdata struct of_device_id ppc47x_of_bus[] = {
41 { .compatible = "ibm,plb4", },
42 { .compatible = "ibm,plb6", },
43 { .compatible = "ibm,opb", },
44 { .compatible = "ibm,ebc", },
45 {},
46};
47
48/* The EEPROM is missing and the default values are bogus. This forces USB in
49 * to EHCI mode */
50static void __devinit quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
51{
52 if (of_machine_is_compatible("ibm,currituck")) {
53 pci_write_config_dword(dev, 0xe0, 0x0114231f);
54 pci_write_config_dword(dev, 0xe4, 0x00006c40);
55 }
56}
57DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
58
59static int __init ppc47x_device_probe(void)
60{
61 of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
62
63 return 0;
64}
65machine_device_initcall(ppc47x, ppc47x_device_probe);
66
67/* We can have either UICs or MPICs */
68static void __init ppc47x_init_irq(void)
69{
70 struct device_node *np;
71
72 /* Find top level interrupt controller */
73 for_each_node_with_property(np, "interrupt-controller") {
74 if (of_get_property(np, "interrupts", NULL) == NULL)
75 break;
76 }
77 if (np == NULL)
78 panic("Can't find top level interrupt controller");
79
80 /* Check type and do appropriate initialization */
81 if (of_device_is_compatible(np, "chrp,open-pic")) {
82 /* The MPIC driver will get everything it needs from the
83 * device-tree, just pass 0 to all arguments
84 */
85 struct mpic *mpic =
86 mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0, " MPIC ");
87 BUG_ON(mpic == NULL);
88 mpic_init(mpic);
89 ppc_md.get_irq = mpic_get_irq;
90 } else
91 panic("Unrecognized top level interrupt controller");
92}
93
94#ifdef CONFIG_SMP
95static void __cpuinit smp_ppc47x_setup_cpu(int cpu)
96{
97 mpic_setup_this_cpu();
98}
99
100static int __cpuinit smp_ppc47x_kick_cpu(int cpu)
101{
102 struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
103 const u64 *spin_table_addr_prop;
104 u32 *spin_table;
105 extern void start_secondary_47x(void);
106
107 BUG_ON(cpunode == NULL);
108
109 /* Assume spin table. We could test for the enable-method in
110 * the device-tree but currently there's little point as it's
111 * our only supported method
112 */
113 spin_table_addr_prop =
114 of_get_property(cpunode, "cpu-release-addr", NULL);
115
116 if (spin_table_addr_prop == NULL) {
117 pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
118 cpu);
119 return 1;
120 }
121
122 /* Assume it's mapped as part of the linear mapping. This is a bit
123 * fishy but will work fine for now
124 *
125 * XXX: Is there any reason to assume differently?
126 */
127 spin_table = (u32 *)__va(*spin_table_addr_prop);
128 pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
129
130 spin_table[3] = cpu;
131 smp_wmb();
132 spin_table[1] = __pa(start_secondary_47x);
133 mb();
134
135 return 0;
136}
137
138static struct smp_ops_t ppc47x_smp_ops = {
139 .probe = smp_mpic_probe,
140 .message_pass = smp_mpic_message_pass,
141 .setup_cpu = smp_ppc47x_setup_cpu,
142 .kick_cpu = smp_ppc47x_kick_cpu,
143 .give_timebase = smp_generic_give_timebase,
144 .take_timebase = smp_generic_take_timebase,
145};
146
147static void __init ppc47x_smp_init(void)
148{
149 if (mmu_has_feature(MMU_FTR_TYPE_47x))
150 smp_ops = &ppc47x_smp_ops;
151}
152
153#else /* CONFIG_SMP */
154static void __init ppc47x_smp_init(void) { }
155#endif /* CONFIG_SMP */
156
157static void __init ppc47x_setup_arch(void)
158{
159
160 /* No need to check the DMA config as we /know/ our windows are all of
161 * RAM. Lets hope that doesn't change */
162#ifdef CONFIG_SWIOTLB
163 if (memblock_end_of_DRAM() > 0xffffffff) {
164 ppc_swiotlb_enable = 1;
165 set_pci_dma_ops(&swiotlb_dma_ops);
166 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
167 }
168#endif
169 ppc47x_smp_init();
170}
171
172/*
173 * Called very early, MMU is off, device-tree isn't unflattened
174 */
175static int __init ppc47x_probe(void)
176{
177 unsigned long root = of_get_flat_dt_root();
178
179 if (!of_flat_dt_is_compatible(root, "ibm,currituck"))
180 return 0;
181
182 return 1;
183}
184
185/* Use USB controller should have been hardware swizzled but it wasn't :( */
186static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
187{
188 if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
189 dev->device == 0x00e0)) {
190 dev->irq = irq_create_mapping(NULL, 47);
191 pr_info("%s: Mapping irq 47 %d\n", __func__, dev->irq);
192 }
193}
194
195define_machine(ppc47x) {
196 .name = "PowerPC 47x",
197 .probe = ppc47x_probe,
198 .progress = udbg_progress,
199 .init_IRQ = ppc47x_init_irq,
200 .setup_arch = ppc47x_setup_arch,
201 .pci_irq_fixup = ppc47x_pci_irq_fixup,
202 .restart = ppc4xx_reset_system,
203 .calibrate_decr = generic_calibrate_decr,
204};
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 862f11b3821e..4f05f7542346 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -185,9 +185,15 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
185 out: 185 out:
186 dma_offset_set = 1; 186 dma_offset_set = 1;
187 pci_dram_offset = res->start; 187 pci_dram_offset = res->start;
188 hose->dma_window_base_cur = res->start;
189 hose->dma_window_size = resource_size(res);
188 190
189 printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n", 191 printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n",
190 pci_dram_offset); 192 pci_dram_offset);
193 printk(KERN_INFO "4xx PCI DMA window base to 0x%016llx\n",
194 (unsigned long long)hose->dma_window_base_cur);
195 printk(KERN_INFO "DMA window size 0x%016llx\n",
196 (unsigned long long)hose->dma_window_size);
191 return 0; 197 return 0;
192} 198}
193 199
@@ -647,6 +653,7 @@ static unsigned int ppc4xx_pciex_port_count;
647 653
648struct ppc4xx_pciex_hwops 654struct ppc4xx_pciex_hwops
649{ 655{
656 bool want_sdr;
650 int (*core_init)(struct device_node *np); 657 int (*core_init)(struct device_node *np);
651 int (*port_init_hw)(struct ppc4xx_pciex_port *port); 658 int (*port_init_hw)(struct ppc4xx_pciex_port *port);
652 int (*setup_utl)(struct ppc4xx_pciex_port *port); 659 int (*setup_utl)(struct ppc4xx_pciex_port *port);
@@ -916,6 +923,7 @@ static int ppc440speB_pciex_init_utl(struct ppc4xx_pciex_port *port)
916 923
917static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata = 924static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
918{ 925{
926 .want_sdr = true,
919 .core_init = ppc440spe_pciex_core_init, 927 .core_init = ppc440spe_pciex_core_init,
920 .port_init_hw = ppc440speA_pciex_init_port_hw, 928 .port_init_hw = ppc440speA_pciex_init_port_hw,
921 .setup_utl = ppc440speA_pciex_init_utl, 929 .setup_utl = ppc440speA_pciex_init_utl,
@@ -924,6 +932,7 @@ static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
924 932
925static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata = 933static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata =
926{ 934{
935 .want_sdr = true,
927 .core_init = ppc440spe_pciex_core_init, 936 .core_init = ppc440spe_pciex_core_init,
928 .port_init_hw = ppc440speB_pciex_init_port_hw, 937 .port_init_hw = ppc440speB_pciex_init_port_hw,
929 .setup_utl = ppc440speB_pciex_init_utl, 938 .setup_utl = ppc440speB_pciex_init_utl,
@@ -1034,6 +1043,7 @@ static int ppc460ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
1034 1043
1035static struct ppc4xx_pciex_hwops ppc460ex_pcie_hwops __initdata = 1044static struct ppc4xx_pciex_hwops ppc460ex_pcie_hwops __initdata =
1036{ 1045{
1046 .want_sdr = true,
1037 .core_init = ppc460ex_pciex_core_init, 1047 .core_init = ppc460ex_pciex_core_init,
1038 .port_init_hw = ppc460ex_pciex_init_port_hw, 1048 .port_init_hw = ppc460ex_pciex_init_port_hw,
1039 .setup_utl = ppc460ex_pciex_init_utl, 1049 .setup_utl = ppc460ex_pciex_init_utl,
@@ -1181,6 +1191,7 @@ done:
1181} 1191}
1182 1192
1183static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = { 1193static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = {
1194 .want_sdr = true,
1184 .core_init = ppc460sx_pciex_core_init, 1195 .core_init = ppc460sx_pciex_core_init,
1185 .port_init_hw = ppc460sx_pciex_init_port_hw, 1196 .port_init_hw = ppc460sx_pciex_init_port_hw,
1186 .setup_utl = ppc460sx_pciex_init_utl, 1197 .setup_utl = ppc460sx_pciex_init_utl,
@@ -1276,6 +1287,7 @@ static int ppc405ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
1276 1287
1277static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata = 1288static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
1278{ 1289{
1290 .want_sdr = true,
1279 .core_init = ppc405ex_pciex_core_init, 1291 .core_init = ppc405ex_pciex_core_init,
1280 .port_init_hw = ppc405ex_pciex_init_port_hw, 1292 .port_init_hw = ppc405ex_pciex_init_port_hw,
1281 .setup_utl = ppc405ex_pciex_init_utl, 1293 .setup_utl = ppc405ex_pciex_init_utl,
@@ -1284,6 +1296,52 @@ static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
1284 1296
1285#endif /* CONFIG_40x */ 1297#endif /* CONFIG_40x */
1286 1298
1299#ifdef CONFIG_476FPE
1300static int __init ppc_476fpe_pciex_core_init(struct device_node *np)
1301{
1302 return 4;
1303}
1304
1305static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port)
1306{
1307 u32 timeout_ms = 20;
1308 u32 val = 0, mask = (PECFG_TLDLP_LNKUP|PECFG_TLDLP_PRESENT);
1309 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000,
1310 0x1000);
1311
1312 printk(KERN_INFO "PCIE%d: Checking link...\n", port->index);
1313
1314 if (mbase == NULL) {
1315 printk(KERN_WARNING "PCIE%d: failed to get cfg space\n",
1316 port->index);
1317 return;
1318 }
1319
1320 while (timeout_ms--) {
1321 val = in_le32(mbase + PECFG_TLDLP);
1322
1323 if ((val & mask) == mask)
1324 break;
1325 msleep(10);
1326 }
1327
1328 if (val & PECFG_TLDLP_PRESENT) {
1329 printk(KERN_INFO "PCIE%d: link is up !\n", port->index);
1330 port->link = 1;
1331 } else
1332 printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index);
1333
1334 iounmap(mbase);
1335 return;
1336}
1337
1338static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata =
1339{
1340 .core_init = ppc_476fpe_pciex_core_init,
1341 .check_link = ppc_476fpe_pciex_check_link,
1342};
1343#endif /* CONFIG_476FPE */
1344
1287/* Check that the core has been initied and if not, do it */ 1345/* Check that the core has been initied and if not, do it */
1288static int __init ppc4xx_pciex_check_core_init(struct device_node *np) 1346static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
1289{ 1347{
@@ -1309,6 +1367,10 @@ static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
1309 if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) 1367 if (of_device_is_compatible(np, "ibm,plb-pciex-405ex"))
1310 ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops; 1368 ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops;
1311#endif 1369#endif
1370#ifdef CONFIG_476FPE
1371 if (of_device_is_compatible(np, "ibm,plb-pciex-476fpe"))
1372 ppc4xx_pciex_hwops = &ppc_476fpe_pcie_hwops;
1373#endif
1312 if (ppc4xx_pciex_hwops == NULL) { 1374 if (ppc4xx_pciex_hwops == NULL) {
1313 printk(KERN_WARNING "PCIE: unknown host type %s\n", 1375 printk(KERN_WARNING "PCIE: unknown host type %s\n",
1314 np->full_name); 1376 np->full_name);
@@ -1617,6 +1679,10 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
1617 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 1679 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1618 sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT 1680 sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT
1619 | DCRO_PEGPL_OMRxMSKL_VAL); 1681 | DCRO_PEGPL_OMRxMSKL_VAL);
1682 else if (of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
1683 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1684 sa | DCRO_PEGPL_476FPE_OMR1MSKL_UOT
1685 | DCRO_PEGPL_OMRxMSKL_VAL);
1620 else 1686 else
1621 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 1687 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1622 sa | DCRO_PEGPL_OMR1MSKL_UOT 1688 sa | DCRO_PEGPL_OMR1MSKL_UOT
@@ -1739,9 +1805,10 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1739 /* Calculate window size */ 1805 /* Calculate window size */
1740 sa = (0xffffffffffffffffull << ilog2(size)); 1806 sa = (0xffffffffffffffffull << ilog2(size));
1741 if (res->flags & IORESOURCE_PREFETCH) 1807 if (res->flags & IORESOURCE_PREFETCH)
1742 sa |= 0x8; 1808 sa |= PCI_BASE_ADDRESS_MEM_PREFETCH;
1743 1809
1744 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx")) 1810 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx") ||
1811 of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
1745 sa |= PCI_BASE_ADDRESS_MEM_TYPE_64; 1812 sa |= PCI_BASE_ADDRESS_MEM_TYPE_64;
1746 1813
1747 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); 1814 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
@@ -1972,13 +2039,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1972 } 2039 }
1973 2040
1974 port->node = of_node_get(np); 2041 port->node = of_node_get(np);
1975 pval = of_get_property(np, "sdr-base", NULL); 2042 if (ppc4xx_pciex_hwops->want_sdr) {
1976 if (pval == NULL) { 2043 pval = of_get_property(np, "sdr-base", NULL);
1977 printk(KERN_ERR "PCIE: missing sdr-base for %s\n", 2044 if (pval == NULL) {
1978 np->full_name); 2045 printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
1979 return; 2046 np->full_name);
2047 return;
2048 }
2049 port->sdr_base = *pval;
1980 } 2050 }
1981 port->sdr_base = *pval;
1982 2051
1983 /* Check if device_type property is set to "pci" or "pci-endpoint". 2052 /* Check if device_type property is set to "pci" or "pci-endpoint".
1984 * Resulting from this setup this PCIe port will be configured 2053 * Resulting from this setup this PCIe port will be configured
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h
index 32ce763a375a..bb4821938ab1 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.h
+++ b/arch/powerpc/sysdev/ppc4xx_pci.h
@@ -476,6 +476,13 @@
476#define DCRO_PEGPL_OMR1MSKL_UOT 0x00000002 476#define DCRO_PEGPL_OMR1MSKL_UOT 0x00000002
477#define DCRO_PEGPL_OMR3MSKL_IO 0x00000002 477#define DCRO_PEGPL_OMR3MSKL_IO 0x00000002
478 478
479/* 476FPE */
480#define PCCFG_LCPA 0x270
481#define PECFG_TLDLP 0x3F8
482#define PECFG_TLDLP_LNKUP 0x00000008
483#define PECFG_TLDLP_PRESENT 0x00000010
484#define DCRO_PEGPL_476FPE_OMR1MSKL_UOT 0x00000004
485
479/* SDR Bit Mappings */ 486/* SDR Bit Mappings */
480#define PESDRx_RCSSET_HLDPLB 0x10000000 487#define PESDRx_RCSSET_HLDPLB 0x10000000
481#define PESDRx_RCSSET_RSTGU 0x01000000 488#define PESDRx_RCSSET_RSTGU 0x01000000
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 05:54:56 -0400