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authorTony Lindgren <tony@atomide.com>2012-10-22 16:30:03 -0400
committerTony Lindgren <tony@atomide.com>2012-10-22 16:37:37 -0400
commit1d8643dd0548e8cb9114e53c353b09da016a72fb (patch)
treee97a9578343f842b692539740dfa6399e250c5b7 /arch
parent24942e8af19e5090374776a57db97b350ffd0fa6 (diff)
ARM: OMAP3: Fix 3430 legacy mux names for ssi1 signals.
On n900 uart1 pins are not not used for uart, instead they are used to connect to a cell modem over ssi. Looks like we're currently missing these signal names for 3430 for some reason, and only have some of them listed for 3630. Obviously the signals are there for 3430 if n900 is using them and they are documented in some TRMs. Note that these will eventually be replaced by device tree based pinctrl-single.c driver. But for now these are needed to verify the SSI pins for devices like Nokia N900. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/mux34xx.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 17f80e4ab162..c47140bbbec4 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
614 "sys_off_mode", NULL, NULL, NULL, 614 "sys_off_mode", NULL, NULL, NULL,
615 "gpio_9", NULL, NULL, "safe_mode"), 615 "gpio_9", NULL, NULL, "safe_mode"),
616 _OMAP3_MUXENTRY(UART1_CTS, 150, 616 _OMAP3_MUXENTRY(UART1_CTS, 150,
617 "uart1_cts", NULL, NULL, NULL, 617 "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), 618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
619 _OMAP3_MUXENTRY(UART1_RTS, 149, 619 _OMAP3_MUXENTRY(UART1_RTS, 149,
620 "uart1_rts", NULL, NULL, NULL, 620 "uart1_rts", "ssi1_flag_tx", NULL, NULL,
621 "gpio_149", NULL, NULL, "safe_mode"), 621 "gpio_149", NULL, NULL, "safe_mode"),
622 _OMAP3_MUXENTRY(UART1_RX, 151, 622 _OMAP3_MUXENTRY(UART1_RX, 151,
623 "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", 623 "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
624 "gpio_151", NULL, NULL, "safe_mode"), 624 "gpio_151", NULL, NULL, "safe_mode"),
625 _OMAP3_MUXENTRY(UART1_TX, 148, 625 _OMAP3_MUXENTRY(UART1_TX, 148,
626 "uart1_tx", NULL, NULL, NULL, 626 "uart1_tx", "ssi1_dat_tx", NULL, NULL,
627 "gpio_148", NULL, NULL, "safe_mode"), 627 "gpio_148", NULL, NULL, "safe_mode"),
628 _OMAP3_MUXENTRY(UART2_CTS, 144, 628 _OMAP3_MUXENTRY(UART2_CTS, 144,
629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, 629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,