diff options
author | Olof Johansson <olof@lixom.net> | 2012-04-19 00:24:00 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-04-19 00:24:00 -0400 |
commit | 1c2e1fd1ca4a342a9727c7184703e1d9b03c9720 (patch) | |
tree | 5116efa8a6c37ddfbc2b7a4d183e6bea4fe106e9 /arch | |
parent | 888073d41680e8244232f3d850e0424a4e9de60f (diff) | |
parent | 6aaec67da1e41a0752a2b903b989e73b9f02e182 (diff) |
Merge tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fix regression for bad uart muxing and oops when PM is not set.
Revert one softreset regression and few other minor fixes.
* tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: DMTIMER: fix broken timer clock source selection
ARM: OMAP: serial: Fix the ocp smart idlemode handling bug
ARM: OMAP2+: UART: Fix incorrect population of default uart pads
ARM: OMAP: sram: fix BUG in dpll code for !PM case
ARM: OMAP2/3: VENC hwmods: Remove OCPIF_SWSUP_IDLE flag from VENC slave interface
ARM: OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status"
ARM: OMAP2+: hwmod: add softreset delay field and OMAP4 data
ARM: OMAP1: mux: add missing include
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap1/mux.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap1/timer.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 124 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.c | 12 |
10 files changed, 43 insertions, 131 deletions
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 087dba0df47e..e9cc52d4cb28 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/spinlock.h> | 28 | #include <linux/spinlock.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | ||
30 | 31 | ||
31 | #include <plat/mux.h> | 32 | #include <plat/mux.h> |
32 | 33 | ||
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c index 6e90665a7c47..fb202af01d0d 100644 --- a/arch/arm/mach-omap1/timer.c +++ b/arch/arm/mach-omap1/timer.c | |||
@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev, | |||
47 | int n = (pdev->id - 1) << 1; | 47 | int n = (pdev->id - 1) << 1; |
48 | u32 l; | 48 | u32 l; |
49 | 49 | ||
50 | l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); | 50 | l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); |
51 | l |= source << n; | 51 | l |= source << n; |
52 | __raw_writel(l, MOD_CONF_CTRL_1); | 52 | omap_writel(l, MOD_CONF_CTRL_1); |
53 | 53 | ||
54 | return 0; | 54 | return 0; |
55 | } | 55 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 2c27fdb61e66..7144ae651d3d 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh) | |||
1422 | goto dis_opt_clks; | 1422 | goto dis_opt_clks; |
1423 | _write_sysconfig(v, oh); | 1423 | _write_sysconfig(v, oh); |
1424 | 1424 | ||
1425 | if (oh->class->sysc->srst_udelay) | ||
1426 | udelay(oh->class->sysc->srst_udelay); | ||
1427 | |||
1425 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | 1428 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) |
1426 | omap_test_timeout((omap_hwmod_read(oh, | 1429 | omap_test_timeout((omap_hwmod_read(oh, |
1427 | oh->class->sysc->syss_offs) | 1430 | oh->class->sysc->syss_offs) |
@@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) | |||
1903 | */ | 1906 | */ |
1904 | int omap_hwmod_softreset(struct omap_hwmod *oh) | 1907 | int omap_hwmod_softreset(struct omap_hwmod *oh) |
1905 | { | 1908 | { |
1906 | if (!oh) | 1909 | u32 v; |
1910 | int ret; | ||
1911 | |||
1912 | if (!oh || !(oh->_sysc_cache)) | ||
1907 | return -EINVAL; | 1913 | return -EINVAL; |
1908 | 1914 | ||
1909 | return _ocp_softreset(oh); | 1915 | v = oh->_sysc_cache; |
1916 | ret = _set_softreset(oh, &v); | ||
1917 | if (ret) | ||
1918 | goto error; | ||
1919 | _write_sysconfig(v, oh); | ||
1920 | |||
1921 | error: | ||
1922 | return ret; | ||
1910 | } | 1923 | } |
1911 | 1924 | ||
1912 | /** | 1925 | /** |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a5409ce3f323..a6bde34e443a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | |||
1000 | .flags = OMAP_FIREWALL_L4, | 1000 | .flags = OMAP_FIREWALL_L4, |
1001 | } | 1001 | } |
1002 | }, | 1002 | }, |
1003 | .flags = OCPIF_SWSUP_IDLE, | ||
1004 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1003 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1005 | }; | 1004 | }; |
1006 | 1005 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index c4f56cb60d7d..04a3885f4475 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { | |||
1049 | .slave = &omap2430_dss_venc_hwmod, | 1049 | .slave = &omap2430_dss_venc_hwmod, |
1050 | .clk = "dss_ick", | 1050 | .clk = "dss_ick", |
1051 | .addr = omap2_dss_venc_addrs, | 1051 | .addr = omap2_dss_venc_addrs, |
1052 | .flags = OCPIF_SWSUP_IDLE, | ||
1053 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1052 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1054 | }; | 1053 | }; |
1055 | 1054 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 34b9766d1d23..db86ce90c69f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | |||
1676 | .flags = OMAP_FIREWALL_L4, | 1676 | .flags = OMAP_FIREWALL_L4, |
1677 | } | 1677 | } |
1678 | }, | 1678 | }, |
1679 | .flags = OCPIF_SWSUP_IDLE, | ||
1680 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1679 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1681 | }; | 1680 | }; |
1682 | 1681 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index cc9bd106a854..6abc75753e42 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | |||
2594 | static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { | 2594 | static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { |
2595 | .rev_offs = 0x0000, | 2595 | .rev_offs = 0x0000, |
2596 | .sysc_offs = 0x0010, | 2596 | .sysc_offs = 0x0010, |
2597 | /* | ||
2598 | * ISS needs 100 OCP clk cycles delay after a softreset before | ||
2599 | * accessing sysconfig again. | ||
2600 | * The lowest frequency at the moment for L3 bus is 100 MHz, so | ||
2601 | * 1usec delay is needed. Add an x2 margin to be safe (2 usecs). | ||
2602 | * | ||
2603 | * TODO: Indicate errata when available. | ||
2604 | */ | ||
2605 | .srst_udelay = 2, | ||
2597 | .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | | 2606 | .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | |
2598 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), | 2607 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), |
2599 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | 2608 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0cdd359a128e..9fc2f44188cb 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev) | |||
108 | static void omap_uart_set_smartidle(struct platform_device *pdev) | 108 | static void omap_uart_set_smartidle(struct platform_device *pdev) |
109 | { | 109 | { |
110 | struct omap_device *od = to_omap_device(pdev); | 110 | struct omap_device *od = to_omap_device(pdev); |
111 | u8 idlemode; | ||
111 | 112 | ||
112 | omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); | 113 | if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
114 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; | ||
115 | else | ||
116 | idlemode = HWMOD_IDLEMODE_SMART; | ||
117 | |||
118 | omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode); | ||
113 | } | 119 | } |
114 | 120 | ||
115 | #else | 121 | #else |
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {} | |||
120 | #endif /* CONFIG_PM */ | 126 | #endif /* CONFIG_PM */ |
121 | 127 | ||
122 | #ifdef CONFIG_OMAP_MUX | 128 | #ifdef CONFIG_OMAP_MUX |
123 | static struct omap_device_pad default_uart1_pads[] __initdata = { | ||
124 | { | ||
125 | .name = "uart1_cts.uart1_cts", | ||
126 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
127 | }, | ||
128 | { | ||
129 | .name = "uart1_rts.uart1_rts", | ||
130 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
131 | }, | ||
132 | { | ||
133 | .name = "uart1_tx.uart1_tx", | ||
134 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
135 | }, | ||
136 | { | ||
137 | .name = "uart1_rx.uart1_rx", | ||
138 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
139 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
140 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static struct omap_device_pad default_uart2_pads[] __initdata = { | ||
145 | { | ||
146 | .name = "uart2_cts.uart2_cts", | ||
147 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
148 | }, | ||
149 | { | ||
150 | .name = "uart2_rts.uart2_rts", | ||
151 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
152 | }, | ||
153 | { | ||
154 | .name = "uart2_tx.uart2_tx", | ||
155 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
156 | }, | ||
157 | { | ||
158 | .name = "uart2_rx.uart2_rx", | ||
159 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
160 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
161 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
162 | }, | ||
163 | }; | ||
164 | |||
165 | static struct omap_device_pad default_uart3_pads[] __initdata = { | ||
166 | { | ||
167 | .name = "uart3_cts_rctx.uart3_cts_rctx", | ||
168 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
169 | }, | ||
170 | { | ||
171 | .name = "uart3_rts_sd.uart3_rts_sd", | ||
172 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
173 | }, | ||
174 | { | ||
175 | .name = "uart3_tx_irtx.uart3_tx_irtx", | ||
176 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
177 | }, | ||
178 | { | ||
179 | .name = "uart3_rx_irrx.uart3_rx_irrx", | ||
180 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
181 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
182 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
183 | }, | ||
184 | }; | ||
185 | |||
186 | static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = { | ||
187 | { | ||
188 | .name = "gpmc_wait2.uart4_tx", | ||
189 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
190 | }, | ||
191 | { | ||
192 | .name = "gpmc_wait3.uart4_rx", | ||
193 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
194 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | ||
195 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | ||
196 | }, | ||
197 | }; | ||
198 | |||
199 | static struct omap_device_pad default_omap4_uart4_pads[] __initdata = { | ||
200 | { | ||
201 | .name = "uart4_tx.uart4_tx", | ||
202 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
203 | }, | ||
204 | { | ||
205 | .name = "uart4_rx.uart4_rx", | ||
206 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
207 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
208 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
209 | }, | ||
210 | }; | ||
211 | |||
212 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) | 129 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) |
213 | { | 130 | { |
214 | switch (bdata->id) { | ||
215 | case 0: | ||
216 | bdata->pads = default_uart1_pads; | ||
217 | bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads); | ||
218 | break; | ||
219 | case 1: | ||
220 | bdata->pads = default_uart2_pads; | ||
221 | bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads); | ||
222 | break; | ||
223 | case 2: | ||
224 | bdata->pads = default_uart3_pads; | ||
225 | bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads); | ||
226 | break; | ||
227 | case 3: | ||
228 | if (cpu_is_omap44xx()) { | ||
229 | bdata->pads = default_omap4_uart4_pads; | ||
230 | bdata->pads_cnt = | ||
231 | ARRAY_SIZE(default_omap4_uart4_pads); | ||
232 | } else if (cpu_is_omap3630()) { | ||
233 | bdata->pads = default_omap36xx_uart4_pads; | ||
234 | bdata->pads_cnt = | ||
235 | ARRAY_SIZE(default_omap36xx_uart4_pads); | ||
236 | } | ||
237 | break; | ||
238 | default: | ||
239 | break; | ||
240 | } | ||
241 | } | 131 | } |
242 | #else | 132 | #else |
243 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} | 133 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 8070145ccb98..3f26db4ee8e6 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields { | |||
305 | * @rev_offs: IP block revision register offset (from module base addr) | 305 | * @rev_offs: IP block revision register offset (from module base addr) |
306 | * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) | 306 | * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) |
307 | * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) | 307 | * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) |
308 | * @srst_udelay: Delay needed after doing a softreset in usecs | ||
308 | * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} | 309 | * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} |
309 | * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported | 310 | * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported |
310 | * @clockact: the default value of the module CLOCKACTIVITY bits | 311 | * @clockact: the default value of the module CLOCKACTIVITY bits |
@@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig { | |||
330 | u16 sysc_offs; | 331 | u16 sysc_offs; |
331 | u16 syss_offs; | 332 | u16 syss_offs; |
332 | u16 sysc_flags; | 333 | u16 sysc_flags; |
334 | struct omap_hwmod_sysc_fields *sysc_fields; | ||
335 | u8 srst_udelay; | ||
333 | u8 idlemodes; | 336 | u8 idlemodes; |
334 | u8 clockact; | 337 | u8 clockact; |
335 | struct omap_hwmod_sysc_fields *sysc_fields; | ||
336 | }; | 338 | }; |
337 | 339 | ||
338 | /** | 340 | /** |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index eec98afa0f83..f9a8c5341ee9 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, | |||
348 | sdrc_actim_ctrl_b_1, sdrc_mr_1); | 348 | sdrc_actim_ctrl_b_1, sdrc_mr_1); |
349 | } | 349 | } |
350 | 350 | ||
351 | #ifdef CONFIG_PM | ||
352 | void omap3_sram_restore_context(void) | 351 | void omap3_sram_restore_context(void) |
353 | { | 352 | { |
354 | omap_sram_ceil = omap_sram_base + omap_sram_size; | 353 | omap_sram_ceil = omap_sram_base + omap_sram_size; |
@@ -358,17 +357,18 @@ void omap3_sram_restore_context(void) | |||
358 | omap3_sram_configure_core_dpll_sz); | 357 | omap3_sram_configure_core_dpll_sz); |
359 | omap_push_sram_idle(); | 358 | omap_push_sram_idle(); |
360 | } | 359 | } |
361 | #endif /* CONFIG_PM */ | ||
362 | |||
363 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
364 | 360 | ||
365 | static inline int omap34xx_sram_init(void) | 361 | static inline int omap34xx_sram_init(void) |
366 | { | 362 | { |
367 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | ||
368 | omap3_sram_restore_context(); | 363 | omap3_sram_restore_context(); |
369 | #endif | ||
370 | return 0; | 364 | return 0; |
371 | } | 365 | } |
366 | #else | ||
367 | static inline int omap34xx_sram_init(void) | ||
368 | { | ||
369 | return 0; | ||
370 | } | ||
371 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
372 | 372 | ||
373 | static inline int am33xx_sram_init(void) | 373 | static inline int am33xx_sram_init(void) |
374 | { | 374 | { |