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authorIngo Molnar <mingo@elte.hu>2010-01-27 02:39:39 -0500
committerIngo Molnar <mingo@elte.hu>2010-01-29 03:01:44 -0500
commit184f412c3341cd24fbd26604634a5800b83dbdc3 (patch)
treec6e927f54a396d6affa56e84695d24ef01d107ad /arch
parent6c9687abeb24d5b7aae7db5be070c2139ad29e29 (diff)
perf, x86: Clean up event constraints code a bit
- Remove stray debug code - Improve ugly macros a bit - Remove some whitespace damage - (Also fix up some accumulated damage in perf_event.h) Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Stephane Eranian <eranian@google.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perf_event.c37
1 files changed, 8 insertions, 29 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 66de282ad2fb..fdbe24842271 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -93,24 +93,19 @@ struct cpu_hw_events {
93 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */ 93 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
94}; 94};
95 95
96#define EVENT_CONSTRAINT(c, n, m) { \ 96#define EVENT_CONSTRAINT(c, n, m) { \
97 { .idxmsk64[0] = (n) }, \ 97 { .idxmsk64[0] = (n) }, \
98 .code = (c), \ 98 .code = (c), \
99 .cmask = (m), \ 99 .cmask = (m), \
100 .weight = HWEIGHT64((u64)(n)), \ 100 .weight = HWEIGHT64((u64)(n)), \
101} 101}
102 102
103#define INTEL_EVENT_CONSTRAINT(c, n) \ 103#define INTEL_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
104 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK) 104#define FIXED_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, INTEL_ARCH_FIXED_MASK)
105 105
106#define FIXED_EVENT_CONSTRAINT(c, n) \ 106#define EVENT_CONSTRAINT_END EVENT_CONSTRAINT(0, 0, 0)
107 EVENT_CONSTRAINT(c, n, INTEL_ARCH_FIXED_MASK)
108 107
109#define EVENT_CONSTRAINT_END \ 108#define for_each_event_constraint(e, c) for ((e) = (c); (e)->cmask; (e)++)
110 EVENT_CONSTRAINT(0, 0, 0)
111
112#define for_each_event_constraint(e, c) \
113 for ((e) = (c); (e)->cmask; (e)++)
114 109
115/* 110/*
116 * struct x86_pmu - generic x86 pmu 111 * struct x86_pmu - generic x86 pmu
@@ -1276,14 +1271,6 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
1276 if (test_bit(hwc->idx, used_mask)) 1271 if (test_bit(hwc->idx, used_mask))
1277 break; 1272 break;
1278 1273
1279#if 0
1280 pr_debug("CPU%d fast config=0x%llx idx=%d assign=%c\n",
1281 smp_processor_id(),
1282 hwc->config,
1283 hwc->idx,
1284 assign ? 'y' : 'n');
1285#endif
1286
1287 set_bit(hwc->idx, used_mask); 1274 set_bit(hwc->idx, used_mask);
1288 if (assign) 1275 if (assign)
1289 assign[i] = hwc->idx; 1276 assign[i] = hwc->idx;
@@ -1333,14 +1320,6 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
1333 if (j == X86_PMC_IDX_MAX) 1320 if (j == X86_PMC_IDX_MAX)
1334 break; 1321 break;
1335 1322
1336#if 0
1337 pr_debug("CPU%d slow config=0x%llx idx=%d assign=%c\n",
1338 smp_processor_id(),
1339 hwc->config,
1340 j,
1341 assign ? 'y' : 'n');
1342#endif
1343
1344 set_bit(j, used_mask); 1323 set_bit(j, used_mask);
1345 1324
1346 if (assign) 1325 if (assign)
@@ -2596,9 +2575,9 @@ static const struct pmu pmu = {
2596 * validate a single event group 2575 * validate a single event group
2597 * 2576 *
2598 * validation include: 2577 * validation include:
2599 * - check events are compatible which each other 2578 * - check events are compatible which each other
2600 * - events do not compete for the same counter 2579 * - events do not compete for the same counter
2601 * - number of events <= number of counters 2580 * - number of events <= number of counters
2602 * 2581 *
2603 * validation ensures the group can be loaded onto the 2582 * validation ensures the group can be loaded onto the
2604 * PMU if it was the only group available. 2583 * PMU if it was the only group available.