diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-26 14:02:50 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-26 14:02:50 -0400 |
| commit | 1646df40bb111715a90ce0b86448dabbcc5b3f3d (patch) | |
| tree | 2545ab36faca45629afb45d997e1c6a107176555 /arch | |
| parent | 1b5e62b42b55c509eea04c3c0f25e42c8b35b564 (diff) | |
| parent | 9fb4c2b9e06c0a197d867b34865b113a47370bd5 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
MIPS: R2: Fix problem with code that incorrectly modifies ebase.
MIPS: Change {set,clear,change}_c0_<foo> to return old value.
MIPS: compat: Remove duplicated #include
MIPS: VR5500: Enable prefetch
MIPS: Fix oops in dma_unmap_page on not coherent mips platforms
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 22 | ||||
| -rw-r--r-- | arch/mips/kernel/linux32.c | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/traps.c | 12 | ||||
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 2 | ||||
| -rw-r--r-- | arch/mips/mm/dma-default.c | 2 |
5 files changed, 20 insertions, 19 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 0417516503f6..526f327475ce 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
| @@ -1391,11 +1391,11 @@ static inline void tlb_write_random(void) | |||
| 1391 | static inline unsigned int \ | 1391 | static inline unsigned int \ |
| 1392 | set_c0_##name(unsigned int set) \ | 1392 | set_c0_##name(unsigned int set) \ |
| 1393 | { \ | 1393 | { \ |
| 1394 | unsigned int res; \ | 1394 | unsigned int res, new; \ |
| 1395 | \ | 1395 | \ |
| 1396 | res = read_c0_##name(); \ | 1396 | res = read_c0_##name(); \ |
| 1397 | res |= set; \ | 1397 | new = res | set; \ |
| 1398 | write_c0_##name(res); \ | 1398 | write_c0_##name(new); \ |
| 1399 | \ | 1399 | \ |
| 1400 | return res; \ | 1400 | return res; \ |
| 1401 | } \ | 1401 | } \ |
| @@ -1403,24 +1403,24 @@ set_c0_##name(unsigned int set) \ | |||
| 1403 | static inline unsigned int \ | 1403 | static inline unsigned int \ |
| 1404 | clear_c0_##name(unsigned int clear) \ | 1404 | clear_c0_##name(unsigned int clear) \ |
| 1405 | { \ | 1405 | { \ |
| 1406 | unsigned int res; \ | 1406 | unsigned int res, new; \ |
| 1407 | \ | 1407 | \ |
| 1408 | res = read_c0_##name(); \ | 1408 | res = read_c0_##name(); \ |
| 1409 | res &= ~clear; \ | 1409 | new = res & ~clear; \ |
| 1410 | write_c0_##name(res); \ | 1410 | write_c0_##name(new); \ |
| 1411 | \ | 1411 | \ |
| 1412 | return res; \ | 1412 | return res; \ |
| 1413 | } \ | 1413 | } \ |
| 1414 | \ | 1414 | \ |
| 1415 | static inline unsigned int \ | 1415 | static inline unsigned int \ |
| 1416 | change_c0_##name(unsigned int change, unsigned int new) \ | 1416 | change_c0_##name(unsigned int change, unsigned int val) \ |
| 1417 | { \ | 1417 | { \ |
| 1418 | unsigned int res; \ | 1418 | unsigned int res, new; \ |
| 1419 | \ | 1419 | \ |
| 1420 | res = read_c0_##name(); \ | 1420 | res = read_c0_##name(); \ |
| 1421 | res &= ~change; \ | 1421 | new = res & ~change; \ |
| 1422 | res |= (new & change); \ | 1422 | new |= (val & change); \ |
| 1423 | write_c0_##name(res); \ | 1423 | write_c0_##name(new); \ |
| 1424 | \ | 1424 | \ |
| 1425 | return res; \ | 1425 | return res; \ |
| 1426 | } | 1426 | } |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 1a86f84fa947..49aac6e17df9 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <linux/module.h> | 32 | #include <linux/module.h> |
| 33 | #include <linux/binfmts.h> | 33 | #include <linux/binfmts.h> |
| 34 | #include <linux/security.h> | 34 | #include <linux/security.h> |
| 35 | #include <linux/syscalls.h> | ||
| 36 | #include <linux/compat.h> | 35 | #include <linux/compat.h> |
| 37 | #include <linux/vfs.h> | 36 | #include <linux/vfs.h> |
| 38 | #include <linux/ipc.h> | 37 | #include <linux/ipc.h> |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b2d7041341b8..29fadaccecdd 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
| @@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void) | |||
| 1520 | #endif /* CONFIG_MIPS_MT_SMTC */ | 1520 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 1521 | 1521 | ||
| 1522 | if (cpu_has_veic || cpu_has_vint) { | 1522 | if (cpu_has_veic || cpu_has_vint) { |
| 1523 | unsigned long sr = set_c0_status(ST0_BEV); | ||
| 1523 | write_c0_ebase(ebase); | 1524 | write_c0_ebase(ebase); |
| 1525 | write_c0_status(sr); | ||
| 1524 | /* Setting vector spacing enables EI/VI mode */ | 1526 | /* Setting vector spacing enables EI/VI mode */ |
| 1525 | change_c0_intctl(0x3e0, VECTORSPACING); | 1527 | change_c0_intctl(0x3e0, VECTORSPACING); |
| 1526 | } | 1528 | } |
| @@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr, | |||
| 1602 | #ifdef CONFIG_64BIT | 1604 | #ifdef CONFIG_64BIT |
| 1603 | unsigned long uncached_ebase = TO_UNCAC(ebase); | 1605 | unsigned long uncached_ebase = TO_UNCAC(ebase); |
| 1604 | #endif | 1606 | #endif |
| 1605 | if (cpu_has_mips_r2) | ||
| 1606 | uncached_ebase += (read_c0_ebase() & 0x3ffff000); | ||
| 1607 | 1607 | ||
| 1608 | if (!addr) | 1608 | if (!addr) |
| 1609 | panic(panic_null_cerr); | 1609 | panic(panic_null_cerr); |
| @@ -1635,9 +1635,11 @@ void __init trap_init(void) | |||
| 1635 | return; /* Already done */ | 1635 | return; /* Already done */ |
| 1636 | #endif | 1636 | #endif |
| 1637 | 1637 | ||
| 1638 | if (cpu_has_veic || cpu_has_vint) | 1638 | if (cpu_has_veic || cpu_has_vint) { |
| 1639 | ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64); | 1639 | unsigned long size = 0x200 + VECTORSPACING*64; |
| 1640 | else { | 1640 | ebase = (unsigned long) |
| 1641 | __alloc_bootmem(size, 1 << fls(size), 0); | ||
| 1642 | } else { | ||
| 1641 | ebase = CAC_BASE; | 1643 | ebase = CAC_BASE; |
| 1642 | if (cpu_has_mips_r2) | 1644 | if (cpu_has_mips_r2) |
| 1643 | ebase += (read_c0_ebase() & 0x3ffff000); | 1645 | ebase += (read_c0_ebase() & 0x3ffff000); |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index c43f4b26a690..871e828bc62a 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
| @@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void) | |||
| 780 | c->dcache.ways = 2; | 780 | c->dcache.ways = 2; |
| 781 | c->dcache.waybit = 0; | 781 | c->dcache.waybit = 0; |
| 782 | 782 | ||
| 783 | c->options |= MIPS_CPU_CACHE_CDEX_P; | 783 | c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH; |
| 784 | break; | 784 | break; |
| 785 | 785 | ||
| 786 | case CPU_TX49XX: | 786 | case CPU_TX49XX: |
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 546e6977d4ff..bed56f1ac837 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c | |||
| @@ -225,7 +225,7 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | |||
| 225 | if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) { | 225 | if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) { |
| 226 | unsigned long addr; | 226 | unsigned long addr; |
| 227 | 227 | ||
| 228 | addr = plat_dma_addr_to_phys(dma_address); | 228 | addr = dma_addr_to_virt(dma_address); |
| 229 | dma_cache_wback_inv(addr, size); | 229 | dma_cache_wback_inv(addr, size); |
| 230 | } | 230 | } |
| 231 | 231 | ||
