diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-02 11:35:03 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-02 11:35:03 -0400 |
commit | 118c9a45fdacc6fe57910fa1d048e2d5bbc193f4 (patch) | |
tree | b17d45f2fa8620cba6950ff2848d3d0484672950 /arch | |
parent | f8e9248dbb2bddfaed86a14254b7ca2409ef68ff (diff) | |
parent | 06d1d8c85700884940346f20d10b3a22c331b5e9 (diff) |
Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC bug fixes from Arnd Bergmann:
"After a quiet set of fixes for 3.9-rc4, a lot of people woke up and
sent urgent fixes for 3.9. I pushed back on a number of them that got
deferred to 3.10, but these are the ones that seemed important.
Regression in 3.9:
- Multiple regressions in OMAP2+ clock cleanup
- SH-Mobile frame buffer bug fix that merged here because of
maintainer MIA
- ux500 prcmu changes broke DT booting
- MMCI duplicated regulator setup on ux500
- New ux500 clock driver broke ethernet on snowball
- Local interrupt driver for mvebu broke ethernet
- MVEBU GPIO driver did not get set up right on Orion DT
- incorrect interrupt number on Orion crypto for DT
Long-standing bugs, including candidates for stable:
- Kirkwood MMC needs to disable invalid card detect pins
- MV SDIO pinmux was wrong on Mirabox
- GoFlex Net board file needs to set NAND chip delay
- MSM timer restart race
- ep93xx early debug code broke in 3.7
- i.MX CPU hotplug race
- Incorrect clock setup for OMAP1 USB
- Workaround for bad clock setup by some old OMAP4 boot loaders
- Static I/O mappings on cns3xxx since 3.2"
* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: cns3xxx: fix mapping of private memory region
arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.
arm: orion5x: correct IRQ used in dtsi for mv_cesa
arm: orion5x: fix orion5x.dtsi gpio parameters
ARM: Kirkwood: fix unused mvsdio gpio pins
arm: mvebu: Use local interrupt only for the timer 0
ARM: kirkwood: Fix chip-delay for GoFlex Net
ARM: ux500: Enable the clock controlling Ethernet on Snowball
ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-back
ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DT
fbdev: sh_mobile_lcdc: fixup B side hsync adjust settings
ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized
ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill
ARM: msm: Stop counting before reprogramming clockevent
ARM: ep93xx: Fix wait for UART FIFO to be empty
ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup
ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musb
ARM: OMAP4: clock data: lock USB DPLL on boot
ARM: OMAP1: fix USB host on 1710
Diffstat (limited to 'arch')
29 files changed, 154 insertions, 58 deletions
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts index dd0c57dd9f30..3234875824dc 100644 --- a/arch/arm/boot/dts/armada-370-mirabox.dts +++ b/arch/arm/boot/dts/armada-370-mirabox.dts | |||
@@ -54,7 +54,7 @@ | |||
54 | }; | 54 | }; |
55 | 55 | ||
56 | mvsdio@d00d4000 { | 56 | mvsdio@d00d4000 { |
57 | pinctrl-0 = <&sdio_pins2>; | 57 | pinctrl-0 = <&sdio_pins3>; |
58 | pinctrl-names = "default"; | 58 | pinctrl-names = "default"; |
59 | status = "okay"; | 59 | status = "okay"; |
60 | /* | 60 | /* |
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 8188d138020e..a195debb67d3 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi | |||
@@ -59,6 +59,12 @@ | |||
59 | "mpp50", "mpp51", "mpp52"; | 59 | "mpp50", "mpp51", "mpp52"; |
60 | marvell,function = "sd0"; | 60 | marvell,function = "sd0"; |
61 | }; | 61 | }; |
62 | |||
63 | sdio_pins3: sdio-pins3 { | ||
64 | marvell,pins = "mpp48", "mpp49", "mpp50", | ||
65 | "mpp51", "mpp52", "mpp53"; | ||
66 | marvell,function = "sd0"; | ||
67 | }; | ||
62 | }; | 68 | }; |
63 | 69 | ||
64 | gpio0: gpio@d0018100 { | 70 | gpio0: gpio@d0018100 { |
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 9de93096601a..aaa63d0a8096 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi | |||
@@ -191,8 +191,8 @@ | |||
191 | 191 | ||
192 | prcmu: prcmu@80157000 { | 192 | prcmu: prcmu@80157000 { |
193 | compatible = "stericsson,db8500-prcmu"; | 193 | compatible = "stericsson,db8500-prcmu"; |
194 | reg = <0x80157000 0x1000>; | 194 | reg = <0x80157000 0x1000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>; |
195 | reg-names = "prcmu"; | 195 | reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm"; |
196 | interrupts = <0 47 0x4>; | 196 | interrupts = <0 47 0x4>; |
197 | #address-cells = <1>; | 197 | #address-cells = <1>; |
198 | #size-cells = <1>; | 198 | #size-cells = <1>; |
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts index bd83b8fc7c83..c3573be7b92c 100644 --- a/arch/arm/boot/dts/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts | |||
@@ -77,6 +77,7 @@ | |||
77 | }; | 77 | }; |
78 | 78 | ||
79 | nand@3000000 { | 79 | nand@3000000 { |
80 | chip-delay = <40>; | ||
80 | status = "okay"; | 81 | status = "okay"; |
81 | 82 | ||
82 | partition@0 { | 83 | partition@0 { |
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi index 8aad00f81ed9..f7bec3b1ba32 100644 --- a/arch/arm/boot/dts/orion5x.dtsi +++ b/arch/arm/boot/dts/orion5x.dtsi | |||
@@ -13,6 +13,9 @@ | |||
13 | compatible = "marvell,orion5x"; | 13 | compatible = "marvell,orion5x"; |
14 | interrupt-parent = <&intc>; | 14 | interrupt-parent = <&intc>; |
15 | 15 | ||
16 | aliases { | ||
17 | gpio0 = &gpio0; | ||
18 | }; | ||
16 | intc: interrupt-controller { | 19 | intc: interrupt-controller { |
17 | compatible = "marvell,orion-intc", "marvell,intc"; | 20 | compatible = "marvell,orion-intc", "marvell,intc"; |
18 | interrupt-controller; | 21 | interrupt-controller; |
@@ -32,7 +35,9 @@ | |||
32 | #gpio-cells = <2>; | 35 | #gpio-cells = <2>; |
33 | gpio-controller; | 36 | gpio-controller; |
34 | reg = <0x10100 0x40>; | 37 | reg = <0x10100 0x40>; |
35 | ngpio = <32>; | 38 | ngpios = <32>; |
39 | interrupt-controller; | ||
40 | #interrupt-cells = <2>; | ||
36 | interrupts = <6>, <7>, <8>, <9>; | 41 | interrupts = <6>, <7>, <8>, <9>; |
37 | }; | 42 | }; |
38 | 43 | ||
@@ -91,7 +96,7 @@ | |||
91 | reg = <0x90000 0x10000>, | 96 | reg = <0x90000 0x10000>, |
92 | <0xf2200000 0x800>; | 97 | <0xf2200000 0x800>; |
93 | reg-names = "regs", "sram"; | 98 | reg-names = "regs", "sram"; |
94 | interrupts = <22>; | 99 | interrupts = <28>; |
95 | status = "okay"; | 100 | status = "okay"; |
96 | }; | 101 | }; |
97 | }; | 102 | }; |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index e698f26cc0cb..52e4bb5cf12d 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -22,19 +22,9 @@ | |||
22 | 22 | ||
23 | static struct map_desc cns3xxx_io_desc[] __initdata = { | 23 | static struct map_desc cns3xxx_io_desc[] __initdata = { |
24 | { | 24 | { |
25 | .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT, | 25 | .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT, |
26 | .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE), | 26 | .pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE), |
27 | .length = SZ_4K, | 27 | .length = SZ_8K, |
28 | .type = MT_DEVICE, | ||
29 | }, { | ||
30 | .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT, | ||
31 | .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE), | ||
32 | .length = SZ_4K, | ||
33 | .type = MT_DEVICE, | ||
34 | }, { | ||
35 | .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT, | ||
36 | .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE), | ||
37 | .length = SZ_4K, | ||
38 | .type = MT_DEVICE, | 28 | .type = MT_DEVICE, |
39 | }, { | 29 | }, { |
40 | .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT, | 30 | .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT, |
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h index 191c8e57f289..b1021aafa481 100644 --- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h | |||
@@ -94,10 +94,10 @@ | |||
94 | #define RTC_INTR_STS_OFFSET 0x34 | 94 | #define RTC_INTR_STS_OFFSET 0x34 |
95 | 95 | ||
96 | #define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */ | 96 | #define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */ |
97 | #define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */ | 97 | #define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */ |
98 | 98 | ||
99 | #define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */ | 99 | #define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */ |
100 | #define CNS3XXX_PM_BASE_VIRT 0xFFF08000 | 100 | #define CNS3XXX_PM_BASE_VIRT 0xFB001000 |
101 | 101 | ||
102 | #define PM_CLK_GATE_OFFSET 0x00 | 102 | #define PM_CLK_GATE_OFFSET 0x00 |
103 | #define PM_SOFT_RST_OFFSET 0x04 | 103 | #define PM_SOFT_RST_OFFSET 0x04 |
@@ -109,7 +109,7 @@ | |||
109 | #define PM_PLL_HM_PD_OFFSET 0x1C | 109 | #define PM_PLL_HM_PD_OFFSET 0x1C |
110 | 110 | ||
111 | #define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */ | 111 | #define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */ |
112 | #define CNS3XXX_UART0_BASE_VIRT 0xFFF09000 | 112 | #define CNS3XXX_UART0_BASE_VIRT 0xFB002000 |
113 | 113 | ||
114 | #define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ | 114 | #define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ |
115 | #define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000 | 115 | #define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000 |
@@ -130,7 +130,7 @@ | |||
130 | #define CNS3XXX_I2S_BASE_VIRT 0xFFF10000 | 130 | #define CNS3XXX_I2S_BASE_VIRT 0xFFF10000 |
131 | 131 | ||
132 | #define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ | 132 | #define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ |
133 | #define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800 | 133 | #define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000 |
134 | 134 | ||
135 | #define TIMER1_COUNTER_OFFSET 0x00 | 135 | #define TIMER1_COUNTER_OFFSET 0x00 |
136 | #define TIMER1_AUTO_RELOAD_OFFSET 0x04 | 136 | #define TIMER1_AUTO_RELOAD_OFFSET 0x04 |
@@ -227,16 +227,16 @@ | |||
227 | * Testchip peripheral and fpga gic regions | 227 | * Testchip peripheral and fpga gic regions |
228 | */ | 228 | */ |
229 | #define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */ | 229 | #define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */ |
230 | #define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000 | 230 | #define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000 |
231 | 231 | ||
232 | #define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */ | 232 | #define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */ |
233 | #define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100 | 233 | #define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100) |
234 | 234 | ||
235 | #define CNS3XXX_TC11MP_TWD_BASE 0x90000600 | 235 | #define CNS3XXX_TC11MP_TWD_BASE 0x90000600 |
236 | #define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600 | 236 | #define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600) |
237 | 237 | ||
238 | #define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */ | 238 | #define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */ |
239 | #define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000 | 239 | #define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000) |
240 | 240 | ||
241 | #define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ | 241 | #define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ |
242 | #define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000 | 242 | #define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000 |
diff --git a/arch/arm/mach-ep93xx/include/mach/uncompress.h b/arch/arm/mach-ep93xx/include/mach/uncompress.h index d2afb4dd82ab..b5cc77d2380b 100644 --- a/arch/arm/mach-ep93xx/include/mach/uncompress.h +++ b/arch/arm/mach-ep93xx/include/mach/uncompress.h | |||
@@ -47,9 +47,13 @@ static void __raw_writel(unsigned int value, unsigned int ptr) | |||
47 | 47 | ||
48 | static inline void putc(int c) | 48 | static inline void putc(int c) |
49 | { | 49 | { |
50 | /* Transmit fifo not full? */ | 50 | int i; |
51 | while (__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF) | 51 | |
52 | ; | 52 | for (i = 0; i < 10000; i++) { |
53 | /* Transmit fifo not full? */ | ||
54 | if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)) | ||
55 | break; | ||
56 | } | ||
53 | 57 | ||
54 | __raw_writeb(c, PHYS_UART_DATA); | 58 | __raw_writeb(c, PHYS_UART_DATA); |
55 | } | 59 | } |
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 5a800bfcec5b..5bf4a97ab241 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h | |||
@@ -110,6 +110,8 @@ void tzic_handle_irq(struct pt_regs *); | |||
110 | 110 | ||
111 | extern void imx_enable_cpu(int cpu, bool enable); | 111 | extern void imx_enable_cpu(int cpu, bool enable); |
112 | extern void imx_set_cpu_jump(int cpu, void *jump_addr); | 112 | extern void imx_set_cpu_jump(int cpu, void *jump_addr); |
113 | extern u32 imx_get_cpu_arg(int cpu); | ||
114 | extern void imx_set_cpu_arg(int cpu, u32 arg); | ||
113 | extern void v7_cpu_resume(void); | 115 | extern void v7_cpu_resume(void); |
114 | extern u32 *pl310_get_save_ptr(void); | 116 | extern u32 *pl310_get_save_ptr(void); |
115 | #ifdef CONFIG_SMP | 117 | #ifdef CONFIG_SMP |
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index 7bc5fe15dda2..361a253e2b63 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c | |||
@@ -46,11 +46,23 @@ static inline void cpu_enter_lowpower(void) | |||
46 | void imx_cpu_die(unsigned int cpu) | 46 | void imx_cpu_die(unsigned int cpu) |
47 | { | 47 | { |
48 | cpu_enter_lowpower(); | 48 | cpu_enter_lowpower(); |
49 | /* | ||
50 | * We use the cpu jumping argument register to sync with | ||
51 | * imx_cpu_kill() which is running on cpu0 and waiting for | ||
52 | * the register being cleared to kill the cpu. | ||
53 | */ | ||
54 | imx_set_cpu_arg(cpu, ~0); | ||
49 | cpu_do_idle(); | 55 | cpu_do_idle(); |
50 | } | 56 | } |
51 | 57 | ||
52 | int imx_cpu_kill(unsigned int cpu) | 58 | int imx_cpu_kill(unsigned int cpu) |
53 | { | 59 | { |
60 | unsigned long timeout = jiffies + msecs_to_jiffies(50); | ||
61 | |||
62 | while (imx_get_cpu_arg(cpu) == 0) | ||
63 | if (time_after(jiffies, timeout)) | ||
64 | return 0; | ||
54 | imx_enable_cpu(cpu, false); | 65 | imx_enable_cpu(cpu, false); |
66 | imx_set_cpu_arg(cpu, 0); | ||
55 | return 1; | 67 | return 1; |
56 | } | 68 | } |
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index e15f1555c59b..09a742f8c7ab 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c | |||
@@ -43,6 +43,18 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) | |||
43 | src_base + SRC_GPR1 + cpu * 8); | 43 | src_base + SRC_GPR1 + cpu * 8); |
44 | } | 44 | } |
45 | 45 | ||
46 | u32 imx_get_cpu_arg(int cpu) | ||
47 | { | ||
48 | cpu = cpu_logical_map(cpu); | ||
49 | return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4); | ||
50 | } | ||
51 | |||
52 | void imx_set_cpu_arg(int cpu, u32 arg) | ||
53 | { | ||
54 | cpu = cpu_logical_map(cpu); | ||
55 | writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4); | ||
56 | } | ||
57 | |||
46 | void imx_src_prepare_restart(void) | 58 | void imx_src_prepare_restart(void) |
47 | { | 59 | { |
48 | u32 val; | 60 | u32 val; |
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c index 1c6e736cbbf8..08dd739aa709 100644 --- a/arch/arm/mach-kirkwood/guruplug-setup.c +++ b/arch/arm/mach-kirkwood/guruplug-setup.c | |||
@@ -53,6 +53,8 @@ static struct mv_sata_platform_data guruplug_sata_data = { | |||
53 | 53 | ||
54 | static struct mvsdio_platform_data guruplug_mvsdio_data = { | 54 | static struct mvsdio_platform_data guruplug_mvsdio_data = { |
55 | /* unfortunately the CD signal has not been connected */ | 55 | /* unfortunately the CD signal has not been connected */ |
56 | .gpio_card_detect = -1, | ||
57 | .gpio_write_protect = -1, | ||
56 | }; | 58 | }; |
57 | 59 | ||
58 | static struct gpio_led guruplug_led_pins[] = { | 60 | static struct gpio_led guruplug_led_pins[] = { |
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 8ddd69fdc937..6a6eb548307d 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c | |||
@@ -55,6 +55,7 @@ static struct mv_sata_platform_data openrd_sata_data = { | |||
55 | 55 | ||
56 | static struct mvsdio_platform_data openrd_mvsdio_data = { | 56 | static struct mvsdio_platform_data openrd_mvsdio_data = { |
57 | .gpio_card_detect = 29, /* MPP29 used as SD card detect */ | 57 | .gpio_card_detect = 29, /* MPP29 used as SD card detect */ |
58 | .gpio_write_protect = -1, | ||
58 | }; | 59 | }; |
59 | 60 | ||
60 | static unsigned int openrd_mpp_config[] __initdata = { | 61 | static unsigned int openrd_mpp_config[] __initdata = { |
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index c7d93b48926b..d24223166e06 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c | |||
@@ -69,6 +69,7 @@ static struct mv_sata_platform_data rd88f6281_sata_data = { | |||
69 | 69 | ||
70 | static struct mvsdio_platform_data rd88f6281_mvsdio_data = { | 70 | static struct mvsdio_platform_data rd88f6281_mvsdio_data = { |
71 | .gpio_card_detect = 28, | 71 | .gpio_card_detect = 28, |
72 | .gpio_write_protect = -1, | ||
72 | }; | 73 | }; |
73 | 74 | ||
74 | static unsigned int rd88f6281_mpp_config[] __initdata = { | 75 | static unsigned int rd88f6281_mpp_config[] __initdata = { |
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 2969027f02fa..f9fd77e8f1f5 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
@@ -62,7 +62,10 @@ static int msm_timer_set_next_event(unsigned long cycles, | |||
62 | { | 62 | { |
63 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); | 63 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
64 | 64 | ||
65 | writel_relaxed(0, event_base + TIMER_CLEAR); | 65 | ctrl &= ~TIMER_ENABLE_EN; |
66 | writel_relaxed(ctrl, event_base + TIMER_ENABLE); | ||
67 | |||
68 | writel_relaxed(ctrl, event_base + TIMER_CLEAR); | ||
66 | writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); | 69 | writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); |
67 | writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); | 70 | writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); |
68 | return 0; | 71 | return 0; |
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index 274ff58271de..6a9195e10579 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c | |||
@@ -44,6 +44,8 @@ | |||
44 | 44 | ||
45 | #define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) | 45 | #define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) |
46 | 46 | ||
47 | #define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5) | ||
48 | |||
47 | #define ACTIVE_DOORBELLS (8) | 49 | #define ACTIVE_DOORBELLS (8) |
48 | 50 | ||
49 | static DEFINE_RAW_SPINLOCK(irq_controller_lock); | 51 | static DEFINE_RAW_SPINLOCK(irq_controller_lock); |
@@ -62,7 +64,7 @@ static void armada_370_xp_irq_mask(struct irq_data *d) | |||
62 | #ifdef CONFIG_SMP | 64 | #ifdef CONFIG_SMP |
63 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 65 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
64 | 66 | ||
65 | if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS) | 67 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
66 | writel(hwirq, main_int_base + | 68 | writel(hwirq, main_int_base + |
67 | ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS); | 69 | ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS); |
68 | else | 70 | else |
@@ -79,7 +81,7 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) | |||
79 | #ifdef CONFIG_SMP | 81 | #ifdef CONFIG_SMP |
80 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 82 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
81 | 83 | ||
82 | if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS) | 84 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
83 | writel(hwirq, main_int_base + | 85 | writel(hwirq, main_int_base + |
84 | ARMADA_370_XP_INT_SET_ENABLE_OFFS); | 86 | ARMADA_370_XP_INT_SET_ENABLE_OFFS); |
85 | else | 87 | else |
@@ -147,7 +149,7 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, | |||
147 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); | 149 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); |
148 | irq_set_status_flags(virq, IRQ_LEVEL); | 150 | irq_set_status_flags(virq, IRQ_LEVEL); |
149 | 151 | ||
150 | if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) { | 152 | if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { |
151 | irq_set_percpu_devid(virq); | 153 | irq_set_percpu_devid(virq); |
152 | irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, | 154 | irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, |
153 | handle_percpu_devid_irq); | 155 | handle_percpu_devid_irq); |
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index cb7c6ae2e3fc..6c4f766365a2 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -543,15 +543,6 @@ static struct clk usb_dc_ck = { | |||
543 | /* Direct from ULPD, no parent */ | 543 | /* Direct from ULPD, no parent */ |
544 | .rate = 48000000, | 544 | .rate = 48000000, |
545 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 545 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
546 | .enable_bit = USB_REQ_EN_SHIFT, | ||
547 | }; | ||
548 | |||
549 | static struct clk usb_dc_ck7xx = { | ||
550 | .name = "usb_dc_ck", | ||
551 | .ops = &clkops_generic, | ||
552 | /* Direct from ULPD, no parent */ | ||
553 | .rate = 48000000, | ||
554 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
555 | .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, | 546 | .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, |
556 | }; | 547 | }; |
557 | 548 | ||
@@ -727,8 +718,7 @@ static struct omap_clk omap_clks[] = { | |||
727 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), | 718 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), |
728 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), | 719 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), |
729 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), | 720 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), |
730 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), | 721 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX), |
731 | CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX), | ||
732 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), | 722 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), |
733 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), | 723 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), |
734 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), | 724 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), |
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index 3d58f335f173..0c6834ae1fc4 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c | |||
@@ -52,6 +52,13 @@ | |||
52 | */ | 52 | */ |
53 | #define OMAP4_DPLL_ABE_DEFFREQ 98304000 | 53 | #define OMAP4_DPLL_ABE_DEFFREQ 98304000 |
54 | 54 | ||
55 | /* | ||
56 | * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section | ||
57 | * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred | ||
58 | * locked frequency for the USB DPLL is 960MHz. | ||
59 | */ | ||
60 | #define OMAP4_DPLL_USB_DEFFREQ 960000000 | ||
61 | |||
55 | /* Root clocks */ | 62 | /* Root clocks */ |
56 | 63 | ||
57 | DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); | 64 | DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); |
@@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel, | |||
1011 | OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, | 1018 | OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, |
1012 | hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); | 1019 | hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); |
1013 | 1020 | ||
1021 | DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0, | ||
1022 | OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, | ||
1023 | OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL); | ||
1024 | |||
1014 | DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, | 1025 | DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, |
1015 | OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, | 1026 | OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, |
1016 | OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); | 1027 | OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); |
@@ -1538,6 +1549,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
1538 | CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), | 1549 | CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), |
1539 | CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), | 1550 | CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), |
1540 | CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), | 1551 | CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), |
1552 | CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), | ||
1541 | CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), | 1553 | CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), |
1542 | CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), | 1554 | CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), |
1543 | CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), | 1555 | CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), |
@@ -1705,5 +1717,13 @@ int __init omap4xxx_clk_init(void) | |||
1705 | if (rc) | 1717 | if (rc) |
1706 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); | 1718 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); |
1707 | 1719 | ||
1720 | /* | ||
1721 | * Lock USB DPLL on OMAP4 devices so that the L3INIT power | ||
1722 | * domain can transition to retention state when not in use. | ||
1723 | */ | ||
1724 | rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); | ||
1725 | if (rc) | ||
1726 | pr_err("%s: failed to configure USB DPLL!\n", __func__); | ||
1727 | |||
1708 | return 0; | 1728 | return 0; |
1709 | } | 1729 | } |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 40f4a03d728f..d6ba13e1c540 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -293,5 +293,8 @@ extern void omap_reserve(void); | |||
293 | struct omap_hwmod; | 293 | struct omap_hwmod; |
294 | extern int omap_dss_reset(struct omap_hwmod *); | 294 | extern int omap_dss_reset(struct omap_hwmod *); |
295 | 295 | ||
296 | /* SoC specific clock initializer */ | ||
297 | extern int (*omap_clk_init)(void); | ||
298 | |||
296 | #endif /* __ASSEMBLER__ */ | 299 | #endif /* __ASSEMBLER__ */ |
297 | #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ | 300 | #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 2c3fdd65387b..5c445ca1e271 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -55,6 +55,12 @@ | |||
55 | #include "prm44xx.h" | 55 | #include "prm44xx.h" |
56 | 56 | ||
57 | /* | 57 | /* |
58 | * omap_clk_init: points to a function that does the SoC-specific | ||
59 | * clock initializations | ||
60 | */ | ||
61 | int (*omap_clk_init)(void); | ||
62 | |||
63 | /* | ||
58 | * The machine specific code may provide the extra mapping besides the | 64 | * The machine specific code may provide the extra mapping besides the |
59 | * default mapping provided here. | 65 | * default mapping provided here. |
60 | */ | 66 | */ |
@@ -397,7 +403,7 @@ void __init omap2420_init_early(void) | |||
397 | omap242x_clockdomains_init(); | 403 | omap242x_clockdomains_init(); |
398 | omap2420_hwmod_init(); | 404 | omap2420_hwmod_init(); |
399 | omap_hwmod_init_postsetup(); | 405 | omap_hwmod_init_postsetup(); |
400 | omap2420_clk_init(); | 406 | omap_clk_init = omap2420_clk_init; |
401 | } | 407 | } |
402 | 408 | ||
403 | void __init omap2420_init_late(void) | 409 | void __init omap2420_init_late(void) |
@@ -427,7 +433,7 @@ void __init omap2430_init_early(void) | |||
427 | omap243x_clockdomains_init(); | 433 | omap243x_clockdomains_init(); |
428 | omap2430_hwmod_init(); | 434 | omap2430_hwmod_init(); |
429 | omap_hwmod_init_postsetup(); | 435 | omap_hwmod_init_postsetup(); |
430 | omap2430_clk_init(); | 436 | omap_clk_init = omap2430_clk_init; |
431 | } | 437 | } |
432 | 438 | ||
433 | void __init omap2430_init_late(void) | 439 | void __init omap2430_init_late(void) |
@@ -462,7 +468,7 @@ void __init omap3_init_early(void) | |||
462 | omap3xxx_clockdomains_init(); | 468 | omap3xxx_clockdomains_init(); |
463 | omap3xxx_hwmod_init(); | 469 | omap3xxx_hwmod_init(); |
464 | omap_hwmod_init_postsetup(); | 470 | omap_hwmod_init_postsetup(); |
465 | omap3xxx_clk_init(); | 471 | omap_clk_init = omap3xxx_clk_init; |
466 | } | 472 | } |
467 | 473 | ||
468 | void __init omap3430_init_early(void) | 474 | void __init omap3430_init_early(void) |
@@ -500,7 +506,7 @@ void __init ti81xx_init_early(void) | |||
500 | omap3xxx_clockdomains_init(); | 506 | omap3xxx_clockdomains_init(); |
501 | omap3xxx_hwmod_init(); | 507 | omap3xxx_hwmod_init(); |
502 | omap_hwmod_init_postsetup(); | 508 | omap_hwmod_init_postsetup(); |
503 | omap3xxx_clk_init(); | 509 | omap_clk_init = omap3xxx_clk_init; |
504 | } | 510 | } |
505 | 511 | ||
506 | void __init omap3_init_late(void) | 512 | void __init omap3_init_late(void) |
@@ -568,7 +574,7 @@ void __init am33xx_init_early(void) | |||
568 | am33xx_clockdomains_init(); | 574 | am33xx_clockdomains_init(); |
569 | am33xx_hwmod_init(); | 575 | am33xx_hwmod_init(); |
570 | omap_hwmod_init_postsetup(); | 576 | omap_hwmod_init_postsetup(); |
571 | am33xx_clk_init(); | 577 | omap_clk_init = am33xx_clk_init; |
572 | } | 578 | } |
573 | #endif | 579 | #endif |
574 | 580 | ||
@@ -593,7 +599,7 @@ void __init omap4430_init_early(void) | |||
593 | omap44xx_clockdomains_init(); | 599 | omap44xx_clockdomains_init(); |
594 | omap44xx_hwmod_init(); | 600 | omap44xx_hwmod_init(); |
595 | omap_hwmod_init_postsetup(); | 601 | omap_hwmod_init_postsetup(); |
596 | omap4xxx_clk_init(); | 602 | omap_clk_init = omap4xxx_clk_init; |
597 | } | 603 | } |
598 | 604 | ||
599 | void __init omap4430_init_late(void) | 605 | void __init omap4430_init_late(void) |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c2c798c08c2b..a202a4785104 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -1368,7 +1368,9 @@ static void _enable_sysc(struct omap_hwmod *oh) | |||
1368 | } | 1368 | } |
1369 | 1369 | ||
1370 | if (sf & SYSC_HAS_MIDLEMODE) { | 1370 | if (sf & SYSC_HAS_MIDLEMODE) { |
1371 | if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | 1371 | if (oh->flags & HWMOD_FORCE_MSTANDBY) { |
1372 | idlemode = HWMOD_IDLEMODE_FORCE; | ||
1373 | } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | ||
1372 | idlemode = HWMOD_IDLEMODE_NO; | 1374 | idlemode = HWMOD_IDLEMODE_NO; |
1373 | } else { | 1375 | } else { |
1374 | if (sf & SYSC_HAS_ENAWAKEUP) | 1376 | if (sf & SYSC_HAS_ENAWAKEUP) |
@@ -1440,7 +1442,8 @@ static void _idle_sysc(struct omap_hwmod *oh) | |||
1440 | } | 1442 | } |
1441 | 1443 | ||
1442 | if (sf & SYSC_HAS_MIDLEMODE) { | 1444 | if (sf & SYSC_HAS_MIDLEMODE) { |
1443 | if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | 1445 | if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || |
1446 | (oh->flags & HWMOD_FORCE_MSTANDBY)) { | ||
1444 | idlemode = HWMOD_IDLEMODE_FORCE; | 1447 | idlemode = HWMOD_IDLEMODE_FORCE; |
1445 | } else { | 1448 | } else { |
1446 | if (sf & SYSC_HAS_ENAWAKEUP) | 1449 | if (sf & SYSC_HAS_ENAWAKEUP) |
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index d43d9b608eda..d5dc935f6060 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h | |||
@@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm { | |||
427 | * | 427 | * |
428 | * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out | 428 | * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out |
429 | * of idle, rather than relying on module smart-idle | 429 | * of idle, rather than relying on module smart-idle |
430 | * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out | 430 | * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and |
431 | * of standby, rather than relying on module smart-standby | 431 | * out of standby, rather than relying on module smart-standby |
432 | * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for | 432 | * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for |
433 | * SDRAM controller, etc. XXX probably belongs outside the main hwmod file | 433 | * SDRAM controller, etc. XXX probably belongs outside the main hwmod file |
434 | * XXX Should be HWMOD_SETUP_NO_RESET | 434 | * XXX Should be HWMOD_SETUP_NO_RESET |
@@ -459,6 +459,10 @@ struct omap_hwmod_omap4_prcm { | |||
459 | * correctly, or this is being abused to deal with some PM latency | 459 | * correctly, or this is being abused to deal with some PM latency |
460 | * issues -- but we're currently suffering from a shortage of | 460 | * issues -- but we're currently suffering from a shortage of |
461 | * folks who are able to track these issues down properly. | 461 | * folks who are able to track these issues down properly. |
462 | * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device | ||
463 | * is kept in force-standby mode. Failing to do so causes PM problems | ||
464 | * with musb on OMAP3630 at least. Note that musb has a dedicated register | ||
465 | * to control MSTANDBY signal when MIDLEMODE is set to force-standby. | ||
462 | */ | 466 | */ |
463 | #define HWMOD_SWSUP_SIDLE (1 << 0) | 467 | #define HWMOD_SWSUP_SIDLE (1 << 0) |
464 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) | 468 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) |
@@ -471,6 +475,7 @@ struct omap_hwmod_omap4_prcm { | |||
471 | #define HWMOD_16BIT_REG (1 << 8) | 475 | #define HWMOD_16BIT_REG (1 << 8) |
472 | #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) | 476 | #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) |
473 | #define HWMOD_BLOCK_WFI (1 << 10) | 477 | #define HWMOD_BLOCK_WFI (1 << 10) |
478 | #define HWMOD_FORCE_MSTANDBY (1 << 11) | ||
474 | 479 | ||
475 | /* | 480 | /* |
476 | * omap_hwmod._int_flags definitions | 481 | * omap_hwmod._int_flags definitions |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ac7e03ec952f..5112d04e7b79 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1707,9 +1707,14 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { | |||
1707 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially | 1707 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially |
1708 | * broken when autoidle is enabled | 1708 | * broken when autoidle is enabled |
1709 | * workaround is to disable the autoidle bit at module level. | 1709 | * workaround is to disable the autoidle bit at module level. |
1710 | * | ||
1711 | * Enabling the device in any other MIDLEMODE setting but force-idle | ||
1712 | * causes core_pwrdm not enter idle states at least on OMAP3630. | ||
1713 | * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY | ||
1714 | * signal when MIDLEMODE is set to force-idle. | ||
1710 | */ | 1715 | */ |
1711 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | 1716 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
1712 | | HWMOD_SWSUP_MSTANDBY, | 1717 | | HWMOD_FORCE_MSTANDBY, |
1713 | }; | 1718 | }; |
1714 | 1719 | ||
1715 | /* usb_otg_hs */ | 1720 | /* usb_otg_hs */ |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 0e47d2e1687c..9e0576569e07 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -2714,6 +2714,10 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = { | |||
2714 | { } | 2714 | { } |
2715 | }; | 2715 | }; |
2716 | 2716 | ||
2717 | static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = { | ||
2718 | { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" }, | ||
2719 | }; | ||
2720 | |||
2717 | /* ocp2scp_usb_phy */ | 2721 | /* ocp2scp_usb_phy */ |
2718 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | 2722 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { |
2719 | .name = "ocp2scp_usb_phy", | 2723 | .name = "ocp2scp_usb_phy", |
@@ -2728,6 +2732,8 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | |||
2728 | }, | 2732 | }, |
2729 | }, | 2733 | }, |
2730 | .dev_attr = ocp2scp_dev_attr, | 2734 | .dev_attr = ocp2scp_dev_attr, |
2735 | .opt_clks = ocp2scp_usb_phy_opt_clks, | ||
2736 | .opt_clks_cnt = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks), | ||
2731 | }; | 2737 | }; |
2732 | 2738 | ||
2733 | /* | 2739 | /* |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2bdd4cf17a8f..f62b509ed08d 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -547,6 +547,8 @@ static inline void __init realtime_counter_init(void) | |||
547 | clksrc_nr, clksrc_src) \ | 547 | clksrc_nr, clksrc_src) \ |
548 | void __init omap##name##_gptimer_timer_init(void) \ | 548 | void __init omap##name##_gptimer_timer_init(void) \ |
549 | { \ | 549 | { \ |
550 | if (omap_clk_init) \ | ||
551 | omap_clk_init(); \ | ||
550 | omap_dmtimer_init(); \ | 552 | omap_dmtimer_init(); \ |
551 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ | 553 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ |
552 | omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \ | 554 | omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \ |
@@ -556,6 +558,8 @@ void __init omap##name##_gptimer_timer_init(void) \ | |||
556 | clksrc_nr, clksrc_src) \ | 558 | clksrc_nr, clksrc_src) \ |
557 | void __init omap##name##_sync32k_timer_init(void) \ | 559 | void __init omap##name##_sync32k_timer_init(void) \ |
558 | { \ | 560 | { \ |
561 | if (omap_clk_init) \ | ||
562 | omap_clk_init(); \ | ||
559 | omap_dmtimer_init(); \ | 563 | omap_dmtimer_init(); \ |
560 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ | 564 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ |
561 | /* Enable the use of clocksource="gp_timer" kernel parameter */ \ | 565 | /* Enable the use of clocksource="gp_timer" kernel parameter */ \ |
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 051b62c27102..7f2cb6c5e2c1 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c | |||
@@ -81,7 +81,6 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { | |||
81 | #endif | 81 | #endif |
82 | 82 | ||
83 | struct mmci_platform_data mop500_sdi0_data = { | 83 | struct mmci_platform_data mop500_sdi0_data = { |
84 | .ios_handler = mop500_sdi0_ios_handler, | ||
85 | .ocr_mask = MMC_VDD_29_30, | 84 | .ocr_mask = MMC_VDD_29_30, |
86 | .f_max = 50000000, | 85 | .f_max = 50000000, |
87 | .capabilities = MMC_CAP_4_BIT_DATA | | 86 | .capabilities = MMC_CAP_4_BIT_DATA | |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index b03457881c4b..87d2d7b38ce9 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/clk.h> | ||
15 | #include <linux/io.h> | 16 | #include <linux/io.h> |
16 | #include <linux/i2c.h> | 17 | #include <linux/i2c.h> |
17 | #include <linux/platform_data/i2c-nomadik.h> | 18 | #include <linux/platform_data/i2c-nomadik.h> |
@@ -439,6 +440,15 @@ static void mop500_prox_deactivate(struct device *dev) | |||
439 | regulator_put(prox_regulator); | 440 | regulator_put(prox_regulator); |
440 | } | 441 | } |
441 | 442 | ||
443 | void mop500_snowball_ethernet_clock_enable(void) | ||
444 | { | ||
445 | struct clk *clk; | ||
446 | |||
447 | clk = clk_get_sys("fsmc", NULL); | ||
448 | if (!IS_ERR(clk)) | ||
449 | clk_prepare_enable(clk); | ||
450 | } | ||
451 | |||
442 | static struct cryp_platform_data u8500_cryp1_platform_data = { | 452 | static struct cryp_platform_data u8500_cryp1_platform_data = { |
443 | .mem_to_engine = { | 453 | .mem_to_engine = { |
444 | .dir = STEDMA40_MEM_TO_PERIPH, | 454 | .dir = STEDMA40_MEM_TO_PERIPH, |
@@ -683,6 +693,8 @@ static void __init snowball_init_machine(void) | |||
683 | mop500_audio_init(parent); | 693 | mop500_audio_init(parent); |
684 | mop500_uart_init(parent); | 694 | mop500_uart_init(parent); |
685 | 695 | ||
696 | mop500_snowball_ethernet_clock_enable(); | ||
697 | |||
686 | /* This board has full regulator constraints */ | 698 | /* This board has full regulator constraints */ |
687 | regulator_has_full_constraints(); | 699 | regulator_has_full_constraints(); |
688 | } | 700 | } |
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index eaa605f5d90d..d38951be70df 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h | |||
@@ -104,6 +104,7 @@ void __init mop500_pinmaps_init(void); | |||
104 | void __init snowball_pinmaps_init(void); | 104 | void __init snowball_pinmaps_init(void); |
105 | void __init hrefv60_pinmaps_init(void); | 105 | void __init hrefv60_pinmaps_init(void); |
106 | void mop500_audio_init(struct device *parent); | 106 | void mop500_audio_init(struct device *parent); |
107 | void mop500_snowball_ethernet_clock_enable(void); | ||
107 | 108 | ||
108 | int __init mop500_uib_init(void); | 109 | int __init mop500_uib_init(void); |
109 | void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info, | 110 | void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info, |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 19235cf7bbe3..f1a581844372 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -312,9 +312,10 @@ static void __init u8500_init_machine(void) | |||
312 | /* Pinmaps must be in place before devices register */ | 312 | /* Pinmaps must be in place before devices register */ |
313 | if (of_machine_is_compatible("st-ericsson,mop500")) | 313 | if (of_machine_is_compatible("st-ericsson,mop500")) |
314 | mop500_pinmaps_init(); | 314 | mop500_pinmaps_init(); |
315 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) | 315 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) { |
316 | snowball_pinmaps_init(); | 316 | snowball_pinmaps_init(); |
317 | else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | 317 | mop500_snowball_ethernet_clock_enable(); |
318 | } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | ||
318 | hrefv60_pinmaps_init(); | 319 | hrefv60_pinmaps_init(); |
319 | else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} | 320 | else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} |
320 | /* TODO: Add pinmaps for ccu9540 board. */ | 321 | /* TODO: Add pinmaps for ccu9540 board. */ |