diff options
author | Ingo Molnar <mingo@elte.hu> | 2010-12-07 01:49:48 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-12-07 01:49:51 -0500 |
commit | 10a18d7dc0d9f12483c95ffc234118e9b80edfeb (patch) | |
tree | 0f43620107d5231cab669bca4b3c923b721330c7 /arch | |
parent | f984ba4eb575e4a27ed28a76d4126d2aa9233c32 (diff) | |
parent | cf7d7e5a1980d1116ee152d25dac382b112b9c17 (diff) |
Merge commit 'v2.6.37-rc5' into perf/core
Merge reason: Pick up the latest -rc.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
141 files changed, 5968 insertions, 2155 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db524e75c4a2..f1d9297b1050 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -9,7 +9,7 @@ config ARM | |||
9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) | 9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) | 10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
11 | select HAVE_ARCH_KGDB | 11 | select HAVE_ARCH_KGDB |
12 | select HAVE_KPROBES if (!XIP_KERNEL) | 12 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
13 | select HAVE_KRETPROBES if (HAVE_KPROBES) | 13 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) | 14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) | 15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 4a590f4113e2..4d26f2c52a75 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile | |||
@@ -70,12 +70,7 @@ else | |||
70 | $(obj)/uImage: LOADADDR=$(ZRELADDR) | 70 | $(obj)/uImage: LOADADDR=$(ZRELADDR) |
71 | endif | 71 | endif |
72 | 72 | ||
73 | ifeq ($(CONFIG_THUMB2_KERNEL),y) | ||
74 | # Set bit 0 to 1 so that "mov pc, rx" switches to Thumb-2 mode | ||
75 | $(obj)/uImage: STARTADDR=$(shell echo $(LOADADDR) | sed -e "s/.$$/1/") | ||
76 | else | ||
77 | $(obj)/uImage: STARTADDR=$(LOADADDR) | 73 | $(obj)/uImage: STARTADDR=$(LOADADDR) |
78 | endif | ||
79 | 74 | ||
80 | $(obj)/uImage: $(obj)/zImage FORCE | 75 | $(obj)/uImage: $(obj)/zImage FORCE |
81 | $(call if_changed,uimage) | 76 | $(call if_changed,uimage) |
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S index 8b0de41c3dcb..78b508075161 100644 --- a/arch/arm/boot/bootp/init.S +++ b/arch/arm/boot/bootp/init.S | |||
@@ -73,6 +73,8 @@ move: ldmia r4!, {r7 - r10} @ move 32-bytes at a time | |||
73 | 73 | ||
74 | .size _start, . - _start | 74 | .size _start, . - _start |
75 | 75 | ||
76 | .align | ||
77 | |||
76 | .type data,#object | 78 | .type data,#object |
77 | data: .word initrd_start @ source initrd address | 79 | data: .word initrd_start @ source initrd address |
78 | .word initrd_phys @ destination initrd address | 80 | .word initrd_phys @ destination initrd address |
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 6825c34646d4..7193884ed8b0 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -125,9 +125,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 | |||
125 | * sort out different calling conventions | 125 | * sort out different calling conventions |
126 | */ | 126 | */ |
127 | .align | 127 | .align |
128 | .arm @ Always enter in ARM state | ||
128 | start: | 129 | start: |
129 | .type start,#function | 130 | .type start,#function |
130 | .rept 8 | 131 | THUMB( adr r12, BSYM(1f) ) |
132 | THUMB( bx r12 ) | ||
133 | THUMB( .rept 6 ) | ||
134 | ARM( .rept 8 ) | ||
131 | mov r0, r0 | 135 | mov r0, r0 |
132 | .endr | 136 | .endr |
133 | 137 | ||
@@ -135,6 +139,7 @@ start: | |||
135 | .word 0x016f2818 @ Magic numbers to help the loader | 139 | .word 0x016f2818 @ Magic numbers to help the loader |
136 | .word start @ absolute load/run zImage address | 140 | .word start @ absolute load/run zImage address |
137 | .word _edata @ zImage end address | 141 | .word _edata @ zImage end address |
142 | THUMB( .thumb ) | ||
138 | 1: mov r7, r1 @ save architecture ID | 143 | 1: mov r7, r1 @ save architecture ID |
139 | mov r8, r2 @ save atags pointer | 144 | mov r8, r2 @ save atags pointer |
140 | 145 | ||
@@ -174,7 +179,8 @@ not_angel: | |||
174 | ldr sp, [r0, #28] | 179 | ldr sp, [r0, #28] |
175 | #ifdef CONFIG_AUTO_ZRELADDR | 180 | #ifdef CONFIG_AUTO_ZRELADDR |
176 | @ determine final kernel image address | 181 | @ determine final kernel image address |
177 | and r4, pc, #0xf8000000 | 182 | mov r4, pc |
183 | and r4, r4, #0xf8000000 | ||
178 | add r4, r4, #TEXT_OFFSET | 184 | add r4, r4, #TEXT_OFFSET |
179 | #else | 185 | #else |
180 | ldr r4, =zreladdr | 186 | ldr r4, =zreladdr |
@@ -445,7 +451,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size | |||
445 | */ | 451 | */ |
446 | mov r1, #0x1e | 452 | mov r1, #0x1e |
447 | orr r1, r1, #3 << 10 | 453 | orr r1, r1, #3 << 10 |
448 | mov r2, pc, lsr #20 | 454 | mov r2, pc |
455 | mov r2, r2, lsr #20 | ||
449 | orr r1, r1, r2, lsl #20 | 456 | orr r1, r1, r2, lsl #20 |
450 | add r0, r3, r2, lsl #2 | 457 | add r0, r3, r2, lsl #2 |
451 | str r1, [r0], #4 | 458 | str r1, [r0], #4 |
@@ -1084,6 +1091,6 @@ memdump: mov r12, r0 | |||
1084 | reloc_end: | 1091 | reloc_end: |
1085 | 1092 | ||
1086 | .align | 1093 | .align |
1087 | .section ".stack", "w" | 1094 | .section ".stack", "aw", %nobits |
1088 | user_stack: .space 4096 | 1095 | user_stack: .space 4096 |
1089 | user_stack_end: | 1096 | user_stack_end: |
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in index d08168941bd6..366a924019ac 100644 --- a/arch/arm/boot/compressed/vmlinux.lds.in +++ b/arch/arm/boot/compressed/vmlinux.lds.in | |||
@@ -57,7 +57,7 @@ SECTIONS | |||
57 | .bss : { *(.bss) } | 57 | .bss : { *(.bss) } |
58 | _end = .; | 58 | _end = .; |
59 | 59 | ||
60 | .stack (NOLOAD) : { *(.stack) } | 60 | .stack : { *(.stack) } |
61 | 61 | ||
62 | .stab 0 : { *(.stab) } | 62 | .stab 0 : { *(.stab) } |
63 | .stabstr 0 : { *(.stabstr) } | 63 | .stabstr 0 : { *(.stabstr) } |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 772f95f1aecd..e6388dcd8cfa 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) | |||
146 | unsigned int shift = (irq % 4) * 8; | 146 | unsigned int shift = (irq % 4) * 8; |
147 | unsigned int cpu = cpumask_first(mask_val); | 147 | unsigned int cpu = cpumask_first(mask_val); |
148 | u32 val; | 148 | u32 val; |
149 | struct irq_desc *desc; | ||
149 | 150 | ||
150 | spin_lock(&irq_controller_lock); | 151 | spin_lock(&irq_controller_lock); |
151 | irq_desc[irq].node = cpu; | 152 | desc = irq_to_desc(irq); |
153 | if (desc == NULL) { | ||
154 | spin_unlock(&irq_controller_lock); | ||
155 | return -EINVAL; | ||
156 | } | ||
157 | desc->node = cpu; | ||
152 | val = readl(reg) & ~(0xff << shift); | 158 | val = readl(reg) & ~(0xff << shift); |
153 | val |= 1 << (cpu + shift); | 159 | val |= 1 << (cpu + shift); |
154 | writel(val, reg); | 160 | writel(val, reg); |
@@ -210,7 +216,7 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) | |||
210 | void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, | 216 | void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, |
211 | unsigned int irq_start) | 217 | unsigned int irq_start) |
212 | { | 218 | { |
213 | unsigned int max_irq, i; | 219 | unsigned int gic_irqs, irq_limit, i; |
214 | u32 cpumask = 1 << smp_processor_id(); | 220 | u32 cpumask = 1 << smp_processor_id(); |
215 | 221 | ||
216 | if (gic_nr >= MAX_GIC_NR) | 222 | if (gic_nr >= MAX_GIC_NR) |
@@ -226,47 +232,49 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, | |||
226 | 232 | ||
227 | /* | 233 | /* |
228 | * Find out how many interrupts are supported. | 234 | * Find out how many interrupts are supported. |
229 | */ | ||
230 | max_irq = readl(base + GIC_DIST_CTR) & 0x1f; | ||
231 | max_irq = (max_irq + 1) * 32; | ||
232 | |||
233 | /* | ||
234 | * The GIC only supports up to 1020 interrupt sources. | 235 | * The GIC only supports up to 1020 interrupt sources. |
235 | * Limit this to either the architected maximum, or the | ||
236 | * platform maximum. | ||
237 | */ | 236 | */ |
238 | if (max_irq > max(1020, NR_IRQS)) | 237 | gic_irqs = readl(base + GIC_DIST_CTR) & 0x1f; |
239 | max_irq = max(1020, NR_IRQS); | 238 | gic_irqs = (gic_irqs + 1) * 32; |
239 | if (gic_irqs > 1020) | ||
240 | gic_irqs = 1020; | ||
240 | 241 | ||
241 | /* | 242 | /* |
242 | * Set all global interrupts to be level triggered, active low. | 243 | * Set all global interrupts to be level triggered, active low. |
243 | */ | 244 | */ |
244 | for (i = 32; i < max_irq; i += 16) | 245 | for (i = 32; i < gic_irqs; i += 16) |
245 | writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); | 246 | writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); |
246 | 247 | ||
247 | /* | 248 | /* |
248 | * Set all global interrupts to this CPU only. | 249 | * Set all global interrupts to this CPU only. |
249 | */ | 250 | */ |
250 | for (i = 32; i < max_irq; i += 4) | 251 | for (i = 32; i < gic_irqs; i += 4) |
251 | writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); | 252 | writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); |
252 | 253 | ||
253 | /* | 254 | /* |
254 | * Set priority on all global interrupts. | 255 | * Set priority on all global interrupts. |
255 | */ | 256 | */ |
256 | for (i = 32; i < max_irq; i += 4) | 257 | for (i = 32; i < gic_irqs; i += 4) |
257 | writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); | 258 | writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); |
258 | 259 | ||
259 | /* | 260 | /* |
260 | * Disable all interrupts. Leave the PPI and SGIs alone | 261 | * Disable all interrupts. Leave the PPI and SGIs alone |
261 | * as these enables are banked registers. | 262 | * as these enables are banked registers. |
262 | */ | 263 | */ |
263 | for (i = 32; i < max_irq; i += 32) | 264 | for (i = 32; i < gic_irqs; i += 32) |
264 | writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); | 265 | writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); |
265 | 266 | ||
266 | /* | 267 | /* |
268 | * Limit number of interrupts registered to the platform maximum | ||
269 | */ | ||
270 | irq_limit = gic_data[gic_nr].irq_offset + gic_irqs; | ||
271 | if (WARN_ON(irq_limit > NR_IRQS)) | ||
272 | irq_limit = NR_IRQS; | ||
273 | |||
274 | /* | ||
267 | * Setup the Linux IRQ subsystem. | 275 | * Setup the Linux IRQ subsystem. |
268 | */ | 276 | */ |
269 | for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) { | 277 | for (i = irq_start; i < irq_limit; i++) { |
270 | set_irq_chip(i, &gic_chip); | 278 | set_irq_chip(i, &gic_chip); |
271 | set_irq_chip_data(i, &gic_data[gic_nr]); | 279 | set_irq_chip_data(i, &gic_data[gic_nr]); |
272 | set_irq_handler(i, handle_level_irq); | 280 | set_irq_handler(i, handle_level_irq); |
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig new file mode 100644 index 000000000000..38cb7c985426 --- /dev/null +++ b/arch/arm/configs/at91rm9200_defconfig | |||
@@ -0,0 +1,341 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_IKCONFIG=y | ||
6 | CONFIG_IKCONFIG_PROC=y | ||
7 | CONFIG_LOG_BUF_SHIFT=14 | ||
8 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_MODULES=y | ||
11 | CONFIG_MODULE_FORCE_LOAD=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | CONFIG_MODVERSIONS=y | ||
14 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
15 | # CONFIG_BLK_DEV_BSG is not set | ||
16 | # CONFIG_IOSCHED_CFQ is not set | ||
17 | CONFIG_ARCH_AT91=y | ||
18 | CONFIG_MACH_ONEARM=y | ||
19 | CONFIG_ARCH_AT91RM9200DK=y | ||
20 | CONFIG_MACH_AT91RM9200EK=y | ||
21 | CONFIG_MACH_CSB337=y | ||
22 | CONFIG_MACH_CSB637=y | ||
23 | CONFIG_MACH_CARMEVA=y | ||
24 | CONFIG_MACH_ATEB9200=y | ||
25 | CONFIG_MACH_KB9200=y | ||
26 | CONFIG_MACH_PICOTUX2XX=y | ||
27 | CONFIG_MACH_KAFA=y | ||
28 | CONFIG_MACH_ECBAT91=y | ||
29 | CONFIG_MACH_YL9200=y | ||
30 | CONFIG_MACH_CPUAT91=y | ||
31 | CONFIG_MACH_ECO920=y | ||
32 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | ||
33 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
34 | CONFIG_AT91_TIMER_HZ=100 | ||
35 | # CONFIG_ARM_THUMB is not set | ||
36 | CONFIG_PCCARD=y | ||
37 | CONFIG_AT91_CF=y | ||
38 | CONFIG_NO_HZ=y | ||
39 | CONFIG_HIGH_RES_TIMERS=y | ||
40 | CONFIG_PREEMPT=y | ||
41 | CONFIG_AEABI=y | ||
42 | CONFIG_LEDS=y | ||
43 | CONFIG_LEDS_CPU=y | ||
44 | CONFIG_ZBOOT_ROM_TEXT=0x10000000 | ||
45 | CONFIG_ZBOOT_ROM_BSS=0x20040000 | ||
46 | CONFIG_KEXEC=y | ||
47 | CONFIG_FPE_NWFPE=y | ||
48 | CONFIG_BINFMT_MISC=y | ||
49 | CONFIG_NET=y | ||
50 | CONFIG_PACKET=y | ||
51 | CONFIG_UNIX=y | ||
52 | CONFIG_XFRM_USER=m | ||
53 | CONFIG_INET=y | ||
54 | CONFIG_IP_MULTICAST=y | ||
55 | CONFIG_IP_PNP=y | ||
56 | CONFIG_IP_PNP_DHCP=y | ||
57 | CONFIG_IP_PNP_BOOTP=y | ||
58 | CONFIG_NET_IPIP=m | ||
59 | CONFIG_NET_IPGRE=m | ||
60 | CONFIG_INET_AH=m | ||
61 | CONFIG_INET_ESP=m | ||
62 | CONFIG_INET_IPCOMP=m | ||
63 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
64 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
65 | CONFIG_INET_XFRM_MODE_BEET=m | ||
66 | CONFIG_IPV6_PRIVACY=y | ||
67 | CONFIG_IPV6_ROUTER_PREF=y | ||
68 | CONFIG_IPV6_ROUTE_INFO=y | ||
69 | CONFIG_INET6_AH=m | ||
70 | CONFIG_INET6_ESP=m | ||
71 | CONFIG_INET6_IPCOMP=m | ||
72 | CONFIG_IPV6_MIP6=m | ||
73 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
74 | CONFIG_IPV6_TUNNEL=m | ||
75 | CONFIG_BRIDGE=m | ||
76 | CONFIG_VLAN_8021Q=m | ||
77 | CONFIG_BT=m | ||
78 | CONFIG_BT_L2CAP=m | ||
79 | CONFIG_BT_SCO=m | ||
80 | CONFIG_BT_RFCOMM=m | ||
81 | CONFIG_BT_RFCOMM_TTY=y | ||
82 | CONFIG_BT_BNEP=m | ||
83 | CONFIG_BT_BNEP_MC_FILTER=y | ||
84 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
85 | CONFIG_BT_HIDP=m | ||
86 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
87 | CONFIG_MTD=y | ||
88 | CONFIG_MTD_CONCAT=y | ||
89 | CONFIG_MTD_PARTITIONS=y | ||
90 | CONFIG_MTD_CMDLINE_PARTS=y | ||
91 | CONFIG_MTD_AFS_PARTS=y | ||
92 | CONFIG_MTD_CHAR=y | ||
93 | CONFIG_MTD_BLOCK=y | ||
94 | CONFIG_MTD_CFI=y | ||
95 | CONFIG_MTD_JEDECPROBE=y | ||
96 | CONFIG_MTD_CFI_INTELEXT=y | ||
97 | CONFIG_MTD_CFI_AMDSTD=y | ||
98 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
99 | CONFIG_MTD_PHYSMAP=y | ||
100 | CONFIG_MTD_PLATRAM=y | ||
101 | CONFIG_MTD_DATAFLASH=y | ||
102 | CONFIG_MTD_NAND=y | ||
103 | CONFIG_MTD_NAND_ATMEL=y | ||
104 | CONFIG_MTD_NAND_PLATFORM=y | ||
105 | CONFIG_MTD_UBI=y | ||
106 | CONFIG_MTD_UBI_GLUEBI=y | ||
107 | CONFIG_BLK_DEV_LOOP=y | ||
108 | CONFIG_BLK_DEV_NBD=y | ||
109 | CONFIG_BLK_DEV_RAM=y | ||
110 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
111 | CONFIG_ATMEL_TCLIB=y | ||
112 | CONFIG_EEPROM_LEGACY=m | ||
113 | CONFIG_SCSI=y | ||
114 | CONFIG_BLK_DEV_SD=y | ||
115 | CONFIG_BLK_DEV_SR=m | ||
116 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
117 | CONFIG_CHR_DEV_SG=m | ||
118 | CONFIG_SCSI_MULTI_LUN=y | ||
119 | # CONFIG_SCSI_LOWLEVEL is not set | ||
120 | CONFIG_NETDEVICES=y | ||
121 | CONFIG_TUN=m | ||
122 | CONFIG_PHYLIB=y | ||
123 | CONFIG_DAVICOM_PHY=y | ||
124 | CONFIG_SMSC_PHY=y | ||
125 | CONFIG_MICREL_PHY=y | ||
126 | CONFIG_NET_ETHERNET=y | ||
127 | CONFIG_ARM_AT91_ETHER=y | ||
128 | # CONFIG_NETDEV_1000 is not set | ||
129 | # CONFIG_NETDEV_10000 is not set | ||
130 | CONFIG_USB_CATC=m | ||
131 | CONFIG_USB_KAWETH=m | ||
132 | CONFIG_USB_PEGASUS=m | ||
133 | CONFIG_USB_RTL8150=m | ||
134 | CONFIG_USB_USBNET=m | ||
135 | CONFIG_USB_NET_DM9601=m | ||
136 | CONFIG_USB_NET_GL620A=m | ||
137 | CONFIG_USB_NET_PLUSB=m | ||
138 | CONFIG_USB_NET_RNDIS_HOST=m | ||
139 | CONFIG_USB_ALI_M5632=y | ||
140 | CONFIG_USB_AN2720=y | ||
141 | CONFIG_USB_EPSON2888=y | ||
142 | CONFIG_PPP=y | ||
143 | CONFIG_PPP_MULTILINK=y | ||
144 | CONFIG_PPP_FILTER=y | ||
145 | CONFIG_PPP_ASYNC=y | ||
146 | CONFIG_PPP_DEFLATE=y | ||
147 | CONFIG_PPP_BSDCOMP=y | ||
148 | CONFIG_PPP_MPPE=m | ||
149 | CONFIG_PPPOE=m | ||
150 | CONFIG_SLIP=m | ||
151 | CONFIG_SLIP_COMPRESSED=y | ||
152 | CONFIG_SLIP_SMART=y | ||
153 | CONFIG_SLIP_MODE_SLIP6=y | ||
154 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
155 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
156 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
157 | CONFIG_INPUT_EVDEV=y | ||
158 | CONFIG_KEYBOARD_GPIO=y | ||
159 | # CONFIG_INPUT_MOUSE is not set | ||
160 | CONFIG_INPUT_TOUCHSCREEN=y | ||
161 | CONFIG_SERIAL_ATMEL=y | ||
162 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
163 | CONFIG_LEGACY_PTY_COUNT=32 | ||
164 | CONFIG_HW_RANDOM=y | ||
165 | CONFIG_I2C=y | ||
166 | CONFIG_I2C_CHARDEV=y | ||
167 | CONFIG_I2C_GPIO=y | ||
168 | CONFIG_SPI=y | ||
169 | CONFIG_SPI_ATMEL=y | ||
170 | CONFIG_SPI_BITBANG=y | ||
171 | CONFIG_GPIO_SYSFS=y | ||
172 | CONFIG_HWMON=m | ||
173 | CONFIG_SENSORS_ADM1021=m | ||
174 | CONFIG_SENSORS_ADM1025=m | ||
175 | CONFIG_SENSORS_ADM1026=m | ||
176 | CONFIG_SENSORS_ADM1029=m | ||
177 | CONFIG_SENSORS_ADM1031=m | ||
178 | CONFIG_SENSORS_ADM9240=m | ||
179 | CONFIG_SENSORS_DS1621=m | ||
180 | CONFIG_SENSORS_GL518SM=m | ||
181 | CONFIG_SENSORS_GL520SM=m | ||
182 | CONFIG_SENSORS_IT87=m | ||
183 | CONFIG_SENSORS_LM63=m | ||
184 | CONFIG_SENSORS_LM73=m | ||
185 | CONFIG_SENSORS_LM75=m | ||
186 | CONFIG_SENSORS_LM77=m | ||
187 | CONFIG_SENSORS_LM78=m | ||
188 | CONFIG_SENSORS_LM80=m | ||
189 | CONFIG_SENSORS_LM83=m | ||
190 | CONFIG_SENSORS_LM85=m | ||
191 | CONFIG_SENSORS_LM87=m | ||
192 | CONFIG_SENSORS_LM90=m | ||
193 | CONFIG_SENSORS_LM92=m | ||
194 | CONFIG_SENSORS_MAX1619=m | ||
195 | CONFIG_SENSORS_PCF8591=m | ||
196 | CONFIG_SENSORS_SMSC47B397=m | ||
197 | CONFIG_SENSORS_W83781D=m | ||
198 | CONFIG_SENSORS_W83791D=m | ||
199 | CONFIG_SENSORS_W83792D=m | ||
200 | CONFIG_SENSORS_W83793=m | ||
201 | CONFIG_SENSORS_W83L785TS=m | ||
202 | CONFIG_WATCHDOG=y | ||
203 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
204 | CONFIG_AT91RM9200_WATCHDOG=y | ||
205 | CONFIG_FB=y | ||
206 | CONFIG_FB_MODE_HELPERS=y | ||
207 | CONFIG_FB_TILEBLITTING=y | ||
208 | CONFIG_FB_S1D13XXX=y | ||
209 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
210 | CONFIG_LCD_CLASS_DEVICE=y | ||
211 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
212 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
213 | CONFIG_DISPLAY_SUPPORT=y | ||
214 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
215 | CONFIG_FONTS=y | ||
216 | CONFIG_FONT_MINI_4x6=y | ||
217 | CONFIG_LOGO=y | ||
218 | # CONFIG_LOGO_LINUX_MONO is not set | ||
219 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
220 | CONFIG_USB=y | ||
221 | CONFIG_USB_DEVICEFS=y | ||
222 | # CONFIG_USB_DEVICE_CLASS is not set | ||
223 | CONFIG_USB_MON=y | ||
224 | CONFIG_USB_OHCI_HCD=y | ||
225 | CONFIG_USB_ACM=m | ||
226 | CONFIG_USB_PRINTER=m | ||
227 | CONFIG_USB_STORAGE=y | ||
228 | CONFIG_USB_SERIAL=y | ||
229 | CONFIG_USB_SERIAL_CONSOLE=y | ||
230 | CONFIG_USB_SERIAL_GENERIC=y | ||
231 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
232 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
233 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
234 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
235 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
236 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
237 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
238 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
239 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
240 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
241 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
242 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
243 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
244 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
245 | CONFIG_USB_SERIAL_MCT_U232=y | ||
246 | CONFIG_USB_SERIAL_PL2303=y | ||
247 | CONFIG_USB_GADGET=y | ||
248 | CONFIG_USB_ETH=m | ||
249 | CONFIG_USB_MASS_STORAGE=m | ||
250 | CONFIG_MMC=y | ||
251 | CONFIG_MMC_AT91=y | ||
252 | CONFIG_NEW_LEDS=y | ||
253 | CONFIG_LEDS_CLASS=y | ||
254 | CONFIG_LEDS_GPIO=y | ||
255 | CONFIG_LEDS_TRIGGERS=y | ||
256 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
257 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
258 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
259 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
260 | CONFIG_RTC_CLASS=y | ||
261 | # CONFIG_RTC_HCTOSYS is not set | ||
262 | CONFIG_RTC_DRV_DS1307=y | ||
263 | CONFIG_RTC_DRV_PCF8563=y | ||
264 | CONFIG_RTC_DRV_AT91RM9200=y | ||
265 | CONFIG_EXT2_FS=y | ||
266 | CONFIG_EXT2_FS_XATTR=y | ||
267 | CONFIG_EXT3_FS=y | ||
268 | # CONFIG_EXT3_FS_XATTR is not set | ||
269 | CONFIG_REISERFS_FS=y | ||
270 | CONFIG_AUTOFS4_FS=y | ||
271 | CONFIG_ISO9660_FS=y | ||
272 | CONFIG_JOLIET=y | ||
273 | CONFIG_ZISOFS=y | ||
274 | CONFIG_UDF_FS=y | ||
275 | CONFIG_MSDOS_FS=y | ||
276 | CONFIG_VFAT_FS=y | ||
277 | CONFIG_NTFS_FS=m | ||
278 | CONFIG_TMPFS=y | ||
279 | CONFIG_CONFIGFS_FS=y | ||
280 | CONFIG_JFFS2_FS=y | ||
281 | CONFIG_JFFS2_SUMMARY=y | ||
282 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
283 | CONFIG_JFFS2_LZO=y | ||
284 | CONFIG_JFFS2_RUBIN=y | ||
285 | CONFIG_CRAMFS=y | ||
286 | CONFIG_MINIX_FS=y | ||
287 | CONFIG_NFS_FS=y | ||
288 | CONFIG_NFS_V3=y | ||
289 | CONFIG_NFS_V3_ACL=y | ||
290 | CONFIG_NFS_V4=y | ||
291 | CONFIG_ROOT_NFS=y | ||
292 | CONFIG_NFSD=y | ||
293 | CONFIG_SMB_FS=m | ||
294 | CONFIG_CIFS=m | ||
295 | CONFIG_PARTITION_ADVANCED=y | ||
296 | CONFIG_MAC_PARTITION=y | ||
297 | CONFIG_NLS_CODEPAGE_437=y | ||
298 | CONFIG_NLS_CODEPAGE_737=m | ||
299 | CONFIG_NLS_CODEPAGE_775=m | ||
300 | CONFIG_NLS_CODEPAGE_850=m | ||
301 | CONFIG_NLS_CODEPAGE_852=m | ||
302 | CONFIG_NLS_CODEPAGE_855=m | ||
303 | CONFIG_NLS_CODEPAGE_857=m | ||
304 | CONFIG_NLS_CODEPAGE_860=m | ||
305 | CONFIG_NLS_CODEPAGE_861=m | ||
306 | CONFIG_NLS_CODEPAGE_862=m | ||
307 | CONFIG_NLS_CODEPAGE_863=m | ||
308 | CONFIG_NLS_CODEPAGE_864=m | ||
309 | CONFIG_NLS_CODEPAGE_865=m | ||
310 | CONFIG_NLS_CODEPAGE_866=m | ||
311 | CONFIG_NLS_CODEPAGE_869=m | ||
312 | CONFIG_NLS_CODEPAGE_936=m | ||
313 | CONFIG_NLS_CODEPAGE_950=m | ||
314 | CONFIG_NLS_CODEPAGE_932=m | ||
315 | CONFIG_NLS_CODEPAGE_949=m | ||
316 | CONFIG_NLS_CODEPAGE_874=m | ||
317 | CONFIG_NLS_ISO8859_8=m | ||
318 | CONFIG_NLS_CODEPAGE_1250=m | ||
319 | CONFIG_NLS_CODEPAGE_1251=m | ||
320 | CONFIG_NLS_ASCII=m | ||
321 | CONFIG_NLS_ISO8859_1=y | ||
322 | CONFIG_NLS_ISO8859_2=m | ||
323 | CONFIG_NLS_ISO8859_3=m | ||
324 | CONFIG_NLS_ISO8859_4=m | ||
325 | CONFIG_NLS_ISO8859_5=m | ||
326 | CONFIG_NLS_ISO8859_6=m | ||
327 | CONFIG_NLS_ISO8859_7=m | ||
328 | CONFIG_NLS_ISO8859_9=m | ||
329 | CONFIG_NLS_ISO8859_13=m | ||
330 | CONFIG_NLS_ISO8859_14=m | ||
331 | CONFIG_NLS_ISO8859_15=m | ||
332 | CONFIG_NLS_KOI8_R=m | ||
333 | CONFIG_NLS_KOI8_U=m | ||
334 | CONFIG_NLS_UTF8=y | ||
335 | CONFIG_MAGIC_SYSRQ=y | ||
336 | CONFIG_DEBUG_FS=y | ||
337 | CONFIG_DEBUG_KERNEL=y | ||
338 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
339 | # CONFIG_FTRACE is not set | ||
340 | CONFIG_CRYPTO_PCBC=y | ||
341 | CONFIG_CRYPTO_SHA1=y | ||
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig deleted file mode 100644 index 4438e64f3bfb..000000000000 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_IOSCHED_DEADLINE is not set | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_ARCH_AT91RM9200DK=y | ||
12 | CONFIG_MACH_ECO920=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_PCCARD=y | ||
16 | CONFIG_AT91_CF=y | ||
17 | CONFIG_LEDS=y | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
20 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
21 | CONFIG_FPE_NWFPE=y | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | ||
28 | # CONFIG_IPV6 is not set | ||
29 | CONFIG_MTD=y | ||
30 | CONFIG_MTD_PARTITIONS=y | ||
31 | CONFIG_MTD_CMDLINE_PARTS=y | ||
32 | CONFIG_MTD_CHAR=y | ||
33 | CONFIG_MTD_BLOCK=y | ||
34 | CONFIG_MTD_CFI=y | ||
35 | CONFIG_MTD_JEDECPROBE=y | ||
36 | CONFIG_MTD_CFI_AMDSTD=y | ||
37 | CONFIG_MTD_PHYSMAP=y | ||
38 | CONFIG_BLK_DEV_RAM=y | ||
39 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_NET_ETHERNET=y | ||
42 | CONFIG_ARM_AT91_ETHER=y | ||
43 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
44 | # CONFIG_INPUT_KEYBOARD is not set | ||
45 | # CONFIG_INPUT_MOUSE is not set | ||
46 | # CONFIG_SERIO is not set | ||
47 | CONFIG_SERIAL_ATMEL=y | ||
48 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
49 | CONFIG_I2C=y | ||
50 | CONFIG_I2C_CHARDEV=y | ||
51 | CONFIG_I2C_GPIO=y | ||
52 | CONFIG_WATCHDOG=y | ||
53 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
54 | CONFIG_AT91RM9200_WATCHDOG=y | ||
55 | # CONFIG_VGA_CONSOLE is not set | ||
56 | # CONFIG_USB_HID is not set | ||
57 | CONFIG_USB=y | ||
58 | CONFIG_USB_DEBUG=y | ||
59 | CONFIG_USB_DEVICEFS=y | ||
60 | CONFIG_USB_MON=y | ||
61 | CONFIG_USB_OHCI_HCD=y | ||
62 | CONFIG_USB_GADGET=y | ||
63 | CONFIG_MMC=y | ||
64 | CONFIG_RTC_CLASS=y | ||
65 | CONFIG_RTC_DRV_AT91RM9200=y | ||
66 | CONFIG_EXT2_FS=y | ||
67 | CONFIG_INOTIFY=y | ||
68 | CONFIG_TMPFS=y | ||
69 | CONFIG_CRAMFS=y | ||
70 | CONFIG_DEBUG_KERNEL=y | ||
71 | CONFIG_DEBUG_USER=y | ||
72 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig deleted file mode 100644 index ccd517c64bc7..000000000000 --- a/arch/arm/configs/at91rm9200ek_defconfig +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_AT91RM9200EK=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_LEDS=y | ||
16 | CONFIG_LEDS_CPU=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | CONFIG_IP_PNP=y | ||
26 | CONFIG_IP_PNP_BOOTP=y | ||
27 | # CONFIG_IPV6 is not set | ||
28 | CONFIG_MTD=y | ||
29 | CONFIG_MTD_PARTITIONS=y | ||
30 | CONFIG_MTD_CMDLINE_PARTS=y | ||
31 | CONFIG_MTD_CHAR=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_MTD_CFI=y | ||
34 | CONFIG_MTD_JEDECPROBE=y | ||
35 | CONFIG_MTD_CFI_AMDSTD=y | ||
36 | CONFIG_MTD_PHYSMAP=y | ||
37 | CONFIG_BLK_DEV_RAM=y | ||
38 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
39 | CONFIG_NETDEVICES=y | ||
40 | CONFIG_NET_ETHERNET=y | ||
41 | CONFIG_ARM_AT91_ETHER=y | ||
42 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
43 | # CONFIG_INPUT_KEYBOARD is not set | ||
44 | # CONFIG_INPUT_MOUSE is not set | ||
45 | # CONFIG_SERIO is not set | ||
46 | CONFIG_SERIAL_ATMEL=y | ||
47 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
48 | CONFIG_I2C=y | ||
49 | CONFIG_I2C_CHARDEV=y | ||
50 | CONFIG_I2C_GPIO=y | ||
51 | CONFIG_WATCHDOG=y | ||
52 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
53 | CONFIG_AT91RM9200_WATCHDOG=y | ||
54 | CONFIG_FB=y | ||
55 | CONFIG_FB_S1D13XXX=y | ||
56 | # CONFIG_VGA_CONSOLE is not set | ||
57 | # CONFIG_USB_HID is not set | ||
58 | CONFIG_USB=y | ||
59 | CONFIG_USB_DEBUG=y | ||
60 | CONFIG_USB_DEVICEFS=y | ||
61 | CONFIG_USB_MON=y | ||
62 | CONFIG_USB_OHCI_HCD=y | ||
63 | CONFIG_USB_GADGET=y | ||
64 | CONFIG_MMC=y | ||
65 | CONFIG_RTC_CLASS=y | ||
66 | CONFIG_RTC_DRV_AT91RM9200=y | ||
67 | CONFIG_EXT2_FS=y | ||
68 | CONFIG_INOTIFY=y | ||
69 | CONFIG_TMPFS=y | ||
70 | CONFIG_CRAMFS=y | ||
71 | CONFIG_DEBUG_KERNEL=y | ||
72 | CONFIG_DEBUG_USER=y | ||
73 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig deleted file mode 100644 index 1b0e9a1689bb..000000000000 --- a/arch/arm/configs/ateb9200_defconfig +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | ||
4 | CONFIG_EMBEDDED=y | ||
5 | CONFIG_SLAB=y | ||
6 | CONFIG_PROFILING=y | ||
7 | CONFIG_OPROFILE=m | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_ATEB9200=y | ||
12 | CONFIG_PCCARD=m | ||
13 | CONFIG_AT91_CF=m | ||
14 | CONFIG_PREEMPT=y | ||
15 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
16 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
17 | CONFIG_FPE_NWFPE=y | ||
18 | CONFIG_PM=y | ||
19 | CONFIG_NET=y | ||
20 | CONFIG_PACKET=y | ||
21 | CONFIG_UNIX=y | ||
22 | CONFIG_NET_KEY=y | ||
23 | CONFIG_INET=y | ||
24 | # CONFIG_IPV6 is not set | ||
25 | CONFIG_BRIDGE=m | ||
26 | CONFIG_VLAN_8021Q=m | ||
27 | CONFIG_MTD=y | ||
28 | CONFIG_MTD_PARTITIONS=y | ||
29 | CONFIG_MTD_CMDLINE_PARTS=y | ||
30 | CONFIG_MTD_CHAR=y | ||
31 | CONFIG_MTD_BLOCK_RO=y | ||
32 | CONFIG_BLK_DEV_LOOP=m | ||
33 | CONFIG_BLK_DEV_NBD=m | ||
34 | CONFIG_SCSI=m | ||
35 | CONFIG_BLK_DEV_SD=m | ||
36 | CONFIG_BLK_DEV_SR=m | ||
37 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
38 | CONFIG_CHR_DEV_SG=m | ||
39 | CONFIG_SCSI_MULTI_LUN=y | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_DUMMY=m | ||
42 | CONFIG_TUN=m | ||
43 | CONFIG_PHYLIB=y | ||
44 | CONFIG_DAVICOM_PHY=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | CONFIG_USB_USBNET=y | ||
48 | CONFIG_USB_NET_GL620A=y | ||
49 | CONFIG_USB_NET_PLUSB=y | ||
50 | CONFIG_USB_NET_RNDIS_HOST=y | ||
51 | CONFIG_USB_ALI_M5632=y | ||
52 | CONFIG_USB_AN2720=y | ||
53 | CONFIG_USB_EPSON2888=y | ||
54 | CONFIG_PPP=m | ||
55 | CONFIG_PPP_ASYNC=m | ||
56 | CONFIG_PPP_SYNC_TTY=m | ||
57 | CONFIG_PPP_DEFLATE=m | ||
58 | CONFIG_PPP_BSDCOMP=m | ||
59 | CONFIG_PPPOE=m | ||
60 | CONFIG_SERIAL_ATMEL=y | ||
61 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
62 | CONFIG_I2C=m | ||
63 | CONFIG_I2C_CHARDEV=m | ||
64 | CONFIG_I2C_GPIO=m | ||
65 | # CONFIG_VGA_CONSOLE is not set | ||
66 | CONFIG_SOUND=y | ||
67 | CONFIG_USB_HID=m | ||
68 | CONFIG_HID_PID=y | ||
69 | CONFIG_USB_HIDDEV=y | ||
70 | CONFIG_USB=y | ||
71 | CONFIG_USB_DEVICEFS=y | ||
72 | CONFIG_USB_MON=y | ||
73 | CONFIG_USB_OHCI_HCD=y | ||
74 | CONFIG_USB_ACM=m | ||
75 | CONFIG_USB_PRINTER=m | ||
76 | CONFIG_USB_STORAGE=m | ||
77 | CONFIG_USB_STORAGE_DATAFAB=m | ||
78 | CONFIG_USB_STORAGE_FREECOM=m | ||
79 | CONFIG_USB_STORAGE_USBAT=m | ||
80 | CONFIG_USB_STORAGE_SDDR09=m | ||
81 | CONFIG_USB_STORAGE_SDDR55=m | ||
82 | CONFIG_USB_STORAGE_JUMPSHOT=m | ||
83 | CONFIG_USB_SERIAL=m | ||
84 | CONFIG_USB_SERIAL_GENERIC=y | ||
85 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
86 | CONFIG_USB_SERIAL_PL2303=m | ||
87 | CONFIG_USB_GADGET=m | ||
88 | CONFIG_USB_ETH=m | ||
89 | CONFIG_USB_GADGETFS=m | ||
90 | CONFIG_USB_FILE_STORAGE=m | ||
91 | CONFIG_USB_G_SERIAL=m | ||
92 | CONFIG_MMC=m | ||
93 | CONFIG_MMC_DEBUG=y | ||
94 | CONFIG_RTC_CLASS=y | ||
95 | # CONFIG_RTC_HCTOSYS is not set | ||
96 | CONFIG_RTC_DRV_AT91RM9200=y | ||
97 | CONFIG_EXT2_FS=m | ||
98 | CONFIG_EXT3_FS=m | ||
99 | CONFIG_REISERFS_FS=m | ||
100 | CONFIG_INOTIFY=y | ||
101 | CONFIG_ISO9660_FS=m | ||
102 | CONFIG_JOLIET=y | ||
103 | CONFIG_ZISOFS=y | ||
104 | CONFIG_UDF_FS=m | ||
105 | CONFIG_MSDOS_FS=m | ||
106 | CONFIG_VFAT_FS=m | ||
107 | CONFIG_NTFS_FS=m | ||
108 | CONFIG_NTFS_RW=y | ||
109 | CONFIG_TMPFS=y | ||
110 | CONFIG_CRAMFS=y | ||
111 | CONFIG_NFS_FS=m | ||
112 | CONFIG_NFS_V3=y | ||
113 | CONFIG_NFS_V3_ACL=y | ||
114 | CONFIG_NFS_V4=y | ||
115 | CONFIG_NFSD=m | ||
116 | CONFIG_NFSD_V4=y | ||
117 | CONFIG_PARTITION_ADVANCED=y | ||
118 | CONFIG_MAC_PARTITION=y | ||
119 | CONFIG_BSD_DISKLABEL=y | ||
120 | CONFIG_MINIX_SUBPARTITION=y | ||
121 | CONFIG_SOLARIS_X86_PARTITION=y | ||
122 | CONFIG_UNIXWARE_DISKLABEL=y | ||
123 | CONFIG_NLS_CODEPAGE_932=m | ||
124 | CONFIG_NLS_ASCII=m | ||
125 | CONFIG_NLS_ISO8859_15=m | ||
126 | CONFIG_NLS_UTF8=m | ||
127 | CONFIG_CRYPTO_MD5=y | ||
128 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
129 | CONFIG_CRYPTO_ARC4=m | ||
130 | CONFIG_CRC16=m | ||
131 | CONFIG_LIBCRC32C=m | ||
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig deleted file mode 100644 index ac64dbd8a49c..000000000000 --- a/arch/arm/configs/carmeva_defconfig +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_LOG_BUF_SHIFT=14 | ||
3 | CONFIG_BLK_DEV_INITRD=y | ||
4 | CONFIG_EMBEDDED=y | ||
5 | # CONFIG_HOTPLUG is not set | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
9 | CONFIG_ARCH_AT91=y | ||
10 | CONFIG_MACH_CARMEVA=y | ||
11 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
12 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
13 | CONFIG_FPE_NWFPE=y | ||
14 | CONFIG_NET=y | ||
15 | CONFIG_UNIX=y | ||
16 | CONFIG_INET=y | ||
17 | CONFIG_IP_MULTICAST=y | ||
18 | CONFIG_IP_PNP=y | ||
19 | # CONFIG_IPV6 is not set | ||
20 | CONFIG_MTD=y | ||
21 | CONFIG_MTD_PARTITIONS=y | ||
22 | CONFIG_MTD_CMDLINE_PARTS=y | ||
23 | CONFIG_MTD_CHAR=y | ||
24 | CONFIG_MTD_BLOCK=y | ||
25 | CONFIG_BLK_DEV_RAM=y | ||
26 | CONFIG_NETDEVICES=y | ||
27 | CONFIG_NET_ETHERNET=y | ||
28 | CONFIG_ARM_AT91_ETHER=y | ||
29 | # CONFIG_INPUT_MOUSEDEV is not set | ||
30 | # CONFIG_INPUT_KEYBOARD is not set | ||
31 | # CONFIG_INPUT_MOUSE is not set | ||
32 | CONFIG_SERIO=m | ||
33 | CONFIG_SERIAL_ATMEL=y | ||
34 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
35 | # CONFIG_VGA_CONSOLE is not set | ||
36 | CONFIG_MMC=m | ||
37 | CONFIG_MMC_DEBUG=y | ||
38 | CONFIG_EXT2_FS=y | ||
39 | CONFIG_EXT2_FS_XATTR=y | ||
40 | # CONFIG_DNOTIFY is not set | ||
41 | CONFIG_JFFS2_FS=y | ||
42 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
43 | CONFIG_NFS_FS=y | ||
44 | CONFIG_NFS_V3=y | ||
45 | CONFIG_NFS_V4=y | ||
46 | CONFIG_ROOT_NFS=y | ||
47 | CONFIG_NFSD=y | ||
diff --git a/arch/arm/configs/cpuat91_defconfig b/arch/arm/configs/cpuat91_defconfig deleted file mode 100644 index 022aeb55b676..000000000000 --- a/arch/arm/configs/cpuat91_defconfig +++ /dev/null | |||
@@ -1,112 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_BLK_DEV_BSG is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_CPUAT91=y | ||
13 | CONFIG_AT91_TIMER_HZ=100 | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_PREEMPT=y | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_NET=y | ||
19 | CONFIG_PACKET=y | ||
20 | CONFIG_UNIX=y | ||
21 | CONFIG_INET=y | ||
22 | CONFIG_IP_PNP=y | ||
23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
25 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
26 | # CONFIG_IPV6 is not set | ||
27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
28 | CONFIG_MTD=y | ||
29 | CONFIG_MTD_PARTITIONS=y | ||
30 | CONFIG_MTD_CMDLINE_PARTS=y | ||
31 | CONFIG_MTD_CHAR=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_MTD_CFI=y | ||
34 | CONFIG_MTD_CFI_INTELEXT=y | ||
35 | CONFIG_MTD_PHYSMAP=y | ||
36 | CONFIG_MTD_PLATRAM=y | ||
37 | CONFIG_BLK_DEV_LOOP=y | ||
38 | CONFIG_BLK_DEV_NBD=y | ||
39 | CONFIG_BLK_DEV_RAM=y | ||
40 | # CONFIG_MISC_DEVICES is not set | ||
41 | CONFIG_SCSI=y | ||
42 | CONFIG_BLK_DEV_SD=y | ||
43 | CONFIG_SCSI_MULTI_LUN=y | ||
44 | # CONFIG_SCSI_LOWLEVEL is not set | ||
45 | CONFIG_NETDEVICES=y | ||
46 | CONFIG_PHYLIB=y | ||
47 | CONFIG_NET_ETHERNET=y | ||
48 | CONFIG_ARM_AT91_ETHER=y | ||
49 | # CONFIG_NETDEV_1000 is not set | ||
50 | # CONFIG_NETDEV_10000 is not set | ||
51 | CONFIG_PPP=y | ||
52 | CONFIG_PPP_ASYNC=y | ||
53 | CONFIG_PPP_DEFLATE=y | ||
54 | CONFIG_PPP_BSDCOMP=y | ||
55 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
56 | # CONFIG_INPUT_KEYBOARD is not set | ||
57 | # CONFIG_INPUT_MOUSE is not set | ||
58 | # CONFIG_SERIO is not set | ||
59 | CONFIG_SERIAL_ATMEL=y | ||
60 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
61 | CONFIG_LEGACY_PTY_COUNT=32 | ||
62 | # CONFIG_HW_RANDOM is not set | ||
63 | CONFIG_I2C=y | ||
64 | CONFIG_I2C_CHARDEV=y | ||
65 | CONFIG_I2C_GPIO=y | ||
66 | CONFIG_GPIO_SYSFS=y | ||
67 | # CONFIG_HWMON is not set | ||
68 | CONFIG_WATCHDOG=y | ||
69 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
70 | CONFIG_AT91RM9200_WATCHDOG=y | ||
71 | # CONFIG_VGA_CONSOLE is not set | ||
72 | # CONFIG_HID_SUPPORT is not set | ||
73 | CONFIG_USB=y | ||
74 | # CONFIG_USB_DEVICE_CLASS is not set | ||
75 | CONFIG_USB_OHCI_HCD=y | ||
76 | CONFIG_USB_STORAGE=y | ||
77 | CONFIG_USB_GADGET=y | ||
78 | CONFIG_USB_ETH=m | ||
79 | CONFIG_MMC=y | ||
80 | CONFIG_MMC_AT91=m | ||
81 | CONFIG_NEW_LEDS=y | ||
82 | CONFIG_LEDS_CLASS=y | ||
83 | CONFIG_LEDS_GPIO=y | ||
84 | CONFIG_LEDS_TRIGGERS=y | ||
85 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
86 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
87 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
88 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
89 | CONFIG_RTC_CLASS=y | ||
90 | # CONFIG_RTC_HCTOSYS is not set | ||
91 | CONFIG_RTC_DRV_DS1307=y | ||
92 | CONFIG_RTC_DRV_PCF8563=y | ||
93 | CONFIG_EXT2_FS=y | ||
94 | CONFIG_EXT3_FS=y | ||
95 | # CONFIG_EXT3_FS_XATTR is not set | ||
96 | CONFIG_INOTIFY=y | ||
97 | CONFIG_AUTOFS4_FS=y | ||
98 | CONFIG_MSDOS_FS=y | ||
99 | CONFIG_VFAT_FS=y | ||
100 | CONFIG_TMPFS=y | ||
101 | CONFIG_JFFS2_FS=y | ||
102 | CONFIG_JFFS2_SUMMARY=y | ||
103 | CONFIG_CRAMFS=y | ||
104 | CONFIG_MINIX_FS=y | ||
105 | CONFIG_NFS_FS=y | ||
106 | CONFIG_NFS_V3=y | ||
107 | CONFIG_ROOT_NFS=y | ||
108 | CONFIG_PARTITION_ADVANCED=y | ||
109 | CONFIG_NLS_CODEPAGE_437=y | ||
110 | CONFIG_NLS_ISO8859_1=y | ||
111 | CONFIG_NLS_UTF8=y | ||
112 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig deleted file mode 100644 index a24c448840c4..000000000000 --- a/arch/arm/configs/csb337_defconfig +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_BLK_DEV_BSG is not set | ||
9 | CONFIG_ARCH_AT91=y | ||
10 | CONFIG_MACH_CSB337=y | ||
11 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
12 | # CONFIG_ARM_THUMB is not set | ||
13 | CONFIG_PCCARD=y | ||
14 | CONFIG_AT91_CF=y | ||
15 | CONFIG_LEDS=y | ||
16 | CONFIG_LEDS_CPU=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | CONFIG_IP_PNP=y | ||
26 | CONFIG_IP_PNP_DHCP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | ||
28 | # CONFIG_INET_LRO is not set | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
31 | CONFIG_MTD=y | ||
32 | CONFIG_MTD_PARTITIONS=y | ||
33 | CONFIG_MTD_CMDLINE_PARTS=y | ||
34 | CONFIG_MTD_CHAR=y | ||
35 | CONFIG_MTD_BLOCK=y | ||
36 | CONFIG_MTD_CFI=y | ||
37 | CONFIG_MTD_CFI_INTELEXT=y | ||
38 | CONFIG_MTD_PHYSMAP=y | ||
39 | CONFIG_BLK_DEV_LOOP=y | ||
40 | CONFIG_BLK_DEV_RAM=y | ||
41 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
42 | CONFIG_ATMEL_SSC=y | ||
43 | CONFIG_SCSI=y | ||
44 | CONFIG_NETDEVICES=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
48 | # CONFIG_INPUT_KEYBOARD is not set | ||
49 | # CONFIG_INPUT_MOUSE is not set | ||
50 | # CONFIG_SERIO is not set | ||
51 | CONFIG_SERIAL_ATMEL=y | ||
52 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
53 | # CONFIG_HW_RANDOM is not set | ||
54 | CONFIG_I2C=y | ||
55 | CONFIG_I2C_CHARDEV=y | ||
56 | CONFIG_I2C_GPIO=y | ||
57 | # CONFIG_HWMON is not set | ||
58 | CONFIG_WATCHDOG=y | ||
59 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
60 | CONFIG_AT91RM9200_WATCHDOG=y | ||
61 | # CONFIG_VGA_CONSOLE is not set | ||
62 | # CONFIG_USB_HID is not set | ||
63 | CONFIG_USB=y | ||
64 | CONFIG_USB_DEBUG=y | ||
65 | CONFIG_USB_DEVICEFS=y | ||
66 | CONFIG_USB_MON=y | ||
67 | CONFIG_USB_OHCI_HCD=y | ||
68 | CONFIG_USB_STORAGE=y | ||
69 | CONFIG_USB_SERIAL=y | ||
70 | CONFIG_USB_SERIAL_CONSOLE=y | ||
71 | CONFIG_USB_SERIAL_GENERIC=y | ||
72 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
73 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
74 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
75 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
76 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
77 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
78 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
79 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
80 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
81 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
82 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
83 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
84 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
85 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
86 | CONFIG_USB_SERIAL_MCT_U232=y | ||
87 | CONFIG_USB_GADGET=y | ||
88 | CONFIG_MMC=y | ||
89 | CONFIG_RTC_CLASS=y | ||
90 | CONFIG_RTC_HCTOSYS_DEVICE="rtc1" | ||
91 | # CONFIG_RTC_INTF_SYSFS is not set | ||
92 | CONFIG_RTC_DRV_DS1307=y | ||
93 | CONFIG_RTC_DRV_AT91RM9200=y | ||
94 | CONFIG_EXT2_FS=y | ||
95 | CONFIG_INOTIFY=y | ||
96 | CONFIG_TMPFS=y | ||
97 | CONFIG_CRAMFS=y | ||
98 | CONFIG_NFS_FS=y | ||
99 | CONFIG_NFS_V3=y | ||
100 | CONFIG_NFS_V4=y | ||
101 | CONFIG_ROOT_NFS=y | ||
102 | CONFIG_DEBUG_KERNEL=y | ||
103 | CONFIG_DEBUG_USER=y | ||
104 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig deleted file mode 100644 index 98552adac5fb..000000000000 --- a/arch/arm/configs/csb637_defconfig +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_BLK_DEV_BSG is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_CSB637=y | ||
12 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
13 | # CONFIG_ARM_THUMB is not set | ||
14 | CONFIG_PCCARD=y | ||
15 | CONFIG_AT91_CF=y | ||
16 | CONFIG_LEDS=y | ||
17 | CONFIG_LEDS_CPU=y | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
20 | CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
21 | CONFIG_FPE_NWFPE=y | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_DHCP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | # CONFIG_INET_LRO is not set | ||
30 | # CONFIG_IPV6 is not set | ||
31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
32 | CONFIG_MTD=y | ||
33 | CONFIG_MTD_PARTITIONS=y | ||
34 | CONFIG_MTD_CMDLINE_PARTS=y | ||
35 | CONFIG_MTD_CHAR=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_MTD_CFI=y | ||
38 | CONFIG_MTD_CFI_INTELEXT=y | ||
39 | CONFIG_MTD_PHYSMAP=y | ||
40 | CONFIG_BLK_DEV_LOOP=y | ||
41 | CONFIG_BLK_DEV_RAM=y | ||
42 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
43 | CONFIG_SCSI=y | ||
44 | CONFIG_NETDEVICES=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | # CONFIG_INPUT_KEYBOARD is not set | ||
48 | # CONFIG_INPUT_MOUSE is not set | ||
49 | # CONFIG_SERIO is not set | ||
50 | CONFIG_SERIAL_ATMEL=y | ||
51 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
52 | CONFIG_I2C=y | ||
53 | CONFIG_I2C_CHARDEV=y | ||
54 | CONFIG_WATCHDOG=y | ||
55 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
56 | CONFIG_AT91RM9200_WATCHDOG=y | ||
57 | # CONFIG_VGA_CONSOLE is not set | ||
58 | # CONFIG_USB_HID is not set | ||
59 | CONFIG_USB=y | ||
60 | CONFIG_USB_DEBUG=y | ||
61 | CONFIG_USB_DEVICEFS=y | ||
62 | CONFIG_USB_MON=y | ||
63 | CONFIG_USB_OHCI_HCD=y | ||
64 | CONFIG_USB_STORAGE=y | ||
65 | CONFIG_USB_SERIAL=y | ||
66 | CONFIG_USB_SERIAL_CONSOLE=y | ||
67 | CONFIG_USB_SERIAL_GENERIC=y | ||
68 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
69 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
70 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
71 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
72 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
73 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
74 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
75 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
76 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
77 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
78 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
79 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
80 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
81 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
82 | CONFIG_USB_SERIAL_MCT_U232=y | ||
83 | CONFIG_NEW_LEDS=y | ||
84 | CONFIG_LEDS_CLASS=y | ||
85 | CONFIG_LEDS_GPIO=y | ||
86 | CONFIG_LEDS_TRIGGERS=y | ||
87 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
88 | CONFIG_EXT2_FS=y | ||
89 | CONFIG_INOTIFY=y | ||
90 | CONFIG_TMPFS=y | ||
91 | CONFIG_CRAMFS=y | ||
92 | CONFIG_NFS_FS=y | ||
93 | CONFIG_NFS_V3=y | ||
94 | CONFIG_NFS_V4=y | ||
95 | CONFIG_ROOT_NFS=y | ||
96 | CONFIG_DEBUG_KERNEL=y | ||
97 | CONFIG_DEBUG_USER=y | ||
98 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/ecbat91_defconfig b/arch/arm/configs/ecbat91_defconfig deleted file mode 100644 index 6bb6abdcea8c..000000000000 --- a/arch/arm/configs/ecbat91_defconfig +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SLAB=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_ECBAT91=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | CONFIG_PCCARD=y | ||
15 | CONFIG_AT91_CF=y | ||
16 | CONFIG_PREEMPT=y | ||
17 | CONFIG_LEDS=y | ||
18 | CONFIG_LEDS_CPU=y | ||
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
21 | CONFIG_CMDLINE="rootfstype=reiserfs root=/dev/mmcblk0p1 console=ttyS0,115200n8 rootdelay=1" | ||
22 | CONFIG_FPE_NWFPE=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_CFG80211=y | ||
31 | CONFIG_MAC80211=y | ||
32 | # CONFIG_STANDALONE is not set | ||
33 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
34 | CONFIG_MTD=y | ||
35 | CONFIG_MTD_PARTITIONS=y | ||
36 | CONFIG_MTD_CMDLINE_PARTS=y | ||
37 | CONFIG_MTD_AFS_PARTS=y | ||
38 | CONFIG_MTD_CHAR=y | ||
39 | CONFIG_MTD_BLOCK=y | ||
40 | CONFIG_MTD_DATAFLASH=y | ||
41 | CONFIG_BLK_DEV_LOOP=y | ||
42 | CONFIG_SCSI=y | ||
43 | CONFIG_BLK_DEV_SD=y | ||
44 | CONFIG_CHR_DEV_SG=y | ||
45 | CONFIG_NETDEVICES=y | ||
46 | CONFIG_NET_ETHERNET=y | ||
47 | CONFIG_ARM_AT91_ETHER=y | ||
48 | # CONFIG_NETDEV_1000 is not set | ||
49 | # CONFIG_NETDEV_10000 is not set | ||
50 | CONFIG_PPP=y | ||
51 | CONFIG_PPP_MULTILINK=y | ||
52 | CONFIG_PPP_FILTER=y | ||
53 | CONFIG_PPP_ASYNC=y | ||
54 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
55 | # CONFIG_INPUT_KEYBOARD is not set | ||
56 | # CONFIG_INPUT_MOUSE is not set | ||
57 | # CONFIG_SERIO is not set | ||
58 | CONFIG_SERIAL_ATMEL=y | ||
59 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
60 | CONFIG_HW_RANDOM=y | ||
61 | CONFIG_I2C=y | ||
62 | CONFIG_I2C_CHARDEV=y | ||
63 | CONFIG_SPI=y | ||
64 | CONFIG_SPI_BITBANG=y | ||
65 | CONFIG_WATCHDOG=y | ||
66 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
67 | # CONFIG_VGA_CONSOLE is not set | ||
68 | # CONFIG_USB_HID is not set | ||
69 | CONFIG_USB=y | ||
70 | CONFIG_USB_DEVICEFS=y | ||
71 | # CONFIG_USB_DEVICE_CLASS is not set | ||
72 | CONFIG_USB_OHCI_HCD=y | ||
73 | CONFIG_USB_PRINTER=y | ||
74 | CONFIG_USB_STORAGE=y | ||
75 | CONFIG_USB_GADGET=y | ||
76 | CONFIG_MMC=y | ||
77 | CONFIG_MMC_DEBUG=y | ||
78 | CONFIG_MMC_AT91=m | ||
79 | CONFIG_NEW_LEDS=y | ||
80 | CONFIG_LEDS_CLASS=y | ||
81 | CONFIG_RTC_CLASS=y | ||
82 | # CONFIG_RTC_HCTOSYS is not set | ||
83 | CONFIG_RTC_DRV_AT91RM9200=y | ||
84 | CONFIG_EXT2_FS=y | ||
85 | CONFIG_EXT3_FS=y | ||
86 | CONFIG_REISERFS_FS=y | ||
87 | CONFIG_INOTIFY=y | ||
88 | CONFIG_TMPFS=y | ||
89 | CONFIG_CONFIGFS_FS=y | ||
90 | CONFIG_CRAMFS=y | ||
91 | CONFIG_NFS_FS=y | ||
92 | CONFIG_NFS_V3=y | ||
93 | CONFIG_NFS_V3_ACL=y | ||
94 | CONFIG_NFS_V4=y | ||
95 | CONFIG_ROOT_NFS=y | ||
96 | CONFIG_PARTITION_ADVANCED=y | ||
97 | CONFIG_DEBUG_USER=y | ||
98 | CONFIG_CRYPTO_PCBC=y | ||
99 | CONFIG_CRYPTO_SHA1=y | ||
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig deleted file mode 100644 index 896dbe00dc6e..000000000000 --- a/arch/arm/configs/kafa_defconfig +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SLAB=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_KAFA=y | ||
12 | # CONFIG_ARM_THUMB is not set | ||
13 | CONFIG_PREEMPT=y | ||
14 | CONFIG_LEDS=y | ||
15 | CONFIG_LEDS_CPU=y | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw" | ||
19 | CONFIG_FPE_NWFPE=y | ||
20 | CONFIG_BINFMT_MISC=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | # CONFIG_INET_DIAG is not set | ||
26 | # CONFIG_IPV6 is not set | ||
27 | CONFIG_MTD=y | ||
28 | CONFIG_MTD_PARTITIONS=y | ||
29 | CONFIG_MTD_CHAR=y | ||
30 | CONFIG_MTD_BLOCK_RO=y | ||
31 | CONFIG_NETDEVICES=y | ||
32 | CONFIG_PHYLIB=y | ||
33 | CONFIG_DAVICOM_PHY=y | ||
34 | CONFIG_NET_ETHERNET=y | ||
35 | CONFIG_ARM_AT91_ETHER=y | ||
36 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
37 | # CONFIG_INPUT_KEYBOARD is not set | ||
38 | # CONFIG_INPUT_MOUSE is not set | ||
39 | # CONFIG_SERIO is not set | ||
40 | CONFIG_SERIAL_ATMEL=y | ||
41 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
42 | CONFIG_LEGACY_PTY_COUNT=32 | ||
43 | CONFIG_I2C=y | ||
44 | CONFIG_I2C_CHARDEV=y | ||
45 | CONFIG_I2C_GPIO=y | ||
46 | # CONFIG_HWMON is not set | ||
47 | CONFIG_WATCHDOG=y | ||
48 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
49 | CONFIG_AT91RM9200_WATCHDOG=y | ||
50 | # CONFIG_VGA_CONSOLE is not set | ||
51 | CONFIG_RTC_CLASS=y | ||
52 | # CONFIG_RTC_HCTOSYS is not set | ||
53 | CONFIG_RTC_DRV_AT91RM9200=y | ||
54 | CONFIG_EXT3_FS=y | ||
55 | # CONFIG_EXT3_FS_XATTR is not set | ||
56 | CONFIG_TMPFS=y | ||
57 | CONFIG_CRAMFS=y | ||
58 | CONFIG_NFS_FS=m | ||
59 | CONFIG_NFS_V3=y | ||
60 | CONFIG_CRYPTO_MD5=y | ||
61 | CONFIG_CRYPTO_DES=y | ||
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig deleted file mode 100644 index 9f906a85f5c2..000000000000 --- a/arch/arm/configs/kb9202_defconfig +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_POSIX_MQUEUE=y | ||
5 | CONFIG_BSD_PROCESS_ACCT=y | ||
6 | CONFIG_AUDIT=y | ||
7 | CONFIG_IKCONFIG=y | ||
8 | CONFIG_IKCONFIG_PROC=y | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | CONFIG_MODVERSIONS=y | ||
14 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
15 | # CONFIG_BLK_DEV_BSG is not set | ||
16 | # CONFIG_IOSCHED_DEADLINE is not set | ||
17 | CONFIG_ARCH_AT91=y | ||
18 | CONFIG_MACH_KB9200=y | ||
19 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
20 | CONFIG_NO_HZ=y | ||
21 | CONFIG_HIGH_RES_TIMERS=y | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_AEABI=y | ||
24 | CONFIG_ZBOOT_ROM_TEXT=0x10000000 | ||
25 | CONFIG_ZBOOT_ROM_BSS=0x20040000 | ||
26 | CONFIG_CMDLINE="noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M" | ||
27 | CONFIG_KEXEC=y | ||
28 | CONFIG_FPE_NWFPE=y | ||
29 | CONFIG_BINFMT_MISC=y | ||
30 | CONFIG_NET=y | ||
31 | CONFIG_PACKET=y | ||
32 | CONFIG_UNIX=y | ||
33 | CONFIG_INET=y | ||
34 | CONFIG_IP_PNP=y | ||
35 | CONFIG_IP_PNP_DHCP=y | ||
36 | CONFIG_IP_PNP_BOOTP=y | ||
37 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
38 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
39 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
40 | # CONFIG_INET_LRO is not set | ||
41 | # CONFIG_INET_DIAG is not set | ||
42 | # CONFIG_IPV6 is not set | ||
43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
44 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
45 | CONFIG_MTD=y | ||
46 | CONFIG_MTD_CONCAT=y | ||
47 | CONFIG_MTD_PARTITIONS=y | ||
48 | CONFIG_MTD_CMDLINE_PARTS=y | ||
49 | CONFIG_MTD_CHAR=y | ||
50 | CONFIG_MTD_BLOCK=y | ||
51 | CONFIG_MTD_CFI=y | ||
52 | CONFIG_MTD_CFI_INTELEXT=y | ||
53 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
54 | CONFIG_MTD_PHYSMAP=y | ||
55 | CONFIG_MTD_NAND=y | ||
56 | CONFIG_MTD_NAND_ATMEL=y | ||
57 | CONFIG_MTD_UBI=y | ||
58 | CONFIG_MTD_UBI_GLUEBI=y | ||
59 | CONFIG_BLK_DEV_LOOP=y | ||
60 | CONFIG_BLK_DEV_RAM=y | ||
61 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
62 | CONFIG_ATMEL_TCLIB=y | ||
63 | CONFIG_ATMEL_SSC=y | ||
64 | CONFIG_SCSI=y | ||
65 | CONFIG_BLK_DEV_SD=y | ||
66 | CONFIG_CHR_DEV_SG=y | ||
67 | CONFIG_SCSI_MULTI_LUN=y | ||
68 | CONFIG_SCSI_CONSTANTS=y | ||
69 | CONFIG_SCSI_LOGGING=y | ||
70 | CONFIG_SCSI_SPI_ATTRS=m | ||
71 | # CONFIG_SCSI_LOWLEVEL is not set | ||
72 | CONFIG_NETDEVICES=y | ||
73 | CONFIG_NET_ETHERNET=y | ||
74 | CONFIG_ARM_AT91_ETHER=y | ||
75 | # CONFIG_NETDEV_1000 is not set | ||
76 | # CONFIG_NETDEV_10000 is not set | ||
77 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
78 | # CONFIG_INPUT_KEYBOARD is not set | ||
79 | # CONFIG_INPUT_MOUSE is not set | ||
80 | # CONFIG_SERIO is not set | ||
81 | CONFIG_SERIAL_ATMEL=y | ||
82 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
83 | # CONFIG_LEGACY_PTYS is not set | ||
84 | # CONFIG_HW_RANDOM is not set | ||
85 | # CONFIG_HWMON is not set | ||
86 | CONFIG_WATCHDOG=y | ||
87 | CONFIG_AT91RM9200_WATCHDOG=y | ||
88 | CONFIG_FB=y | ||
89 | CONFIG_FB_MODE_HELPERS=y | ||
90 | CONFIG_FB_TILEBLITTING=y | ||
91 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
92 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
93 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
94 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
95 | # CONFIG_VGA_CONSOLE is not set | ||
96 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
97 | CONFIG_FONTS=y | ||
98 | CONFIG_FONT_MINI_4x6=y | ||
99 | # CONFIG_HID_SUPPORT is not set | ||
100 | CONFIG_USB=y | ||
101 | CONFIG_USB_DEVICEFS=y | ||
102 | CONFIG_USB_OHCI_HCD=y | ||
103 | CONFIG_USB_STORAGE=y | ||
104 | CONFIG_USB_LIBUSUAL=y | ||
105 | CONFIG_MMC=y | ||
106 | CONFIG_MMC_AT91=m | ||
107 | CONFIG_RTC_CLASS=y | ||
108 | CONFIG_RTC_DRV_AT91RM9200=y | ||
109 | CONFIG_EXT2_FS=y | ||
110 | CONFIG_EXT3_FS=y | ||
111 | # CONFIG_DNOTIFY is not set | ||
112 | CONFIG_INOTIFY=y | ||
113 | CONFIG_VFAT_FS=y | ||
114 | CONFIG_TMPFS=y | ||
115 | CONFIG_CONFIGFS_FS=y | ||
116 | CONFIG_JFFS2_FS=y | ||
117 | CONFIG_NFS_FS=y | ||
118 | CONFIG_NFS_V3=y | ||
119 | CONFIG_ROOT_NFS=y | ||
120 | CONFIG_NLS_CODEPAGE_437=y | ||
121 | CONFIG_NLS_UTF8=y | ||
122 | CONFIG_MAGIC_SYSRQ=y | ||
123 | CONFIG_DEBUG_FS=y | ||
124 | CONFIG_DEBUG_KERNEL=y | ||
125 | # CONFIG_SCHED_DEBUG is not set | ||
126 | # CONFIG_DEBUG_PREEMPT is not set | ||
127 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig deleted file mode 100644 index 1579857aeeaa..000000000000 --- a/arch/arm/configs/onearm_defconfig +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_EMBEDDED=y | ||
7 | CONFIG_SLAB=y | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | # CONFIG_IOSCHED_DEADLINE is not set | ||
11 | # CONFIG_IOSCHED_CFQ is not set | ||
12 | CONFIG_ARCH_AT91=y | ||
13 | CONFIG_MACH_ONEARM=y | ||
14 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
15 | # CONFIG_ARM_THUMB is not set | ||
16 | CONFIG_PCCARD=y | ||
17 | CONFIG_AT91_CF=y | ||
18 | CONFIG_LEDS=y | ||
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
21 | CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M" | ||
22 | CONFIG_FPE_NWFPE=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | CONFIG_IPV6=y | ||
30 | # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set | ||
31 | # CONFIG_INET6_XFRM_MODE_TUNNEL is not set | ||
32 | # CONFIG_INET6_XFRM_MODE_BEET is not set | ||
33 | # CONFIG_IPV6_SIT is not set | ||
34 | CONFIG_MTD=y | ||
35 | CONFIG_MTD_PARTITIONS=y | ||
36 | CONFIG_MTD_CMDLINE_PARTS=y | ||
37 | CONFIG_MTD_CHAR=y | ||
38 | CONFIG_MTD_BLOCK=y | ||
39 | CONFIG_MTD_CFI=y | ||
40 | CONFIG_MTD_JEDECPROBE=y | ||
41 | CONFIG_MTD_CFI_AMDSTD=y | ||
42 | CONFIG_MTD_PHYSMAP=y | ||
43 | CONFIG_BLK_DEV_NBD=y | ||
44 | CONFIG_BLK_DEV_RAM=y | ||
45 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
46 | CONFIG_NETDEVICES=y | ||
47 | CONFIG_NET_ETHERNET=y | ||
48 | CONFIG_ARM_AT91_ETHER=y | ||
49 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
50 | # CONFIG_INPUT_KEYBOARD is not set | ||
51 | # CONFIG_INPUT_MOUSE is not set | ||
52 | # CONFIG_SERIO is not set | ||
53 | # CONFIG_VT is not set | ||
54 | CONFIG_SERIAL_ATMEL=y | ||
55 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
56 | # CONFIG_HW_RANDOM is not set | ||
57 | CONFIG_I2C=y | ||
58 | CONFIG_I2C_CHARDEV=y | ||
59 | CONFIG_WATCHDOG=y | ||
60 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
61 | CONFIG_AT91RM9200_WATCHDOG=y | ||
62 | # CONFIG_USB_HID is not set | ||
63 | CONFIG_USB=y | ||
64 | CONFIG_USB_DEBUG=y | ||
65 | CONFIG_USB_DEVICEFS=y | ||
66 | CONFIG_USB_MON=y | ||
67 | CONFIG_USB_OHCI_HCD=y | ||
68 | CONFIG_USB_GADGET=y | ||
69 | CONFIG_MMC=y | ||
70 | CONFIG_EXT2_FS=y | ||
71 | CONFIG_INOTIFY=y | ||
72 | CONFIG_TMPFS=y | ||
73 | CONFIG_CRAMFS=y | ||
74 | CONFIG_NFS_FS=y | ||
75 | CONFIG_NFS_V3=y | ||
76 | CONFIG_NFS_V3_ACL=y | ||
77 | CONFIG_ROOT_NFS=y | ||
78 | CONFIG_DEBUG_KERNEL=y | ||
79 | CONFIG_DEBUG_USER=y | ||
80 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig deleted file mode 100644 index 4c9afa478d57..000000000000 --- a/arch/arm/configs/picotux200_defconfig +++ /dev/null | |||
@@ -1,242 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=m | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_EMBEDDED=y | ||
7 | # CONFIG_KALLSYMS is not set | ||
8 | CONFIG_SLAB=y | ||
9 | CONFIG_MODULES=y | ||
10 | CONFIG_MODULE_UNLOAD=y | ||
11 | # CONFIG_IOSCHED_DEADLINE is not set | ||
12 | # CONFIG_IOSCHED_CFQ is not set | ||
13 | CONFIG_ARCH_AT91=y | ||
14 | CONFIG_MACH_PICOTUX2XX=y | ||
15 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
16 | CONFIG_AEABI=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_KEXEC=y | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_BINFMT_MISC=m | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=m | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_XFRM_USER=m | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | CONFIG_NET_IPIP=m | ||
30 | CONFIG_NET_IPGRE=m | ||
31 | CONFIG_INET_AH=m | ||
32 | CONFIG_INET_ESP=m | ||
33 | CONFIG_INET_IPCOMP=m | ||
34 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
35 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
36 | CONFIG_INET_XFRM_MODE_BEET=m | ||
37 | CONFIG_INET_DIAG=m | ||
38 | CONFIG_IPV6_PRIVACY=y | ||
39 | CONFIG_IPV6_ROUTER_PREF=y | ||
40 | CONFIG_IPV6_ROUTE_INFO=y | ||
41 | CONFIG_INET6_AH=m | ||
42 | CONFIG_INET6_ESP=m | ||
43 | CONFIG_INET6_IPCOMP=m | ||
44 | CONFIG_IPV6_MIP6=m | ||
45 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
46 | CONFIG_IPV6_TUNNEL=m | ||
47 | CONFIG_BRIDGE=m | ||
48 | CONFIG_VLAN_8021Q=m | ||
49 | CONFIG_BT=m | ||
50 | CONFIG_BT_L2CAP=m | ||
51 | CONFIG_BT_SCO=m | ||
52 | CONFIG_BT_RFCOMM=m | ||
53 | CONFIG_BT_RFCOMM_TTY=y | ||
54 | CONFIG_BT_BNEP=m | ||
55 | CONFIG_BT_BNEP_MC_FILTER=y | ||
56 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
57 | CONFIG_BT_HIDP=m | ||
58 | CONFIG_FW_LOADER=m | ||
59 | CONFIG_MTD=y | ||
60 | CONFIG_MTD_PARTITIONS=y | ||
61 | CONFIG_MTD_CMDLINE_PARTS=y | ||
62 | CONFIG_MTD_CHAR=y | ||
63 | CONFIG_MTD_BLOCK=y | ||
64 | CONFIG_MTD_CFI=y | ||
65 | CONFIG_MTD_CFI_AMDSTD=y | ||
66 | CONFIG_MTD_PHYSMAP=y | ||
67 | CONFIG_BLK_DEV_LOOP=m | ||
68 | CONFIG_EEPROM_LEGACY=m | ||
69 | CONFIG_SCSI=m | ||
70 | CONFIG_BLK_DEV_SD=m | ||
71 | CONFIG_BLK_DEV_SR=m | ||
72 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
73 | CONFIG_CHR_DEV_SG=m | ||
74 | CONFIG_NETDEVICES=y | ||
75 | CONFIG_TUN=m | ||
76 | CONFIG_NET_ETHERNET=y | ||
77 | CONFIG_ARM_AT91_ETHER=y | ||
78 | CONFIG_USB_CATC=m | ||
79 | CONFIG_USB_KAWETH=m | ||
80 | CONFIG_USB_PEGASUS=m | ||
81 | CONFIG_USB_RTL8150=m | ||
82 | CONFIG_USB_USBNET=m | ||
83 | CONFIG_USB_NET_DM9601=m | ||
84 | CONFIG_USB_NET_GL620A=m | ||
85 | CONFIG_USB_NET_PLUSB=m | ||
86 | CONFIG_USB_NET_MCS7830=m | ||
87 | CONFIG_USB_NET_RNDIS_HOST=m | ||
88 | CONFIG_USB_ALI_M5632=y | ||
89 | CONFIG_USB_AN2720=y | ||
90 | CONFIG_USB_EPSON2888=y | ||
91 | CONFIG_USB_KC2190=y | ||
92 | CONFIG_PPP=m | ||
93 | CONFIG_PPP_FILTER=y | ||
94 | CONFIG_PPP_ASYNC=m | ||
95 | CONFIG_PPP_DEFLATE=m | ||
96 | CONFIG_PPP_BSDCOMP=m | ||
97 | CONFIG_PPP_MPPE=m | ||
98 | CONFIG_PPPOE=m | ||
99 | CONFIG_SLIP=m | ||
100 | CONFIG_SLIP_COMPRESSED=y | ||
101 | CONFIG_SLIP_SMART=y | ||
102 | CONFIG_SLIP_MODE_SLIP6=y | ||
103 | # CONFIG_INPUT_MOUSEDEV is not set | ||
104 | # CONFIG_INPUT_KEYBOARD is not set | ||
105 | # CONFIG_INPUT_MOUSE is not set | ||
106 | # CONFIG_SERIO is not set | ||
107 | # CONFIG_VT is not set | ||
108 | CONFIG_SERIAL_ATMEL=y | ||
109 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
110 | # CONFIG_LEGACY_PTYS is not set | ||
111 | CONFIG_I2C=m | ||
112 | CONFIG_I2C_CHARDEV=m | ||
113 | CONFIG_I2C_GPIO=m | ||
114 | CONFIG_HWMON=m | ||
115 | CONFIG_SENSORS_ADM1021=m | ||
116 | CONFIG_SENSORS_ADM1025=m | ||
117 | CONFIG_SENSORS_ADM1026=m | ||
118 | CONFIG_SENSORS_ADM1029=m | ||
119 | CONFIG_SENSORS_ADM1031=m | ||
120 | CONFIG_SENSORS_ADM9240=m | ||
121 | CONFIG_SENSORS_DS1621=m | ||
122 | CONFIG_SENSORS_GL518SM=m | ||
123 | CONFIG_SENSORS_GL520SM=m | ||
124 | CONFIG_SENSORS_IT87=m | ||
125 | CONFIG_SENSORS_LM63=m | ||
126 | CONFIG_SENSORS_LM75=m | ||
127 | CONFIG_SENSORS_LM77=m | ||
128 | CONFIG_SENSORS_LM78=m | ||
129 | CONFIG_SENSORS_LM80=m | ||
130 | CONFIG_SENSORS_LM83=m | ||
131 | CONFIG_SENSORS_LM85=m | ||
132 | CONFIG_SENSORS_LM87=m | ||
133 | CONFIG_SENSORS_LM90=m | ||
134 | CONFIG_SENSORS_LM92=m | ||
135 | CONFIG_SENSORS_MAX1619=m | ||
136 | CONFIG_SENSORS_PCF8591=m | ||
137 | CONFIG_SENSORS_SMSC47B397=m | ||
138 | CONFIG_SENSORS_W83781D=m | ||
139 | CONFIG_SENSORS_W83791D=m | ||
140 | CONFIG_SENSORS_W83792D=m | ||
141 | CONFIG_SENSORS_W83793=m | ||
142 | CONFIG_SENSORS_W83L785TS=m | ||
143 | CONFIG_WATCHDOG=y | ||
144 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
145 | CONFIG_AT91RM9200_WATCHDOG=m | ||
146 | CONFIG_HID=m | ||
147 | CONFIG_USB=m | ||
148 | CONFIG_USB_DEVICEFS=y | ||
149 | CONFIG_USB_OHCI_HCD=m | ||
150 | CONFIG_USB_ACM=m | ||
151 | CONFIG_USB_PRINTER=m | ||
152 | CONFIG_USB_STORAGE=m | ||
153 | CONFIG_USB_SERIAL=m | ||
154 | CONFIG_USB_SERIAL_GENERIC=y | ||
155 | CONFIG_USB_SERIAL_PL2303=m | ||
156 | CONFIG_MMC=m | ||
157 | CONFIG_MMC_AT91=m | ||
158 | CONFIG_RTC_CLASS=m | ||
159 | CONFIG_RTC_DRV_AT91RM9200=m | ||
160 | CONFIG_EXT2_FS=m | ||
161 | CONFIG_EXT3_FS=m | ||
162 | # CONFIG_EXT3_FS_XATTR is not set | ||
163 | CONFIG_INOTIFY=y | ||
164 | CONFIG_ISO9660_FS=m | ||
165 | CONFIG_JOLIET=y | ||
166 | CONFIG_UDF_FS=m | ||
167 | CONFIG_MSDOS_FS=m | ||
168 | CONFIG_VFAT_FS=m | ||
169 | CONFIG_NTFS_FS=m | ||
170 | CONFIG_TMPFS=y | ||
171 | CONFIG_JFFS2_FS=y | ||
172 | CONFIG_JFFS2_SUMMARY=y | ||
173 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
174 | CONFIG_NFS_FS=m | ||
175 | CONFIG_SMB_FS=m | ||
176 | CONFIG_CIFS=m | ||
177 | CONFIG_PARTITION_ADVANCED=y | ||
178 | CONFIG_AMIGA_PARTITION=y | ||
179 | CONFIG_NLS_DEFAULT="utf-8" | ||
180 | CONFIG_NLS_CODEPAGE_437=m | ||
181 | CONFIG_NLS_CODEPAGE_737=m | ||
182 | CONFIG_NLS_CODEPAGE_775=m | ||
183 | CONFIG_NLS_CODEPAGE_850=m | ||
184 | CONFIG_NLS_CODEPAGE_852=m | ||
185 | CONFIG_NLS_CODEPAGE_855=m | ||
186 | CONFIG_NLS_CODEPAGE_857=m | ||
187 | CONFIG_NLS_CODEPAGE_860=m | ||
188 | CONFIG_NLS_CODEPAGE_861=m | ||
189 | CONFIG_NLS_CODEPAGE_862=m | ||
190 | CONFIG_NLS_CODEPAGE_863=m | ||
191 | CONFIG_NLS_CODEPAGE_864=m | ||
192 | CONFIG_NLS_CODEPAGE_865=m | ||
193 | CONFIG_NLS_CODEPAGE_866=m | ||
194 | CONFIG_NLS_CODEPAGE_869=m | ||
195 | CONFIG_NLS_CODEPAGE_936=m | ||
196 | CONFIG_NLS_CODEPAGE_950=m | ||
197 | CONFIG_NLS_CODEPAGE_932=m | ||
198 | CONFIG_NLS_CODEPAGE_949=m | ||
199 | CONFIG_NLS_CODEPAGE_874=m | ||
200 | CONFIG_NLS_ISO8859_8=m | ||
201 | CONFIG_NLS_CODEPAGE_1250=m | ||
202 | CONFIG_NLS_CODEPAGE_1251=m | ||
203 | CONFIG_NLS_ASCII=m | ||
204 | CONFIG_NLS_ISO8859_1=m | ||
205 | CONFIG_NLS_ISO8859_2=m | ||
206 | CONFIG_NLS_ISO8859_3=m | ||
207 | CONFIG_NLS_ISO8859_4=m | ||
208 | CONFIG_NLS_ISO8859_5=m | ||
209 | CONFIG_NLS_ISO8859_6=m | ||
210 | CONFIG_NLS_ISO8859_7=m | ||
211 | CONFIG_NLS_ISO8859_9=m | ||
212 | CONFIG_NLS_ISO8859_13=m | ||
213 | CONFIG_NLS_ISO8859_14=m | ||
214 | CONFIG_NLS_ISO8859_15=m | ||
215 | CONFIG_NLS_KOI8_R=m | ||
216 | CONFIG_NLS_KOI8_U=m | ||
217 | CONFIG_NLS_UTF8=m | ||
218 | CONFIG_DEBUG_KERNEL=y | ||
219 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
220 | CONFIG_DEBUG_LL=y | ||
221 | CONFIG_CRYPTO_NULL=m | ||
222 | CONFIG_CRYPTO_TEST=m | ||
223 | CONFIG_CRYPTO_LRW=m | ||
224 | CONFIG_CRYPTO_PCBC=m | ||
225 | CONFIG_CRYPTO_XCBC=m | ||
226 | CONFIG_CRYPTO_MD4=m | ||
227 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
228 | CONFIG_CRYPTO_SHA256=m | ||
229 | CONFIG_CRYPTO_SHA512=m | ||
230 | CONFIG_CRYPTO_TGR192=m | ||
231 | CONFIG_CRYPTO_WP512=m | ||
232 | CONFIG_CRYPTO_ANUBIS=m | ||
233 | CONFIG_CRYPTO_BLOWFISH=m | ||
234 | CONFIG_CRYPTO_CAMELLIA=m | ||
235 | CONFIG_CRYPTO_CAST5=m | ||
236 | CONFIG_CRYPTO_CAST6=m | ||
237 | CONFIG_CRYPTO_FCRYPT=m | ||
238 | CONFIG_CRYPTO_KHAZAD=m | ||
239 | CONFIG_CRYPTO_SERPENT=m | ||
240 | CONFIG_CRYPTO_TEA=m | ||
241 | CONFIG_CRYPTO_TWOFISH=m | ||
242 | CONFIG_LIBCRC32C=m | ||
diff --git a/arch/arm/configs/yl9200_defconfig b/arch/arm/configs/yl9200_defconfig deleted file mode 100644 index 30c537f61089..000000000000 --- a/arch/arm/configs/yl9200_defconfig +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | # CONFIG_SWAP is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | ||
4 | CONFIG_BLK_DEV_INITRD=y | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_IOSCHED_DEADLINE is not set | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_ARCH_AT91RM9200DK=y | ||
12 | CONFIG_MACH_YL9200=y | ||
13 | # CONFIG_ARM_THUMB is not set | ||
14 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
15 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
16 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
17 | CONFIG_FPE_NWFPE=y | ||
18 | CONFIG_NET=y | ||
19 | CONFIG_PACKET=y | ||
20 | CONFIG_UNIX=y | ||
21 | CONFIG_INET=y | ||
22 | CONFIG_IP_PNP=y | ||
23 | CONFIG_IP_PNP_DHCP=y | ||
24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
26 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
27 | # CONFIG_INET_LRO is not set | ||
28 | # CONFIG_INET_DIAG is not set | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
31 | CONFIG_MTD=y | ||
32 | CONFIG_MTD_CONCAT=y | ||
33 | CONFIG_MTD_PARTITIONS=y | ||
34 | CONFIG_MTD_CMDLINE_PARTS=y | ||
35 | CONFIG_MTD_CHAR=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_MTD_CFI=y | ||
38 | CONFIG_MTD_JEDECPROBE=y | ||
39 | CONFIG_MTD_CFI_INTELEXT=y | ||
40 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
41 | CONFIG_MTD_PHYSMAP=y | ||
42 | CONFIG_MTD_PLATRAM=y | ||
43 | CONFIG_MTD_NAND=y | ||
44 | CONFIG_MTD_NAND_ATMEL=y | ||
45 | CONFIG_MTD_NAND_PLATFORM=y | ||
46 | CONFIG_BLK_DEV_LOOP=y | ||
47 | CONFIG_BLK_DEV_RAM=y | ||
48 | CONFIG_BLK_DEV_RAM_COUNT=3 | ||
49 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
50 | # CONFIG_MISC_DEVICES is not set | ||
51 | CONFIG_BLK_DEV_SD=y | ||
52 | CONFIG_ATA=y | ||
53 | CONFIG_NETDEVICES=y | ||
54 | CONFIG_PHYLIB=y | ||
55 | CONFIG_DAVICOM_PHY=y | ||
56 | CONFIG_NET_ETHERNET=y | ||
57 | CONFIG_ARM_AT91_ETHER=y | ||
58 | # CONFIG_NETDEV_1000 is not set | ||
59 | # CONFIG_NETDEV_10000 is not set | ||
60 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
61 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
62 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
63 | CONFIG_INPUT_EVDEV=y | ||
64 | # CONFIG_KEYBOARD_ATKBD is not set | ||
65 | CONFIG_KEYBOARD_GPIO=y | ||
66 | CONFIG_INPUT_TOUCHSCREEN=y | ||
67 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
68 | # CONFIG_SERIO_SERPORT is not set | ||
69 | CONFIG_SERIAL_ATMEL=y | ||
70 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
71 | # CONFIG_HW_RANDOM is not set | ||
72 | CONFIG_I2C=y | ||
73 | CONFIG_SPI=y | ||
74 | CONFIG_SPI_DEBUG=y | ||
75 | CONFIG_SPI_ATMEL=y | ||
76 | CONFIG_FB=y | ||
77 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
78 | CONFIG_LCD_CLASS_DEVICE=y | ||
79 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
80 | CONFIG_DISPLAY_SUPPORT=y | ||
81 | # CONFIG_VGA_CONSOLE is not set | ||
82 | CONFIG_LOGO=y | ||
83 | # CONFIG_LOGO_LINUX_MONO is not set | ||
84 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
85 | CONFIG_USB=y | ||
86 | CONFIG_USB_DEBUG=y | ||
87 | CONFIG_USB_DEVICEFS=y | ||
88 | # CONFIG_USB_DEVICE_CLASS is not set | ||
89 | CONFIG_USB_MON=y | ||
90 | CONFIG_USB_OHCI_HCD=y | ||
91 | CONFIG_USB_STORAGE=y | ||
92 | CONFIG_USB_GADGET=y | ||
93 | CONFIG_USB_GADGET_M66592=y | ||
94 | CONFIG_USB_FILE_STORAGE=m | ||
95 | CONFIG_MMC=y | ||
96 | CONFIG_MMC_DEBUG=y | ||
97 | # CONFIG_MMC_BLOCK_BOUNCE is not set | ||
98 | CONFIG_MMC_AT91=m | ||
99 | CONFIG_NEW_LEDS=y | ||
100 | CONFIG_LEDS_CLASS=y | ||
101 | CONFIG_LEDS_GPIO=y | ||
102 | CONFIG_LEDS_TRIGGERS=y | ||
103 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
104 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
105 | CONFIG_RTC_CLASS=y | ||
106 | CONFIG_RTC_DRV_AT91RM9200=y | ||
107 | CONFIG_EXT2_FS=y | ||
108 | CONFIG_EXT2_FS_XATTR=y | ||
109 | CONFIG_EXT3_FS=y | ||
110 | CONFIG_REISERFS_FS=y | ||
111 | CONFIG_INOTIFY=y | ||
112 | CONFIG_ISO9660_FS=y | ||
113 | CONFIG_JOLIET=y | ||
114 | CONFIG_ZISOFS=y | ||
115 | CONFIG_UDF_FS=y | ||
116 | CONFIG_MSDOS_FS=y | ||
117 | CONFIG_VFAT_FS=y | ||
118 | CONFIG_TMPFS=y | ||
119 | CONFIG_JFFS2_FS=y | ||
120 | CONFIG_JFFS2_FS_DEBUG=1 | ||
121 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
122 | CONFIG_JFFS2_RUBIN=y | ||
123 | CONFIG_CRAMFS=y | ||
124 | CONFIG_PARTITION_ADVANCED=y | ||
125 | CONFIG_MAC_PARTITION=y | ||
126 | CONFIG_NLS_CODEPAGE_437=y | ||
127 | CONFIG_NLS_ISO8859_1=y | ||
128 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
129 | CONFIG_DEBUG_FS=y | ||
130 | CONFIG_DEBUG_KERNEL=y | ||
131 | CONFIG_SLUB_DEBUG_ON=y | ||
132 | CONFIG_DEBUG_KOBJECT=y | ||
133 | CONFIG_DEBUG_INFO=y | ||
134 | CONFIG_DEBUG_LIST=y | ||
135 | CONFIG_DEBUG_USER=y | ||
136 | CONFIG_DEBUG_ERRORS=y | ||
137 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 062b58c029ab..749bb6622404 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -238,7 +238,7 @@ | |||
238 | @ Slightly optimised to avoid incrementing the pointer twice | 238 | @ Slightly optimised to avoid incrementing the pointer twice |
239 | usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort | 239 | usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort |
240 | .if \rept == 2 | 240 | .if \rept == 2 |
241 | usraccoff \instr, \reg, \ptr, \inc, 4, \cond, \abort | 241 | usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort |
242 | .endif | 242 | .endif |
243 | 243 | ||
244 | add\cond \ptr, #\rept * \inc | 244 | add\cond \ptr, #\rept * \inc |
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index 68870c776671..b4ffe9d5b526 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h | |||
@@ -13,6 +13,10 @@ typedef struct { | |||
13 | 13 | ||
14 | #ifdef CONFIG_CPU_HAS_ASID | 14 | #ifdef CONFIG_CPU_HAS_ASID |
15 | #define ASID(mm) ((mm)->context.id & 255) | 15 | #define ASID(mm) ((mm)->context.id & 255) |
16 | |||
17 | /* init_mm.context.id_lock should be initialized. */ | ||
18 | #define INIT_MM_CONTEXT(name) \ | ||
19 | .context.id_lock = __SPIN_LOCK_UNLOCKED(name.context.id_lock), | ||
16 | #else | 20 | #else |
17 | #define ASID(mm) (0) | 21 | #define ASID(mm) (0) |
18 | #endif | 22 | #endif |
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index b155414192da..53d1d5deb111 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h | |||
@@ -374,6 +374,9 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) | |||
374 | 374 | ||
375 | #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd))) | 375 | #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd))) |
376 | 376 | ||
377 | /* we don't need complex calculations here as the pmd is folded into the pgd */ | ||
378 | #define pmd_addr_end(addr,end) (end) | ||
379 | |||
377 | /* | 380 | /* |
378 | * Conversion functions: convert a page and protection to a page entry, | 381 | * Conversion functions: convert a page and protection to a page entry, |
379 | * and a page entry and page directory to the page they refer to. | 382 | * and a page entry and page directory to the page they refer to. |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index c09e3573c5de..bb96a7d4bbf5 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -911,7 +911,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
911 | * A special ghost syscall is used for that (see traps.c). | 911 | * A special ghost syscall is used for that (see traps.c). |
912 | */ | 912 | */ |
913 | stmfd sp!, {r7, lr} | 913 | stmfd sp!, {r7, lr} |
914 | ldr r7, =1f @ it's 20 bits | 914 | ldr r7, 1f @ it's 20 bits |
915 | swi __ARM_NR_cmpxchg | 915 | swi __ARM_NR_cmpxchg |
916 | ldmfd sp!, {r7, pc} | 916 | ldmfd sp!, {r7, pc} |
917 | 1: .word __ARM_NR_cmpxchg | 917 | 1: .word __ARM_NR_cmpxchg |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index dd6b369ac69c..6bd82d25683c 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -85,9 +85,11 @@ ENTRY(stext) | |||
85 | mrc p15, 0, r9, c0, c0 @ get processor id | 85 | mrc p15, 0, r9, c0, c0 @ get processor id |
86 | bl __lookup_processor_type @ r5=procinfo r9=cpuid | 86 | bl __lookup_processor_type @ r5=procinfo r9=cpuid |
87 | movs r10, r5 @ invalid processor (r5=0)? | 87 | movs r10, r5 @ invalid processor (r5=0)? |
88 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
88 | beq __error_p @ yes, error 'p' | 89 | beq __error_p @ yes, error 'p' |
89 | bl __lookup_machine_type @ r5=machinfo | 90 | bl __lookup_machine_type @ r5=machinfo |
90 | movs r8, r5 @ invalid machine (r5=0)? | 91 | movs r8, r5 @ invalid machine (r5=0)? |
92 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
91 | beq __error_a @ yes, error 'a' | 93 | beq __error_a @ yes, error 'a' |
92 | bl __vet_atags | 94 | bl __vet_atags |
93 | #ifdef CONFIG_SMP_ON_UP | 95 | #ifdef CONFIG_SMP_ON_UP |
@@ -262,6 +264,7 @@ __create_page_tables: | |||
262 | mov pc, lr | 264 | mov pc, lr |
263 | ENDPROC(__create_page_tables) | 265 | ENDPROC(__create_page_tables) |
264 | .ltorg | 266 | .ltorg |
267 | .align | ||
265 | __enable_mmu_loc: | 268 | __enable_mmu_loc: |
266 | .long . | 269 | .long . |
267 | .long __enable_mmu | 270 | .long __enable_mmu |
@@ -282,6 +285,7 @@ ENTRY(secondary_startup) | |||
282 | bl __lookup_processor_type | 285 | bl __lookup_processor_type |
283 | movs r10, r5 @ invalid processor? | 286 | movs r10, r5 @ invalid processor? |
284 | moveq r0, #'p' @ yes, error 'p' | 287 | moveq r0, #'p' @ yes, error 'p' |
288 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
285 | beq __error_p | 289 | beq __error_p |
286 | 290 | ||
287 | /* | 291 | /* |
@@ -308,6 +312,8 @@ ENTRY(__secondary_switched) | |||
308 | b secondary_start_kernel | 312 | b secondary_start_kernel |
309 | ENDPROC(__secondary_switched) | 313 | ENDPROC(__secondary_switched) |
310 | 314 | ||
315 | .align | ||
316 | |||
311 | .type __secondary_data, %object | 317 | .type __secondary_data, %object |
312 | __secondary_data: | 318 | __secondary_data: |
313 | .long . | 319 | .long . |
@@ -413,6 +419,7 @@ __fixup_smp_on_up: | |||
413 | mov pc, lr | 419 | mov pc, lr |
414 | ENDPROC(__fixup_smp) | 420 | ENDPROC(__fixup_smp) |
415 | 421 | ||
422 | .align | ||
416 | 1: .word . | 423 | 1: .word . |
417 | .word __smpalt_begin | 424 | .word __smpalt_begin |
418 | .word __smpalt_end | 425 | .word __smpalt_end |
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S index fd26f8d65151..9cf4cbf8f95b 100644 --- a/arch/arm/kernel/relocate_kernel.S +++ b/arch/arm/kernel/relocate_kernel.S | |||
@@ -59,6 +59,8 @@ relocate_new_kernel: | |||
59 | ldr r2,kexec_boot_atags | 59 | ldr r2,kexec_boot_atags |
60 | mov pc,lr | 60 | mov pc,lr |
61 | 61 | ||
62 | .align | ||
63 | |||
62 | .globl kexec_start_address | 64 | .globl kexec_start_address |
63 | kexec_start_address: | 65 | kexec_start_address: |
64 | .long 0x0 | 66 | .long 0x0 |
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S index 1e4cbd4e7be9..64f6bc1a9132 100644 --- a/arch/arm/lib/findbit.S +++ b/arch/arm/lib/findbit.S | |||
@@ -174,8 +174,8 @@ ENDPROC(_find_next_bit_be) | |||
174 | */ | 174 | */ |
175 | .L_found: | 175 | .L_found: |
176 | #if __LINUX_ARM_ARCH__ >= 5 | 176 | #if __LINUX_ARM_ARCH__ >= 5 |
177 | rsb r1, r3, #0 | 177 | rsb r0, r3, #0 |
178 | and r3, r3, r1 | 178 | and r3, r3, r0 |
179 | clz r3, r3 | 179 | clz r3, r3 |
180 | rsb r3, r3, #31 | 180 | rsb r3, r3, #31 |
181 | add r0, r2, r3 | 181 | add r0, r2, r3 |
@@ -190,5 +190,7 @@ ENDPROC(_find_next_bit_be) | |||
190 | addeq r2, r2, #1 | 190 | addeq r2, r2, #1 |
191 | mov r0, r2 | 191 | mov r0, r2 |
192 | #endif | 192 | #endif |
193 | cmp r1, r0 @ Clamp to maxbit | ||
194 | movlo r0, r1 | ||
193 | mov pc, lr | 195 | mov pc, lr |
194 | 196 | ||
diff --git a/arch/arm/mach-aaec2000/include/mach/vmalloc.h b/arch/arm/mach-aaec2000/include/mach/vmalloc.h index cff4e0a996ce..a6299e8321bd 100644 --- a/arch/arm/mach-aaec2000/include/mach/vmalloc.h +++ b/arch/arm/mach-aaec2000/include/mach/vmalloc.h | |||
@@ -11,6 +11,6 @@ | |||
11 | #ifndef __ASM_ARCH_VMALLOC_H | 11 | #ifndef __ASM_ARCH_VMALLOC_H |
12 | #define __ASM_ARCH_VMALLOC_H | 12 | #define __ASM_ARCH_VMALLOC_H |
13 | 13 | ||
14 | #define VMALLOC_END 0xd0000000 | 14 | #define VMALLOC_END 0xd0000000UL |
15 | 15 | ||
16 | #endif /* __ASM_ARCH_VMALLOC_H */ | 16 | #endif /* __ASM_ARCH_VMALLOC_H */ |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 821eb842795f..62d686f0b426 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -24,8 +24,8 @@ obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | |||
24 | 24 | ||
25 | # AT91RM9200 board-specific support | 25 | # AT91RM9200 board-specific support |
26 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o | 26 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o |
27 | obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o | 27 | obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o |
28 | obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o | 28 | obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o |
29 | obj-$(CONFIG_MACH_CSB337) += board-csb337.o | 29 | obj-$(CONFIG_MACH_CSB337) += board-csb337.o |
30 | obj-$(CONFIG_MACH_CSB637) += board-csb637.o | 30 | obj-$(CONFIG_MACH_CSB637) += board-csb637.o |
31 | obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o | 31 | obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 9338825cfcd7..7b539228e0ef 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -1106,51 +1106,6 @@ static inline void configure_usart3_pins(unsigned pins) | |||
1106 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 1106 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
1107 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 1107 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
1108 | 1108 | ||
1109 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) | ||
1110 | { | ||
1111 | int i; | ||
1112 | |||
1113 | /* Fill in list of supported UARTs */ | ||
1114 | for (i = 0; i < config->nr_tty; i++) { | ||
1115 | switch (config->tty_map[i]) { | ||
1116 | case 0: | ||
1117 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
1118 | at91_uarts[i] = &at91rm9200_uart0_device; | ||
1119 | at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); | ||
1120 | break; | ||
1121 | case 1: | ||
1122 | configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); | ||
1123 | at91_uarts[i] = &at91rm9200_uart1_device; | ||
1124 | at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); | ||
1125 | break; | ||
1126 | case 2: | ||
1127 | configure_usart2_pins(0); | ||
1128 | at91_uarts[i] = &at91rm9200_uart2_device; | ||
1129 | at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); | ||
1130 | break; | ||
1131 | case 3: | ||
1132 | configure_usart3_pins(0); | ||
1133 | at91_uarts[i] = &at91rm9200_uart3_device; | ||
1134 | at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); | ||
1135 | break; | ||
1136 | case 4: | ||
1137 | configure_dbgu_pins(); | ||
1138 | at91_uarts[i] = &at91rm9200_dbgu_device; | ||
1139 | at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); | ||
1140 | break; | ||
1141 | default: | ||
1142 | continue; | ||
1143 | } | ||
1144 | at91_uarts[i]->id = i; /* update ID number to mapped ID */ | ||
1145 | } | ||
1146 | |||
1147 | /* Set serial console device */ | ||
1148 | if (config->console_tty < ATMEL_MAX_UART) | ||
1149 | atmel_default_console_device = at91_uarts[config->console_tty]; | ||
1150 | if (!atmel_default_console_device) | ||
1151 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1152 | } | ||
1153 | |||
1154 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1109 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1155 | { | 1110 | { |
1156 | struct platform_device *pdev; | 1111 | struct platform_device *pdev; |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 46bdc82d3fbf..8a3fc84847c1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -39,24 +39,24 @@ | |||
39 | #include "generic.h" | 39 | #include "generic.h" |
40 | 40 | ||
41 | 41 | ||
42 | /* | ||
43 | * Serial port configuration. | ||
44 | * 0 .. 3 = USART0 .. USART3 | ||
45 | * 4 = DBGU | ||
46 | */ | ||
47 | static struct at91_uart_config __initdata onearm_uart_config = { | ||
48 | .console_tty = 0, /* ttyS0 */ | ||
49 | .nr_tty = 3, | ||
50 | .tty_map = { 4, 0, 1, -1, -1 }, /* ttyS0, ..., ttyS4 */ | ||
51 | }; | ||
52 | |||
53 | static void __init onearm_map_io(void) | 42 | static void __init onearm_map_io(void) |
54 | { | 43 | { |
55 | /* Initialize processor: 18.432 MHz crystal */ | 44 | /* Initialize processor: 18.432 MHz crystal */ |
56 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 45 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); |
57 | 46 | ||
58 | /* Setup the serial ports and console */ | 47 | /* DBGU on ttyS0. (Rx & Tx only) */ |
59 | at91_init_serial(&onearm_uart_config); | 48 | at91_register_uart(0, 0, 0); |
49 | |||
50 | /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ | ||
51 | at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
52 | |||
53 | /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
54 | at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
55 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD | ||
56 | | ATMEL_UART_RI); | ||
57 | |||
58 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
59 | at91_set_serial_console(0); | ||
60 | } | 60 | } |
61 | 61 | ||
62 | static void __init onearm_init_irq(void) | 62 | static void __init onearm_init_irq(void) |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index c0ce79d431a0..d2e1f4ec1fcc 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -39,17 +39,6 @@ | |||
39 | #include "generic.h" | 39 | #include "generic.h" |
40 | 40 | ||
41 | 41 | ||
42 | /* | ||
43 | * Serial port configuration. | ||
44 | * 0 .. 3 = USART0 .. USART3 | ||
45 | * 4 = DBGU | ||
46 | */ | ||
47 | static struct at91_uart_config __initdata kafa_uart_config = { | ||
48 | .console_tty = 0, /* ttyS0 */ | ||
49 | .nr_tty = 2, | ||
50 | .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ | ||
51 | }; | ||
52 | |||
53 | static void __init kafa_map_io(void) | 42 | static void __init kafa_map_io(void) |
54 | { | 43 | { |
55 | /* Initialize processor: 18.432 MHz crystal */ | 44 | /* Initialize processor: 18.432 MHz crystal */ |
@@ -58,8 +47,14 @@ static void __init kafa_map_io(void) | |||
58 | /* Set up the LEDs */ | 47 | /* Set up the LEDs */ |
59 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); | 48 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); |
60 | 49 | ||
61 | /* Setup the serial ports and console */ | 50 | /* DBGU on ttyS0. (Rx & Tx only) */ |
62 | at91_init_serial(&kafa_uart_config); | 51 | at91_register_uart(0, 0, 0); |
52 | |||
53 | /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ | ||
54 | at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
55 | |||
56 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
57 | at91_set_serial_console(0); | ||
63 | } | 58 | } |
64 | 59 | ||
65 | static void __init kafa_init_irq(void) | 60 | static void __init kafa_init_irq(void) |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 9d833bbc592d..55dad3a46547 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -43,24 +43,21 @@ | |||
43 | #include "generic.h" | 43 | #include "generic.h" |
44 | 44 | ||
45 | 45 | ||
46 | /* | ||
47 | * Serial port configuration. | ||
48 | * 0 .. 3 = USART0 .. USART3 | ||
49 | * 4 = DBGU | ||
50 | */ | ||
51 | static struct at91_uart_config __initdata picotux200_uart_config = { | ||
52 | .console_tty = 0, /* ttyS0 */ | ||
53 | .nr_tty = 2, | ||
54 | .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ | ||
55 | }; | ||
56 | |||
57 | static void __init picotux200_map_io(void) | 46 | static void __init picotux200_map_io(void) |
58 | { | 47 | { |
59 | /* Initialize processor: 18.432 MHz crystal */ | 48 | /* Initialize processor: 18.432 MHz crystal */ |
60 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 49 | at91rm9200_initialize(18432000, AT91RM9200_BGA); |
61 | 50 | ||
62 | /* Setup the serial ports and console */ | 51 | /* DBGU on ttyS0. (Rx & Tx only) */ |
63 | at91_init_serial(&picotux200_uart_config); | 52 | at91_register_uart(0, 0, 0); |
53 | |||
54 | /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
55 | at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
56 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD | ||
57 | | ATMEL_UART_RI); | ||
58 | |||
59 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
60 | at91_set_serial_console(0); | ||
64 | } | 61 | } |
65 | 62 | ||
66 | static void __init picotux200_init_irq(void) | 63 | static void __init picotux200_init_irq(void) |
@@ -77,11 +74,6 @@ static struct at91_usbh_data __initdata picotux200_usbh_data = { | |||
77 | .ports = 1, | 74 | .ports = 1, |
78 | }; | 75 | }; |
79 | 76 | ||
80 | // static struct at91_udc_data __initdata picotux200_udc_data = { | ||
81 | // .vbus_pin = AT91_PIN_PD4, | ||
82 | // .pullup_pin = AT91_PIN_PD5, | ||
83 | // }; | ||
84 | |||
85 | static struct at91_mmc_data __initdata picotux200_mmc_data = { | 77 | static struct at91_mmc_data __initdata picotux200_mmc_data = { |
86 | .det_pin = AT91_PIN_PB27, | 78 | .det_pin = AT91_PIN_PB27, |
87 | .slot_b = 0, | 79 | .slot_b = 0, |
@@ -89,21 +81,6 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { | |||
89 | .wp_pin = AT91_PIN_PA17, | 81 | .wp_pin = AT91_PIN_PA17, |
90 | }; | 82 | }; |
91 | 83 | ||
92 | // static struct spi_board_info picotux200_spi_devices[] = { | ||
93 | // { /* DataFlash chip */ | ||
94 | // .modalias = "mtd_dataflash", | ||
95 | // .chip_select = 0, | ||
96 | // .max_speed_hz = 15 * 1000 * 1000, | ||
97 | // }, | ||
98 | // #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
99 | // { /* DataFlash card */ | ||
100 | // .modalias = "mtd_dataflash", | ||
101 | // .chip_select = 3, | ||
102 | // .max_speed_hz = 15 * 1000 * 1000, | ||
103 | // }, | ||
104 | // #endif | ||
105 | // }; | ||
106 | |||
107 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 | 84 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 |
108 | #define PICOTUX200_FLASH_SIZE SZ_4M | 85 | #define PICOTUX200_FLASH_SIZE SZ_4M |
109 | 86 | ||
@@ -135,21 +112,11 @@ static void __init picotux200_board_init(void) | |||
135 | at91_add_device_eth(&picotux200_eth_data); | 112 | at91_add_device_eth(&picotux200_eth_data); |
136 | /* USB Host */ | 113 | /* USB Host */ |
137 | at91_add_device_usbh(&picotux200_usbh_data); | 114 | at91_add_device_usbh(&picotux200_usbh_data); |
138 | /* USB Device */ | ||
139 | // at91_add_device_udc(&picotux200_udc_data); | ||
140 | // at91_set_multi_drive(picotux200_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ | ||
141 | /* I2C */ | 115 | /* I2C */ |
142 | at91_add_device_i2c(NULL, 0); | 116 | at91_add_device_i2c(NULL, 0); |
143 | /* SPI */ | ||
144 | // at91_add_device_spi(picotux200_spi_devices, ARRAY_SIZE(picotux200_spi_devices)); | ||
145 | #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
146 | /* DataFlash card */ | ||
147 | at91_set_gpio_output(AT91_PIN_PB22, 0); | ||
148 | #else | ||
149 | /* MMC */ | 117 | /* MMC */ |
150 | at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ | 118 | at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ |
151 | at91_add_device_mmc(0, &picotux200_mmc_data); | 119 | at91_add_device_mmc(0, &picotux200_mmc_data); |
152 | #endif | ||
153 | /* NOR Flash */ | 120 | /* NOR Flash */ |
154 | platform_device_register(&picotux200_flash); | 121 | platform_device_register(&picotux200_flash); |
155 | } | 122 | } |
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-rm9200dk.c index e14f0e165680..4c1047c8200d 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-at91/board-dk.c | 2 | * linux/arch/arm/mach-at91/board-rm9200dk.c |
3 | * | 3 | * |
4 | * Copyright (C) 2005 SAN People | 4 | * Copyright (C) 2005 SAN People |
5 | * | 5 | * |
@@ -91,10 +91,12 @@ static struct at91_cf_data __initdata dk_cf_data = { | |||
91 | // .vcc_pin = ... always powered | 91 | // .vcc_pin = ... always powered |
92 | }; | 92 | }; |
93 | 93 | ||
94 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
94 | static struct at91_mmc_data __initdata dk_mmc_data = { | 95 | static struct at91_mmc_data __initdata dk_mmc_data = { |
95 | .slot_b = 0, | 96 | .slot_b = 0, |
96 | .wire4 = 1, | 97 | .wire4 = 1, |
97 | }; | 98 | }; |
99 | #endif | ||
98 | 100 | ||
99 | static struct spi_board_info dk_spi_devices[] = { | 101 | static struct spi_board_info dk_spi_devices[] = { |
100 | { /* DataFlash chip */ | 102 | { /* DataFlash chip */ |
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 56e92c4bbc2a..9df1be8818c0 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-at91/board-ek.c | 2 | * linux/arch/arm/mach-at91/board-rm9200ek.c |
3 | * | 3 | * |
4 | * Copyright (C) 2005 SAN People | 4 | * Copyright (C) 2005 SAN People |
5 | * | 5 | * |
@@ -84,12 +84,14 @@ static struct at91_udc_data __initdata ek_udc_data = { | |||
84 | .pullup_pin = AT91_PIN_PD5, | 84 | .pullup_pin = AT91_PIN_PD5, |
85 | }; | 85 | }; |
86 | 86 | ||
87 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
87 | static struct at91_mmc_data __initdata ek_mmc_data = { | 88 | static struct at91_mmc_data __initdata ek_mmc_data = { |
88 | .det_pin = AT91_PIN_PB27, | 89 | .det_pin = AT91_PIN_PB27, |
89 | .slot_b = 0, | 90 | .slot_b = 0, |
90 | .wire4 = 1, | 91 | .wire4 = 1, |
91 | .wp_pin = AT91_PIN_PA17, | 92 | .wp_pin = AT91_PIN_PA17, |
92 | }; | 93 | }; |
94 | #endif | ||
93 | 95 | ||
94 | static struct spi_board_info ek_spi_devices[] = { | 96 | static struct spi_board_info ek_spi_devices[] = { |
95 | { /* DataFlash chip */ | 97 | { /* DataFlash chip */ |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 89df00a9d2f7..e0f0080eb639 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -387,7 +387,7 @@ static struct spi_board_info yl9200_spi_devices[] = { | |||
387 | * EPSON S1D13806 FB (discontinued chip) | 387 | * EPSON S1D13806 FB (discontinued chip) |
388 | * EPSON S1D13506 FB | 388 | * EPSON S1D13506 FB |
389 | */ | 389 | */ |
390 | #if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) | 390 | #if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) |
391 | #include <video/s1d13xxxfb.h> | 391 | #include <video/s1d13xxxfb.h> |
392 | 392 | ||
393 | 393 | ||
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 58528aa9c8a8..2b499eb343a1 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -137,13 +137,7 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de | |||
137 | extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); | 137 | extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); |
138 | extern void __init at91_set_serial_console(unsigned portnr); | 138 | extern void __init at91_set_serial_console(unsigned portnr); |
139 | 139 | ||
140 | struct at91_uart_config { | ||
141 | unsigned short console_tty; /* tty number of serial console */ | ||
142 | unsigned short nr_tty; /* number of serial tty's */ | ||
143 | short tty_map[]; /* map UART to tty number */ | ||
144 | }; | ||
145 | extern struct platform_device *atmel_default_console_device; | 140 | extern struct platform_device *atmel_default_console_device; |
146 | extern void __init __deprecated at91_init_serial(struct at91_uart_config *config); | ||
147 | 141 | ||
148 | struct atmel_uart_data { | 142 | struct atmel_uart_data { |
149 | short use_dma_tx; /* use transmit DMA? */ | 143 | short use_dma_tx; /* use transmit DMA? */ |
diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h index 3db3a09fd398..7397bd7817d9 100644 --- a/arch/arm/mach-bcmring/include/mach/vmalloc.h +++ b/arch/arm/mach-bcmring/include/mach/vmalloc.h | |||
@@ -22,4 +22,4 @@ | |||
22 | * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles | 22 | * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles |
23 | * larger physical memory designs better. | 23 | * larger physical memory designs better. |
24 | */ | 24 | */ |
25 | #define VMALLOC_END 0xf0000000 | 25 | #define VMALLOC_END 0xf0000000UL |
diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h index 30b3a287ed88..467b96137e47 100644 --- a/arch/arm/mach-clps711x/include/mach/vmalloc.h +++ b/arch/arm/mach-clps711x/include/mach/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xd0000000 | 20 | #define VMALLOC_END 0xd0000000UL |
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 38088c36936c..78defd71a829 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c | |||
@@ -369,7 +369,7 @@ static int __init cns3xxx_pcie_init(void) | |||
369 | { | 369 | { |
370 | int i; | 370 | int i; |
371 | 371 | ||
372 | hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, | 372 | hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0, |
373 | "imprecise external abort"); | 373 | "imprecise external abort"); |
374 | 374 | ||
375 | for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { | 375 | for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 9be261beae7d..2652af124acd 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -359,8 +359,8 @@ static struct clk_lookup dm355_clks[] = { | |||
359 | CLK(NULL, "uart1", &uart1_clk), | 359 | CLK(NULL, "uart1", &uart1_clk), |
360 | CLK(NULL, "uart2", &uart2_clk), | 360 | CLK(NULL, "uart2", &uart2_clk), |
361 | CLK("i2c_davinci.1", NULL, &i2c_clk), | 361 | CLK("i2c_davinci.1", NULL, &i2c_clk), |
362 | CLK("davinci-asp.0", NULL, &asp0_clk), | 362 | CLK("davinci-mcbsp.0", NULL, &asp0_clk), |
363 | CLK("davinci-asp.1", NULL, &asp1_clk), | 363 | CLK("davinci-mcbsp.1", NULL, &asp1_clk), |
364 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), | 364 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), |
365 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), | 365 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), |
366 | CLK("spi_davinci.0", NULL, &spi0_clk), | 366 | CLK("spi_davinci.0", NULL, &spi0_clk), |
@@ -664,7 +664,7 @@ static struct resource dm355_asp1_resources[] = { | |||
664 | }; | 664 | }; |
665 | 665 | ||
666 | static struct platform_device dm355_asp1_device = { | 666 | static struct platform_device dm355_asp1_device = { |
667 | .name = "davinci-asp", | 667 | .name = "davinci-mcbsp", |
668 | .id = 1, | 668 | .id = 1, |
669 | .num_resources = ARRAY_SIZE(dm355_asp1_resources), | 669 | .num_resources = ARRAY_SIZE(dm355_asp1_resources), |
670 | .resource = dm355_asp1_resources, | 670 | .resource = dm355_asp1_resources, |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a12065e87266..c466d710d3c1 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -459,7 +459,7 @@ static struct clk_lookup dm365_clks[] = { | |||
459 | CLK(NULL, "usb", &usb_clk), | 459 | CLK(NULL, "usb", &usb_clk), |
460 | CLK("davinci_emac.1", NULL, &emac_clk), | 460 | CLK("davinci_emac.1", NULL, &emac_clk), |
461 | CLK("davinci_voicecodec", NULL, &voicecodec_clk), | 461 | CLK("davinci_voicecodec", NULL, &voicecodec_clk), |
462 | CLK("davinci-asp.0", NULL, &asp0_clk), | 462 | CLK("davinci-mcbsp", NULL, &asp0_clk), |
463 | CLK(NULL, "rto", &rto_clk), | 463 | CLK(NULL, "rto", &rto_clk), |
464 | CLK(NULL, "mjcp", &mjcp_clk), | 464 | CLK(NULL, "mjcp", &mjcp_clk), |
465 | CLK(NULL, NULL, NULL), | 465 | CLK(NULL, NULL, NULL), |
@@ -922,8 +922,8 @@ static struct resource dm365_asp_resources[] = { | |||
922 | }; | 922 | }; |
923 | 923 | ||
924 | static struct platform_device dm365_asp_device = { | 924 | static struct platform_device dm365_asp_device = { |
925 | .name = "davinci-asp", | 925 | .name = "davinci-mcbsp", |
926 | .id = 0, | 926 | .id = -1, |
927 | .num_resources = ARRAY_SIZE(dm365_asp_resources), | 927 | .num_resources = ARRAY_SIZE(dm365_asp_resources), |
928 | .resource = dm365_asp_resources, | 928 | .resource = dm365_asp_resources, |
929 | }; | 929 | }; |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 0608dd776a16..9a2376b3137c 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -302,7 +302,7 @@ static struct clk_lookup dm644x_clks[] = { | |||
302 | CLK("davinci_emac.1", NULL, &emac_clk), | 302 | CLK("davinci_emac.1", NULL, &emac_clk), |
303 | CLK("i2c_davinci.1", NULL, &i2c_clk), | 303 | CLK("i2c_davinci.1", NULL, &i2c_clk), |
304 | CLK("palm_bk3710", NULL, &ide_clk), | 304 | CLK("palm_bk3710", NULL, &ide_clk), |
305 | CLK("davinci-asp", NULL, &asp_clk), | 305 | CLK("davinci-mcbsp", NULL, &asp_clk), |
306 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), | 306 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), |
307 | CLK(NULL, "spi", &spi_clk), | 307 | CLK(NULL, "spi", &spi_clk), |
308 | CLK(NULL, "gpio", &gpio_clk), | 308 | CLK(NULL, "gpio", &gpio_clk), |
@@ -580,7 +580,7 @@ static struct resource dm644x_asp_resources[] = { | |||
580 | }; | 580 | }; |
581 | 581 | ||
582 | static struct platform_device dm644x_asp_device = { | 582 | static struct platform_device dm644x_asp_device = { |
583 | .name = "davinci-asp", | 583 | .name = "davinci-mcbsp", |
584 | .id = -1, | 584 | .id = -1, |
585 | .num_resources = ARRAY_SIZE(dm644x_asp_resources), | 585 | .num_resources = ARRAY_SIZE(dm644x_asp_resources), |
586 | .resource = dm644x_asp_resources, | 586 | .resource = dm644x_asp_resources, |
diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h index 60bde56fba4c..ea141b7a3e03 100644 --- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h +++ b/arch/arm/mach-ebsa110/include/mach/vmalloc.h | |||
@@ -7,4 +7,4 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #define VMALLOC_END 0xdf000000 | 10 | #define VMALLOC_END 0xdf000000UL |
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h index 0ffbb7c85e59..40ba78e5782b 100644 --- a/arch/arm/mach-footbridge/include/mach/vmalloc.h +++ b/arch/arm/mach-footbridge/include/mach/vmalloc.h | |||
@@ -7,4 +7,4 @@ | |||
7 | */ | 7 | */ |
8 | 8 | ||
9 | 9 | ||
10 | #define VMALLOC_END 0xf0000000 | 10 | #define VMALLOC_END 0xf0000000UL |
diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h index a45915b88756..8520b4a4d4e6 100644 --- a/arch/arm/mach-h720x/include/mach/vmalloc.h +++ b/arch/arm/mach-h720x/include/mach/vmalloc.h | |||
@@ -5,6 +5,6 @@ | |||
5 | #ifndef __ARCH_ARM_VMALLOC_H | 5 | #ifndef __ARCH_ARM_VMALLOC_H |
6 | #define __ARCH_ARM_VMALLOC_H | 6 | #define __ARCH_ARM_VMALLOC_H |
7 | 7 | ||
8 | #define VMALLOC_END 0xd0000000 | 8 | #define VMALLOC_END 0xd0000000UL |
9 | 9 | ||
10 | #endif | 10 | #endif |
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 026263c665ca..7e1e9dc2c8fc 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | |||
@@ -250,9 +250,6 @@ static const struct imxuart_platform_data uart_pdata __initconst = { | |||
250 | .flags = IMXUART_HAVE_RTSCTS, | 250 | .flags = IMXUART_HAVE_RTSCTS, |
251 | }; | 251 | }; |
252 | 252 | ||
253 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) \ | ||
254 | || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
255 | |||
256 | #define ADS7846_PENDOWN (GPIO_PORTD | 25) | 253 | #define ADS7846_PENDOWN (GPIO_PORTD | 25) |
257 | 254 | ||
258 | static void ads7846_dev_init(void) | 255 | static void ads7846_dev_init(void) |
@@ -273,9 +270,7 @@ static struct ads7846_platform_data ads7846_config __initdata = { | |||
273 | .get_pendown_state = ads7846_get_pendown_state, | 270 | .get_pendown_state = ads7846_get_pendown_state, |
274 | .keep_vref_on = 1, | 271 | .keep_vref_on = 1, |
275 | }; | 272 | }; |
276 | #endif | ||
277 | 273 | ||
278 | #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) | ||
279 | static struct spi_board_info eukrea_mbimx27_spi_board_info[] __initdata = { | 274 | static struct spi_board_info eukrea_mbimx27_spi_board_info[] __initdata = { |
280 | [0] = { | 275 | [0] = { |
281 | .modalias = "ads7846", | 276 | .modalias = "ads7846", |
@@ -294,7 +289,6 @@ static const struct spi_imx_master eukrea_mbimx27_spi0_data __initconst = { | |||
294 | .chipselect = eukrea_mbimx27_spi_cs, | 289 | .chipselect = eukrea_mbimx27_spi_cs, |
295 | .num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs), | 290 | .num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs), |
296 | }; | 291 | }; |
297 | #endif | ||
298 | 292 | ||
299 | static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = { | 293 | static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = { |
300 | { | 294 | { |
diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h index e056e7cf5645..2f5a2bafb11f 100644 --- a/arch/arm/mach-integrator/include/mach/vmalloc.h +++ b/arch/arm/mach-integrator/include/mach/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xd0000000 | 20 | #define VMALLOC_END 0xd0000000UL |
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h index 31a32ad062dc..d138448eff16 100644 --- a/arch/arm/mach-msm/include/mach/vmalloc.h +++ b/arch/arm/mach-msm/include/mach/vmalloc.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #ifndef __ASM_ARCH_MSM_VMALLOC_H | 16 | #ifndef __ASM_ARCH_MSM_VMALLOC_H |
17 | #define __ASM_ARCH_MSM_VMALLOC_H | 17 | #define __ASM_ARCH_MSM_VMALLOC_H |
18 | 18 | ||
19 | #define VMALLOC_END 0xd0000000 | 19 | #define VMALLOC_END 0xd0000000UL |
20 | 20 | ||
21 | #endif | 21 | #endif |
22 | 22 | ||
diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index 93afa10b13cf..d94d282fa676 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h | |||
@@ -42,9 +42,9 @@ extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst; | |||
42 | #define imx25_add_mxc_nand(pdata) \ | 42 | #define imx25_add_mxc_nand(pdata) \ |
43 | imx_add_mxc_nand(&imx25_mxc_nand_data, pdata) | 43 | imx_add_mxc_nand(&imx25_mxc_nand_data, pdata) |
44 | 44 | ||
45 | extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst; | 45 | extern const struct imx_spi_imx_data imx25_cspi_data[] __initconst; |
46 | #define imx25_add_spi_imx(id, pdata) \ | 46 | #define imx25_add_spi_imx(id, pdata) \ |
47 | imx_add_spi_imx(&imx25_spi_imx_data[id], pdata) | 47 | imx_add_spi_imx(&imx25_cspi_data[id], pdata) |
48 | #define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata) | 48 | #define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata) |
49 | #define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata) | 49 | #define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata) |
50 | #define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata) | 50 | #define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata) |
diff --git a/arch/arm/mach-mx3/mach-pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c index 99e0894e07db..fda56545d2fd 100644 --- a/arch/arm/mach-mx3/mach-pcm037_eet.c +++ b/arch/arm/mach-mx3/mach-pcm037_eet.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <mach/common.h> | 15 | #include <mach/common.h> |
16 | #include <mach/iomux-mx3.h> | 16 | #include <mach/iomux-mx3.h> |
17 | #include <mach/spi.h> | ||
17 | 18 | ||
18 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
19 | 20 | ||
@@ -59,14 +60,12 @@ static struct spi_board_info pcm037_spi_dev[] = { | |||
59 | }; | 60 | }; |
60 | 61 | ||
61 | /* Platform Data for MXC CSPI */ | 62 | /* Platform Data for MXC CSPI */ |
62 | #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) | ||
63 | static int pcm037_spi1_cs[] = {MXC_SPI_CS(1), IOMUX_TO_GPIO(MX31_PIN_KEY_COL7)}; | 63 | static int pcm037_spi1_cs[] = {MXC_SPI_CS(1), IOMUX_TO_GPIO(MX31_PIN_KEY_COL7)}; |
64 | 64 | ||
65 | static const struct spi_imx_master pcm037_spi1_pdata __initconst = { | 65 | static const struct spi_imx_master pcm037_spi1_pdata __initconst = { |
66 | .chipselect = pcm037_spi1_cs, | 66 | .chipselect = pcm037_spi1_cs, |
67 | .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs), | 67 | .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs), |
68 | }; | 68 | }; |
69 | #endif | ||
70 | 69 | ||
71 | /* GPIO-keys input device */ | 70 | /* GPIO-keys input device */ |
72 | static struct gpio_keys_button pcm037_gpio_keys[] = { | 71 | static struct gpio_keys_button pcm037_gpio_keys[] = { |
@@ -171,7 +170,7 @@ static struct platform_device pcm037_gpio_keys_device = { | |||
171 | }, | 170 | }, |
172 | }; | 171 | }; |
173 | 172 | ||
174 | static int eet_init_devices(void) | 173 | static int __init eet_init_devices(void) |
175 | { | 174 | { |
176 | if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET) | 175 | if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET) |
177 | return 0; | 176 | return 0; |
diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h index 7cca3574308f..871f1ef7bff5 100644 --- a/arch/arm/mach-netx/include/mach/vmalloc.h +++ b/arch/arm/mach-netx/include/mach/vmalloc.h | |||
@@ -16,4 +16,4 @@ | |||
16 | * along with this program; if not, write to the Free Software | 16 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
18 | */ | 18 | */ |
19 | #define VMALLOC_END 0xd0000000 | 19 | #define VMALLOC_END 0xd0000000UL |
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h index b001f67d695b..22ec4a479577 100644 --- a/arch/arm/mach-omap1/include/mach/vmalloc.h +++ b/arch/arm/mach-omap1/include/mach/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xd8000000 | 20 | #define VMALLOC_END 0xd8000000UL |
diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h index 4da31e997efe..866319947760 100644 --- a/arch/arm/mach-omap2/include/mach/vmalloc.h +++ b/arch/arm/mach-omap2/include/mach/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xf8000000 | 20 | #define VMALLOC_END 0xf8000000UL |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index a40457d81927..c85923e56b85 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/irq.h> | 30 | #include <linux/irq.h> |
31 | #include <linux/time.h> | 31 | #include <linux/time.h> |
32 | #include <linux/gpio.h> | 32 | #include <linux/gpio.h> |
33 | #include <linux/console.h> | ||
33 | 34 | ||
34 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
35 | #include <asm/mach/irq.h> | 36 | #include <asm/mach/irq.h> |
@@ -118,6 +119,10 @@ static void omap2_enter_full_retention(void) | |||
118 | if (omap_irq_pending()) | 119 | if (omap_irq_pending()) |
119 | goto no_sleep; | 120 | goto no_sleep; |
120 | 121 | ||
122 | /* Block console output in case it is on one of the OMAP UARTs */ | ||
123 | if (try_acquire_console_sem()) | ||
124 | goto no_sleep; | ||
125 | |||
121 | omap_uart_prepare_idle(0); | 126 | omap_uart_prepare_idle(0); |
122 | omap_uart_prepare_idle(1); | 127 | omap_uart_prepare_idle(1); |
123 | omap_uart_prepare_idle(2); | 128 | omap_uart_prepare_idle(2); |
@@ -131,6 +136,8 @@ static void omap2_enter_full_retention(void) | |||
131 | omap_uart_resume_idle(1); | 136 | omap_uart_resume_idle(1); |
132 | omap_uart_resume_idle(0); | 137 | omap_uart_resume_idle(0); |
133 | 138 | ||
139 | release_console_sem(); | ||
140 | |||
134 | no_sleep: | 141 | no_sleep: |
135 | if (omap2_pm_debug) { | 142 | if (omap2_pm_debug) { |
136 | unsigned long long tmp; | 143 | unsigned long long tmp; |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 75c0cd13ad8e..0ec8a04b7473 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
31 | #include <linux/console.h> | ||
31 | 32 | ||
32 | #include <plat/sram.h> | 33 | #include <plat/sram.h> |
33 | #include <plat/clockdomain.h> | 34 | #include <plat/clockdomain.h> |
@@ -385,6 +386,12 @@ void omap_sram_idle(void) | |||
385 | omap3_enable_io_chain(); | 386 | omap3_enable_io_chain(); |
386 | } | 387 | } |
387 | 388 | ||
389 | /* Block console output in case it is on one of the OMAP UARTs */ | ||
390 | if (per_next_state < PWRDM_POWER_ON || | ||
391 | core_next_state < PWRDM_POWER_ON) | ||
392 | if (try_acquire_console_sem()) | ||
393 | goto console_still_active; | ||
394 | |||
388 | /* PER */ | 395 | /* PER */ |
389 | if (per_next_state < PWRDM_POWER_ON) { | 396 | if (per_next_state < PWRDM_POWER_ON) { |
390 | omap_uart_prepare_idle(2); | 397 | omap_uart_prepare_idle(2); |
@@ -463,6 +470,9 @@ void omap_sram_idle(void) | |||
463 | omap_uart_resume_idle(3); | 470 | omap_uart_resume_idle(3); |
464 | } | 471 | } |
465 | 472 | ||
473 | release_console_sem(); | ||
474 | |||
475 | console_still_active: | ||
466 | /* Disable IO-PAD and IO-CHAIN wakeup */ | 476 | /* Disable IO-PAD and IO-CHAIN wakeup */ |
467 | if (omap3_has_io_wakeup() && | 477 | if (omap3_has_io_wakeup() && |
468 | (per_next_state < PWRDM_POWER_ON || | 478 | (per_next_state < PWRDM_POWER_ON || |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index becf0e38ef7e..d17960a1be25 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | #include <linux/serial_8250.h> | 28 | #include <linux/serial_8250.h> |
29 | #include <linux/pm_runtime.h> | 29 | #include <linux/pm_runtime.h> |
30 | #include <linux/console.h> | ||
30 | 31 | ||
31 | #ifdef CONFIG_SERIAL_OMAP | 32 | #ifdef CONFIG_SERIAL_OMAP |
32 | #include <plat/omap-serial.h> | 33 | #include <plat/omap-serial.h> |
@@ -406,7 +407,7 @@ void omap_uart_resume_idle(int num) | |||
406 | struct omap_uart_state *uart; | 407 | struct omap_uart_state *uart; |
407 | 408 | ||
408 | list_for_each_entry(uart, &uart_list, node) { | 409 | list_for_each_entry(uart, &uart_list, node) { |
409 | if (num == uart->num) { | 410 | if (num == uart->num && uart->can_sleep) { |
410 | omap_uart_enable_clocks(uart); | 411 | omap_uart_enable_clocks(uart); |
411 | 412 | ||
412 | /* Check for IO pad wakeup */ | 413 | /* Check for IO pad wakeup */ |
@@ -807,6 +808,8 @@ void __init omap_serial_init_port(int port) | |||
807 | 808 | ||
808 | oh->dev_attr = uart; | 809 | oh->dev_attr = uart; |
809 | 810 | ||
811 | acquire_console_sem(); /* in case the earlycon is on the UART */ | ||
812 | |||
810 | /* | 813 | /* |
811 | * Because of early UART probing, UART did not get idled | 814 | * Because of early UART probing, UART did not get idled |
812 | * on init. Now that omap_device is ready, ensure full idle | 815 | * on init. Now that omap_device is ready, ensure full idle |
@@ -831,6 +834,8 @@ void __init omap_serial_init_port(int port) | |||
831 | omap_uart_block_sleep(uart); | 834 | omap_uart_block_sleep(uart); |
832 | uart->timeout = DEFAULT_TIMEOUT; | 835 | uart->timeout = DEFAULT_TIMEOUT; |
833 | 836 | ||
837 | release_console_sem(); | ||
838 | |||
834 | if ((cpu_is_omap34xx() && uart->padconf) || | 839 | if ((cpu_is_omap34xx() && uart->padconf) || |
835 | (uart->wk_en && uart->wk_mask)) { | 840 | (uart->wk_en && uart->wk_mask)) { |
836 | device_init_wakeup(&od->pdev.dev, true); | 841 | device_init_wakeup(&od->pdev.dev, true); |
diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h index 31b65ee07b0b..184913c71141 100644 --- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h +++ b/arch/arm/mach-pnx4008/include/mach/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | 17 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced |
18 | * area for the same reason. ;) | 18 | * area for the same reason. ;) |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xd0000000 | 20 | #define VMALLOC_END 0xd0000000UL |
diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S index 4075473cf68a..b34be4554d40 100644 --- a/arch/arm/mach-realview/headsmp.S +++ b/arch/arm/mach-realview/headsmp.S | |||
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] | |||
35 | */ | 35 | */ |
36 | b secondary_startup | 36 | b secondary_startup |
37 | 37 | ||
38 | .align | ||
38 | 1: .long . | 39 | 1: .long . |
39 | .long pen_release | 40 | .long pen_release |
diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h index 3bcd86fadb81..fb700228637a 100644 --- a/arch/arm/mach-rpc/include/mach/vmalloc.h +++ b/arch/arm/mach-rpc/include/mach/vmalloc.h | |||
@@ -7,4 +7,4 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #define VMALLOC_END 0xdc000000 | 10 | #define VMALLOC_END 0xdc000000UL |
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 8aa2f1902a94..6b86a722a7db 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c | |||
@@ -77,13 +77,13 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) | |||
77 | 77 | ||
78 | /* Configures BT serial port GPIOs */ | 78 | /* Configures BT serial port GPIOs */ |
79 | s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); | 79 | s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); |
80 | s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); | 80 | s3c_gpio_setpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); |
81 | s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); | 81 | s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); |
82 | s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); | 82 | s3c_gpio_setpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); |
83 | s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); | 83 | s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); |
84 | s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); | 84 | s3c_gpio_setpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); |
85 | s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); | 85 | s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); |
86 | s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); | 86 | s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); |
87 | 87 | ||
88 | 88 | ||
89 | rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, | 89 | rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, |
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c index 084d121f368c..00174daf1526 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c2416/irq.c | |||
@@ -168,12 +168,11 @@ static struct irq_chip s3c2416_irq_dma = { | |||
168 | 168 | ||
169 | static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) | 169 | static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) |
170 | { | 170 | { |
171 | s3c2416_irq_demux(IRQ_S3C2443_UART3, 3); | 171 | s3c2416_irq_demux(IRQ_S3C2443_RX3, 3); |
172 | } | 172 | } |
173 | 173 | ||
174 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) | 174 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) |
175 | #define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) | 175 | #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) |
176 | |||
177 | 176 | ||
178 | static void s3c2416_irq_uart3_mask(unsigned int irqno) | 177 | static void s3c2416_irq_uart3_mask(unsigned int irqno) |
179 | { | 178 | { |
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 0e0d693f3974..893424767ce1 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c | |||
@@ -166,12 +166,11 @@ static struct irq_chip s3c2443_irq_dma = { | |||
166 | 166 | ||
167 | static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) | 167 | static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) |
168 | { | 168 | { |
169 | s3c2443_irq_demux(IRQ_S3C2443_UART3, 3); | 169 | s3c2443_irq_demux(IRQ_S3C2443_RX3, 3); |
170 | } | 170 | } |
171 | 171 | ||
172 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) | 172 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) |
173 | #define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) | 173 | #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) |
174 | |||
175 | 174 | ||
176 | static void s3c2443_irq_uart3_mask(unsigned int irqno) | 175 | static void s3c2443_irq_uart3_mask(unsigned int irqno) |
177 | { | 176 | { |
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 249c62956471..89f35e02e883 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c | |||
@@ -45,7 +45,7 @@ | |||
45 | 45 | ||
46 | #include <video/platform_lcd.h> | 46 | #include <video/platform_lcd.h> |
47 | 47 | ||
48 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 48 | #define UCON S3C2410_UCON_DEFAULT |
49 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 49 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
50 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 50 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
51 | 51 | ||
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index f9ef9b5c5f5a..4957ab0a0d4a 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c | |||
@@ -46,7 +46,7 @@ | |||
46 | 46 | ||
47 | #include <video/platform_lcd.h> | 47 | #include <video/platform_lcd.h> |
48 | 48 | ||
49 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 49 | #define UCON S3C2410_UCON_DEFAULT |
50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
52 | 52 | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 0ad7924fe62e..5dd1681c069e 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/i2c.h> | 15 | #include <linux/i2c.h> |
16 | #include <linux/sysdev.h> | ||
16 | 17 | ||
17 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index bcd7a5d53401..1fbc45b2a432 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/i2c.h> | 13 | #include <linux/i2c.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/serial_core.h> | 15 | #include <linux/serial_core.h> |
16 | #include <linux/sysdev.h> | ||
16 | 17 | ||
17 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h index 8e845b6a7cb5..b10df988526d 100644 --- a/arch/arm/mach-shark/include/mach/vmalloc.h +++ b/arch/arm/mach-shark/include/mach/vmalloc.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-shark/include/mach/vmalloc.h | 2 | * arch/arm/mach-shark/include/mach/vmalloc.h |
3 | */ | 3 | */ |
4 | #define VMALLOC_END 0xd0000000 | 4 | #define VMALLOC_END 0xd0000000UL |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index d3260542b943..d440e5f456ad 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -567,38 +567,127 @@ static struct platform_device *qhd_devices[] __initdata = { | |||
567 | 567 | ||
568 | /* FSI */ | 568 | /* FSI */ |
569 | #define IRQ_FSI evt2irq(0x1840) | 569 | #define IRQ_FSI evt2irq(0x1840) |
570 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) | ||
571 | { | ||
572 | int ret = 0; | ||
573 | |||
574 | if (rate <= 0) | ||
575 | return ret; | ||
576 | |||
577 | if (enable) { | ||
578 | ret = clk_set_rate(clk, rate); | ||
579 | if (0 == ret) | ||
580 | ret = clk_enable(clk); | ||
581 | } else { | ||
582 | clk_disable(clk); | ||
583 | } | ||
584 | |||
585 | return ret; | ||
586 | } | ||
587 | |||
588 | static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) | ||
589 | { | ||
590 | return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable); | ||
591 | } | ||
570 | 592 | ||
571 | static int fsi_set_rate(int is_porta, int rate) | 593 | static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable) |
594 | { | ||
595 | struct clk *fsia_ick; | ||
596 | struct clk *fsiack; | ||
597 | int ret = -EIO; | ||
598 | |||
599 | fsia_ick = clk_get(dev, "icka"); | ||
600 | if (IS_ERR(fsia_ick)) | ||
601 | return PTR_ERR(fsia_ick); | ||
602 | |||
603 | /* | ||
604 | * FSIACK is connected to AK4642, | ||
605 | * and use external clock pin from it. | ||
606 | * it is parent of fsia_ick now. | ||
607 | */ | ||
608 | fsiack = clk_get_parent(fsia_ick); | ||
609 | if (!fsiack) | ||
610 | goto fsia_ick_out; | ||
611 | |||
612 | /* | ||
613 | * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick | ||
614 | * | ||
615 | ** FIXME ** | ||
616 | * Because the freq_table of external clk (fsiack) are all 0, | ||
617 | * the return value of clk_round_rate became 0. | ||
618 | * So, it use __fsi_set_rate here. | ||
619 | */ | ||
620 | ret = __fsi_set_rate(fsiack, rate, enable); | ||
621 | if (ret < 0) | ||
622 | goto fsiack_out; | ||
623 | |||
624 | ret = __fsi_set_round_rate(fsia_ick, rate, enable); | ||
625 | if ((ret < 0) && enable) | ||
626 | __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */ | ||
627 | |||
628 | fsiack_out: | ||
629 | clk_put(fsiack); | ||
630 | |||
631 | fsia_ick_out: | ||
632 | clk_put(fsia_ick); | ||
633 | |||
634 | return 0; | ||
635 | } | ||
636 | |||
637 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | ||
572 | { | 638 | { |
573 | struct clk *fsib_clk; | 639 | struct clk *fsib_clk; |
574 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | 640 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; |
641 | long fsib_rate = 0; | ||
642 | long fdiv_rate = 0; | ||
643 | int ackmd_bpfmd; | ||
575 | int ret; | 644 | int ret; |
576 | 645 | ||
577 | /* set_rate is not needed if port A */ | ||
578 | if (is_porta) | ||
579 | return 0; | ||
580 | |||
581 | fsib_clk = clk_get(NULL, "fsib_clk"); | ||
582 | if (IS_ERR(fsib_clk)) | ||
583 | return -EINVAL; | ||
584 | |||
585 | switch (rate) { | 646 | switch (rate) { |
586 | case 44100: | 647 | case 44100: |
587 | clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 11283000)); | 648 | fsib_rate = rate * 256; |
588 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | 649 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; |
589 | break; | 650 | break; |
590 | case 48000: | 651 | case 48000: |
591 | clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000)); | 652 | fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ |
592 | clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000)); | 653 | fdiv_rate = rate * 256; |
593 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | 654 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; |
594 | break; | 655 | break; |
595 | default: | 656 | default: |
596 | pr_err("unsupported rate in FSI2 port B\n"); | 657 | pr_err("unsupported rate in FSI2 port B\n"); |
597 | ret = -EINVAL; | 658 | return -EINVAL; |
598 | break; | ||
599 | } | 659 | } |
600 | 660 | ||
661 | /* FSI B setting */ | ||
662 | fsib_clk = clk_get(dev, "ickb"); | ||
663 | if (IS_ERR(fsib_clk)) | ||
664 | return -EIO; | ||
665 | |||
666 | ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); | ||
601 | clk_put(fsib_clk); | 667 | clk_put(fsib_clk); |
668 | if (ret < 0) | ||
669 | return ret; | ||
670 | |||
671 | /* FSI DIV setting */ | ||
672 | ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); | ||
673 | if (ret < 0) { | ||
674 | /* disable FSI B */ | ||
675 | if (enable) | ||
676 | __fsi_set_round_rate(fsib_clk, fsib_rate, 0); | ||
677 | return ret; | ||
678 | } | ||
679 | |||
680 | return ackmd_bpfmd; | ||
681 | } | ||
682 | |||
683 | static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable) | ||
684 | { | ||
685 | int ret; | ||
686 | |||
687 | if (is_porta) | ||
688 | ret = fsi_ak4642_set_rate(dev, rate, enable); | ||
689 | else | ||
690 | ret = fsi_hdmi_set_rate(dev, rate, enable); | ||
602 | 691 | ||
603 | return ret; | 692 | return ret; |
604 | } | 693 | } |
@@ -880,6 +969,11 @@ static int __init hdmi_init_pm_clock(void) | |||
880 | goto out; | 969 | goto out; |
881 | } | 970 | } |
882 | 971 | ||
972 | ret = clk_enable(&sh7372_pllc2_clk); | ||
973 | if (ret < 0) { | ||
974 | pr_err("Cannot enable pllc2 clock\n"); | ||
975 | goto out; | ||
976 | } | ||
883 | pr_debug("PLLC2 set frequency %lu\n", rate); | 977 | pr_debug("PLLC2 set frequency %lu\n", rate); |
884 | 978 | ||
885 | ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); | 979 | ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); |
@@ -896,23 +990,11 @@ out: | |||
896 | 990 | ||
897 | device_initcall(hdmi_init_pm_clock); | 991 | device_initcall(hdmi_init_pm_clock); |
898 | 992 | ||
899 | #define FSIACK_DUMMY_RATE 48000 | ||
900 | static int __init fsi_init_pm_clock(void) | 993 | static int __init fsi_init_pm_clock(void) |
901 | { | 994 | { |
902 | struct clk *fsia_ick; | 995 | struct clk *fsia_ick; |
903 | int ret; | 996 | int ret; |
904 | 997 | ||
905 | /* | ||
906 | * FSIACK is connected to AK4642, | ||
907 | * and the rate is depend on playing sound rate. | ||
908 | * So, set dummy rate (= 48k) here | ||
909 | */ | ||
910 | ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE); | ||
911 | if (ret < 0) { | ||
912 | pr_err("Cannot set FSIACK dummy rate: %d\n", ret); | ||
913 | return ret; | ||
914 | } | ||
915 | |||
916 | fsia_ick = clk_get(&fsi_device.dev, "icka"); | 998 | fsia_ick = clk_get(&fsi_device.dev, "icka"); |
917 | if (IS_ERR(fsia_ick)) { | 999 | if (IS_ERR(fsia_ick)) { |
918 | ret = PTR_ERR(fsia_ick); | 1000 | ret = PTR_ERR(fsia_ick); |
@@ -921,16 +1003,9 @@ static int __init fsi_init_pm_clock(void) | |||
921 | } | 1003 | } |
922 | 1004 | ||
923 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); | 1005 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); |
924 | if (ret < 0) { | ||
925 | pr_err("Cannot set FSI-A parent: %d\n", ret); | ||
926 | goto out; | ||
927 | } | ||
928 | |||
929 | ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE); | ||
930 | if (ret < 0) | 1006 | if (ret < 0) |
931 | pr_err("Cannot set FSI-A rate: %d\n", ret); | 1007 | pr_err("Cannot set FSI-A parent: %d\n", ret); |
932 | 1008 | ||
933 | out: | ||
934 | clk_put(fsia_ick); | 1009 | clk_put(fsia_ick); |
935 | 1010 | ||
936 | return ret; | 1011 | return ret; |
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 7db31e6c6bf2..3aa026069435 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c | |||
@@ -220,8 +220,7 @@ static void pllc2_disable(struct clk *clk) | |||
220 | __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR); | 220 | __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR); |
221 | } | 221 | } |
222 | 222 | ||
223 | static int pllc2_set_rate(struct clk *clk, | 223 | static int pllc2_set_rate(struct clk *clk, unsigned long rate) |
224 | unsigned long rate, int algo_id) | ||
225 | { | 224 | { |
226 | unsigned long value; | 225 | unsigned long value; |
227 | int idx; | 226 | int idx; |
@@ -230,21 +229,13 @@ static int pllc2_set_rate(struct clk *clk, | |||
230 | if (idx < 0) | 229 | if (idx < 0) |
231 | return idx; | 230 | return idx; |
232 | 231 | ||
233 | if (rate == clk->parent->rate) { | 232 | if (rate == clk->parent->rate) |
234 | pllc2_disable(clk); | 233 | return -EINVAL; |
235 | return 0; | ||
236 | } | ||
237 | 234 | ||
238 | value = __raw_readl(PLLC2CR) & ~(0x3f << 24); | 235 | value = __raw_readl(PLLC2CR) & ~(0x3f << 24); |
239 | 236 | ||
240 | if (value & 0x80000000) | ||
241 | pllc2_disable(clk); | ||
242 | |||
243 | __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); | 237 | __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); |
244 | 238 | ||
245 | if (value & 0x80000000) | ||
246 | return pllc2_enable(clk); | ||
247 | |||
248 | return 0; | 239 | return 0; |
249 | } | 240 | } |
250 | 241 | ||
@@ -453,32 +444,24 @@ static int fsidiv_enable(struct clk *clk) | |||
453 | unsigned long value; | 444 | unsigned long value; |
454 | 445 | ||
455 | value = __raw_readl(clk->mapping->base) >> 16; | 446 | value = __raw_readl(clk->mapping->base) >> 16; |
456 | if (value < 2) { | 447 | if (value < 2) |
457 | fsidiv_disable(clk); | 448 | return -EIO; |
458 | return -ENOENT; | ||
459 | } | ||
460 | 449 | ||
461 | __raw_writel((value << 16) | 0x3, clk->mapping->base); | 450 | __raw_writel((value << 16) | 0x3, clk->mapping->base); |
462 | 451 | ||
463 | return 0; | 452 | return 0; |
464 | } | 453 | } |
465 | 454 | ||
466 | static int fsidiv_set_rate(struct clk *clk, | 455 | static int fsidiv_set_rate(struct clk *clk, unsigned long rate) |
467 | unsigned long rate, int algo_id) | ||
468 | { | 456 | { |
469 | int idx; | 457 | int idx; |
470 | 458 | ||
471 | if (clk->parent->rate == rate) { | ||
472 | fsidiv_disable(clk); | ||
473 | return 0; | ||
474 | } | ||
475 | |||
476 | idx = (clk->parent->rate / rate) & 0xffff; | 459 | idx = (clk->parent->rate / rate) & 0xffff; |
477 | if (idx < 2) | 460 | if (idx < 2) |
478 | return -ENOENT; | 461 | return -EINVAL; |
479 | 462 | ||
480 | __raw_writel(idx << 16, clk->mapping->base); | 463 | __raw_writel(idx << 16, clk->mapping->base); |
481 | return fsidiv_enable(clk); | 464 | return 0; |
482 | } | 465 | } |
483 | 466 | ||
484 | static struct clk_ops fsidiv_clk_ops = { | 467 | static struct clk_ops fsidiv_clk_ops = { |
@@ -609,8 +592,6 @@ static struct clk_lookup lookups[] = { | |||
609 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | 592 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), |
610 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), | 593 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), |
611 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), | 594 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), |
612 | CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]), | ||
613 | CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]), | ||
614 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | 595 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), |
615 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | 596 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), |
616 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), | 597 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), |
@@ -647,8 +628,8 @@ static struct clk_lookup lookups[] = { | |||
647 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ | 628 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ |
648 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ | 629 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ |
649 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ | 630 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ |
650 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ | 631 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ |
651 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */ | 632 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */ |
652 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | 633 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ |
653 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | 634 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ |
654 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ | 635 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ |
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index 8ea3bffb4e00..a0e7c12868bd 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S | |||
@@ -21,8 +21,8 @@ | |||
21 | #include <mach/io.h> | 21 | #include <mach/io.h> |
22 | 22 | ||
23 | .macro addruart, rp, rv | 23 | .macro addruart, rp, rv |
24 | ldreq \rp, =IO_APB_PHYS @ physical | 24 | ldr \rp, =IO_APB_PHYS @ physical |
25 | ldrne \rv, =IO_APB_VIRT @ virtual | 25 | ldr \rv, =IO_APB_VIRT @ virtual |
26 | #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) | 26 | #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) |
27 | #error "A debug UART must be selected in the kernel config to use DEBUG_LL" | 27 | #error "A debug UART must be selected in the kernel config to use DEBUG_LL" |
28 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) | 28 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) |
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 73fb1a551ec6..608a1372b172 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -75,14 +75,14 @@ void __init ux500_init_irq(void) | |||
75 | static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask) | 75 | static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask) |
76 | { | 76 | { |
77 | /* wait for the operation to complete */ | 77 | /* wait for the operation to complete */ |
78 | while (readl(reg) & mask) | 78 | while (readl_relaxed(reg) & mask) |
79 | ; | 79 | ; |
80 | } | 80 | } |
81 | 81 | ||
82 | static inline void ux500_cache_sync(void) | 82 | static inline void ux500_cache_sync(void) |
83 | { | 83 | { |
84 | void __iomem *base = __io_address(UX500_L2CC_BASE); | 84 | void __iomem *base = __io_address(UX500_L2CC_BASE); |
85 | writel(0, base + L2X0_CACHE_SYNC); | 85 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
86 | ux500_cache_wait(base + L2X0_CACHE_SYNC, 1); | 86 | ux500_cache_wait(base + L2X0_CACHE_SYNC, 1); |
87 | } | 87 | } |
88 | 88 | ||
@@ -107,7 +107,7 @@ static void ux500_l2x0_inv_all(void) | |||
107 | uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */ | 107 | uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */ |
108 | 108 | ||
109 | /* invalidate all ways */ | 109 | /* invalidate all ways */ |
110 | writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); | 110 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); |
111 | ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); | 111 | ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); |
112 | ux500_cache_sync(); | 112 | ux500_cache_sync(); |
113 | } | 113 | } |
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h index ebd8a2543d3b..7d8e069ad51b 100644 --- a/arch/arm/mach-versatile/include/mach/vmalloc.h +++ b/arch/arm/mach-versatile/include/mach/vmalloc.h | |||
@@ -18,4 +18,4 @@ | |||
18 | * along with this program; if not, write to the Free Software | 18 | * along with this program; if not, write to the Free Software |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
20 | */ | 20 | */ |
21 | #define VMALLOC_END 0xd8000000 | 21 | #define VMALLOC_END 0xd8000000UL |
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/mach-vexpress/headsmp.S index 8a78ff68e1ee..7a3f0632947c 100644 --- a/arch/arm/mach-vexpress/headsmp.S +++ b/arch/arm/mach-vexpress/headsmp.S | |||
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] | |||
35 | */ | 35 | */ |
36 | b secondary_startup | 36 | b secondary_startup |
37 | 37 | ||
38 | .align | ||
38 | 1: .long . | 39 | 1: .long . |
39 | .long pen_release | 40 | .long pen_release |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 17e7b0b57e49..55c17a6fb22f 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -206,8 +206,8 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, | |||
206 | */ | 206 | */ |
207 | if (pfn_valid(pfn)) { | 207 | if (pfn_valid(pfn)) { |
208 | printk(KERN_WARNING "BUG: Your driver calls ioremap() on system memory. This leads\n" | 208 | printk(KERN_WARNING "BUG: Your driver calls ioremap() on system memory. This leads\n" |
209 | KERN_WARNING "to architecturally unpredictable behaviour on ARMv6+, and ioremap()\n" | 209 | "to architecturally unpredictable behaviour on ARMv6+, and ioremap()\n" |
210 | KERN_WARNING "will fail in the next kernel release. Please fix your driver.\n"); | 210 | "will fail in the next kernel release. Please fix your driver.\n"); |
211 | WARN_ON(1); | 211 | WARN_ON(1); |
212 | } | 212 | } |
213 | 213 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 53cbe2225153..9b9ff5d949fd 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -381,7 +381,7 @@ __v7_ca9mp_proc_info: | |||
381 | PMD_SECT_XN | \ | 381 | PMD_SECT_XN | \ |
382 | PMD_SECT_AP_WRITE | \ | 382 | PMD_SECT_AP_WRITE | \ |
383 | PMD_SECT_AP_READ | 383 | PMD_SECT_AP_READ |
384 | b __v7_ca9mp_setup | 384 | W(b) __v7_ca9mp_setup |
385 | .long cpu_arch_name | 385 | .long cpu_arch_name |
386 | .long cpu_elf_name | 386 | .long cpu_elf_name |
387 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS | 387 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS |
@@ -413,7 +413,7 @@ __v7_proc_info: | |||
413 | PMD_SECT_XN | \ | 413 | PMD_SECT_XN | \ |
414 | PMD_SECT_AP_WRITE | \ | 414 | PMD_SECT_AP_WRITE | \ |
415 | PMD_SECT_AP_READ | 415 | PMD_SECT_AP_READ |
416 | b __v7_setup | 416 | W(b) __v7_setup |
417 | .long cpu_arch_name | 417 | .long cpu_arch_name |
418 | .long cpu_elf_name | 418 | .long cpu_elf_name |
419 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS | 419 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 85d3e55ca4a9..558cdfaf76b6 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/time.h> | 18 | #include <linux/time.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/timex.h> | 20 | #include <linux/timex.h> |
21 | #include <linux/sched.h> | ||
21 | #include <linux/io.h> | 22 | #include <linux/io.h> |
22 | #include <linux/clocksource.h> | 23 | #include <linux/clocksource.h> |
23 | #include <linux/clockchips.h> | 24 | #include <linux/clockchips.h> |
@@ -36,7 +37,7 @@ | |||
36 | /* | 37 | /* |
37 | * IOP clocksource (free-running timer 1). | 38 | * IOP clocksource (free-running timer 1). |
38 | */ | 39 | */ |
39 | static cycle_t iop_clocksource_read(struct clocksource *unused) | 40 | static cycle_t notrace iop_clocksource_read(struct clocksource *unused) |
40 | { | 41 | { |
41 | return 0xffffffffu - read_tcr1(); | 42 | return 0xffffffffu - read_tcr1(); |
42 | } | 43 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 02d989018059..3a705c7877dd 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c | |||
@@ -12,15 +12,7 @@ | |||
12 | 12 | ||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/devices-common.h> | 14 | #include <mach/devices-common.h> |
15 | #ifdef SDMA_IS_MERGED | ||
16 | #include <mach/sdma.h> | 15 | #include <mach/sdma.h> |
17 | #else | ||
18 | struct sdma_platform_data { | ||
19 | int sdma_version; | ||
20 | char *cpu_name; | ||
21 | int to_version; | ||
22 | }; | ||
23 | #endif | ||
24 | 16 | ||
25 | struct imx_imx_sdma_data { | 17 | struct imx_imx_sdma_data { |
26 | resource_size_t iobase; | 18 | resource_size_t iobase; |
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c index e48340ec331e..17f724c9452d 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c | |||
@@ -27,6 +27,7 @@ const struct imx_spi_imx_data imx21_cspi_data[] __initconst = { | |||
27 | imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) | 27 | imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) |
28 | imx21_cspi_data_entry(0, 1), | 28 | imx21_cspi_data_entry(0, 1), |
29 | imx21_cspi_data_entry(1, 2), | 29 | imx21_cspi_data_entry(1, 2), |
30 | }; | ||
30 | #endif | 31 | #endif |
31 | 32 | ||
32 | #ifdef CONFIG_ARCH_MX25 | 33 | #ifdef CONFIG_ARCH_MX25 |
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index aedf9c1d645e..63cdc6025bd7 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2008 STMicroelectronics | 4 | * Copyright (C) 2008 STMicroelectronics |
5 | * Copyright (C) 2010 Alessandro Rubini | 5 | * Copyright (C) 2010 Alessandro Rubini |
6 | * Copyright (C) 2010 Linus Walleij for ST-Ericsson | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2, as | 9 | * it under the terms of the GNU General Public License version 2, as |
@@ -16,11 +17,13 @@ | |||
16 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
17 | #include <linux/jiffies.h> | 18 | #include <linux/jiffies.h> |
18 | #include <linux/err.h> | 19 | #include <linux/err.h> |
20 | #include <linux/cnt32_to_63.h> | ||
21 | #include <linux/timer.h> | ||
19 | #include <asm/mach/time.h> | 22 | #include <asm/mach/time.h> |
20 | 23 | ||
21 | #include <plat/mtu.h> | 24 | #include <plat/mtu.h> |
22 | 25 | ||
23 | void __iomem *mtu_base; /* ssigned by machine code */ | 26 | void __iomem *mtu_base; /* Assigned by machine code */ |
24 | 27 | ||
25 | /* | 28 | /* |
26 | * Kernel assumes that sched_clock can be called early | 29 | * Kernel assumes that sched_clock can be called early |
@@ -48,16 +51,82 @@ static struct clocksource nmdk_clksrc = { | |||
48 | /* | 51 | /* |
49 | * Override the global weak sched_clock symbol with this | 52 | * Override the global weak sched_clock symbol with this |
50 | * local implementation which uses the clocksource to get some | 53 | * local implementation which uses the clocksource to get some |
51 | * better resolution when scheduling the kernel. We accept that | 54 | * better resolution when scheduling the kernel. |
52 | * this wraps around for now, since it is just a relative time | 55 | * |
53 | * stamp. (Inspired by OMAP implementation.) | 56 | * Because the hardware timer period may be quite short |
57 | * (32.3 secs on the 133 MHz MTU timer selection on ux500) | ||
58 | * and because cnt32_to_63() needs to be called at least once per | ||
59 | * half period to work properly, a kernel keepwarm() timer is set up | ||
60 | * to ensure this requirement is always met. | ||
61 | * | ||
62 | * Also the sched_clock timer will wrap around at some point, | ||
63 | * here we set it to run continously for a year. | ||
54 | */ | 64 | */ |
65 | #define SCHED_CLOCK_MIN_WRAP 3600*24*365 | ||
66 | static struct timer_list cnt32_to_63_keepwarm_timer; | ||
67 | static u32 sched_mult; | ||
68 | static u32 sched_shift; | ||
69 | |||
55 | unsigned long long notrace sched_clock(void) | 70 | unsigned long long notrace sched_clock(void) |
56 | { | 71 | { |
57 | return clocksource_cyc2ns(nmdk_clksrc.read( | 72 | u64 cycles; |
58 | &nmdk_clksrc), | 73 | |
59 | nmdk_clksrc.mult, | 74 | if (unlikely(!mtu_base)) |
60 | nmdk_clksrc.shift); | 75 | return 0; |
76 | |||
77 | cycles = cnt32_to_63(-readl(mtu_base + MTU_VAL(0))); | ||
78 | /* | ||
79 | * sched_mult is guaranteed to be even so will | ||
80 | * shift out bit 63 | ||
81 | */ | ||
82 | return (cycles * sched_mult) >> sched_shift; | ||
83 | } | ||
84 | |||
85 | /* Just kick sched_clock every so often */ | ||
86 | static void cnt32_to_63_keepwarm(unsigned long data) | ||
87 | { | ||
88 | mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data)); | ||
89 | (void) sched_clock(); | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * Set up a timer to keep sched_clock():s 32_to_63 algorithm warm | ||
94 | * once in half a 32bit timer wrap interval. | ||
95 | */ | ||
96 | static void __init nmdk_sched_clock_init(unsigned long rate) | ||
97 | { | ||
98 | u32 v; | ||
99 | unsigned long delta; | ||
100 | u64 days; | ||
101 | |||
102 | /* Find the apropriate mult and shift factors */ | ||
103 | clocks_calc_mult_shift(&sched_mult, &sched_shift, | ||
104 | rate, NSEC_PER_SEC, SCHED_CLOCK_MIN_WRAP); | ||
105 | /* We need to multiply by an even number to get rid of bit 63 */ | ||
106 | if (sched_mult & 1) | ||
107 | sched_mult++; | ||
108 | |||
109 | /* Let's see what we get, take max counter and scale it */ | ||
110 | days = (0xFFFFFFFFFFFFFFFFLLU * sched_mult) >> sched_shift; | ||
111 | do_div(days, NSEC_PER_SEC); | ||
112 | do_div(days, (3600*24)); | ||
113 | |||
114 | pr_info("sched_clock: using %d bits @ %lu Hz wrap in %lu days\n", | ||
115 | (64 - sched_shift), rate, (unsigned long) days); | ||
116 | |||
117 | /* | ||
118 | * Program a timer to kick us at half 32bit wraparound | ||
119 | * Formula: seconds per wrap = (2^32) / f | ||
120 | */ | ||
121 | v = 0xFFFFFFFFUL / rate; | ||
122 | /* We want half of the wrap time to keep cnt32_to_63 warm */ | ||
123 | v /= 2; | ||
124 | pr_debug("sched_clock: prescaled timer rate: %lu Hz, " | ||
125 | "initialize keepwarm timer every %d seconds\n", rate, v); | ||
126 | /* Convert seconds to jiffies */ | ||
127 | delta = msecs_to_jiffies(v*1000); | ||
128 | setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, delta); | ||
129 | mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + delta)); | ||
61 | } | 130 | } |
62 | 131 | ||
63 | /* Clockevent device: use one-shot mode */ | 132 | /* Clockevent device: use one-shot mode */ |
@@ -161,13 +230,15 @@ void __init nmdk_timer_init(void) | |||
161 | writel(0, mtu_base + MTU_BGLR(0)); | 230 | writel(0, mtu_base + MTU_BGLR(0)); |
162 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); | 231 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); |
163 | 232 | ||
164 | /* Now the scheduling clock is ready */ | 233 | /* Now the clock source is ready */ |
165 | nmdk_clksrc.read = nmdk_read_timer; | 234 | nmdk_clksrc.read = nmdk_read_timer; |
166 | 235 | ||
167 | if (clocksource_register(&nmdk_clksrc)) | 236 | if (clocksource_register(&nmdk_clksrc)) |
168 | pr_err("timer: failed to initialize clock source %s\n", | 237 | pr_err("timer: failed to initialize clock source %s\n", |
169 | nmdk_clksrc.name); | 238 | nmdk_clksrc.name); |
170 | 239 | ||
240 | nmdk_sched_clock_init(rate); | ||
241 | |||
171 | /* Timer 1 is used for events */ | 242 | /* Timer 1 is used for events */ |
172 | 243 | ||
173 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); | 244 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); |
diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h index e49c5b6fc4e2..1ab332e37d7d 100644 --- a/arch/arm/plat-pxa/include/plat/sdhci.h +++ b/arch/arm/plat-pxa/include/plat/sdhci.h | |||
@@ -17,6 +17,9 @@ | |||
17 | /* Require clock free running */ | 17 | /* Require clock free running */ |
18 | #define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) | 18 | #define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) |
19 | 19 | ||
20 | /* Board design supports 8-bit data on SD/SDIO BUS */ | ||
21 | #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) | ||
22 | |||
20 | /* | 23 | /* |
21 | * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI | 24 | * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI |
22 | * @max_speed: the maximum speed supported | 25 | * @max_speed: the maximum speed supported |
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c index 9793544a6ace..704175b0573f 100644 --- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | |||
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | |||
29 | } else { | 29 | } else { |
30 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); | 30 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); |
31 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); | 31 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); |
32 | s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); | 32 | s3c_gpio_setpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); |
33 | s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); | 33 | s3c_gpio_setpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); |
34 | s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); |
35 | } | 35 | } |
36 | } | 36 | } |
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c index db9e9e477ec1..72457afd6255 100644 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | |||
@@ -31,8 +31,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, | |||
31 | } else { | 31 | } else { |
32 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); | 32 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); |
33 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); | 33 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); |
34 | s3c_gpio_cfgpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); |
35 | s3c_gpio_cfgpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); | 35 | s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); |
36 | s3c_gpio_cfgpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); | 36 | s3c_gpio_setpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); |
37 | } | 37 | } |
38 | } | 38 | } |
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c index 8ea663a438bb..c3972b645d13 100644 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c | |||
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, | |||
29 | } else { | 29 | } else { |
30 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); | 30 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); |
31 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); | 31 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); |
32 | s3c_gpio_cfgpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); | 32 | s3c_gpio_setpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); |
33 | s3c_gpio_cfgpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); | 33 | s3c_gpio_setpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); |
34 | s3c_gpio_cfgpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); |
35 | } | 35 | } |
36 | } | 36 | } |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index d66cead97d28..9897dcfc16d6 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -206,6 +206,7 @@ ENTRY(vfp_save_state) | |||
206 | mov pc, lr | 206 | mov pc, lr |
207 | ENDPROC(vfp_save_state) | 207 | ENDPROC(vfp_save_state) |
208 | 208 | ||
209 | .align | ||
209 | last_VFP_context_address: | 210 | last_VFP_context_address: |
210 | .word last_VFP_context | 211 | .word last_VFP_context |
211 | 212 | ||
diff --git a/arch/mn10300/include/asm/syscall.h b/arch/mn10300/include/asm/syscall.h new file mode 100644 index 000000000000..b44b0bb75a01 --- /dev/null +++ b/arch/mn10300/include/asm/syscall.h | |||
@@ -0,0 +1,117 @@ | |||
1 | /* Access to user system call parameters and results | ||
2 | * | ||
3 | * See asm-generic/syscall.h for function descriptions. | ||
4 | * | ||
5 | * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved. | ||
6 | * Written by David Howells (dhowells@redhat.com) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public Licence | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the Licence, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifndef _ASM_SYSCALL_H | ||
15 | #define _ASM_SYSCALL_H | ||
16 | |||
17 | #include <linux/sched.h> | ||
18 | #include <linux/err.h> | ||
19 | |||
20 | extern const unsigned long sys_call_table[]; | ||
21 | |||
22 | static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs) | ||
23 | { | ||
24 | return regs->orig_d0; | ||
25 | } | ||
26 | |||
27 | static inline void syscall_rollback(struct task_struct *task, | ||
28 | struct pt_regs *regs) | ||
29 | { | ||
30 | regs->d0 = regs->orig_d0; | ||
31 | } | ||
32 | |||
33 | static inline long syscall_get_error(struct task_struct *task, | ||
34 | struct pt_regs *regs) | ||
35 | { | ||
36 | unsigned long error = regs->d0; | ||
37 | return IS_ERR_VALUE(error) ? error : 0; | ||
38 | } | ||
39 | |||
40 | static inline long syscall_get_return_value(struct task_struct *task, | ||
41 | struct pt_regs *regs) | ||
42 | { | ||
43 | return regs->d0; | ||
44 | } | ||
45 | |||
46 | static inline void syscall_set_return_value(struct task_struct *task, | ||
47 | struct pt_regs *regs, | ||
48 | int error, long val) | ||
49 | { | ||
50 | regs->d0 = (long) error ?: val; | ||
51 | } | ||
52 | |||
53 | static inline void syscall_get_arguments(struct task_struct *task, | ||
54 | struct pt_regs *regs, | ||
55 | unsigned int i, unsigned int n, | ||
56 | unsigned long *args) | ||
57 | { | ||
58 | switch (i) { | ||
59 | case 0: | ||
60 | if (!n--) break; | ||
61 | *args++ = regs->a0; | ||
62 | case 1: | ||
63 | if (!n--) break; | ||
64 | *args++ = regs->d1; | ||
65 | case 2: | ||
66 | if (!n--) break; | ||
67 | *args++ = regs->a3; | ||
68 | case 3: | ||
69 | if (!n--) break; | ||
70 | *args++ = regs->a2; | ||
71 | case 4: | ||
72 | if (!n--) break; | ||
73 | *args++ = regs->d3; | ||
74 | case 5: | ||
75 | if (!n--) break; | ||
76 | *args++ = regs->d2; | ||
77 | case 6: | ||
78 | if (!n--) break; | ||
79 | default: | ||
80 | BUG(); | ||
81 | break; | ||
82 | } | ||
83 | } | ||
84 | |||
85 | static inline void syscall_set_arguments(struct task_struct *task, | ||
86 | struct pt_regs *regs, | ||
87 | unsigned int i, unsigned int n, | ||
88 | const unsigned long *args) | ||
89 | { | ||
90 | switch (i) { | ||
91 | case 0: | ||
92 | if (!n--) break; | ||
93 | regs->a0 = *args++; | ||
94 | case 1: | ||
95 | if (!n--) break; | ||
96 | regs->d1 = *args++; | ||
97 | case 2: | ||
98 | if (!n--) break; | ||
99 | regs->a3 = *args++; | ||
100 | case 3: | ||
101 | if (!n--) break; | ||
102 | regs->a2 = *args++; | ||
103 | case 4: | ||
104 | if (!n--) break; | ||
105 | regs->d3 = *args++; | ||
106 | case 5: | ||
107 | if (!n--) break; | ||
108 | regs->d2 = *args++; | ||
109 | case 6: | ||
110 | if (!n--) break; | ||
111 | default: | ||
112 | BUG(); | ||
113 | break; | ||
114 | } | ||
115 | } | ||
116 | |||
117 | #endif /* _ASM_SYSCALL_H */ | ||
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 5024f643b3b1..d7d94b845dc2 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -75,9 +75,6 @@ static void cpu_unmask_irq(unsigned int irq) | |||
75 | smp_send_all_nop(); | 75 | smp_send_all_nop(); |
76 | } | 76 | } |
77 | 77 | ||
78 | void no_ack_irq(unsigned int irq) { } | ||
79 | void no_end_irq(unsigned int irq) { } | ||
80 | |||
81 | void cpu_ack_irq(unsigned int irq) | 78 | void cpu_ack_irq(unsigned int irq) |
82 | { | 79 | { |
83 | unsigned long mask = EIEM_MASK(irq); | 80 | unsigned long mask = EIEM_MASK(irq); |
@@ -241,7 +238,7 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) | |||
241 | 238 | ||
242 | /* for iosapic interrupts */ | 239 | /* for iosapic interrupts */ |
243 | if (type) { | 240 | if (type) { |
244 | set_irq_chip_and_handler(irq, type, handle_level_irq); | 241 | set_irq_chip_and_handler(irq, type, handle_percpu_irq); |
245 | set_irq_chip_data(irq, data); | 242 | set_irq_chip_data(irq, data); |
246 | cpu_unmask_irq(irq); | 243 | cpu_unmask_irq(irq); |
247 | } | 244 | } |
@@ -392,7 +389,7 @@ static void claim_cpu_irqs(void) | |||
392 | int i; | 389 | int i; |
393 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { | 390 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { |
394 | set_irq_chip_and_handler(i, &cpu_interrupt_type, | 391 | set_irq_chip_and_handler(i, &cpu_interrupt_type, |
395 | handle_level_irq); | 392 | handle_percpu_irq); |
396 | } | 393 | } |
397 | 394 | ||
398 | set_irq_handler(TIMER_IRQ, handle_percpu_irq); | 395 | set_irq_handler(TIMER_IRQ, handle_percpu_irq); |
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c index 35c827e94e31..609a331878e7 100644 --- a/arch/parisc/kernel/signal.c +++ b/arch/parisc/kernel/signal.c | |||
@@ -98,7 +98,6 @@ void | |||
98 | sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) | 98 | sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) |
99 | { | 99 | { |
100 | struct rt_sigframe __user *frame; | 100 | struct rt_sigframe __user *frame; |
101 | struct siginfo si; | ||
102 | sigset_t set; | 101 | sigset_t set; |
103 | unsigned long usp = (regs->gr[30] & ~(0x01UL)); | 102 | unsigned long usp = (regs->gr[30] & ~(0x01UL)); |
104 | unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE; | 103 | unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE; |
@@ -178,13 +177,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) | |||
178 | 177 | ||
179 | give_sigsegv: | 178 | give_sigsegv: |
180 | DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n"); | 179 | DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n"); |
181 | si.si_signo = SIGSEGV; | 180 | force_sig(SIGSEGV, current); |
182 | si.si_errno = 0; | ||
183 | si.si_code = SI_KERNEL; | ||
184 | si.si_pid = task_pid_vnr(current); | ||
185 | si.si_uid = current_uid(); | ||
186 | si.si_addr = &frame->uc; | ||
187 | force_sig_info(SIGSEGV, &si, current); | ||
188 | return; | 181 | return; |
189 | } | 182 | } |
190 | 183 | ||
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c index 2c7e801ab20b..6a3997f98dfb 100644 --- a/arch/powerpc/mm/pgtable.c +++ b/arch/powerpc/mm/pgtable.c | |||
@@ -92,7 +92,7 @@ static void pte_free_rcu_callback(struct rcu_head *head) | |||
92 | 92 | ||
93 | static void pte_free_submit(struct pte_freelist_batch *batch) | 93 | static void pte_free_submit(struct pte_freelist_batch *batch) |
94 | { | 94 | { |
95 | call_rcu(&batch->rcu, pte_free_rcu_callback); | 95 | call_rcu_sched(&batch->rcu, pte_free_rcu_callback); |
96 | } | 96 | } |
97 | 97 | ||
98 | void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift) | 98 | void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift) |
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c index ac151399ef34..1995c1712fc8 100644 --- a/arch/s390/kernel/nmi.c +++ b/arch/s390/kernel/nmi.c | |||
@@ -95,7 +95,6 @@ EXPORT_SYMBOL_GPL(s390_handle_mcck); | |||
95 | static int notrace s390_revalidate_registers(struct mci *mci) | 95 | static int notrace s390_revalidate_registers(struct mci *mci) |
96 | { | 96 | { |
97 | int kill_task; | 97 | int kill_task; |
98 | u64 tmpclock; | ||
99 | u64 zero; | 98 | u64 zero; |
100 | void *fpt_save_area, *fpt_creg_save_area; | 99 | void *fpt_save_area, *fpt_creg_save_area; |
101 | 100 | ||
@@ -214,11 +213,10 @@ static int notrace s390_revalidate_registers(struct mci *mci) | |||
214 | : "0", "cc"); | 213 | : "0", "cc"); |
215 | #endif | 214 | #endif |
216 | /* Revalidate clock comparator register */ | 215 | /* Revalidate clock comparator register */ |
217 | asm volatile( | 216 | if (S390_lowcore.clock_comparator == -1) |
218 | " stck 0(%1)\n" | 217 | set_clock_comparator(S390_lowcore.mcck_clock); |
219 | " sckc 0(%1)" | 218 | else |
220 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | 219 | set_clock_comparator(S390_lowcore.clock_comparator); |
221 | |||
222 | /* Check if old PSW is valid */ | 220 | /* Check if old PSW is valid */ |
223 | if (!mci->wp) | 221 | if (!mci->wp) |
224 | /* | 222 | /* |
diff --git a/arch/s390/lib/delay.c b/arch/s390/lib/delay.c index 752b362bf651..7c37ec359ec2 100644 --- a/arch/s390/lib/delay.c +++ b/arch/s390/lib/delay.c | |||
@@ -29,17 +29,21 @@ static void __udelay_disabled(unsigned long long usecs) | |||
29 | { | 29 | { |
30 | unsigned long mask, cr0, cr0_saved; | 30 | unsigned long mask, cr0, cr0_saved; |
31 | u64 clock_saved; | 31 | u64 clock_saved; |
32 | u64 end; | ||
32 | 33 | ||
34 | mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT; | ||
35 | end = get_clock() + (usecs << 12); | ||
33 | clock_saved = local_tick_disable(); | 36 | clock_saved = local_tick_disable(); |
34 | set_clock_comparator(get_clock() + (usecs << 12)); | ||
35 | __ctl_store(cr0_saved, 0, 0); | 37 | __ctl_store(cr0_saved, 0, 0); |
36 | cr0 = (cr0_saved & 0xffff00e0) | 0x00000800; | 38 | cr0 = (cr0_saved & 0xffff00e0) | 0x00000800; |
37 | __ctl_load(cr0 , 0, 0); | 39 | __ctl_load(cr0 , 0, 0); |
38 | mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT; | ||
39 | lockdep_off(); | 40 | lockdep_off(); |
40 | trace_hardirqs_on(); | 41 | do { |
41 | __load_psw_mask(mask); | 42 | set_clock_comparator(end); |
42 | local_irq_disable(); | 43 | trace_hardirqs_on(); |
44 | __load_psw_mask(mask); | ||
45 | local_irq_disable(); | ||
46 | } while (get_clock() < end); | ||
43 | lockdep_on(); | 47 | lockdep_on(); |
44 | __ctl_load(cr0_saved, 0, 0); | 48 | __ctl_load(cr0_saved, 0, 0); |
45 | local_tick_enable(clock_saved); | 49 | local_tick_enable(clock_saved); |
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 2eaeb9e59585..f48c492a68d3 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
@@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = { | |||
720 | }; | 720 | }; |
721 | 721 | ||
722 | /* FSI */ | 722 | /* FSI */ |
723 | /* | ||
724 | * FSI-B use external clock which came from da7210. | ||
725 | * So, we should change parent of fsi | ||
726 | */ | ||
727 | #define FCLKBCR 0xa415000c | ||
728 | static void fsimck_init(struct clk *clk) | ||
729 | { | ||
730 | u32 status = __raw_readl(clk->enable_reg); | ||
731 | |||
732 | /* use external clock */ | ||
733 | status &= ~0x000000ff; | ||
734 | status |= 0x00000080; | ||
735 | |||
736 | __raw_writel(status, clk->enable_reg); | ||
737 | } | ||
738 | |||
739 | static struct clk_ops fsimck_clk_ops = { | ||
740 | .init = fsimck_init, | ||
741 | }; | ||
742 | |||
743 | static struct clk fsimckb_clk = { | ||
744 | .ops = &fsimck_clk_ops, | ||
745 | .enable_reg = (void __iomem *)FCLKBCR, | ||
746 | .rate = 0, /* unknown */ | ||
747 | }; | ||
748 | |||
749 | static struct sh_fsi_platform_info fsi_info = { | 723 | static struct sh_fsi_platform_info fsi_info = { |
750 | .portb_flags = SH_FSI_BRS_INV | | 724 | .portb_flags = SH_FSI_BRS_INV | |
751 | SH_FSI_OUT_SLAVE_MODE | | 725 | SH_FSI_OUT_SLAVE_MODE | |
@@ -1264,10 +1238,10 @@ static int __init arch_setup(void) | |||
1264 | /* change parent of FSI B */ | 1238 | /* change parent of FSI B */ |
1265 | clk = clk_get(NULL, "fsib_clk"); | 1239 | clk = clk_get(NULL, "fsib_clk"); |
1266 | if (!IS_ERR(clk)) { | 1240 | if (!IS_ERR(clk)) { |
1267 | clk_register(&fsimckb_clk); | 1241 | /* 48kHz dummy clock was used to make sure 1/1 divide */ |
1268 | clk_set_parent(clk, &fsimckb_clk); | 1242 | clk_set_rate(&sh7724_fsimckb_clk, 48000); |
1269 | clk_set_rate(clk, 11000); | 1243 | clk_set_parent(clk, &sh7724_fsimckb_clk); |
1270 | clk_set_rate(&fsimckb_clk, 11000); | 1244 | clk_set_rate(clk, 48000); |
1271 | clk_put(clk); | 1245 | clk_put(clk); |
1272 | } | 1246 | } |
1273 | 1247 | ||
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index c31d228fdfc6..527a0cd956b5 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c | |||
@@ -283,31 +283,6 @@ static struct platform_device ceu1_device = { | |||
283 | }; | 283 | }; |
284 | 284 | ||
285 | /* FSI */ | 285 | /* FSI */ |
286 | /* | ||
287 | * FSI-A use external clock which came from ak464x. | ||
288 | * So, we should change parent of fsi | ||
289 | */ | ||
290 | #define FCLKACR 0xa4150008 | ||
291 | static void fsimck_init(struct clk *clk) | ||
292 | { | ||
293 | u32 status = __raw_readl(clk->enable_reg); | ||
294 | |||
295 | /* use external clock */ | ||
296 | status &= ~0x000000ff; | ||
297 | status |= 0x00000080; | ||
298 | __raw_writel(status, clk->enable_reg); | ||
299 | } | ||
300 | |||
301 | static struct clk_ops fsimck_clk_ops = { | ||
302 | .init = fsimck_init, | ||
303 | }; | ||
304 | |||
305 | static struct clk fsimcka_clk = { | ||
306 | .ops = &fsimck_clk_ops, | ||
307 | .enable_reg = (void __iomem *)FCLKACR, | ||
308 | .rate = 0, /* unknown */ | ||
309 | }; | ||
310 | |||
311 | /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ | 286 | /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ |
312 | static struct sh_fsi_platform_info fsi_info = { | 287 | static struct sh_fsi_platform_info fsi_info = { |
313 | .porta_flags = SH_FSI_BRS_INV | | 288 | .porta_flags = SH_FSI_BRS_INV | |
@@ -852,37 +827,29 @@ static int __init devices_setup(void) | |||
852 | gpio_request(GPIO_FN_KEYOUT0, NULL); | 827 | gpio_request(GPIO_FN_KEYOUT0, NULL); |
853 | 828 | ||
854 | /* enable FSI */ | 829 | /* enable FSI */ |
855 | gpio_request(GPIO_FN_FSIMCKB, NULL); | ||
856 | gpio_request(GPIO_FN_FSIMCKA, NULL); | 830 | gpio_request(GPIO_FN_FSIMCKA, NULL); |
831 | gpio_request(GPIO_FN_FSIIASD, NULL); | ||
857 | gpio_request(GPIO_FN_FSIOASD, NULL); | 832 | gpio_request(GPIO_FN_FSIOASD, NULL); |
858 | gpio_request(GPIO_FN_FSIIABCK, NULL); | 833 | gpio_request(GPIO_FN_FSIIABCK, NULL); |
859 | gpio_request(GPIO_FN_FSIIALRCK, NULL); | 834 | gpio_request(GPIO_FN_FSIIALRCK, NULL); |
860 | gpio_request(GPIO_FN_FSIOABCK, NULL); | 835 | gpio_request(GPIO_FN_FSIOABCK, NULL); |
861 | gpio_request(GPIO_FN_FSIOALRCK, NULL); | 836 | gpio_request(GPIO_FN_FSIOALRCK, NULL); |
862 | gpio_request(GPIO_FN_CLKAUDIOAO, NULL); | 837 | gpio_request(GPIO_FN_CLKAUDIOAO, NULL); |
863 | gpio_request(GPIO_FN_FSIIBSD, NULL); | ||
864 | gpio_request(GPIO_FN_FSIOBSD, NULL); | ||
865 | gpio_request(GPIO_FN_FSIIBBCK, NULL); | ||
866 | gpio_request(GPIO_FN_FSIIBLRCK, NULL); | ||
867 | gpio_request(GPIO_FN_FSIOBBCK, NULL); | ||
868 | gpio_request(GPIO_FN_FSIOBLRCK, NULL); | ||
869 | gpio_request(GPIO_FN_CLKAUDIOBO, NULL); | ||
870 | gpio_request(GPIO_FN_FSIIASD, NULL); | ||
871 | 838 | ||
872 | /* set SPU2 clock to 83.4 MHz */ | 839 | /* set SPU2 clock to 83.4 MHz */ |
873 | clk = clk_get(NULL, "spu_clk"); | 840 | clk = clk_get(NULL, "spu_clk"); |
874 | if (clk) { | 841 | if (!IS_ERR(clk)) { |
875 | clk_set_rate(clk, clk_round_rate(clk, 83333333)); | 842 | clk_set_rate(clk, clk_round_rate(clk, 83333333)); |
876 | clk_put(clk); | 843 | clk_put(clk); |
877 | } | 844 | } |
878 | 845 | ||
879 | /* change parent of FSI A */ | 846 | /* change parent of FSI A */ |
880 | clk = clk_get(NULL, "fsia_clk"); | 847 | clk = clk_get(NULL, "fsia_clk"); |
881 | if (clk) { | 848 | if (!IS_ERR(clk)) { |
882 | clk_register(&fsimcka_clk); | 849 | /* 48kHz dummy clock was used to make sure 1/1 divide */ |
883 | clk_set_parent(clk, &fsimcka_clk); | 850 | clk_set_rate(&sh7724_fsimcka_clk, 48000); |
884 | clk_set_rate(clk, 11000); | 851 | clk_set_parent(clk, &sh7724_fsimcka_clk); |
885 | clk_set_rate(&fsimcka_clk, 11000); | 852 | clk_set_rate(clk, 48000); |
886 | clk_put(clk); | 853 | clk_put(clk); |
887 | } | 854 | } |
888 | 855 | ||
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h index 1f4e562c5e8c..82e1eabeac98 100644 --- a/arch/sh/include/asm/cacheflush.h +++ b/arch/sh/include/asm/cacheflush.h | |||
@@ -96,7 +96,7 @@ void kmap_coherent_init(void); | |||
96 | void *kmap_coherent(struct page *page, unsigned long addr); | 96 | void *kmap_coherent(struct page *page, unsigned long addr); |
97 | void kunmap_coherent(void *kvaddr); | 97 | void kunmap_coherent(void *kvaddr); |
98 | 98 | ||
99 | #define PG_dcache_dirty PG_arch_1 | 99 | #define PG_dcache_clean PG_arch_1 |
100 | 100 | ||
101 | void cpu_cache_init(void); | 101 | void cpu_cache_init(void); |
102 | 102 | ||
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index 46d5179c9f49..e3c73cdd8c90 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p); | |||
199 | #define ARCH_HAS_PREFETCHW | 199 | #define ARCH_HAS_PREFETCHW |
200 | static inline void prefetch(void *x) | 200 | static inline void prefetch(void *x) |
201 | { | 201 | { |
202 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | 202 | __builtin_prefetch(x, 0, 3); |
203 | } | 203 | } |
204 | 204 | ||
205 | #define prefetchw(x) prefetch(x) | 205 | static inline void prefetchw(void *x) |
206 | { | ||
207 | __builtin_prefetch(x, 1, 3); | ||
208 | } | ||
206 | #endif | 209 | #endif |
207 | 210 | ||
208 | #endif /* __KERNEL__ */ | 211 | #endif /* __KERNEL__ */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index 4c27b68789b3..7eb435999426 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h | |||
@@ -303,4 +303,7 @@ enum { | |||
303 | SHDMA_SLAVE_SDHI1_RX, | 303 | SHDMA_SLAVE_SDHI1_RX, |
304 | }; | 304 | }; |
305 | 305 | ||
306 | extern struct clk sh7724_fsimcka_clk; | ||
307 | extern struct clk sh7724_fsimckb_clk; | ||
308 | |||
306 | #endif /* __ASM_SH7724_H__ */ | 309 | #endif /* __ASM_SH7724_H__ */ |
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index 4eabc68cd753..b601fa3978d1 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c | |||
@@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) | |||
110 | return 0; | 110 | return 0; |
111 | } | 111 | } |
112 | 112 | ||
113 | static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) | 113 | static int shoc_clk_set_rate(struct clk *clk, unsigned long rate) |
114 | { | 114 | { |
115 | unsigned long frqcr3; | 115 | unsigned long frqcr3; |
116 | unsigned int tmp; | 116 | unsigned int tmp; |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 0fe2e9329cb2..271c0b325a9a 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c | |||
@@ -111,12 +111,21 @@ static struct clk div3_clk = { | |||
111 | .parent = &pll_clk, | 111 | .parent = &pll_clk, |
112 | }; | 112 | }; |
113 | 113 | ||
114 | /* External input clock (pin name: FSIMCKA/FSIMCKB ) */ | ||
115 | struct clk sh7724_fsimcka_clk = { | ||
116 | }; | ||
117 | |||
118 | struct clk sh7724_fsimckb_clk = { | ||
119 | }; | ||
120 | |||
114 | static struct clk *main_clks[] = { | 121 | static struct clk *main_clks[] = { |
115 | &r_clk, | 122 | &r_clk, |
116 | &extal_clk, | 123 | &extal_clk, |
117 | &fll_clk, | 124 | &fll_clk, |
118 | &pll_clk, | 125 | &pll_clk, |
119 | &div3_clk, | 126 | &div3_clk, |
127 | &sh7724_fsimcka_clk, | ||
128 | &sh7724_fsimckb_clk, | ||
120 | }; | 129 | }; |
121 | 130 | ||
122 | static void div4_kick(struct clk *clk) | 131 | static void div4_kick(struct clk *clk) |
@@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = { | |||
154 | [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), | 163 | [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), |
155 | }; | 164 | }; |
156 | 165 | ||
157 | enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; | 166 | enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR }; |
158 | 167 | ||
159 | static struct clk div6_clks[DIV6_NR] = { | 168 | static struct clk div6_clks[DIV6_NR] = { |
160 | [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), | 169 | [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), |
161 | [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), | ||
162 | [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0), | ||
163 | [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), | 170 | [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), |
164 | [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), | 171 | [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), |
165 | }; | 172 | }; |
166 | 173 | ||
174 | enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR }; | ||
175 | |||
176 | /* Indices are important - they are the actual src selecting values */ | ||
177 | static struct clk *fclkacr_parent[] = { | ||
178 | [0] = &div3_clk, | ||
179 | [1] = NULL, | ||
180 | [2] = &sh7724_fsimcka_clk, | ||
181 | [3] = NULL, | ||
182 | }; | ||
183 | |||
184 | static struct clk *fclkbcr_parent[] = { | ||
185 | [0] = &div3_clk, | ||
186 | [1] = NULL, | ||
187 | [2] = &sh7724_fsimckb_clk, | ||
188 | [3] = NULL, | ||
189 | }; | ||
190 | |||
191 | static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { | ||
192 | [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0, | ||
193 | fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), | ||
194 | [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0, | ||
195 | fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), | ||
196 | }; | ||
197 | |||
167 | static struct clk mstp_clks[HWBLK_NR] = { | 198 | static struct clk mstp_clks[HWBLK_NR] = { |
168 | SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), | 199 | SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), |
169 | SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), | 200 | SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), |
@@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = { | |||
240 | 271 | ||
241 | /* DIV6 clocks */ | 272 | /* DIV6 clocks */ |
242 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | 273 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), |
243 | CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), | 274 | CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]), |
244 | CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), | 275 | CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]), |
245 | CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), | 276 | CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), |
246 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), | 277 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), |
247 | 278 | ||
@@ -376,6 +407,9 @@ int __init arch_clk_init(void) | |||
376 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | 407 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
377 | 408 | ||
378 | if (!ret) | 409 | if (!ret) |
410 | ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); | ||
411 | |||
412 | if (!ret) | ||
379 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); | 413 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
380 | 414 | ||
381 | return ret; | 415 | return ret; |
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 81f58371613d..8c6a350df751 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c | |||
@@ -88,7 +88,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op) | |||
88 | } | 88 | } |
89 | 89 | ||
90 | if (op & CACHEFLUSH_I) | 90 | if (op & CACHEFLUSH_I) |
91 | flush_cache_all(); | 91 | flush_icache_range(addr, addr+len); |
92 | 92 | ||
93 | up_read(¤t->mm->mmap_sem); | 93 | up_read(¤t->mm->mmap_sem); |
94 | return 0; | 94 | return 0; |
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S index 3b6eb34c43fa..3e70f851cdc6 100644 --- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S +++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S | |||
@@ -8,9 +8,9 @@ __kernel_vsyscall: | |||
8 | * fill out .eh_frame -- PFM. */ | 8 | * fill out .eh_frame -- PFM. */ |
9 | .LEND_vsyscall: | 9 | .LEND_vsyscall: |
10 | .size __kernel_vsyscall,.-.LSTART_vsyscall | 10 | .size __kernel_vsyscall,.-.LSTART_vsyscall |
11 | .previous | ||
12 | 11 | ||
13 | .section .eh_frame,"a",@progbits | 12 | .section .eh_frame,"a",@progbits |
13 | .previous | ||
14 | .LCIE: | 14 | .LCIE: |
15 | .ualong .LCIE_end - .LCIE_start | 15 | .ualong .LCIE_end - .LCIE_start |
16 | .LCIE_start: | 16 | .LCIE_start: |
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 2cfae81914aa..92eb98633ab0 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c | |||
@@ -114,7 +114,7 @@ static void sh4_flush_dcache_page(void *arg) | |||
114 | struct address_space *mapping = page_mapping(page); | 114 | struct address_space *mapping = page_mapping(page); |
115 | 115 | ||
116 | if (mapping && !mapping_mapped(mapping)) | 116 | if (mapping && !mapping_mapped(mapping)) |
117 | set_bit(PG_dcache_dirty, &page->flags); | 117 | clear_bit(PG_dcache_clean, &page->flags); |
118 | else | 118 | else |
119 | #endif | 119 | #endif |
120 | flush_cache_one(CACHE_OC_ADDRESS_ARRAY | | 120 | flush_cache_one(CACHE_OC_ADDRESS_ARRAY | |
@@ -239,7 +239,7 @@ static void sh4_flush_cache_page(void *args) | |||
239 | * another ASID than the current one. | 239 | * another ASID than the current one. |
240 | */ | 240 | */ |
241 | map_coherent = (current_cpu_data.dcache.n_aliases && | 241 | map_coherent = (current_cpu_data.dcache.n_aliases && |
242 | !test_bit(PG_dcache_dirty, &page->flags) && | 242 | test_bit(PG_dcache_clean, &page->flags) && |
243 | page_mapped(page)); | 243 | page_mapped(page)); |
244 | if (map_coherent) | 244 | if (map_coherent) |
245 | vaddr = kmap_coherent(page, address); | 245 | vaddr = kmap_coherent(page, address); |
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c index f498da1cce7a..7729cca727eb 100644 --- a/arch/sh/mm/cache-sh7705.c +++ b/arch/sh/mm/cache-sh7705.c | |||
@@ -139,7 +139,7 @@ static void sh7705_flush_dcache_page(void *arg) | |||
139 | struct address_space *mapping = page_mapping(page); | 139 | struct address_space *mapping = page_mapping(page); |
140 | 140 | ||
141 | if (mapping && !mapping_mapped(mapping)) | 141 | if (mapping && !mapping_mapped(mapping)) |
142 | set_bit(PG_dcache_dirty, &page->flags); | 142 | clear_bit(PG_dcache_clean, &page->flags); |
143 | else | 143 | else |
144 | __flush_dcache_page(__pa(page_address(page))); | 144 | __flush_dcache_page(__pa(page_address(page))); |
145 | } | 145 | } |
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c index ba401d137bb9..88d3dc3d30d5 100644 --- a/arch/sh/mm/cache.c +++ b/arch/sh/mm/cache.c | |||
@@ -60,14 +60,14 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | |||
60 | unsigned long len) | 60 | unsigned long len) |
61 | { | 61 | { |
62 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | 62 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && |
63 | !test_bit(PG_dcache_dirty, &page->flags)) { | 63 | test_bit(PG_dcache_clean, &page->flags)) { |
64 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | 64 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
65 | memcpy(vto, src, len); | 65 | memcpy(vto, src, len); |
66 | kunmap_coherent(vto); | 66 | kunmap_coherent(vto); |
67 | } else { | 67 | } else { |
68 | memcpy(dst, src, len); | 68 | memcpy(dst, src, len); |
69 | if (boot_cpu_data.dcache.n_aliases) | 69 | if (boot_cpu_data.dcache.n_aliases) |
70 | set_bit(PG_dcache_dirty, &page->flags); | 70 | clear_bit(PG_dcache_clean, &page->flags); |
71 | } | 71 | } |
72 | 72 | ||
73 | if (vma->vm_flags & VM_EXEC) | 73 | if (vma->vm_flags & VM_EXEC) |
@@ -79,14 +79,14 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page, | |||
79 | unsigned long len) | 79 | unsigned long len) |
80 | { | 80 | { |
81 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | 81 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && |
82 | !test_bit(PG_dcache_dirty, &page->flags)) { | 82 | test_bit(PG_dcache_clean, &page->flags)) { |
83 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | 83 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
84 | memcpy(dst, vfrom, len); | 84 | memcpy(dst, vfrom, len); |
85 | kunmap_coherent(vfrom); | 85 | kunmap_coherent(vfrom); |
86 | } else { | 86 | } else { |
87 | memcpy(dst, src, len); | 87 | memcpy(dst, src, len); |
88 | if (boot_cpu_data.dcache.n_aliases) | 88 | if (boot_cpu_data.dcache.n_aliases) |
89 | set_bit(PG_dcache_dirty, &page->flags); | 89 | clear_bit(PG_dcache_clean, &page->flags); |
90 | } | 90 | } |
91 | } | 91 | } |
92 | 92 | ||
@@ -98,7 +98,7 @@ void copy_user_highpage(struct page *to, struct page *from, | |||
98 | vto = kmap_atomic(to, KM_USER1); | 98 | vto = kmap_atomic(to, KM_USER1); |
99 | 99 | ||
100 | if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && | 100 | if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && |
101 | !test_bit(PG_dcache_dirty, &from->flags)) { | 101 | test_bit(PG_dcache_clean, &from->flags)) { |
102 | vfrom = kmap_coherent(from, vaddr); | 102 | vfrom = kmap_coherent(from, vaddr); |
103 | copy_page(vto, vfrom); | 103 | copy_page(vto, vfrom); |
104 | kunmap_coherent(vfrom); | 104 | kunmap_coherent(vfrom); |
@@ -141,7 +141,7 @@ void __update_cache(struct vm_area_struct *vma, | |||
141 | 141 | ||
142 | page = pfn_to_page(pfn); | 142 | page = pfn_to_page(pfn); |
143 | if (pfn_valid(pfn)) { | 143 | if (pfn_valid(pfn)) { |
144 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | 144 | int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags); |
145 | if (dirty) | 145 | if (dirty) |
146 | __flush_purge_region(page_address(page), PAGE_SIZE); | 146 | __flush_purge_region(page_address(page), PAGE_SIZE); |
147 | } | 147 | } |
@@ -153,7 +153,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr) | |||
153 | 153 | ||
154 | if (pages_do_alias(addr, vmaddr)) { | 154 | if (pages_do_alias(addr, vmaddr)) { |
155 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | 155 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && |
156 | !test_bit(PG_dcache_dirty, &page->flags)) { | 156 | test_bit(PG_dcache_clean, &page->flags)) { |
157 | void *kaddr; | 157 | void *kaddr; |
158 | 158 | ||
159 | kaddr = kmap_coherent(page, vmaddr); | 159 | kaddr = kmap_coherent(page, vmaddr); |
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c index 15d74ea42094..ec29e14ec5a8 100644 --- a/arch/sh/mm/kmap.c +++ b/arch/sh/mm/kmap.c | |||
@@ -34,7 +34,7 @@ void *kmap_coherent(struct page *page, unsigned long addr) | |||
34 | enum fixed_addresses idx; | 34 | enum fixed_addresses idx; |
35 | unsigned long vaddr; | 35 | unsigned long vaddr; |
36 | 36 | ||
37 | BUG_ON(test_bit(PG_dcache_dirty, &page->flags)); | 37 | BUG_ON(!test_bit(PG_dcache_clean, &page->flags)); |
38 | 38 | ||
39 | pagefault_disable(); | 39 | pagefault_disable(); |
40 | 40 | ||
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 07ec8a865c1d..e11b5fcb70eb 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig | |||
@@ -329,6 +329,18 @@ endmenu # Tilera-specific configuration | |||
329 | 329 | ||
330 | menu "Bus options" | 330 | menu "Bus options" |
331 | 331 | ||
332 | config PCI | ||
333 | bool "PCI support" | ||
334 | default y | ||
335 | select PCI_DOMAINS | ||
336 | ---help--- | ||
337 | Enable PCI root complex support, so PCIe endpoint devices can | ||
338 | be attached to the Tile chip. Many, but not all, PCI devices | ||
339 | are supported under Tilera's root complex driver. | ||
340 | |||
341 | config PCI_DOMAINS | ||
342 | bool | ||
343 | |||
332 | config NO_IOMEM | 344 | config NO_IOMEM |
333 | def_bool !PCI | 345 | def_bool !PCI |
334 | 346 | ||
diff --git a/arch/tile/include/asm/cacheflush.h b/arch/tile/include/asm/cacheflush.h index c5741da4eeac..14a3f8556ace 100644 --- a/arch/tile/include/asm/cacheflush.h +++ b/arch/tile/include/asm/cacheflush.h | |||
@@ -137,4 +137,56 @@ static inline void finv_buffer(void *buffer, size_t size) | |||
137 | mb_incoherent(); | 137 | mb_incoherent(); |
138 | } | 138 | } |
139 | 139 | ||
140 | /* | ||
141 | * Flush & invalidate a VA range that is homed remotely on a single core, | ||
142 | * waiting until the memory controller holds the flushed values. | ||
143 | */ | ||
144 | static inline void finv_buffer_remote(void *buffer, size_t size) | ||
145 | { | ||
146 | char *p; | ||
147 | int i; | ||
148 | |||
149 | /* | ||
150 | * Flush and invalidate the buffer out of the local L1/L2 | ||
151 | * and request the home cache to flush and invalidate as well. | ||
152 | */ | ||
153 | __finv_buffer(buffer, size); | ||
154 | |||
155 | /* | ||
156 | * Wait for the home cache to acknowledge that it has processed | ||
157 | * all the flush-and-invalidate requests. This does not mean | ||
158 | * that the flushed data has reached the memory controller yet, | ||
159 | * but it does mean the home cache is processing the flushes. | ||
160 | */ | ||
161 | __insn_mf(); | ||
162 | |||
163 | /* | ||
164 | * Issue a load to the last cache line, which can't complete | ||
165 | * until all the previously-issued flushes to the same memory | ||
166 | * controller have also completed. If we weren't striping | ||
167 | * memory, that one load would be sufficient, but since we may | ||
168 | * be, we also need to back up to the last load issued to | ||
169 | * another memory controller, which would be the point where | ||
170 | * we crossed an 8KB boundary (the granularity of striping | ||
171 | * across memory controllers). Keep backing up and doing this | ||
172 | * until we are before the beginning of the buffer, or have | ||
173 | * hit all the controllers. | ||
174 | */ | ||
175 | for (i = 0, p = (char *)buffer + size - 1; | ||
176 | i < (1 << CHIP_LOG_NUM_MSHIMS()) && p >= (char *)buffer; | ||
177 | ++i) { | ||
178 | const unsigned long STRIPE_WIDTH = 8192; | ||
179 | |||
180 | /* Force a load instruction to issue. */ | ||
181 | *(volatile char *)p; | ||
182 | |||
183 | /* Jump to end of previous stripe. */ | ||
184 | p -= STRIPE_WIDTH; | ||
185 | p = (char *)((unsigned long)p | (STRIPE_WIDTH - 1)); | ||
186 | } | ||
187 | |||
188 | /* Wait for the loads (and thus flushes) to have completed. */ | ||
189 | __insn_mf(); | ||
190 | } | ||
191 | |||
140 | #endif /* _ASM_TILE_CACHEFLUSH_H */ | 192 | #endif /* _ASM_TILE_CACHEFLUSH_H */ |
diff --git a/arch/tile/include/asm/io.h b/arch/tile/include/asm/io.h index ee43328713ab..d3cbb9b14cbe 100644 --- a/arch/tile/include/asm/io.h +++ b/arch/tile/include/asm/io.h | |||
@@ -55,9 +55,6 @@ extern void iounmap(volatile void __iomem *addr); | |||
55 | #define ioremap_writethrough(physaddr, size) ioremap(physaddr, size) | 55 | #define ioremap_writethrough(physaddr, size) ioremap(physaddr, size) |
56 | #define ioremap_fullcache(physaddr, size) ioremap(physaddr, size) | 56 | #define ioremap_fullcache(physaddr, size) ioremap(physaddr, size) |
57 | 57 | ||
58 | void __iomem *ioport_map(unsigned long port, unsigned int len); | ||
59 | extern inline void ioport_unmap(void __iomem *addr) {} | ||
60 | |||
61 | #define mmiowb() | 58 | #define mmiowb() |
62 | 59 | ||
63 | /* Conversion between virtual and physical mappings. */ | 60 | /* Conversion between virtual and physical mappings. */ |
@@ -189,12 +186,22 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, | |||
189 | * we never run, uses them unconditionally. | 186 | * we never run, uses them unconditionally. |
190 | */ | 187 | */ |
191 | 188 | ||
192 | static inline int ioport_panic(void) | 189 | static inline long ioport_panic(void) |
193 | { | 190 | { |
194 | panic("inb/outb and friends do not exist on tile"); | 191 | panic("inb/outb and friends do not exist on tile"); |
195 | return 0; | 192 | return 0; |
196 | } | 193 | } |
197 | 194 | ||
195 | static inline void __iomem *ioport_map(unsigned long port, unsigned int len) | ||
196 | { | ||
197 | return (void __iomem *) ioport_panic(); | ||
198 | } | ||
199 | |||
200 | static inline void ioport_unmap(void __iomem *addr) | ||
201 | { | ||
202 | ioport_panic(); | ||
203 | } | ||
204 | |||
198 | static inline u8 inb(unsigned long addr) | 205 | static inline u8 inb(unsigned long addr) |
199 | { | 206 | { |
200 | return ioport_panic(); | 207 | return ioport_panic(); |
diff --git a/arch/tile/include/asm/pci-bridge.h b/arch/tile/include/asm/pci-bridge.h deleted file mode 100644 index e853b0e2793b..000000000000 --- a/arch/tile/include/asm/pci-bridge.h +++ /dev/null | |||
@@ -1,117 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef _ASM_TILE_PCI_BRIDGE_H | ||
16 | #define _ASM_TILE_PCI_BRIDGE_H | ||
17 | |||
18 | #include <linux/ioport.h> | ||
19 | #include <linux/pci.h> | ||
20 | |||
21 | struct device_node; | ||
22 | struct pci_controller; | ||
23 | |||
24 | /* | ||
25 | * pci_io_base returns the memory address at which you can access | ||
26 | * the I/O space for PCI bus number `bus' (or NULL on error). | ||
27 | */ | ||
28 | extern void __iomem *pci_bus_io_base(unsigned int bus); | ||
29 | extern unsigned long pci_bus_io_base_phys(unsigned int bus); | ||
30 | extern unsigned long pci_bus_mem_base_phys(unsigned int bus); | ||
31 | |||
32 | /* Allocate a new PCI host bridge structure */ | ||
33 | extern struct pci_controller *pcibios_alloc_controller(void); | ||
34 | |||
35 | /* Helper function for setting up resources */ | ||
36 | extern void pci_init_resource(struct resource *res, unsigned long start, | ||
37 | unsigned long end, int flags, char *name); | ||
38 | |||
39 | /* Get the PCI host controller for a bus */ | ||
40 | extern struct pci_controller *pci_bus_to_hose(int bus); | ||
41 | |||
42 | /* | ||
43 | * Structure of a PCI controller (host bridge) | ||
44 | */ | ||
45 | struct pci_controller { | ||
46 | int index; /* PCI domain number */ | ||
47 | struct pci_bus *root_bus; | ||
48 | |||
49 | int first_busno; | ||
50 | int last_busno; | ||
51 | |||
52 | int hv_cfg_fd[2]; /* config{0,1} fds for this PCIe controller */ | ||
53 | int hv_mem_fd; /* fd to Hypervisor for MMIO operations */ | ||
54 | |||
55 | struct pci_ops *ops; | ||
56 | |||
57 | int irq_base; /* Base IRQ from the Hypervisor */ | ||
58 | int plx_gen1; /* flag for PLX Gen 1 configuration */ | ||
59 | |||
60 | /* Address ranges that are routed to this controller/bridge. */ | ||
61 | struct resource mem_resources[3]; | ||
62 | }; | ||
63 | |||
64 | static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) | ||
65 | { | ||
66 | return bus->sysdata; | ||
67 | } | ||
68 | |||
69 | extern void setup_indirect_pci_nomap(struct pci_controller *hose, | ||
70 | void __iomem *cfg_addr, void __iomem *cfg_data); | ||
71 | extern void setup_indirect_pci(struct pci_controller *hose, | ||
72 | u32 cfg_addr, u32 cfg_data); | ||
73 | extern void setup_grackle(struct pci_controller *hose); | ||
74 | |||
75 | extern unsigned char common_swizzle(struct pci_dev *, unsigned char *); | ||
76 | |||
77 | /* | ||
78 | * The following code swizzles for exactly one bridge. The routine | ||
79 | * common_swizzle below handles multiple bridges. But there are a | ||
80 | * some boards that don't follow the PCI spec's suggestion so we | ||
81 | * break this piece out separately. | ||
82 | */ | ||
83 | static inline unsigned char bridge_swizzle(unsigned char pin, | ||
84 | unsigned char idsel) | ||
85 | { | ||
86 | return (((pin-1) + idsel) % 4) + 1; | ||
87 | } | ||
88 | |||
89 | /* | ||
90 | * The following macro is used to lookup irqs in a standard table | ||
91 | * format for those PPC systems that do not already have PCI | ||
92 | * interrupts properly routed. | ||
93 | */ | ||
94 | /* FIXME - double check this */ | ||
95 | #define PCI_IRQ_TABLE_LOOKUP ({ \ | ||
96 | long _ctl_ = -1; \ | ||
97 | if (idsel >= min_idsel && idsel <= max_idsel && pin <= irqs_per_slot) \ | ||
98 | _ctl_ = pci_irq_table[idsel - min_idsel][pin-1]; \ | ||
99 | _ctl_; \ | ||
100 | }) | ||
101 | |||
102 | /* | ||
103 | * Scan the buses below a given PCI host bridge and assign suitable | ||
104 | * resources to all devices found. | ||
105 | */ | ||
106 | extern int pciauto_bus_scan(struct pci_controller *, int); | ||
107 | |||
108 | #ifdef CONFIG_PCI | ||
109 | extern unsigned long pci_address_to_pio(phys_addr_t address); | ||
110 | #else | ||
111 | static inline unsigned long pci_address_to_pio(phys_addr_t address) | ||
112 | { | ||
113 | return (unsigned long)-1; | ||
114 | } | ||
115 | #endif | ||
116 | |||
117 | #endif /* _ASM_TILE_PCI_BRIDGE_H */ | ||
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h index b0c15da2d5d5..c3fc458a0d32 100644 --- a/arch/tile/include/asm/pci.h +++ b/arch/tile/include/asm/pci.h | |||
@@ -15,7 +15,29 @@ | |||
15 | #ifndef _ASM_TILE_PCI_H | 15 | #ifndef _ASM_TILE_PCI_H |
16 | #define _ASM_TILE_PCI_H | 16 | #define _ASM_TILE_PCI_H |
17 | 17 | ||
18 | #include <asm/pci-bridge.h> | 18 | #include <linux/pci.h> |
19 | |||
20 | /* | ||
21 | * Structure of a PCI controller (host bridge) | ||
22 | */ | ||
23 | struct pci_controller { | ||
24 | int index; /* PCI domain number */ | ||
25 | struct pci_bus *root_bus; | ||
26 | |||
27 | int first_busno; | ||
28 | int last_busno; | ||
29 | |||
30 | int hv_cfg_fd[2]; /* config{0,1} fds for this PCIe controller */ | ||
31 | int hv_mem_fd; /* fd to Hypervisor for MMIO operations */ | ||
32 | |||
33 | struct pci_ops *ops; | ||
34 | |||
35 | int irq_base; /* Base IRQ from the Hypervisor */ | ||
36 | int plx_gen1; /* flag for PLX Gen 1 configuration */ | ||
37 | |||
38 | /* Address ranges that are routed to this controller/bridge. */ | ||
39 | struct resource mem_resources[3]; | ||
40 | }; | ||
19 | 41 | ||
20 | /* | 42 | /* |
21 | * The hypervisor maps the entirety of CPA-space as bus addresses, so | 43 | * The hypervisor maps the entirety of CPA-space as bus addresses, so |
@@ -24,56 +46,12 @@ | |||
24 | */ | 46 | */ |
25 | #define PCI_DMA_BUS_IS_PHYS 1 | 47 | #define PCI_DMA_BUS_IS_PHYS 1 |
26 | 48 | ||
27 | struct pci_controller *pci_bus_to_hose(int bus); | ||
28 | unsigned char __init common_swizzle(struct pci_dev *dev, unsigned char *pinp); | ||
29 | int __init tile_pci_init(void); | 49 | int __init tile_pci_init(void); |
30 | void pci_iounmap(struct pci_dev *dev, void __iomem *addr); | ||
31 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | ||
32 | void __devinit pcibios_fixup_bus(struct pci_bus *bus); | ||
33 | 50 | ||
34 | int __devinit _tile_cfg_read(struct pci_controller *hose, | 51 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); |
35 | int bus, | 52 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} |
36 | int slot, | ||
37 | int function, | ||
38 | int offset, | ||
39 | int size, | ||
40 | u32 *val); | ||
41 | int __devinit _tile_cfg_write(struct pci_controller *hose, | ||
42 | int bus, | ||
43 | int slot, | ||
44 | int function, | ||
45 | int offset, | ||
46 | int size, | ||
47 | u32 val); | ||
48 | 53 | ||
49 | /* | 54 | void __devinit pcibios_fixup_bus(struct pci_bus *bus); |
50 | * These are used to to config reads and writes in the early stages of | ||
51 | * setup before the driver infrastructure has been set up enough to be | ||
52 | * able to do config reads and writes. | ||
53 | */ | ||
54 | #define early_cfg_read(where, size, value) \ | ||
55 | _tile_cfg_read(controller, \ | ||
56 | current_bus, \ | ||
57 | pci_slot, \ | ||
58 | pci_fn, \ | ||
59 | where, \ | ||
60 | size, \ | ||
61 | value) | ||
62 | |||
63 | #define early_cfg_write(where, size, value) \ | ||
64 | _tile_cfg_write(controller, \ | ||
65 | current_bus, \ | ||
66 | pci_slot, \ | ||
67 | pci_fn, \ | ||
68 | where, \ | ||
69 | size, \ | ||
70 | value) | ||
71 | |||
72 | |||
73 | |||
74 | #define PCICFG_BYTE 1 | ||
75 | #define PCICFG_WORD 2 | ||
76 | #define PCICFG_DWORD 4 | ||
77 | 55 | ||
78 | #define TILE_NUM_PCIE 2 | 56 | #define TILE_NUM_PCIE 2 |
79 | 57 | ||
@@ -88,33 +66,33 @@ static inline int pci_proc_domain(struct pci_bus *bus) | |||
88 | } | 66 | } |
89 | 67 | ||
90 | /* | 68 | /* |
91 | * I/O space is currently not supported. | 69 | * pcibios_assign_all_busses() tells whether or not the bus numbers |
70 | * should be reassigned, in case the BIOS didn't do it correctly, or | ||
71 | * in case we don't have a BIOS and we want to let Linux do it. | ||
92 | */ | 72 | */ |
73 | static inline int pcibios_assign_all_busses(void) | ||
74 | { | ||
75 | return 1; | ||
76 | } | ||
93 | 77 | ||
94 | #define TILE_PCIE_LOWER_IO 0x0 | 78 | /* |
95 | #define TILE_PCIE_UPPER_IO 0x10000 | 79 | * No special bus mastering setup handling. |
96 | #define TILE_PCIE_PCIE_IO_SIZE 0x0000FFFF | 80 | */ |
97 | |||
98 | #define _PAGE_NO_CACHE 0 | ||
99 | #define _PAGE_GUARDED 0 | ||
100 | |||
101 | |||
102 | #define pcibios_assign_all_busses() pci_assign_all_buses | ||
103 | extern int pci_assign_all_buses; | ||
104 | |||
105 | static inline void pcibios_set_master(struct pci_dev *dev) | 81 | static inline void pcibios_set_master(struct pci_dev *dev) |
106 | { | 82 | { |
107 | /* No special bus mastering setup handling */ | ||
108 | } | 83 | } |
109 | 84 | ||
110 | #define PCIBIOS_MIN_MEM 0 | 85 | #define PCIBIOS_MIN_MEM 0 |
111 | #define PCIBIOS_MIN_IO TILE_PCIE_LOWER_IO | 86 | #define PCIBIOS_MIN_IO 0 |
112 | 87 | ||
113 | /* | 88 | /* |
114 | * This flag tells if the platform is TILEmpower that needs | 89 | * This flag tells if the platform is TILEmpower that needs |
115 | * special configuration for the PLX switch chip. | 90 | * special configuration for the PLX switch chip. |
116 | */ | 91 | */ |
117 | extern int blade_pci; | 92 | extern int tile_plx_gen1; |
93 | |||
94 | /* Use any cpu for PCI. */ | ||
95 | #define cpumask_of_pcibus(bus) cpu_online_mask | ||
118 | 96 | ||
119 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | 97 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ |
120 | #include <asm-generic/pci-dma-compat.h> | 98 | #include <asm-generic/pci-dma-compat.h> |
@@ -122,7 +100,4 @@ extern int blade_pci; | |||
122 | /* generic pci stuff */ | 100 | /* generic pci stuff */ |
123 | #include <asm-generic/pci.h> | 101 | #include <asm-generic/pci.h> |
124 | 102 | ||
125 | /* Use any cpu for PCI. */ | ||
126 | #define cpumask_of_pcibus(bus) cpu_online_mask | ||
127 | |||
128 | #endif /* _ASM_TILE_PCI_H */ | 103 | #endif /* _ASM_TILE_PCI_H */ |
diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h index 1747ff3946b2..a9e7c8760334 100644 --- a/arch/tile/include/asm/processor.h +++ b/arch/tile/include/asm/processor.h | |||
@@ -292,8 +292,18 @@ extern int kstack_hash; | |||
292 | /* Are we using huge pages in the TLB for kernel data? */ | 292 | /* Are we using huge pages in the TLB for kernel data? */ |
293 | extern int kdata_huge; | 293 | extern int kdata_huge; |
294 | 294 | ||
295 | /* Support standard Linux prefetching. */ | ||
296 | #define ARCH_HAS_PREFETCH | ||
297 | #define prefetch(x) __builtin_prefetch(x) | ||
295 | #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() | 298 | #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() |
296 | 299 | ||
300 | /* Bring a value into the L1D, faulting the TLB if necessary. */ | ||
301 | #ifdef __tilegx__ | ||
302 | #define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x)) | ||
303 | #else | ||
304 | #define prefetch_L1(x) __insn_prefetch_L1((void *)(x)) | ||
305 | #endif | ||
306 | |||
297 | #else /* __ASSEMBLY__ */ | 307 | #else /* __ASSEMBLY__ */ |
298 | 308 | ||
299 | /* Do some slow action (e.g. read a slow SPR). */ | 309 | /* Do some slow action (e.g. read a slow SPR). */ |
diff --git a/arch/tile/include/hv/drv_xgbe_impl.h b/arch/tile/include/hv/drv_xgbe_impl.h new file mode 100644 index 000000000000..3a73b2b44913 --- /dev/null +++ b/arch/tile/include/hv/drv_xgbe_impl.h | |||
@@ -0,0 +1,300 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | /** | ||
16 | * @file drivers/xgbe/impl.h | ||
17 | * Implementation details for the NetIO library. | ||
18 | */ | ||
19 | |||
20 | #ifndef __DRV_XGBE_IMPL_H__ | ||
21 | #define __DRV_XGBE_IMPL_H__ | ||
22 | |||
23 | #include <hv/netio_errors.h> | ||
24 | #include <hv/netio_intf.h> | ||
25 | #include <hv/drv_xgbe_intf.h> | ||
26 | |||
27 | |||
28 | /** How many groups we have (log2). */ | ||
29 | #define LOG2_NUM_GROUPS (12) | ||
30 | /** How many groups we have. */ | ||
31 | #define NUM_GROUPS (1 << LOG2_NUM_GROUPS) | ||
32 | |||
33 | /** Number of output requests we'll buffer per tile. */ | ||
34 | #define EPP_REQS_PER_TILE (32) | ||
35 | |||
36 | /** Words used in an eDMA command without checksum acceleration. */ | ||
37 | #define EDMA_WDS_NO_CSUM 8 | ||
38 | /** Words used in an eDMA command with checksum acceleration. */ | ||
39 | #define EDMA_WDS_CSUM 10 | ||
40 | /** Total available words in the eDMA command FIFO. */ | ||
41 | #define EDMA_WDS_TOTAL 128 | ||
42 | |||
43 | |||
44 | /* | ||
45 | * FIXME: These definitions are internal and should have underscores! | ||
46 | * NOTE: The actual numeric values here are intentional and allow us to | ||
47 | * optimize the concept "if small ... else if large ... else ...", by | ||
48 | * checking for the low bit being set, and then for non-zero. | ||
49 | * These are used as array indices, so they must have the values (0, 1, 2) | ||
50 | * in some order. | ||
51 | */ | ||
52 | #define SIZE_SMALL (1) /**< Small packet queue. */ | ||
53 | #define SIZE_LARGE (2) /**< Large packet queue. */ | ||
54 | #define SIZE_JUMBO (0) /**< Jumbo packet queue. */ | ||
55 | |||
56 | /** The number of "SIZE_xxx" values. */ | ||
57 | #define NETIO_NUM_SIZES 3 | ||
58 | |||
59 | |||
60 | /* | ||
61 | * Default numbers of packets for IPP drivers. These values are chosen | ||
62 | * such that CIPP1 will not overflow its L2 cache. | ||
63 | */ | ||
64 | |||
65 | /** The default number of small packets. */ | ||
66 | #define NETIO_DEFAULT_SMALL_PACKETS 2750 | ||
67 | /** The default number of large packets. */ | ||
68 | #define NETIO_DEFAULT_LARGE_PACKETS 2500 | ||
69 | /** The default number of jumbo packets. */ | ||
70 | #define NETIO_DEFAULT_JUMBO_PACKETS 250 | ||
71 | |||
72 | |||
73 | /** Log2 of the size of a memory arena. */ | ||
74 | #define NETIO_ARENA_SHIFT 24 /* 16 MB */ | ||
75 | /** Size of a memory arena. */ | ||
76 | #define NETIO_ARENA_SIZE (1 << NETIO_ARENA_SHIFT) | ||
77 | |||
78 | |||
79 | /** A queue of packets. | ||
80 | * | ||
81 | * This structure partially defines a queue of packets waiting to be | ||
82 | * processed. The queue as a whole is written to by an interrupt handler and | ||
83 | * read by non-interrupt code; this data structure is what's touched by the | ||
84 | * interrupt handler. The other part of the queue state, the read offset, is | ||
85 | * kept in user space, not in hypervisor space, so it is in a separate data | ||
86 | * structure. | ||
87 | * | ||
88 | * The read offset (__packet_receive_read in the user part of the queue | ||
89 | * structure) points to the next packet to be read. When the read offset is | ||
90 | * equal to the write offset, the queue is empty; therefore the queue must | ||
91 | * contain one more slot than the required maximum queue size. | ||
92 | * | ||
93 | * Here's an example of all 3 state variables and what they mean. All | ||
94 | * pointers move left to right. | ||
95 | * | ||
96 | * @code | ||
97 | * I I V V V V I I I I | ||
98 | * 0 1 2 3 4 5 6 7 8 9 10 | ||
99 | * ^ ^ ^ ^ | ||
100 | * | | | | ||
101 | * | | __last_packet_plus_one | ||
102 | * | __buffer_write | ||
103 | * __packet_receive_read | ||
104 | * @endcode | ||
105 | * | ||
106 | * This queue has 10 slots, and thus can hold 9 packets (_last_packet_plus_one | ||
107 | * = 10). The read pointer is at 2, and the write pointer is at 6; thus, | ||
108 | * there are valid, unread packets in slots 2, 3, 4, and 5. The remaining | ||
109 | * slots are invalid (do not contain a packet). | ||
110 | */ | ||
111 | typedef struct { | ||
112 | /** Byte offset of the next notify packet to be written: zero for the first | ||
113 | * packet on the queue, sizeof (netio_pkt_t) for the second packet on the | ||
114 | * queue, etc. */ | ||
115 | volatile uint32_t __packet_write; | ||
116 | |||
117 | /** Offset of the packet after the last valid packet (i.e., when any | ||
118 | * pointer is incremented to this value, it wraps back to zero). */ | ||
119 | uint32_t __last_packet_plus_one; | ||
120 | } | ||
121 | __netio_packet_queue_t; | ||
122 | |||
123 | |||
124 | /** A queue of buffers. | ||
125 | * | ||
126 | * This structure partially defines a queue of empty buffers which have been | ||
127 | * obtained via requests to the IPP. (The elements of the queue are packet | ||
128 | * handles, which are transformed into a full netio_pkt_t when the buffer is | ||
129 | * retrieved.) The queue as a whole is written to by an interrupt handler and | ||
130 | * read by non-interrupt code; this data structure is what's touched by the | ||
131 | * interrupt handler. The other parts of the queue state, the read offset and | ||
132 | * requested write offset, are kept in user space, not in hypervisor space, so | ||
133 | * they are in a separate data structure. | ||
134 | * | ||
135 | * The read offset (__buffer_read in the user part of the queue structure) | ||
136 | * points to the next buffer to be read. When the read offset is equal to the | ||
137 | * write offset, the queue is empty; therefore the queue must contain one more | ||
138 | * slot than the required maximum queue size. | ||
139 | * | ||
140 | * The requested write offset (__buffer_requested_write in the user part of | ||
141 | * the queue structure) points to the slot which will hold the next buffer we | ||
142 | * request from the IPP, once we get around to sending such a request. When | ||
143 | * the requested write offset is equal to the write offset, no requests for | ||
144 | * new buffers are outstanding; when the requested write offset is one greater | ||
145 | * than the read offset, no more requests may be sent. | ||
146 | * | ||
147 | * Note that, unlike the packet_queue, the buffer_queue places incoming | ||
148 | * buffers at decreasing addresses. This makes the check for "is it time to | ||
149 | * wrap the buffer pointer" cheaper in the assembly code which receives new | ||
150 | * buffers, and means that the value which defines the queue size, | ||
151 | * __last_buffer, is different than in the packet queue. Also, the offset | ||
152 | * used in the packet_queue is already scaled by the size of a packet; here we | ||
153 | * use unscaled slot indices for the offsets. (These differences are | ||
154 | * historical, and in the future it's possible that the packet_queue will look | ||
155 | * more like this queue.) | ||
156 | * | ||
157 | * @code | ||
158 | * Here's an example of all 4 state variables and what they mean. Remember: | ||
159 | * all pointers move right to left. | ||
160 | * | ||
161 | * V V V I I R R V V V | ||
162 | * 0 1 2 3 4 5 6 7 8 9 | ||
163 | * ^ ^ ^ ^ | ||
164 | * | | | | | ||
165 | * | | | __last_buffer | ||
166 | * | | __buffer_write | ||
167 | * | __buffer_requested_write | ||
168 | * __buffer_read | ||
169 | * @endcode | ||
170 | * | ||
171 | * This queue has 10 slots, and thus can hold 9 buffers (_last_buffer = 9). | ||
172 | * The read pointer is at 2, and the write pointer is at 6; thus, there are | ||
173 | * valid, unread buffers in slots 2, 1, 0, 9, 8, and 7. The requested write | ||
174 | * pointer is at 4; thus, requests have been made to the IPP for buffers which | ||
175 | * will be placed in slots 6 and 5 when they arrive. Finally, the remaining | ||
176 | * slots are invalid (do not contain a buffer). | ||
177 | */ | ||
178 | typedef struct | ||
179 | { | ||
180 | /** Ordinal number of the next buffer to be written: 0 for the first slot in | ||
181 | * the queue, 1 for the second slot in the queue, etc. */ | ||
182 | volatile uint32_t __buffer_write; | ||
183 | |||
184 | /** Ordinal number of the last buffer (i.e., when any pointer is decremented | ||
185 | * below zero, it is reloaded with this value). */ | ||
186 | uint32_t __last_buffer; | ||
187 | } | ||
188 | __netio_buffer_queue_t; | ||
189 | |||
190 | |||
191 | /** | ||
192 | * An object for providing Ethernet packets to a process. | ||
193 | */ | ||
194 | typedef struct __netio_queue_impl_t | ||
195 | { | ||
196 | /** The queue of packets waiting to be received. */ | ||
197 | __netio_packet_queue_t __packet_receive_queue; | ||
198 | /** The intr bit mask that IDs this device. */ | ||
199 | unsigned int __intr_id; | ||
200 | /** Offset to queues of empty buffers, one per size. */ | ||
201 | uint32_t __buffer_queue[NETIO_NUM_SIZES]; | ||
202 | /** The address of the first EPP tile, or -1 if no EPP. */ | ||
203 | /* ISSUE: Actually this is always "0" or "~0". */ | ||
204 | uint32_t __epp_location; | ||
205 | /** The queue ID that this queue represents. */ | ||
206 | unsigned int __queue_id; | ||
207 | /** Number of acknowledgements received. */ | ||
208 | volatile uint32_t __acks_received; | ||
209 | /** Last completion number received for packet_sendv. */ | ||
210 | volatile uint32_t __last_completion_rcv; | ||
211 | /** Number of packets allowed to be outstanding. */ | ||
212 | uint32_t __max_outstanding; | ||
213 | /** First VA available for packets. */ | ||
214 | void* __va_0; | ||
215 | /** First VA in second range available for packets. */ | ||
216 | void* __va_1; | ||
217 | /** Padding to align the "__packets" field to the size of a netio_pkt_t. */ | ||
218 | uint32_t __padding[3]; | ||
219 | /** The packets themselves. */ | ||
220 | netio_pkt_t __packets[0]; | ||
221 | } | ||
222 | netio_queue_impl_t; | ||
223 | |||
224 | |||
225 | /** | ||
226 | * An object for managing the user end of a NetIO queue. | ||
227 | */ | ||
228 | typedef struct __netio_queue_user_impl_t | ||
229 | { | ||
230 | /** The next incoming packet to be read. */ | ||
231 | uint32_t __packet_receive_read; | ||
232 | /** The next empty buffers to be read, one index per size. */ | ||
233 | uint8_t __buffer_read[NETIO_NUM_SIZES]; | ||
234 | /** Where the empty buffer we next request from the IPP will go, one index | ||
235 | * per size. */ | ||
236 | uint8_t __buffer_requested_write[NETIO_NUM_SIZES]; | ||
237 | /** PCIe interface flag. */ | ||
238 | uint8_t __pcie; | ||
239 | /** Number of packets left to be received before we send a credit update. */ | ||
240 | uint32_t __receive_credit_remaining; | ||
241 | /** Value placed in __receive_credit_remaining when it reaches zero. */ | ||
242 | uint32_t __receive_credit_interval; | ||
243 | /** First fast I/O routine index. */ | ||
244 | uint32_t __fastio_index; | ||
245 | /** Number of acknowledgements expected. */ | ||
246 | uint32_t __acks_outstanding; | ||
247 | /** Last completion number requested. */ | ||
248 | uint32_t __last_completion_req; | ||
249 | /** File descriptor for driver. */ | ||
250 | int __fd; | ||
251 | } | ||
252 | netio_queue_user_impl_t; | ||
253 | |||
254 | |||
255 | #define NETIO_GROUP_CHUNK_SIZE 64 /**< Max # groups in one IPP request */ | ||
256 | #define NETIO_BUCKET_CHUNK_SIZE 64 /**< Max # buckets in one IPP request */ | ||
257 | |||
258 | |||
259 | /** Internal structure used to convey packet send information to the | ||
260 | * hypervisor. FIXME: Actually, it's not used for that anymore, but | ||
261 | * netio_packet_send() still uses it internally. | ||
262 | */ | ||
263 | typedef struct | ||
264 | { | ||
265 | uint16_t flags; /**< Packet flags (__NETIO_SEND_FLG_xxx) */ | ||
266 | uint16_t transfer_size; /**< Size of packet */ | ||
267 | uint32_t va; /**< VA of start of packet */ | ||
268 | __netio_pkt_handle_t handle; /**< Packet handle */ | ||
269 | uint32_t csum0; /**< First checksum word */ | ||
270 | uint32_t csum1; /**< Second checksum word */ | ||
271 | } | ||
272 | __netio_send_cmd_t; | ||
273 | |||
274 | |||
275 | /** Flags used in two contexts: | ||
276 | * - As the "flags" member in the __netio_send_cmd_t, above; used only | ||
277 | * for netio_pkt_send_{prepare,commit}. | ||
278 | * - As part of the flags passed to the various send packet fast I/O calls. | ||
279 | */ | ||
280 | |||
281 | /** Need acknowledgement on this packet. Note that some code in the | ||
282 | * normal send_pkt fast I/O handler assumes that this is equal to 1. */ | ||
283 | #define __NETIO_SEND_FLG_ACK 0x1 | ||
284 | |||
285 | /** Do checksum on this packet. (Only used with the __netio_send_cmd_t; | ||
286 | * normal packet sends use a special fast I/O index to denote checksumming, | ||
287 | * and multi-segment sends test the checksum descriptor.) */ | ||
288 | #define __NETIO_SEND_FLG_CSUM 0x2 | ||
289 | |||
290 | /** Get a completion on this packet. Only used with multi-segment sends. */ | ||
291 | #define __NETIO_SEND_FLG_COMPLETION 0x4 | ||
292 | |||
293 | /** Position of the number-of-extra-segments value in the flags word. | ||
294 | Only used with multi-segment sends. */ | ||
295 | #define __NETIO_SEND_FLG_XSEG_SHIFT 3 | ||
296 | |||
297 | /** Width of the number-of-extra-segments value in the flags word. */ | ||
298 | #define __NETIO_SEND_FLG_XSEG_WIDTH 2 | ||
299 | |||
300 | #endif /* __DRV_XGBE_IMPL_H__ */ | ||
diff --git a/arch/tile/include/hv/drv_xgbe_intf.h b/arch/tile/include/hv/drv_xgbe_intf.h new file mode 100644 index 000000000000..146e47d5334b --- /dev/null +++ b/arch/tile/include/hv/drv_xgbe_intf.h | |||
@@ -0,0 +1,615 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | /** | ||
16 | * @file drv_xgbe_intf.h | ||
17 | * Interface to the hypervisor XGBE driver. | ||
18 | */ | ||
19 | |||
20 | #ifndef __DRV_XGBE_INTF_H__ | ||
21 | #define __DRV_XGBE_INTF_H__ | ||
22 | |||
23 | /** | ||
24 | * An object for forwarding VAs and PAs to the hypervisor. | ||
25 | * @ingroup types | ||
26 | * | ||
27 | * This allows the supervisor to specify a number of areas of memory to | ||
28 | * store packet buffers. | ||
29 | */ | ||
30 | typedef struct | ||
31 | { | ||
32 | /** The physical address of the memory. */ | ||
33 | HV_PhysAddr pa; | ||
34 | /** Page table entry for the memory. This is only used to derive the | ||
35 | * memory's caching mode; the PA bits are ignored. */ | ||
36 | HV_PTE pte; | ||
37 | /** The virtual address of the memory. */ | ||
38 | HV_VirtAddr va; | ||
39 | /** Size (in bytes) of the memory area. */ | ||
40 | int size; | ||
41 | |||
42 | } | ||
43 | netio_ipp_address_t; | ||
44 | |||
45 | /** The various pread/pwrite offsets into the hypervisor-level driver. | ||
46 | * @ingroup types | ||
47 | */ | ||
48 | typedef enum | ||
49 | { | ||
50 | /** Inform the Linux driver of the address of the NetIO arena memory. | ||
51 | * This offset is actually only used to convey information from netio | ||
52 | * to the Linux driver; it never makes it from there to the hypervisor. | ||
53 | * Write-only; takes a uint32_t specifying the VA address. */ | ||
54 | NETIO_FIXED_ADDR = 0x5000000000000000ULL, | ||
55 | |||
56 | /** Inform the Linux driver of the size of the NetIO arena memory. | ||
57 | * This offset is actually only used to convey information from netio | ||
58 | * to the Linux driver; it never makes it from there to the hypervisor. | ||
59 | * Write-only; takes a uint32_t specifying the VA size. */ | ||
60 | NETIO_FIXED_SIZE = 0x5100000000000000ULL, | ||
61 | |||
62 | /** Register current tile with IPP. Write then read: write, takes a | ||
63 | * netio_input_config_t, read returns a pointer to a netio_queue_impl_t. */ | ||
64 | NETIO_IPP_INPUT_REGISTER_OFF = 0x6000000000000000ULL, | ||
65 | |||
66 | /** Unregister current tile from IPP. Write-only, takes a dummy argument. */ | ||
67 | NETIO_IPP_INPUT_UNREGISTER_OFF = 0x6100000000000000ULL, | ||
68 | |||
69 | /** Start packets flowing. Write-only, takes a dummy argument. */ | ||
70 | NETIO_IPP_INPUT_INIT_OFF = 0x6200000000000000ULL, | ||
71 | |||
72 | /** Stop packets flowing. Write-only, takes a dummy argument. */ | ||
73 | NETIO_IPP_INPUT_UNINIT_OFF = 0x6300000000000000ULL, | ||
74 | |||
75 | /** Configure group (typically we group on VLAN). Write-only: takes an | ||
76 | * array of netio_group_t's, low 24 bits of the offset is the base group | ||
77 | * number times the size of a netio_group_t. */ | ||
78 | NETIO_IPP_INPUT_GROUP_CFG_OFF = 0x6400000000000000ULL, | ||
79 | |||
80 | /** Configure bucket. Write-only: takes an array of netio_bucket_t's, low | ||
81 | * 24 bits of the offset is the base bucket number times the size of a | ||
82 | * netio_bucket_t. */ | ||
83 | NETIO_IPP_INPUT_BUCKET_CFG_OFF = 0x6500000000000000ULL, | ||
84 | |||
85 | /** Get/set a parameter. Read or write: read or write data is the parameter | ||
86 | * value, low 32 bits of the offset is a __netio_getset_offset_t. */ | ||
87 | NETIO_IPP_PARAM_OFF = 0x6600000000000000ULL, | ||
88 | |||
89 | /** Get fast I/O index. Read-only; returns a 4-byte base index value. */ | ||
90 | NETIO_IPP_GET_FASTIO_OFF = 0x6700000000000000ULL, | ||
91 | |||
92 | /** Configure hijack IP address. Packets with this IPv4 dest address | ||
93 | * go to bucket NETIO_NUM_BUCKETS - 1. Write-only: takes an IP address | ||
94 | * in some standard form. FIXME: Define the form! */ | ||
95 | NETIO_IPP_INPUT_HIJACK_CFG_OFF = 0x6800000000000000ULL, | ||
96 | |||
97 | /** | ||
98 | * Offsets beyond this point are reserved for the supervisor (although that | ||
99 | * enforcement must be done by the supervisor driver itself). | ||
100 | */ | ||
101 | NETIO_IPP_USER_MAX_OFF = 0x6FFFFFFFFFFFFFFFULL, | ||
102 | |||
103 | /** Register I/O memory. Write-only, takes a netio_ipp_address_t. */ | ||
104 | NETIO_IPP_IOMEM_REGISTER_OFF = 0x7000000000000000ULL, | ||
105 | |||
106 | /** Unregister I/O memory. Write-only, takes a netio_ipp_address_t. */ | ||
107 | NETIO_IPP_IOMEM_UNREGISTER_OFF = 0x7100000000000000ULL, | ||
108 | |||
109 | /* Offsets greater than 0x7FFFFFFF can't be used directly from Linux | ||
110 | * userspace code due to limitations in the pread/pwrite syscalls. */ | ||
111 | |||
112 | /** Drain LIPP buffers. */ | ||
113 | NETIO_IPP_DRAIN_OFF = 0xFA00000000000000ULL, | ||
114 | |||
115 | /** Supply a netio_ipp_address_t to be used as shared memory for the | ||
116 | * LEPP command queue. */ | ||
117 | NETIO_EPP_SHM_OFF = 0xFB00000000000000ULL, | ||
118 | |||
119 | /* 0xFC... is currently unused. */ | ||
120 | |||
121 | /** Stop IPP/EPP tiles. Write-only, takes a dummy argument. */ | ||
122 | NETIO_IPP_STOP_SHIM_OFF = 0xFD00000000000000ULL, | ||
123 | |||
124 | /** Start IPP/EPP tiles. Write-only, takes a dummy argument. */ | ||
125 | NETIO_IPP_START_SHIM_OFF = 0xFE00000000000000ULL, | ||
126 | |||
127 | /** Supply packet arena. Write-only, takes an array of | ||
128 | * netio_ipp_address_t values. */ | ||
129 | NETIO_IPP_ADDRESS_OFF = 0xFF00000000000000ULL, | ||
130 | } netio_hv_offset_t; | ||
131 | |||
132 | /** Extract the base offset from an offset */ | ||
133 | #define NETIO_BASE_OFFSET(off) ((off) & 0xFF00000000000000ULL) | ||
134 | /** Extract the local offset from an offset */ | ||
135 | #define NETIO_LOCAL_OFFSET(off) ((off) & 0x00FFFFFFFFFFFFFFULL) | ||
136 | |||
137 | |||
138 | /** | ||
139 | * Get/set offset. | ||
140 | */ | ||
141 | typedef union | ||
142 | { | ||
143 | struct | ||
144 | { | ||
145 | uint64_t addr:48; /**< Class-specific address */ | ||
146 | unsigned int class:8; /**< Class (e.g., NETIO_PARAM) */ | ||
147 | unsigned int opcode:8; /**< High 8 bits of NETIO_IPP_PARAM_OFF */ | ||
148 | } | ||
149 | bits; /**< Bitfields */ | ||
150 | uint64_t word; /**< Aggregated value to use as the offset */ | ||
151 | } | ||
152 | __netio_getset_offset_t; | ||
153 | |||
154 | /** | ||
155 | * Fast I/O index offsets (must be contiguous). | ||
156 | */ | ||
157 | typedef enum | ||
158 | { | ||
159 | NETIO_FASTIO_ALLOCATE = 0, /**< Get empty packet buffer */ | ||
160 | NETIO_FASTIO_FREE_BUFFER = 1, /**< Give buffer back to IPP */ | ||
161 | NETIO_FASTIO_RETURN_CREDITS = 2, /**< Give credits to IPP */ | ||
162 | NETIO_FASTIO_SEND_PKT_NOCK = 3, /**< Send a packet, no checksum */ | ||
163 | NETIO_FASTIO_SEND_PKT_CK = 4, /**< Send a packet, with checksum */ | ||
164 | NETIO_FASTIO_SEND_PKT_VEC = 5, /**< Send a vector of packets */ | ||
165 | NETIO_FASTIO_SENDV_PKT = 6, /**< Sendv one packet */ | ||
166 | NETIO_FASTIO_NUM_INDEX = 7, /**< Total number of fast I/O indices */ | ||
167 | } netio_fastio_index_t; | ||
168 | |||
169 | /** 3-word return type for Fast I/O call. */ | ||
170 | typedef struct | ||
171 | { | ||
172 | int err; /**< Error code. */ | ||
173 | uint32_t val0; /**< Value. Meaning depends upon the specific call. */ | ||
174 | uint32_t val1; /**< Value. Meaning depends upon the specific call. */ | ||
175 | } netio_fastio_rv3_t; | ||
176 | |||
177 | /** 0-argument fast I/O call */ | ||
178 | int __netio_fastio0(uint32_t fastio_index); | ||
179 | /** 1-argument fast I/O call */ | ||
180 | int __netio_fastio1(uint32_t fastio_index, uint32_t arg0); | ||
181 | /** 3-argument fast I/O call, 2-word return value */ | ||
182 | netio_fastio_rv3_t __netio_fastio3_rv3(uint32_t fastio_index, uint32_t arg0, | ||
183 | uint32_t arg1, uint32_t arg2); | ||
184 | /** 4-argument fast I/O call */ | ||
185 | int __netio_fastio4(uint32_t fastio_index, uint32_t arg0, uint32_t arg1, | ||
186 | uint32_t arg2, uint32_t arg3); | ||
187 | /** 6-argument fast I/O call */ | ||
188 | int __netio_fastio6(uint32_t fastio_index, uint32_t arg0, uint32_t arg1, | ||
189 | uint32_t arg2, uint32_t arg3, uint32_t arg4, uint32_t arg5); | ||
190 | /** 9-argument fast I/O call */ | ||
191 | int __netio_fastio9(uint32_t fastio_index, uint32_t arg0, uint32_t arg1, | ||
192 | uint32_t arg2, uint32_t arg3, uint32_t arg4, uint32_t arg5, | ||
193 | uint32_t arg6, uint32_t arg7, uint32_t arg8); | ||
194 | |||
195 | /** Allocate an empty packet. | ||
196 | * @param fastio_index Fast I/O index. | ||
197 | * @param size Size of the packet to allocate. | ||
198 | */ | ||
199 | #define __netio_fastio_allocate(fastio_index, size) \ | ||
200 | __netio_fastio1((fastio_index) + NETIO_FASTIO_ALLOCATE, size) | ||
201 | |||
202 | /** Free a buffer. | ||
203 | * @param fastio_index Fast I/O index. | ||
204 | * @param handle Handle for the packet to free. | ||
205 | */ | ||
206 | #define __netio_fastio_free_buffer(fastio_index, handle) \ | ||
207 | __netio_fastio1((fastio_index) + NETIO_FASTIO_FREE_BUFFER, handle) | ||
208 | |||
209 | /** Increment our receive credits. | ||
210 | * @param fastio_index Fast I/O index. | ||
211 | * @param credits Number of credits to add. | ||
212 | */ | ||
213 | #define __netio_fastio_return_credits(fastio_index, credits) \ | ||
214 | __netio_fastio1((fastio_index) + NETIO_FASTIO_RETURN_CREDITS, credits) | ||
215 | |||
216 | /** Send packet, no checksum. | ||
217 | * @param fastio_index Fast I/O index. | ||
218 | * @param ackflag Nonzero if we want an ack. | ||
219 | * @param size Size of the packet. | ||
220 | * @param va Virtual address of start of packet. | ||
221 | * @param handle Packet handle. | ||
222 | */ | ||
223 | #define __netio_fastio_send_pkt_nock(fastio_index, ackflag, size, va, handle) \ | ||
224 | __netio_fastio4((fastio_index) + NETIO_FASTIO_SEND_PKT_NOCK, ackflag, \ | ||
225 | size, va, handle) | ||
226 | |||
227 | /** Send packet, calculate checksum. | ||
228 | * @param fastio_index Fast I/O index. | ||
229 | * @param ackflag Nonzero if we want an ack. | ||
230 | * @param size Size of the packet. | ||
231 | * @param va Virtual address of start of packet. | ||
232 | * @param handle Packet handle. | ||
233 | * @param csum0 Shim checksum header. | ||
234 | * @param csum1 Checksum seed. | ||
235 | */ | ||
236 | #define __netio_fastio_send_pkt_ck(fastio_index, ackflag, size, va, handle, \ | ||
237 | csum0, csum1) \ | ||
238 | __netio_fastio6((fastio_index) + NETIO_FASTIO_SEND_PKT_CK, ackflag, \ | ||
239 | size, va, handle, csum0, csum1) | ||
240 | |||
241 | |||
242 | /** Format for the "csum0" argument to the __netio_fastio_send routines | ||
243 | * and LEPP. Note that this is currently exactly identical to the | ||
244 | * ShimProtocolOffloadHeader. | ||
245 | */ | ||
246 | typedef union | ||
247 | { | ||
248 | struct | ||
249 | { | ||
250 | unsigned int start_byte:7; /**< The first byte to be checksummed */ | ||
251 | unsigned int count:14; /**< Number of bytes to be checksummed. */ | ||
252 | unsigned int destination_byte:7; /**< The byte to write the checksum to. */ | ||
253 | unsigned int reserved:4; /**< Reserved. */ | ||
254 | } bits; /**< Decomposed method of access. */ | ||
255 | unsigned int word; /**< To send out the IDN. */ | ||
256 | } __netio_checksum_header_t; | ||
257 | |||
258 | |||
259 | /** Sendv packet with 1 or 2 segments. | ||
260 | * @param fastio_index Fast I/O index. | ||
261 | * @param flags Ack/csum/notify flags in low 3 bits; number of segments minus | ||
262 | * 1 in next 2 bits; expected checksum in high 16 bits. | ||
263 | * @param confno Confirmation number to request, if notify flag set. | ||
264 | * @param csum0 Checksum descriptor; if zero, no checksum. | ||
265 | * @param va_F Virtual address of first segment. | ||
266 | * @param va_L Virtual address of last segment, if 2 segments. | ||
267 | * @param len_F_L Length of first segment in low 16 bits; length of last | ||
268 | * segment, if 2 segments, in high 16 bits. | ||
269 | */ | ||
270 | #define __netio_fastio_sendv_pkt_1_2(fastio_index, flags, confno, csum0, \ | ||
271 | va_F, va_L, len_F_L) \ | ||
272 | __netio_fastio6((fastio_index) + NETIO_FASTIO_SENDV_PKT, flags, confno, \ | ||
273 | csum0, va_F, va_L, len_F_L) | ||
274 | |||
275 | /** Send packet on PCIe interface. | ||
276 | * @param fastio_index Fast I/O index. | ||
277 | * @param flags Ack/csum/notify flags in low 3 bits. | ||
278 | * @param confno Confirmation number to request, if notify flag set. | ||
279 | * @param csum0 Checksum descriptor; Hard wired 0, not needed for PCIe. | ||
280 | * @param va_F Virtual address of the packet buffer. | ||
281 | * @param va_L Virtual address of last segment, if 2 segments. Hard wired 0. | ||
282 | * @param len_F_L Length of the packet buffer in low 16 bits. | ||
283 | */ | ||
284 | #define __netio_fastio_send_pcie_pkt(fastio_index, flags, confno, csum0, \ | ||
285 | va_F, va_L, len_F_L) \ | ||
286 | __netio_fastio6((fastio_index) + PCIE_FASTIO_SENDV_PKT, flags, confno, \ | ||
287 | csum0, va_F, va_L, len_F_L) | ||
288 | |||
289 | /** Sendv packet with 3 or 4 segments. | ||
290 | * @param fastio_index Fast I/O index. | ||
291 | * @param flags Ack/csum/notify flags in low 3 bits; number of segments minus | ||
292 | * 1 in next 2 bits; expected checksum in high 16 bits. | ||
293 | * @param confno Confirmation number to request, if notify flag set. | ||
294 | * @param csum0 Checksum descriptor; if zero, no checksum. | ||
295 | * @param va_F Virtual address of first segment. | ||
296 | * @param va_L Virtual address of last segment (third segment if 3 segments, | ||
297 | * fourth segment if 4 segments). | ||
298 | * @param len_F_L Length of first segment in low 16 bits; length of last | ||
299 | * segment in high 16 bits. | ||
300 | * @param va_M0 Virtual address of "middle 0" segment; this segment is sent | ||
301 | * second when there are three segments, and third if there are four. | ||
302 | * @param va_M1 Virtual address of "middle 1" segment; this segment is sent | ||
303 | * second when there are four segments. | ||
304 | * @param len_M0_M1 Length of middle 0 segment in low 16 bits; length of middle | ||
305 | * 1 segment, if 4 segments, in high 16 bits. | ||
306 | */ | ||
307 | #define __netio_fastio_sendv_pkt_3_4(fastio_index, flags, confno, csum0, va_F, \ | ||
308 | va_L, len_F_L, va_M0, va_M1, len_M0_M1) \ | ||
309 | __netio_fastio9((fastio_index) + NETIO_FASTIO_SENDV_PKT, flags, confno, \ | ||
310 | csum0, va_F, va_L, len_F_L, va_M0, va_M1, len_M0_M1) | ||
311 | |||
312 | /** Send vector of packets. | ||
313 | * @param fastio_index Fast I/O index. | ||
314 | * @param seqno Number of packets transmitted so far on this interface; | ||
315 | * used to decide which packets should be acknowledged. | ||
316 | * @param nentries Number of entries in vector. | ||
317 | * @param va Virtual address of start of vector entry array. | ||
318 | * @return 3-word netio_fastio_rv3_t structure. The structure's err member | ||
319 | * is an error code, or zero if no error. The val0 member is the | ||
320 | * updated value of seqno; it has been incremented by 1 for each | ||
321 | * packet sent. That increment may be less than nentries if an | ||
322 | * error occured, or if some of the entries in the vector contain | ||
323 | * handles equal to NETIO_PKT_HANDLE_NONE. The val1 member is the | ||
324 | * updated value of nentries; it has been decremented by 1 for each | ||
325 | * vector entry processed. Again, that decrement may be less than | ||
326 | * nentries (leaving the returned value positive) if an error | ||
327 | * occurred. | ||
328 | */ | ||
329 | #define __netio_fastio_send_pkt_vec(fastio_index, seqno, nentries, va) \ | ||
330 | __netio_fastio3_rv3((fastio_index) + NETIO_FASTIO_SEND_PKT_VEC, seqno, \ | ||
331 | nentries, va) | ||
332 | |||
333 | |||
334 | /** An egress DMA command for LEPP. */ | ||
335 | typedef struct | ||
336 | { | ||
337 | /** Is this a TSO transfer? | ||
338 | * | ||
339 | * NOTE: This field is always 0, to distinguish it from | ||
340 | * lepp_tso_cmd_t. It must come first! | ||
341 | */ | ||
342 | uint8_t tso : 1; | ||
343 | |||
344 | /** Unused padding bits. */ | ||
345 | uint8_t _unused : 3; | ||
346 | |||
347 | /** Should this packet be sent directly from caches instead of DRAM, | ||
348 | * using hash-for-home to locate the packet data? | ||
349 | */ | ||
350 | uint8_t hash_for_home : 1; | ||
351 | |||
352 | /** Should we compute a checksum? */ | ||
353 | uint8_t compute_checksum : 1; | ||
354 | |||
355 | /** Is this the final buffer for this packet? | ||
356 | * | ||
357 | * A single packet can be split over several input buffers (a "gather" | ||
358 | * operation). This flag indicates that this is the last buffer | ||
359 | * in a packet. | ||
360 | */ | ||
361 | uint8_t end_of_packet : 1; | ||
362 | |||
363 | /** Should LEPP advance 'comp_busy' when this DMA is fully finished? */ | ||
364 | uint8_t send_completion : 1; | ||
365 | |||
366 | /** High bits of Client Physical Address of the start of the buffer | ||
367 | * to be egressed. | ||
368 | * | ||
369 | * NOTE: Only 6 bits are actually needed here, as CPAs are | ||
370 | * currently 38 bits. So two bits could be scavenged from this. | ||
371 | */ | ||
372 | uint8_t cpa_hi; | ||
373 | |||
374 | /** The number of bytes to be egressed. */ | ||
375 | uint16_t length; | ||
376 | |||
377 | /** Low 32 bits of Client Physical Address of the start of the buffer | ||
378 | * to be egressed. | ||
379 | */ | ||
380 | uint32_t cpa_lo; | ||
381 | |||
382 | /** Checksum information (only used if 'compute_checksum'). */ | ||
383 | __netio_checksum_header_t checksum_data; | ||
384 | |||
385 | } lepp_cmd_t; | ||
386 | |||
387 | |||
388 | /** A chunk of physical memory for a TSO egress. */ | ||
389 | typedef struct | ||
390 | { | ||
391 | /** The low bits of the CPA. */ | ||
392 | uint32_t cpa_lo; | ||
393 | /** The high bits of the CPA. */ | ||
394 | uint16_t cpa_hi : 15; | ||
395 | /** Should this packet be sent directly from caches instead of DRAM, | ||
396 | * using hash-for-home to locate the packet data? | ||
397 | */ | ||
398 | uint16_t hash_for_home : 1; | ||
399 | /** The length in bytes. */ | ||
400 | uint16_t length; | ||
401 | } lepp_frag_t; | ||
402 | |||
403 | |||
404 | /** An LEPP command that handles TSO. */ | ||
405 | typedef struct | ||
406 | { | ||
407 | /** Is this a TSO transfer? | ||
408 | * | ||
409 | * NOTE: This field is always 1, to distinguish it from | ||
410 | * lepp_cmd_t. It must come first! | ||
411 | */ | ||
412 | uint8_t tso : 1; | ||
413 | |||
414 | /** Unused padding bits. */ | ||
415 | uint8_t _unused : 7; | ||
416 | |||
417 | /** Size of the header[] array in bytes. It must be in the range | ||
418 | * [40, 127], which are the smallest header for a TCP packet over | ||
419 | * Ethernet and the maximum possible prepend size supported by | ||
420 | * hardware, respectively. Note that the array storage must be | ||
421 | * padded out to a multiple of four bytes so that the following | ||
422 | * LEPP command is aligned properly. | ||
423 | */ | ||
424 | uint8_t header_size; | ||
425 | |||
426 | /** Byte offset of the IP header in header[]. */ | ||
427 | uint8_t ip_offset; | ||
428 | |||
429 | /** Byte offset of the TCP header in header[]. */ | ||
430 | uint8_t tcp_offset; | ||
431 | |||
432 | /** The number of bytes to use for the payload of each packet, | ||
433 | * except of course the last one, which may not have enough bytes. | ||
434 | * This means that each Ethernet packet except the last will have a | ||
435 | * size of header_size + payload_size. | ||
436 | */ | ||
437 | uint16_t payload_size; | ||
438 | |||
439 | /** The length of the 'frags' array that follows this struct. */ | ||
440 | uint16_t num_frags; | ||
441 | |||
442 | /** The actual frags. */ | ||
443 | lepp_frag_t frags[0 /* Variable-sized; num_frags entries. */]; | ||
444 | |||
445 | /* | ||
446 | * The packet header template logically follows frags[], | ||
447 | * but you can't declare that in C. | ||
448 | * | ||
449 | * uint32_t header[header_size_in_words_rounded_up]; | ||
450 | */ | ||
451 | |||
452 | } lepp_tso_cmd_t; | ||
453 | |||
454 | |||
455 | /** An LEPP completion ring entry. */ | ||
456 | typedef void* lepp_comp_t; | ||
457 | |||
458 | |||
459 | /** Maximum number of frags for one TSO command. This is adapted from | ||
460 | * linux's "MAX_SKB_FRAGS", and presumably over-estimates by one, for | ||
461 | * our page size of exactly 65536. We add one for a "body" fragment. | ||
462 | */ | ||
463 | #define LEPP_MAX_FRAGS (65536 / HV_PAGE_SIZE_SMALL + 2 + 1) | ||
464 | |||
465 | /** Total number of bytes needed for an lepp_tso_cmd_t. */ | ||
466 | #define LEPP_TSO_CMD_SIZE(num_frags, header_size) \ | ||
467 | (sizeof(lepp_tso_cmd_t) + \ | ||
468 | (num_frags) * sizeof(lepp_frag_t) + \ | ||
469 | (((header_size) + 3) & -4)) | ||
470 | |||
471 | /** The size of the lepp "cmd" queue. */ | ||
472 | #define LEPP_CMD_QUEUE_BYTES \ | ||
473 | (((CHIP_L2_CACHE_SIZE() - 2 * CHIP_L2_LINE_SIZE()) / \ | ||
474 | (sizeof(lepp_cmd_t) + sizeof(lepp_comp_t))) * sizeof(lepp_cmd_t)) | ||
475 | |||
476 | /** The largest possible command that can go in lepp_queue_t::cmds[]. */ | ||
477 | #define LEPP_MAX_CMD_SIZE LEPP_TSO_CMD_SIZE(LEPP_MAX_FRAGS, 128) | ||
478 | |||
479 | /** The largest possible value of lepp_queue_t::cmd_{head, tail} (inclusive). | ||
480 | */ | ||
481 | #define LEPP_CMD_LIMIT \ | ||
482 | (LEPP_CMD_QUEUE_BYTES - LEPP_MAX_CMD_SIZE) | ||
483 | |||
484 | /** The maximum number of completions in an LEPP queue. */ | ||
485 | #define LEPP_COMP_QUEUE_SIZE \ | ||
486 | ((LEPP_CMD_LIMIT + sizeof(lepp_cmd_t) - 1) / sizeof(lepp_cmd_t)) | ||
487 | |||
488 | /** Increment an index modulo the queue size. */ | ||
489 | #define LEPP_QINC(var) \ | ||
490 | (var = __insn_mnz(var - (LEPP_COMP_QUEUE_SIZE - 1), var + 1)) | ||
491 | |||
492 | /** A queue used to convey egress commands from the client to LEPP. */ | ||
493 | typedef struct | ||
494 | { | ||
495 | /** Index of first completion not yet processed by user code. | ||
496 | * If this is equal to comp_busy, there are no such completions. | ||
497 | * | ||
498 | * NOTE: This is only read/written by the user. | ||
499 | */ | ||
500 | unsigned int comp_head; | ||
501 | |||
502 | /** Index of first completion record not yet completed. | ||
503 | * If this is equal to comp_tail, there are no such completions. | ||
504 | * This index gets advanced (modulo LEPP_QUEUE_SIZE) whenever | ||
505 | * a command with the 'completion' bit set is finished. | ||
506 | * | ||
507 | * NOTE: This is only written by LEPP, only read by the user. | ||
508 | */ | ||
509 | volatile unsigned int comp_busy; | ||
510 | |||
511 | /** Index of the first empty slot in the completion ring. | ||
512 | * Entries from this up to but not including comp_head (in ring order) | ||
513 | * can be filled in with completion data. | ||
514 | * | ||
515 | * NOTE: This is only read/written by the user. | ||
516 | */ | ||
517 | unsigned int comp_tail; | ||
518 | |||
519 | /** Byte index of first command enqueued for LEPP but not yet processed. | ||
520 | * | ||
521 | * This is always divisible by sizeof(void*) and always <= LEPP_CMD_LIMIT. | ||
522 | * | ||
523 | * NOTE: LEPP advances this counter as soon as it no longer needs | ||
524 | * the cmds[] storage for this entry, but the transfer is not actually | ||
525 | * complete (i.e. the buffer pointed to by the command is no longer | ||
526 | * needed) until comp_busy advances. | ||
527 | * | ||
528 | * If this is equal to cmd_tail, the ring is empty. | ||
529 | * | ||
530 | * NOTE: This is only written by LEPP, only read by the user. | ||
531 | */ | ||
532 | volatile unsigned int cmd_head; | ||
533 | |||
534 | /** Byte index of first empty slot in the command ring. This field can | ||
535 | * be incremented up to but not equal to cmd_head (because that would | ||
536 | * mean the ring is empty). | ||
537 | * | ||
538 | * This is always divisible by sizeof(void*) and always <= LEPP_CMD_LIMIT. | ||
539 | * | ||
540 | * NOTE: This is read/written by the user, only read by LEPP. | ||
541 | */ | ||
542 | volatile unsigned int cmd_tail; | ||
543 | |||
544 | /** A ring of variable-sized egress DMA commands. | ||
545 | * | ||
546 | * NOTE: Only written by the user, only read by LEPP. | ||
547 | */ | ||
548 | char cmds[LEPP_CMD_QUEUE_BYTES] | ||
549 | __attribute__((aligned(CHIP_L2_LINE_SIZE()))); | ||
550 | |||
551 | /** A ring of user completion data. | ||
552 | * NOTE: Only read/written by the user. | ||
553 | */ | ||
554 | lepp_comp_t comps[LEPP_COMP_QUEUE_SIZE] | ||
555 | __attribute__((aligned(CHIP_L2_LINE_SIZE()))); | ||
556 | } lepp_queue_t; | ||
557 | |||
558 | |||
559 | /** An internal helper function for determining the number of entries | ||
560 | * available in a ring buffer, given that there is one sentinel. | ||
561 | */ | ||
562 | static inline unsigned int | ||
563 | _lepp_num_free_slots(unsigned int head, unsigned int tail) | ||
564 | { | ||
565 | /* | ||
566 | * One entry is reserved for use as a sentinel, to distinguish | ||
567 | * "empty" from "full". So we compute | ||
568 | * (head - tail - 1) % LEPP_QUEUE_SIZE, but without using a slow % operation. | ||
569 | */ | ||
570 | return (head - tail - 1) + ((head <= tail) ? LEPP_COMP_QUEUE_SIZE : 0); | ||
571 | } | ||
572 | |||
573 | |||
574 | /** Returns how many new comp entries can be enqueued. */ | ||
575 | static inline unsigned int | ||
576 | lepp_num_free_comp_slots(const lepp_queue_t* q) | ||
577 | { | ||
578 | return _lepp_num_free_slots(q->comp_head, q->comp_tail); | ||
579 | } | ||
580 | |||
581 | static inline int | ||
582 | lepp_qsub(int v1, int v2) | ||
583 | { | ||
584 | int delta = v1 - v2; | ||
585 | return delta + ((delta >> 31) & LEPP_COMP_QUEUE_SIZE); | ||
586 | } | ||
587 | |||
588 | |||
589 | /** FIXME: Check this from linux, via a new "pwrite()" call. */ | ||
590 | #define LIPP_VERSION 1 | ||
591 | |||
592 | |||
593 | /** We use exactly two bytes of alignment padding. */ | ||
594 | #define LIPP_PACKET_PADDING 2 | ||
595 | |||
596 | /** The minimum size of a "small" buffer (including the padding). */ | ||
597 | #define LIPP_SMALL_PACKET_SIZE 128 | ||
598 | |||
599 | /* | ||
600 | * NOTE: The following two values should total to less than around | ||
601 | * 13582, to keep the total size used for "lipp_state_t" below 64K. | ||
602 | */ | ||
603 | |||
604 | /** The maximum number of "small" buffers. | ||
605 | * This is enough for 53 network cpus with 128 credits. Note that | ||
606 | * if these are exhausted, we will fall back to using large buffers. | ||
607 | */ | ||
608 | #define LIPP_SMALL_BUFFERS 6785 | ||
609 | |||
610 | /** The maximum number of "large" buffers. | ||
611 | * This is enough for 53 network cpus with 128 credits. | ||
612 | */ | ||
613 | #define LIPP_LARGE_BUFFERS 6785 | ||
614 | |||
615 | #endif /* __DRV_XGBE_INTF_H__ */ | ||
diff --git a/arch/tile/include/hv/netio_errors.h b/arch/tile/include/hv/netio_errors.h new file mode 100644 index 000000000000..e1591bff61b5 --- /dev/null +++ b/arch/tile/include/hv/netio_errors.h | |||
@@ -0,0 +1,122 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | /** | ||
16 | * Error codes returned from NetIO routines. | ||
17 | */ | ||
18 | |||
19 | #ifndef __NETIO_ERRORS_H__ | ||
20 | #define __NETIO_ERRORS_H__ | ||
21 | |||
22 | /** | ||
23 | * @addtogroup error | ||
24 | * | ||
25 | * @brief The error codes returned by NetIO functions. | ||
26 | * | ||
27 | * NetIO functions return 0 (defined as ::NETIO_NO_ERROR) on success, and | ||
28 | * a negative value if an error occurs. | ||
29 | * | ||
30 | * In cases where a NetIO function failed due to a error reported by | ||
31 | * system libraries, the error code will be the negation of the | ||
32 | * system errno at the time of failure. The @ref netio_strerror() | ||
33 | * function will deliver error strings for both NetIO and system error | ||
34 | * codes. | ||
35 | * | ||
36 | * @{ | ||
37 | */ | ||
38 | |||
39 | /** The set of all NetIO errors. */ | ||
40 | typedef enum | ||
41 | { | ||
42 | /** Operation successfully completed. */ | ||
43 | NETIO_NO_ERROR = 0, | ||
44 | |||
45 | /** A packet was successfully retrieved from an input queue. */ | ||
46 | NETIO_PKT = 0, | ||
47 | |||
48 | /** Largest NetIO error number. */ | ||
49 | NETIO_ERR_MAX = -701, | ||
50 | |||
51 | /** The tile is not registered with the IPP. */ | ||
52 | NETIO_NOT_REGISTERED = -701, | ||
53 | |||
54 | /** No packet was available to retrieve from the input queue. */ | ||
55 | NETIO_NOPKT = -702, | ||
56 | |||
57 | /** The requested function is not implemented. */ | ||
58 | NETIO_NOT_IMPLEMENTED = -703, | ||
59 | |||
60 | /** On a registration operation, the target queue already has the maximum | ||
61 | * number of tiles registered for it, and no more may be added. On a | ||
62 | * packet send operation, the output queue is full and nothing more can | ||
63 | * be queued until some of the queued packets are actually transmitted. */ | ||
64 | NETIO_QUEUE_FULL = -704, | ||
65 | |||
66 | /** The calling process or thread is not bound to exactly one CPU. */ | ||
67 | NETIO_BAD_AFFINITY = -705, | ||
68 | |||
69 | /** Cannot allocate memory on requested controllers. */ | ||
70 | NETIO_CANNOT_HOME = -706, | ||
71 | |||
72 | /** On a registration operation, the IPP specified is not configured | ||
73 | * to support the options requested; for instance, the application | ||
74 | * wants a specific type of tagged headers which the configured IPP | ||
75 | * doesn't support. Or, the supplied configuration information is | ||
76 | * not self-consistent, or is out of range; for instance, specifying | ||
77 | * both NETIO_RECV and NETIO_NO_RECV, or asking for more than | ||
78 | * NETIO_MAX_SEND_BUFFERS to be preallocated. On a VLAN or bucket | ||
79 | * configure operation, the number of items, or the base item, was | ||
80 | * out of range. | ||
81 | */ | ||
82 | NETIO_BAD_CONFIG = -707, | ||
83 | |||
84 | /** Too many tiles have registered to transmit packets. */ | ||
85 | NETIO_TOOMANY_XMIT = -708, | ||
86 | |||
87 | /** Packet transmission was attempted on a queue which was registered | ||
88 | with transmit disabled. */ | ||
89 | NETIO_UNREG_XMIT = -709, | ||
90 | |||
91 | /** This tile is already registered with the IPP. */ | ||
92 | NETIO_ALREADY_REGISTERED = -710, | ||
93 | |||
94 | /** The Ethernet link is down. The application should try again later. */ | ||
95 | NETIO_LINK_DOWN = -711, | ||
96 | |||
97 | /** An invalid memory buffer has been specified. This may be an unmapped | ||
98 | * virtual address, or one which does not meet alignment requirements. | ||
99 | * For netio_input_register(), this error may be returned when multiple | ||
100 | * processes specify different memory regions to be used for NetIO | ||
101 | * buffers. That can happen if these processes specify explicit memory | ||
102 | * regions with the ::NETIO_FIXED_BUFFER_VA flag, or if tmc_cmem_init() | ||
103 | * has not been called by a common ancestor of the processes. | ||
104 | */ | ||
105 | NETIO_FAULT = -712, | ||
106 | |||
107 | /** Cannot combine user-managed shared memory and cache coherence. */ | ||
108 | NETIO_BAD_CACHE_CONFIG = -713, | ||
109 | |||
110 | /** Smallest NetIO error number. */ | ||
111 | NETIO_ERR_MIN = -713, | ||
112 | |||
113 | #ifndef __DOXYGEN__ | ||
114 | /** Used internally to mean that no response is needed; never returned to | ||
115 | * an application. */ | ||
116 | NETIO_NO_RESPONSE = 1 | ||
117 | #endif | ||
118 | } netio_error_t; | ||
119 | |||
120 | /** @} */ | ||
121 | |||
122 | #endif /* __NETIO_ERRORS_H__ */ | ||
diff --git a/arch/tile/include/hv/netio_intf.h b/arch/tile/include/hv/netio_intf.h new file mode 100644 index 000000000000..8d20972aba2c --- /dev/null +++ b/arch/tile/include/hv/netio_intf.h | |||
@@ -0,0 +1,2975 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | /** | ||
16 | * NetIO interface structures and macros. | ||
17 | */ | ||
18 | |||
19 | #ifndef __NETIO_INTF_H__ | ||
20 | #define __NETIO_INTF_H__ | ||
21 | |||
22 | #include <hv/netio_errors.h> | ||
23 | |||
24 | #ifdef __KERNEL__ | ||
25 | #include <linux/types.h> | ||
26 | #else | ||
27 | #include <stdint.h> | ||
28 | #endif | ||
29 | |||
30 | #if !defined(__HV__) && !defined(__BOGUX__) && !defined(__KERNEL__) | ||
31 | #include <assert.h> | ||
32 | #define netio_assert assert /**< Enable assertions from macros */ | ||
33 | #else | ||
34 | #define netio_assert(...) ((void)(0)) /**< Disable assertions from macros */ | ||
35 | #endif | ||
36 | |||
37 | /* | ||
38 | * If none of these symbols are defined, we're building libnetio in an | ||
39 | * environment where we have pthreads, so we'll enable locking. | ||
40 | */ | ||
41 | #if !defined(__HV__) && !defined(__BOGUX__) && !defined(__KERNEL__) && \ | ||
42 | !defined(__NEWLIB__) | ||
43 | #define _NETIO_PTHREAD /**< Include a mutex in netio_queue_t below */ | ||
44 | |||
45 | /* | ||
46 | * If NETIO_UNLOCKED is defined, we don't do use per-cpu locks on | ||
47 | * per-packet NetIO operations. We still do pthread locking on things | ||
48 | * like netio_input_register, though. This is used for building | ||
49 | * libnetio_unlocked. | ||
50 | */ | ||
51 | #ifndef NETIO_UNLOCKED | ||
52 | |||
53 | /* Avoid PLT overhead by using our own inlined per-cpu lock. */ | ||
54 | #include <sched.h> | ||
55 | typedef int _netio_percpu_mutex_t; | ||
56 | |||
57 | static __inline int | ||
58 | _netio_percpu_mutex_init(_netio_percpu_mutex_t* lock) | ||
59 | { | ||
60 | *lock = 0; | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | static __inline int | ||
65 | _netio_percpu_mutex_lock(_netio_percpu_mutex_t* lock) | ||
66 | { | ||
67 | while (__builtin_expect(__insn_tns(lock), 0)) | ||
68 | sched_yield(); | ||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | static __inline int | ||
73 | _netio_percpu_mutex_unlock(_netio_percpu_mutex_t* lock) | ||
74 | { | ||
75 | *lock = 0; | ||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | #else /* NETIO_UNLOCKED */ | ||
80 | |||
81 | /* Don't do any locking for per-packet NetIO operations. */ | ||
82 | typedef int _netio_percpu_mutex_t; | ||
83 | #define _netio_percpu_mutex_init(L) | ||
84 | #define _netio_percpu_mutex_lock(L) | ||
85 | #define _netio_percpu_mutex_unlock(L) | ||
86 | |||
87 | #endif /* NETIO_UNLOCKED */ | ||
88 | #endif /* !__HV__, !__BOGUX, !__KERNEL__, !__NEWLIB__ */ | ||
89 | |||
90 | /** How many tiles can register for a given queue. | ||
91 | * @ingroup setup */ | ||
92 | #define NETIO_MAX_TILES_PER_QUEUE 64 | ||
93 | |||
94 | |||
95 | /** Largest permissible queue identifier. | ||
96 | * @ingroup setup */ | ||
97 | #define NETIO_MAX_QUEUE_ID 255 | ||
98 | |||
99 | |||
100 | #ifndef __DOXYGEN__ | ||
101 | |||
102 | /* Metadata packet checksum/ethertype flags. */ | ||
103 | |||
104 | /** The L4 checksum has not been calculated. */ | ||
105 | #define _NETIO_PKT_NO_L4_CSUM_SHIFT 0 | ||
106 | #define _NETIO_PKT_NO_L4_CSUM_RMASK 1 | ||
107 | #define _NETIO_PKT_NO_L4_CSUM_MASK \ | ||
108 | (_NETIO_PKT_NO_L4_CSUM_RMASK << _NETIO_PKT_NO_L4_CSUM_SHIFT) | ||
109 | |||
110 | /** The L3 checksum has not been calculated. */ | ||
111 | #define _NETIO_PKT_NO_L3_CSUM_SHIFT 1 | ||
112 | #define _NETIO_PKT_NO_L3_CSUM_RMASK 1 | ||
113 | #define _NETIO_PKT_NO_L3_CSUM_MASK \ | ||
114 | (_NETIO_PKT_NO_L3_CSUM_RMASK << _NETIO_PKT_NO_L3_CSUM_SHIFT) | ||
115 | |||
116 | /** The L3 checksum is incorrect (or perhaps has not been calculated). */ | ||
117 | #define _NETIO_PKT_BAD_L3_CSUM_SHIFT 2 | ||
118 | #define _NETIO_PKT_BAD_L3_CSUM_RMASK 1 | ||
119 | #define _NETIO_PKT_BAD_L3_CSUM_MASK \ | ||
120 | (_NETIO_PKT_BAD_L3_CSUM_RMASK << _NETIO_PKT_BAD_L3_CSUM_SHIFT) | ||
121 | |||
122 | /** The Ethernet packet type is unrecognized. */ | ||
123 | #define _NETIO_PKT_TYPE_UNRECOGNIZED_SHIFT 3 | ||
124 | #define _NETIO_PKT_TYPE_UNRECOGNIZED_RMASK 1 | ||
125 | #define _NETIO_PKT_TYPE_UNRECOGNIZED_MASK \ | ||
126 | (_NETIO_PKT_TYPE_UNRECOGNIZED_RMASK << \ | ||
127 | _NETIO_PKT_TYPE_UNRECOGNIZED_SHIFT) | ||
128 | |||
129 | /* Metadata packet type flags. */ | ||
130 | |||
131 | /** Where the packet type bits are; this field is the index into | ||
132 | * _netio_pkt_info. */ | ||
133 | #define _NETIO_PKT_TYPE_SHIFT 4 | ||
134 | #define _NETIO_PKT_TYPE_RMASK 0x3F | ||
135 | |||
136 | /** How many VLAN tags the packet has, and, if we have two, which one we | ||
137 | * actually grouped on. A VLAN within a proprietary (Marvell or Broadcom) | ||
138 | * tag is counted here. */ | ||
139 | #define _NETIO_PKT_VLAN_SHIFT 4 | ||
140 | #define _NETIO_PKT_VLAN_RMASK 0x3 | ||
141 | #define _NETIO_PKT_VLAN_MASK \ | ||
142 | (_NETIO_PKT_VLAN_RMASK << _NETIO_PKT_VLAN_SHIFT) | ||
143 | #define _NETIO_PKT_VLAN_NONE 0 /* No VLAN tag. */ | ||
144 | #define _NETIO_PKT_VLAN_ONE 1 /* One VLAN tag. */ | ||
145 | #define _NETIO_PKT_VLAN_TWO_OUTER 2 /* Two VLAN tags, outer one used. */ | ||
146 | #define _NETIO_PKT_VLAN_TWO_INNER 3 /* Two VLAN tags, inner one used. */ | ||
147 | |||
148 | /** Which proprietary tags the packet has. */ | ||
149 | #define _NETIO_PKT_TAG_SHIFT 6 | ||
150 | #define _NETIO_PKT_TAG_RMASK 0x3 | ||
151 | #define _NETIO_PKT_TAG_MASK \ | ||
152 | (_NETIO_PKT_TAG_RMASK << _NETIO_PKT_TAG_SHIFT) | ||
153 | #define _NETIO_PKT_TAG_NONE 0 /* No proprietary tags. */ | ||
154 | #define _NETIO_PKT_TAG_MRVL 1 /* Marvell HyperG.Stack tags. */ | ||
155 | #define _NETIO_PKT_TAG_MRVL_EXT 2 /* HyperG.Stack extended tags. */ | ||
156 | #define _NETIO_PKT_TAG_BRCM 3 /* Broadcom HiGig tags. */ | ||
157 | |||
158 | /** Whether a packet has an LLC + SNAP header. */ | ||
159 | #define _NETIO_PKT_SNAP_SHIFT 8 | ||
160 | #define _NETIO_PKT_SNAP_RMASK 0x1 | ||
161 | #define _NETIO_PKT_SNAP_MASK \ | ||
162 | (_NETIO_PKT_SNAP_RMASK << _NETIO_PKT_SNAP_SHIFT) | ||
163 | |||
164 | /* NOTE: Bits 9 and 10 are unused. */ | ||
165 | |||
166 | /** Length of any custom data before the L2 header, in words. */ | ||
167 | #define _NETIO_PKT_CUSTOM_LEN_SHIFT 11 | ||
168 | #define _NETIO_PKT_CUSTOM_LEN_RMASK 0x1F | ||
169 | #define _NETIO_PKT_CUSTOM_LEN_MASK \ | ||
170 | (_NETIO_PKT_CUSTOM_LEN_RMASK << _NETIO_PKT_CUSTOM_LEN_SHIFT) | ||
171 | |||
172 | /** The L4 checksum is incorrect (or perhaps has not been calculated). */ | ||
173 | #define _NETIO_PKT_BAD_L4_CSUM_SHIFT 16 | ||
174 | #define _NETIO_PKT_BAD_L4_CSUM_RMASK 0x1 | ||
175 | #define _NETIO_PKT_BAD_L4_CSUM_MASK \ | ||
176 | (_NETIO_PKT_BAD_L4_CSUM_RMASK << _NETIO_PKT_BAD_L4_CSUM_SHIFT) | ||
177 | |||
178 | /** Length of the L2 header, in words. */ | ||
179 | #define _NETIO_PKT_L2_LEN_SHIFT 17 | ||
180 | #define _NETIO_PKT_L2_LEN_RMASK 0x1F | ||
181 | #define _NETIO_PKT_L2_LEN_MASK \ | ||
182 | (_NETIO_PKT_L2_LEN_RMASK << _NETIO_PKT_L2_LEN_SHIFT) | ||
183 | |||
184 | |||
185 | /* Flags in minimal packet metadata. */ | ||
186 | |||
187 | /** We need an eDMA checksum on this packet. */ | ||
188 | #define _NETIO_PKT_NEED_EDMA_CSUM_SHIFT 0 | ||
189 | #define _NETIO_PKT_NEED_EDMA_CSUM_RMASK 1 | ||
190 | #define _NETIO_PKT_NEED_EDMA_CSUM_MASK \ | ||
191 | (_NETIO_PKT_NEED_EDMA_CSUM_RMASK << _NETIO_PKT_NEED_EDMA_CSUM_SHIFT) | ||
192 | |||
193 | /* Data within the packet information table. */ | ||
194 | |||
195 | /* Note that, for efficiency, code which uses these fields assumes that none | ||
196 | * of the shift values below are zero. See uses below for an explanation. */ | ||
197 | |||
198 | /** Offset within the L2 header of the innermost ethertype (in halfwords). */ | ||
199 | #define _NETIO_PKT_INFO_ETYPE_SHIFT 6 | ||
200 | #define _NETIO_PKT_INFO_ETYPE_RMASK 0x1F | ||
201 | |||
202 | /** Offset within the L2 header of the VLAN tag (in halfwords). */ | ||
203 | #define _NETIO_PKT_INFO_VLAN_SHIFT 11 | ||
204 | #define _NETIO_PKT_INFO_VLAN_RMASK 0x1F | ||
205 | |||
206 | #endif | ||
207 | |||
208 | |||
209 | /** The size of a memory buffer representing a small packet. | ||
210 | * @ingroup egress */ | ||
211 | #define SMALL_PACKET_SIZE 256 | ||
212 | |||
213 | /** The size of a memory buffer representing a large packet. | ||
214 | * @ingroup egress */ | ||
215 | #define LARGE_PACKET_SIZE 2048 | ||
216 | |||
217 | /** The size of a memory buffer representing a jumbo packet. | ||
218 | * @ingroup egress */ | ||
219 | #define JUMBO_PACKET_SIZE (12 * 1024) | ||
220 | |||
221 | |||
222 | /* Common ethertypes. | ||
223 | * @ingroup ingress */ | ||
224 | /** @{ */ | ||
225 | /** The ethertype of IPv4. */ | ||
226 | #define ETHERTYPE_IPv4 (0x0800) | ||
227 | /** The ethertype of ARP. */ | ||
228 | #define ETHERTYPE_ARP (0x0806) | ||
229 | /** The ethertype of VLANs. */ | ||
230 | #define ETHERTYPE_VLAN (0x8100) | ||
231 | /** The ethertype of a Q-in-Q header. */ | ||
232 | #define ETHERTYPE_Q_IN_Q (0x9100) | ||
233 | /** The ethertype of IPv6. */ | ||
234 | #define ETHERTYPE_IPv6 (0x86DD) | ||
235 | /** The ethertype of MPLS. */ | ||
236 | #define ETHERTYPE_MPLS (0x8847) | ||
237 | /** @} */ | ||
238 | |||
239 | |||
240 | /** The possible return values of NETIO_PKT_STATUS. | ||
241 | * @ingroup ingress | ||
242 | */ | ||
243 | typedef enum | ||
244 | { | ||
245 | /** No problems were detected with this packet. */ | ||
246 | NETIO_PKT_STATUS_OK, | ||
247 | /** The packet is undersized; this is expected behavior if the packet's | ||
248 | * ethertype is unrecognized, but otherwise the packet is likely corrupt. */ | ||
249 | NETIO_PKT_STATUS_UNDERSIZE, | ||
250 | /** The packet is oversized and some trailing bytes have been discarded. | ||
251 | This is expected behavior for short packets, since it's impossible to | ||
252 | precisely determine the amount of padding which may have been added to | ||
253 | them to make them meet the minimum Ethernet packet size. */ | ||
254 | NETIO_PKT_STATUS_OVERSIZE, | ||
255 | /** The packet was judged to be corrupt by hardware (for instance, it had | ||
256 | a bad CRC, or part of it was discarded due to lack of buffer space in | ||
257 | the I/O shim) and should be discarded. */ | ||
258 | NETIO_PKT_STATUS_BAD | ||
259 | } netio_pkt_status_t; | ||
260 | |||
261 | |||
262 | /** Log2 of how many buckets we have. */ | ||
263 | #define NETIO_LOG2_NUM_BUCKETS (10) | ||
264 | |||
265 | /** How many buckets we have. | ||
266 | * @ingroup ingress */ | ||
267 | #define NETIO_NUM_BUCKETS (1 << NETIO_LOG2_NUM_BUCKETS) | ||
268 | |||
269 | |||
270 | /** | ||
271 | * @brief A group-to-bucket identifier. | ||
272 | * | ||
273 | * @ingroup setup | ||
274 | * | ||
275 | * This tells us what to do with a given group. | ||
276 | */ | ||
277 | typedef union { | ||
278 | /** The header broken down into bits. */ | ||
279 | struct { | ||
280 | /** Whether we should balance on L4, if available */ | ||
281 | unsigned int __balance_on_l4:1; | ||
282 | /** Whether we should balance on L3, if available */ | ||
283 | unsigned int __balance_on_l3:1; | ||
284 | /** Whether we should balance on L2, if available */ | ||
285 | unsigned int __balance_on_l2:1; | ||
286 | /** Reserved for future use */ | ||
287 | unsigned int __reserved:1; | ||
288 | /** The base bucket to use to send traffic */ | ||
289 | unsigned int __bucket_base:NETIO_LOG2_NUM_BUCKETS; | ||
290 | /** The mask to apply to the balancing value. This must be one less | ||
291 | * than a power of two, e.g. 0x3 or 0xFF. | ||
292 | */ | ||
293 | unsigned int __bucket_mask:NETIO_LOG2_NUM_BUCKETS; | ||
294 | /** Pad to 32 bits */ | ||
295 | unsigned int __padding:(32 - 4 - 2 * NETIO_LOG2_NUM_BUCKETS); | ||
296 | } bits; | ||
297 | /** To send out the IDN. */ | ||
298 | unsigned int word; | ||
299 | } | ||
300 | netio_group_t; | ||
301 | |||
302 | |||
303 | /** | ||
304 | * @brief A VLAN-to-bucket identifier. | ||
305 | * | ||
306 | * @ingroup setup | ||
307 | * | ||
308 | * This tells us what to do with a given VLAN. | ||
309 | */ | ||
310 | typedef netio_group_t netio_vlan_t; | ||
311 | |||
312 | |||
313 | /** | ||
314 | * A bucket-to-queue mapping. | ||
315 | * @ingroup setup | ||
316 | */ | ||
317 | typedef unsigned char netio_bucket_t; | ||
318 | |||
319 | |||
320 | /** | ||
321 | * A packet size can always fit in a netio_size_t. | ||
322 | * @ingroup setup | ||
323 | */ | ||
324 | typedef unsigned int netio_size_t; | ||
325 | |||
326 | |||
327 | /** | ||
328 | * @brief Ethernet standard (ingress) packet metadata. | ||
329 | * | ||
330 | * @ingroup ingress | ||
331 | * | ||
332 | * This is additional data associated with each packet. | ||
333 | * This structure is opaque and accessed through the @ref ingress. | ||
334 | * | ||
335 | * Also, the buffer population operation currently assumes that standard | ||
336 | * metadata is at least as large as minimal metadata, and will need to be | ||
337 | * modified if that is no longer the case. | ||
338 | */ | ||
339 | typedef struct | ||
340 | { | ||
341 | #ifdef __DOXYGEN__ | ||
342 | /** This structure is opaque. */ | ||
343 | unsigned char opaque[24]; | ||
344 | #else | ||
345 | /** The overall ordinal of the packet */ | ||
346 | unsigned int __packet_ordinal; | ||
347 | /** The ordinal of the packet within the group */ | ||
348 | unsigned int __group_ordinal; | ||
349 | /** The best flow hash IPP could compute. */ | ||
350 | unsigned int __flow_hash; | ||
351 | /** Flags pertaining to checksum calculation, packet type, etc. */ | ||
352 | unsigned int __flags; | ||
353 | /** The first word of "user data". */ | ||
354 | unsigned int __user_data_0; | ||
355 | /** The second word of "user data". */ | ||
356 | unsigned int __user_data_1; | ||
357 | #endif | ||
358 | } | ||
359 | netio_pkt_metadata_t; | ||
360 | |||
361 | |||
362 | /** To ensure that the L3 header is aligned mod 4, the L2 header should be | ||
363 | * aligned mod 4 plus 2, since every supported L2 header is 4n + 2 bytes | ||
364 | * long. The standard way to do this is to simply add 2 bytes of padding | ||
365 | * before the L2 header. | ||
366 | */ | ||
367 | #define NETIO_PACKET_PADDING 2 | ||
368 | |||
369 | |||
370 | |||
371 | /** | ||
372 | * @brief Ethernet minimal (egress) packet metadata. | ||
373 | * | ||
374 | * @ingroup egress | ||
375 | * | ||
376 | * This structure represents information about packets which have | ||
377 | * been processed by @ref netio_populate_buffer() or | ||
378 | * @ref netio_populate_prepend_buffer(). This structure is opaque | ||
379 | * and accessed through the @ref egress. | ||
380 | * | ||
381 | * @internal This structure is actually copied into the memory used by | ||
382 | * standard metadata, which is assumed to be large enough. | ||
383 | */ | ||
384 | typedef struct | ||
385 | { | ||
386 | #ifdef __DOXYGEN__ | ||
387 | /** This structure is opaque. */ | ||
388 | unsigned char opaque[14]; | ||
389 | #else | ||
390 | /** The offset of the L2 header from the start of the packet data. */ | ||
391 | unsigned short l2_offset; | ||
392 | /** The offset of the L3 header from the start of the packet data. */ | ||
393 | unsigned short l3_offset; | ||
394 | /** Where to write the checksum. */ | ||
395 | unsigned char csum_location; | ||
396 | /** Where to start checksumming from. */ | ||
397 | unsigned char csum_start; | ||
398 | /** Flags pertaining to checksum calculation etc. */ | ||
399 | unsigned short flags; | ||
400 | /** The L2 length of the packet. */ | ||
401 | unsigned short l2_length; | ||
402 | /** The checksum with which to seed the checksum generator. */ | ||
403 | unsigned short csum_seed; | ||
404 | /** How much to checksum. */ | ||
405 | unsigned short csum_length; | ||
406 | #endif | ||
407 | } | ||
408 | netio_pkt_minimal_metadata_t; | ||
409 | |||
410 | |||
411 | #ifndef __DOXYGEN__ | ||
412 | |||
413 | /** | ||
414 | * @brief An I/O notification header. | ||
415 | * | ||
416 | * This is the first word of data received from an I/O shim in a notification | ||
417 | * packet. It contains framing and status information. | ||
418 | */ | ||
419 | typedef union | ||
420 | { | ||
421 | unsigned int word; /**< The whole word. */ | ||
422 | /** The various fields. */ | ||
423 | struct | ||
424 | { | ||
425 | unsigned int __channel:7; /**< Resource channel. */ | ||
426 | unsigned int __type:4; /**< Type. */ | ||
427 | unsigned int __ack:1; /**< Whether an acknowledgement is needed. */ | ||
428 | unsigned int __reserved:1; /**< Reserved. */ | ||
429 | unsigned int __protocol:1; /**< A protocol-specific word is added. */ | ||
430 | unsigned int __status:2; /**< Status of the transfer. */ | ||
431 | unsigned int __framing:2; /**< Framing of the transfer. */ | ||
432 | unsigned int __transfer_size:14; /**< Transfer size in bytes (total). */ | ||
433 | } bits; | ||
434 | } | ||
435 | __netio_pkt_notif_t; | ||
436 | |||
437 | |||
438 | /** | ||
439 | * Returns the base address of the packet. | ||
440 | */ | ||
441 | #define _NETIO_PKT_HANDLE_BASE(p) \ | ||
442 | ((unsigned char*)((p).word & 0xFFFFFFC0)) | ||
443 | |||
444 | /** | ||
445 | * Returns the base address of the packet. | ||
446 | */ | ||
447 | #define _NETIO_PKT_BASE(p) \ | ||
448 | _NETIO_PKT_HANDLE_BASE(p->__packet) | ||
449 | |||
450 | /** | ||
451 | * @brief An I/O notification packet (second word) | ||
452 | * | ||
453 | * This is the second word of data received from an I/O shim in a notification | ||
454 | * packet. This is the virtual address of the packet buffer, plus some flag | ||
455 | * bits. (The virtual address of the packet is always 256-byte aligned so we | ||
456 | * have room for 8 bits' worth of flags in the low 8 bits.) | ||
457 | * | ||
458 | * @internal | ||
459 | * NOTE: The low two bits must contain "__queue", so the "packet size" | ||
460 | * (SIZE_SMALL, SIZE_LARGE, or SIZE_JUMBO) can be determined quickly. | ||
461 | * | ||
462 | * If __addr or __offset are moved, _NETIO_PKT_BASE | ||
463 | * (defined right below this) must be changed. | ||
464 | */ | ||
465 | typedef union | ||
466 | { | ||
467 | unsigned int word; /**< The whole word. */ | ||
468 | /** The various fields. */ | ||
469 | struct | ||
470 | { | ||
471 | /** Which queue the packet will be returned to once it is sent back to | ||
472 | the IPP. This is one of the SIZE_xxx values. */ | ||
473 | unsigned int __queue:2; | ||
474 | |||
475 | /** The IPP handle of the sending IPP. */ | ||
476 | unsigned int __ipp_handle:2; | ||
477 | |||
478 | /** Reserved for future use. */ | ||
479 | unsigned int __reserved:1; | ||
480 | |||
481 | /** If 1, this packet has minimal (egress) metadata; otherwise, it | ||
482 | has standard (ingress) metadata. */ | ||
483 | unsigned int __minimal:1; | ||
484 | |||
485 | /** Offset of the metadata within the packet. This value is multiplied | ||
486 | * by 64 and added to the base packet address to get the metadata | ||
487 | * address. Note that this field is aligned within the word such that | ||
488 | * you can easily extract the metadata address with a 26-bit mask. */ | ||
489 | unsigned int __offset:2; | ||
490 | |||
491 | /** The top 24 bits of the packet's virtual address. */ | ||
492 | unsigned int __addr:24; | ||
493 | } bits; | ||
494 | } | ||
495 | __netio_pkt_handle_t; | ||
496 | |||
497 | #endif /* !__DOXYGEN__ */ | ||
498 | |||
499 | |||
500 | /** | ||
501 | * @brief A handle for an I/O packet's storage. | ||
502 | * @ingroup ingress | ||
503 | * | ||
504 | * netio_pkt_handle_t encodes the concept of a ::netio_pkt_t with its | ||
505 | * packet metadata removed. It is a much smaller type that exists to | ||
506 | * facilitate applications where the full ::netio_pkt_t type is too | ||
507 | * large, such as those that cache enormous numbers of packets or wish | ||
508 | * to transmit packet descriptors over the UDN. | ||
509 | * | ||
510 | * Because there is no metadata, most ::netio_pkt_t operations cannot be | ||
511 | * performed on a netio_pkt_handle_t. It supports only | ||
512 | * netio_free_handle() (to free the buffer) and | ||
513 | * NETIO_PKT_CUSTOM_DATA_H() (to access a pointer to its contents). | ||
514 | * The application must acquire any additional metadata it wants from the | ||
515 | * original ::netio_pkt_t and record it separately. | ||
516 | * | ||
517 | * A netio_pkt_handle_t can be extracted from a ::netio_pkt_t by calling | ||
518 | * NETIO_PKT_HANDLE(). An invalid handle (analogous to NULL) can be | ||
519 | * created by assigning the value ::NETIO_PKT_HANDLE_NONE. A handle can | ||
520 | * be tested for validity with NETIO_PKT_HANDLE_IS_VALID(). | ||
521 | */ | ||
522 | typedef struct | ||
523 | { | ||
524 | unsigned int word; /**< Opaque bits. */ | ||
525 | } netio_pkt_handle_t; | ||
526 | |||
527 | /** | ||
528 | * @brief A packet descriptor. | ||
529 | * | ||
530 | * @ingroup ingress | ||
531 | * @ingroup egress | ||
532 | * | ||
533 | * This data structure represents a packet. The structure is manipulated | ||
534 | * through the @ref ingress and the @ref egress. | ||
535 | * | ||
536 | * While the contents of a netio_pkt_t are opaque, the structure itself is | ||
537 | * portable. This means that it may be shared between all tiles which have | ||
538 | * done a netio_input_register() call for the interface on which the pkt_t | ||
539 | * was initially received (via netio_get_packet()) or retrieved (via | ||
540 | * netio_get_buffer()). The contents of a netio_pkt_t can be transmitted to | ||
541 | * another tile via shared memory, or via a UDN message, or by other means. | ||
542 | * The destination tile may then use the pkt_t as if it had originally been | ||
543 | * received locally; it may read or write the packet's data, read its | ||
544 | * metadata, free the packet, send the packet, transfer the netio_pkt_t to | ||
545 | * yet another tile, and so forth. | ||
546 | * | ||
547 | * Once a netio_pkt_t has been transferred to a second tile, the first tile | ||
548 | * should not reference the original copy; in particular, if more than one | ||
549 | * tile frees or sends the same netio_pkt_t, the IPP's packet free lists will | ||
550 | * become corrupted. Note also that each tile which reads or modifies | ||
551 | * packet data must obey the memory coherency rules outlined in @ref input. | ||
552 | */ | ||
553 | typedef struct | ||
554 | { | ||
555 | #ifdef __DOXYGEN__ | ||
556 | /** This structure is opaque. */ | ||
557 | unsigned char opaque[32]; | ||
558 | #else | ||
559 | /** For an ingress packet (one with standard metadata), this is the | ||
560 | * notification header we got from the I/O shim. For an egress packet | ||
561 | * (one with minimal metadata), this word is zero if the packet has not | ||
562 | * been populated, and nonzero if it has. */ | ||
563 | __netio_pkt_notif_t __notif_header; | ||
564 | |||
565 | /** Virtual address of the packet buffer, plus state flags. */ | ||
566 | __netio_pkt_handle_t __packet; | ||
567 | |||
568 | /** Metadata associated with the packet. */ | ||
569 | netio_pkt_metadata_t __metadata; | ||
570 | #endif | ||
571 | } | ||
572 | netio_pkt_t; | ||
573 | |||
574 | |||
575 | #ifndef __DOXYGEN__ | ||
576 | |||
577 | #define __NETIO_PKT_NOTIF_HEADER(pkt) ((pkt)->__notif_header) | ||
578 | #define __NETIO_PKT_IPP_HANDLE(pkt) ((pkt)->__packet.bits.__ipp_handle) | ||
579 | #define __NETIO_PKT_QUEUE(pkt) ((pkt)->__packet.bits.__queue) | ||
580 | #define __NETIO_PKT_NOTIF_HEADER_M(mda, pkt) ((pkt)->__notif_header) | ||
581 | #define __NETIO_PKT_IPP_HANDLE_M(mda, pkt) ((pkt)->__packet.bits.__ipp_handle) | ||
582 | #define __NETIO_PKT_MINIMAL(pkt) ((pkt)->__packet.bits.__minimal) | ||
583 | #define __NETIO_PKT_QUEUE_M(mda, pkt) ((pkt)->__packet.bits.__queue) | ||
584 | #define __NETIO_PKT_FLAGS_M(mda, pkt) ((mda)->__flags) | ||
585 | |||
586 | /* Packet information table, used by the attribute access functions below. */ | ||
587 | extern const uint16_t _netio_pkt_info[]; | ||
588 | |||
589 | #endif /* __DOXYGEN__ */ | ||
590 | |||
591 | |||
592 | #ifndef __DOXYGEN__ | ||
593 | /* These macros are deprecated and will disappear in a future MDE release. */ | ||
594 | #define NETIO_PKT_GOOD_CHECKSUM(pkt) \ | ||
595 | NETIO_PKT_L4_CSUM_CORRECT(pkt) | ||
596 | #define NETIO_PKT_GOOD_CHECKSUM_M(mda, pkt) \ | ||
597 | NETIO_PKT_L4_CSUM_CORRECT_M(mda, pkt) | ||
598 | #endif /* __DOXYGEN__ */ | ||
599 | |||
600 | |||
601 | /* Packet attribute access functions. */ | ||
602 | |||
603 | /** Return a pointer to the metadata for a packet. | ||
604 | * @ingroup ingress | ||
605 | * | ||
606 | * Calling this function once and passing the result to other retrieval | ||
607 | * functions with a "_M" suffix usually improves performance. This | ||
608 | * function must be called on an 'ingress' packet (i.e. one retrieved | ||
609 | * by @ref netio_get_packet(), on which @ref netio_populate_buffer() or | ||
610 | * @ref netio_populate_prepend_buffer have not been called). Use of this | ||
611 | * function on an 'egress' packet will cause an assertion failure. | ||
612 | * | ||
613 | * @param[in] pkt Packet on which to operate. | ||
614 | * @return A pointer to the packet's standard metadata. | ||
615 | */ | ||
616 | static __inline netio_pkt_metadata_t* | ||
617 | NETIO_PKT_METADATA(netio_pkt_t* pkt) | ||
618 | { | ||
619 | netio_assert(!pkt->__packet.bits.__minimal); | ||
620 | return &pkt->__metadata; | ||
621 | } | ||
622 | |||
623 | |||
624 | /** Return a pointer to the minimal metadata for a packet. | ||
625 | * @ingroup egress | ||
626 | * | ||
627 | * Calling this function once and passing the result to other retrieval | ||
628 | * functions with a "_MM" suffix usually improves performance. This | ||
629 | * function must be called on an 'egress' packet (i.e. one on which | ||
630 | * @ref netio_populate_buffer() or @ref netio_populate_prepend_buffer() | ||
631 | * have been called, or one retrieved by @ref netio_get_buffer()). Use of | ||
632 | * this function on an 'ingress' packet will cause an assertion failure. | ||
633 | * | ||
634 | * @param[in] pkt Packet on which to operate. | ||
635 | * @return A pointer to the packet's standard metadata. | ||
636 | */ | ||
637 | static __inline netio_pkt_minimal_metadata_t* | ||
638 | NETIO_PKT_MINIMAL_METADATA(netio_pkt_t* pkt) | ||
639 | { | ||
640 | netio_assert(pkt->__packet.bits.__minimal); | ||
641 | return (netio_pkt_minimal_metadata_t*) &pkt->__metadata; | ||
642 | } | ||
643 | |||
644 | |||
645 | /** Determine whether a packet has 'minimal' metadata. | ||
646 | * @ingroup pktfuncs | ||
647 | * | ||
648 | * This function will return nonzero if the packet is an 'egress' | ||
649 | * packet (i.e. one on which @ref netio_populate_buffer() or | ||
650 | * @ref netio_populate_prepend_buffer() have been called, or one | ||
651 | * retrieved by @ref netio_get_buffer()), and zero if the packet | ||
652 | * is an 'ingress' packet (i.e. one retrieved by @ref netio_get_packet(), | ||
653 | * which has not been converted into an 'egress' packet). | ||
654 | * | ||
655 | * @param[in] pkt Packet on which to operate. | ||
656 | * @return Nonzero if the packet has minimal metadata. | ||
657 | */ | ||
658 | static __inline unsigned int | ||
659 | NETIO_PKT_IS_MINIMAL(netio_pkt_t* pkt) | ||
660 | { | ||
661 | return pkt->__packet.bits.__minimal; | ||
662 | } | ||
663 | |||
664 | |||
665 | /** Return a handle for a packet's storage. | ||
666 | * @ingroup pktfuncs | ||
667 | * | ||
668 | * @param[in] pkt Packet on which to operate. | ||
669 | * @return A handle for the packet's storage. | ||
670 | */ | ||
671 | static __inline netio_pkt_handle_t | ||
672 | NETIO_PKT_HANDLE(netio_pkt_t* pkt) | ||
673 | { | ||
674 | netio_pkt_handle_t h; | ||
675 | h.word = pkt->__packet.word; | ||
676 | return h; | ||
677 | } | ||
678 | |||
679 | |||
680 | /** A special reserved value indicating the absence of a packet handle. | ||
681 | * | ||
682 | * @ingroup pktfuncs | ||
683 | */ | ||
684 | #define NETIO_PKT_HANDLE_NONE ((netio_pkt_handle_t) { 0 }) | ||
685 | |||
686 | |||
687 | /** Test whether a packet handle is valid. | ||
688 | * | ||
689 | * Applications may wish to use the reserved value NETIO_PKT_HANDLE_NONE | ||
690 | * to indicate no packet at all. This function tests to see if a packet | ||
691 | * handle is a real handle, not this special reserved value. | ||
692 | * | ||
693 | * @ingroup pktfuncs | ||
694 | * | ||
695 | * @param[in] handle Handle on which to operate. | ||
696 | * @return One if the packet handle is valid, else zero. | ||
697 | */ | ||
698 | static __inline unsigned int | ||
699 | NETIO_PKT_HANDLE_IS_VALID(netio_pkt_handle_t handle) | ||
700 | { | ||
701 | return handle.word != 0; | ||
702 | } | ||
703 | |||
704 | |||
705 | |||
706 | /** Return a pointer to the start of the packet's custom header. | ||
707 | * A custom header may or may not be present, depending upon the IPP; its | ||
708 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
709 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
710 | * the custom header precedes the L2 header in the packet buffer. | ||
711 | * @ingroup ingress | ||
712 | * | ||
713 | * @param[in] handle Handle on which to operate. | ||
714 | * @return A pointer to start of the packet. | ||
715 | */ | ||
716 | static __inline unsigned char* | ||
717 | NETIO_PKT_CUSTOM_DATA_H(netio_pkt_handle_t handle) | ||
718 | { | ||
719 | return _NETIO_PKT_HANDLE_BASE(handle) + NETIO_PACKET_PADDING; | ||
720 | } | ||
721 | |||
722 | |||
723 | /** Return the length of the packet's custom header. | ||
724 | * A custom header may or may not be present, depending upon the IPP; its | ||
725 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
726 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
727 | * the custom header precedes the L2 header in the packet buffer. | ||
728 | * | ||
729 | * @ingroup ingress | ||
730 | * | ||
731 | * @param[in] mda Pointer to packet's standard metadata. | ||
732 | * @param[in] pkt Packet on which to operate. | ||
733 | * @return The length of the packet's custom header, in bytes. | ||
734 | */ | ||
735 | static __inline netio_size_t | ||
736 | NETIO_PKT_CUSTOM_HEADER_LENGTH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
737 | { | ||
738 | /* | ||
739 | * Note that we effectively need to extract a quantity from the flags word | ||
740 | * which is measured in words, and then turn it into bytes by shifting | ||
741 | * it left by 2. We do this all at once by just shifting right two less | ||
742 | * bits, and shifting the mask up two bits. | ||
743 | */ | ||
744 | return ((mda->__flags >> (_NETIO_PKT_CUSTOM_LEN_SHIFT - 2)) & | ||
745 | (_NETIO_PKT_CUSTOM_LEN_RMASK << 2)); | ||
746 | } | ||
747 | |||
748 | |||
749 | /** Return the length of the packet, starting with the custom header. | ||
750 | * A custom header may or may not be present, depending upon the IPP; its | ||
751 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
752 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
753 | * the custom header precedes the L2 header in the packet buffer. | ||
754 | * @ingroup ingress | ||
755 | * | ||
756 | * @param[in] mda Pointer to packet's standard metadata. | ||
757 | * @param[in] pkt Packet on which to operate. | ||
758 | * @return The length of the packet, in bytes. | ||
759 | */ | ||
760 | static __inline netio_size_t | ||
761 | NETIO_PKT_CUSTOM_LENGTH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
762 | { | ||
763 | return (__NETIO_PKT_NOTIF_HEADER(pkt).bits.__transfer_size - | ||
764 | NETIO_PACKET_PADDING); | ||
765 | } | ||
766 | |||
767 | |||
768 | /** Return a pointer to the start of the packet's custom header. | ||
769 | * A custom header may or may not be present, depending upon the IPP; its | ||
770 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
771 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
772 | * the custom header precedes the L2 header in the packet buffer. | ||
773 | * @ingroup ingress | ||
774 | * | ||
775 | * @param[in] mda Pointer to packet's standard metadata. | ||
776 | * @param[in] pkt Packet on which to operate. | ||
777 | * @return A pointer to start of the packet. | ||
778 | */ | ||
779 | static __inline unsigned char* | ||
780 | NETIO_PKT_CUSTOM_DATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
781 | { | ||
782 | return NETIO_PKT_CUSTOM_DATA_H(NETIO_PKT_HANDLE(pkt)); | ||
783 | } | ||
784 | |||
785 | |||
786 | /** Return the length of the packet's L2 (Ethernet plus VLAN or SNAP) header. | ||
787 | * @ingroup ingress | ||
788 | * | ||
789 | * @param[in] mda Pointer to packet's standard metadata. | ||
790 | * @param[in] pkt Packet on which to operate. | ||
791 | * @return The length of the packet's L2 header, in bytes. | ||
792 | */ | ||
793 | static __inline netio_size_t | ||
794 | NETIO_PKT_L2_HEADER_LENGTH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
795 | { | ||
796 | /* | ||
797 | * Note that we effectively need to extract a quantity from the flags word | ||
798 | * which is measured in words, and then turn it into bytes by shifting | ||
799 | * it left by 2. We do this all at once by just shifting right two less | ||
800 | * bits, and shifting the mask up two bits. We then add two bytes. | ||
801 | */ | ||
802 | return ((mda->__flags >> (_NETIO_PKT_L2_LEN_SHIFT - 2)) & | ||
803 | (_NETIO_PKT_L2_LEN_RMASK << 2)) + 2; | ||
804 | } | ||
805 | |||
806 | |||
807 | /** Return the length of the packet, starting with the L2 (Ethernet) header. | ||
808 | * @ingroup ingress | ||
809 | * | ||
810 | * @param[in] mda Pointer to packet's standard metadata. | ||
811 | * @param[in] pkt Packet on which to operate. | ||
812 | * @return The length of the packet, in bytes. | ||
813 | */ | ||
814 | static __inline netio_size_t | ||
815 | NETIO_PKT_L2_LENGTH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
816 | { | ||
817 | return (NETIO_PKT_CUSTOM_LENGTH_M(mda, pkt) - | ||
818 | NETIO_PKT_CUSTOM_HEADER_LENGTH_M(mda,pkt)); | ||
819 | } | ||
820 | |||
821 | |||
822 | /** Return a pointer to the start of the packet's L2 (Ethernet) header. | ||
823 | * @ingroup ingress | ||
824 | * | ||
825 | * @param[in] mda Pointer to packet's standard metadata. | ||
826 | * @param[in] pkt Packet on which to operate. | ||
827 | * @return A pointer to start of the packet. | ||
828 | */ | ||
829 | static __inline unsigned char* | ||
830 | NETIO_PKT_L2_DATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
831 | { | ||
832 | return (NETIO_PKT_CUSTOM_DATA_M(mda, pkt) + | ||
833 | NETIO_PKT_CUSTOM_HEADER_LENGTH_M(mda, pkt)); | ||
834 | } | ||
835 | |||
836 | |||
837 | /** Retrieve the length of the packet, starting with the L3 (generally, | ||
838 | * the IP) header. | ||
839 | * @ingroup ingress | ||
840 | * | ||
841 | * @param[in] mda Pointer to packet's standard metadata. | ||
842 | * @param[in] pkt Packet on which to operate. | ||
843 | * @return Length of the packet's L3 header and data, in bytes. | ||
844 | */ | ||
845 | static __inline netio_size_t | ||
846 | NETIO_PKT_L3_LENGTH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
847 | { | ||
848 | return (NETIO_PKT_L2_LENGTH_M(mda, pkt) - | ||
849 | NETIO_PKT_L2_HEADER_LENGTH_M(mda,pkt)); | ||
850 | } | ||
851 | |||
852 | |||
853 | /** Return a pointer to the packet's L3 (generally, the IP) header. | ||
854 | * @ingroup ingress | ||
855 | * | ||
856 | * Note that we guarantee word alignment of the L3 header. | ||
857 | * | ||
858 | * @param[in] mda Pointer to packet's standard metadata. | ||
859 | * @param[in] pkt Packet on which to operate. | ||
860 | * @return A pointer to the packet's L3 header. | ||
861 | */ | ||
862 | static __inline unsigned char* | ||
863 | NETIO_PKT_L3_DATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
864 | { | ||
865 | return (NETIO_PKT_L2_DATA_M(mda, pkt) + | ||
866 | NETIO_PKT_L2_HEADER_LENGTH_M(mda, pkt)); | ||
867 | } | ||
868 | |||
869 | |||
870 | /** Return the ordinal of the packet. | ||
871 | * @ingroup ingress | ||
872 | * | ||
873 | * Each packet is given an ordinal number when it is delivered by the IPP. | ||
874 | * In the medium term, the ordinal is unique and monotonically increasing, | ||
875 | * being incremented by 1 for each packet; the ordinal of the first packet | ||
876 | * delivered after the IPP starts is zero. (Since the ordinal is of finite | ||
877 | * size, given enough input packets, it will eventually wrap around to zero; | ||
878 | * in the long term, therefore, ordinals are not unique.) The ordinals | ||
879 | * handed out by different IPPs are not disjoint, so two packets from | ||
880 | * different IPPs may have identical ordinals. Packets dropped by the | ||
881 | * IPP or by the I/O shim are not assigned ordinals. | ||
882 | * | ||
883 | * @param[in] mda Pointer to packet's standard metadata. | ||
884 | * @param[in] pkt Packet on which to operate. | ||
885 | * @return The packet's per-IPP packet ordinal. | ||
886 | */ | ||
887 | static __inline unsigned int | ||
888 | NETIO_PKT_ORDINAL_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
889 | { | ||
890 | return mda->__packet_ordinal; | ||
891 | } | ||
892 | |||
893 | |||
894 | /** Return the per-group ordinal of the packet. | ||
895 | * @ingroup ingress | ||
896 | * | ||
897 | * Each packet is given a per-group ordinal number when it is | ||
898 | * delivered by the IPP. By default, the group is the packet's VLAN, | ||
899 | * although IPP can be recompiled to use different values. In | ||
900 | * the medium term, the ordinal is unique and monotonically | ||
901 | * increasing, being incremented by 1 for each packet; the ordinal of | ||
902 | * the first packet distributed to a particular group is zero. | ||
903 | * (Since the ordinal is of finite size, given enough input packets, | ||
904 | * it will eventually wrap around to zero; in the long term, | ||
905 | * therefore, ordinals are not unique.) The ordinals handed out by | ||
906 | * different IPPs are not disjoint, so two packets from different IPPs | ||
907 | * may have identical ordinals; similarly, packets distributed to | ||
908 | * different groups may have identical ordinals. Packets dropped by | ||
909 | * the IPP or by the I/O shim are not assigned ordinals. | ||
910 | * | ||
911 | * @param[in] mda Pointer to packet's standard metadata. | ||
912 | * @param[in] pkt Packet on which to operate. | ||
913 | * @return The packet's per-IPP, per-group ordinal. | ||
914 | */ | ||
915 | static __inline unsigned int | ||
916 | NETIO_PKT_GROUP_ORDINAL_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
917 | { | ||
918 | return mda->__group_ordinal; | ||
919 | } | ||
920 | |||
921 | |||
922 | /** Return the VLAN ID assigned to the packet. | ||
923 | * @ingroup ingress | ||
924 | * | ||
925 | * This value is usually contained within the packet header. | ||
926 | * | ||
927 | * This value will be zero if the packet does not have a VLAN tag, or if | ||
928 | * this value was not extracted from the packet. | ||
929 | * | ||
930 | * @param[in] mda Pointer to packet's standard metadata. | ||
931 | * @param[in] pkt Packet on which to operate. | ||
932 | * @return The packet's VLAN ID. | ||
933 | */ | ||
934 | static __inline unsigned short | ||
935 | NETIO_PKT_VLAN_ID_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
936 | { | ||
937 | int vl = (mda->__flags >> _NETIO_PKT_VLAN_SHIFT) & _NETIO_PKT_VLAN_RMASK; | ||
938 | unsigned short* pkt_p; | ||
939 | int index; | ||
940 | unsigned short val; | ||
941 | |||
942 | if (vl == _NETIO_PKT_VLAN_NONE) | ||
943 | return 0; | ||
944 | |||
945 | pkt_p = (unsigned short*) NETIO_PKT_L2_DATA_M(mda, pkt); | ||
946 | index = (mda->__flags >> _NETIO_PKT_TYPE_SHIFT) & _NETIO_PKT_TYPE_RMASK; | ||
947 | |||
948 | val = pkt_p[(_netio_pkt_info[index] >> _NETIO_PKT_INFO_VLAN_SHIFT) & | ||
949 | _NETIO_PKT_INFO_VLAN_RMASK]; | ||
950 | |||
951 | #ifdef __TILECC__ | ||
952 | return (__insn_bytex(val) >> 16) & 0xFFF; | ||
953 | #else | ||
954 | return (__builtin_bswap32(val) >> 16) & 0xFFF; | ||
955 | #endif | ||
956 | } | ||
957 | |||
958 | |||
959 | /** Return the ethertype of the packet. | ||
960 | * @ingroup ingress | ||
961 | * | ||
962 | * This value is usually contained within the packet header. | ||
963 | * | ||
964 | * This value is reliable if @ref NETIO_PKT_ETHERTYPE_RECOGNIZED_M() | ||
965 | * returns true, and otherwise, may not be well defined. | ||
966 | * | ||
967 | * @param[in] mda Pointer to packet's standard metadata. | ||
968 | * @param[in] pkt Packet on which to operate. | ||
969 | * @return The packet's ethertype. | ||
970 | */ | ||
971 | static __inline unsigned short | ||
972 | NETIO_PKT_ETHERTYPE_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
973 | { | ||
974 | unsigned short* pkt_p = (unsigned short*) NETIO_PKT_L2_DATA_M(mda, pkt); | ||
975 | int index = (mda->__flags >> _NETIO_PKT_TYPE_SHIFT) & _NETIO_PKT_TYPE_RMASK; | ||
976 | |||
977 | unsigned short val = | ||
978 | pkt_p[(_netio_pkt_info[index] >> _NETIO_PKT_INFO_ETYPE_SHIFT) & | ||
979 | _NETIO_PKT_INFO_ETYPE_RMASK]; | ||
980 | |||
981 | return __builtin_bswap32(val) >> 16; | ||
982 | } | ||
983 | |||
984 | |||
985 | /** Return the flow hash computed on the packet. | ||
986 | * @ingroup ingress | ||
987 | * | ||
988 | * For TCP and UDP packets, this hash is calculated by hashing together | ||
989 | * the "5-tuple" values, specifically the source IP address, destination | ||
990 | * IP address, protocol type, source port and destination port. | ||
991 | * The hash value is intended to be helpful for millions of distinct | ||
992 | * flows. | ||
993 | * | ||
994 | * For IPv4 or IPv6 packets which are neither TCP nor UDP, the flow hash is | ||
995 | * derived by hashing together the source and destination IP addresses. | ||
996 | * | ||
997 | * For MPLS-encapsulated packets, the flow hash is derived by hashing | ||
998 | * the first MPLS label. | ||
999 | * | ||
1000 | * For all other packets the flow hash is computed from the source | ||
1001 | * and destination Ethernet addresses. | ||
1002 | * | ||
1003 | * The hash is symmetric, meaning it produces the same value if the | ||
1004 | * source and destination are swapped. The only exceptions are | ||
1005 | * tunneling protocols 0x04 (IP in IP Encapsulation), 0x29 (Simple | ||
1006 | * Internet Protocol), 0x2F (General Routing Encapsulation) and 0x32 | ||
1007 | * (Encap Security Payload), which use only the destination address | ||
1008 | * since the source address is not meaningful. | ||
1009 | * | ||
1010 | * @param[in] mda Pointer to packet's standard metadata. | ||
1011 | * @param[in] pkt Packet on which to operate. | ||
1012 | * @return The packet's 32-bit flow hash. | ||
1013 | */ | ||
1014 | static __inline unsigned int | ||
1015 | NETIO_PKT_FLOW_HASH_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1016 | { | ||
1017 | return mda->__flow_hash; | ||
1018 | } | ||
1019 | |||
1020 | |||
1021 | /** Return the first word of "user data" for the packet. | ||
1022 | * | ||
1023 | * The contents of the user data words depend on the IPP. | ||
1024 | * | ||
1025 | * When using the standard ipp1, ipp2, or ipp4 sub-drivers, the first | ||
1026 | * word of user data contains the least significant bits of the 64-bit | ||
1027 | * arrival cycle count (see @c get_cycle_count_low()). | ||
1028 | * | ||
1029 | * See the <em>System Programmer's Guide</em> for details. | ||
1030 | * | ||
1031 | * @ingroup ingress | ||
1032 | * | ||
1033 | * @param[in] mda Pointer to packet's standard metadata. | ||
1034 | * @param[in] pkt Packet on which to operate. | ||
1035 | * @return The packet's first word of "user data". | ||
1036 | */ | ||
1037 | static __inline unsigned int | ||
1038 | NETIO_PKT_USER_DATA_0_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1039 | { | ||
1040 | return mda->__user_data_0; | ||
1041 | } | ||
1042 | |||
1043 | |||
1044 | /** Return the second word of "user data" for the packet. | ||
1045 | * | ||
1046 | * The contents of the user data words depend on the IPP. | ||
1047 | * | ||
1048 | * When using the standard ipp1, ipp2, or ipp4 sub-drivers, the second | ||
1049 | * word of user data contains the most significant bits of the 64-bit | ||
1050 | * arrival cycle count (see @c get_cycle_count_high()). | ||
1051 | * | ||
1052 | * See the <em>System Programmer's Guide</em> for details. | ||
1053 | * | ||
1054 | * @ingroup ingress | ||
1055 | * | ||
1056 | * @param[in] mda Pointer to packet's standard metadata. | ||
1057 | * @param[in] pkt Packet on which to operate. | ||
1058 | * @return The packet's second word of "user data". | ||
1059 | */ | ||
1060 | static __inline unsigned int | ||
1061 | NETIO_PKT_USER_DATA_1_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1062 | { | ||
1063 | return mda->__user_data_1; | ||
1064 | } | ||
1065 | |||
1066 | |||
1067 | /** Determine whether the L4 (TCP/UDP) checksum was calculated. | ||
1068 | * @ingroup ingress | ||
1069 | * | ||
1070 | * @param[in] mda Pointer to packet's standard metadata. | ||
1071 | * @param[in] pkt Packet on which to operate. | ||
1072 | * @return Nonzero if the L4 checksum was calculated. | ||
1073 | */ | ||
1074 | static __inline unsigned int | ||
1075 | NETIO_PKT_L4_CSUM_CALCULATED_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1076 | { | ||
1077 | return !(mda->__flags & _NETIO_PKT_NO_L4_CSUM_MASK); | ||
1078 | } | ||
1079 | |||
1080 | |||
1081 | /** Determine whether the L4 (TCP/UDP) checksum was calculated and found to | ||
1082 | * be correct. | ||
1083 | * @ingroup ingress | ||
1084 | * | ||
1085 | * @param[in] mda Pointer to packet's standard metadata. | ||
1086 | * @param[in] pkt Packet on which to operate. | ||
1087 | * @return Nonzero if the checksum was calculated and is correct. | ||
1088 | */ | ||
1089 | static __inline unsigned int | ||
1090 | NETIO_PKT_L4_CSUM_CORRECT_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1091 | { | ||
1092 | return !(mda->__flags & | ||
1093 | (_NETIO_PKT_BAD_L4_CSUM_MASK | _NETIO_PKT_NO_L4_CSUM_MASK)); | ||
1094 | } | ||
1095 | |||
1096 | |||
1097 | /** Determine whether the L3 (IP) checksum was calculated. | ||
1098 | * @ingroup ingress | ||
1099 | * | ||
1100 | * @param[in] mda Pointer to packet's standard metadata. | ||
1101 | * @param[in] pkt Packet on which to operate. | ||
1102 | * @return Nonzero if the L3 (IP) checksum was calculated. | ||
1103 | */ | ||
1104 | static __inline unsigned int | ||
1105 | NETIO_PKT_L3_CSUM_CALCULATED_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1106 | { | ||
1107 | return !(mda->__flags & _NETIO_PKT_NO_L3_CSUM_MASK); | ||
1108 | } | ||
1109 | |||
1110 | |||
1111 | /** Determine whether the L3 (IP) checksum was calculated and found to be | ||
1112 | * correct. | ||
1113 | * @ingroup ingress | ||
1114 | * | ||
1115 | * @param[in] mda Pointer to packet's standard metadata. | ||
1116 | * @param[in] pkt Packet on which to operate. | ||
1117 | * @return Nonzero if the checksum was calculated and is correct. | ||
1118 | */ | ||
1119 | static __inline unsigned int | ||
1120 | NETIO_PKT_L3_CSUM_CORRECT_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1121 | { | ||
1122 | return !(mda->__flags & | ||
1123 | (_NETIO_PKT_BAD_L3_CSUM_MASK | _NETIO_PKT_NO_L3_CSUM_MASK)); | ||
1124 | } | ||
1125 | |||
1126 | |||
1127 | /** Determine whether the ethertype was recognized and L3 packet data was | ||
1128 | * processed. | ||
1129 | * @ingroup ingress | ||
1130 | * | ||
1131 | * @param[in] mda Pointer to packet's standard metadata. | ||
1132 | * @param[in] pkt Packet on which to operate. | ||
1133 | * @return Nonzero if the ethertype was recognized and L3 packet data was | ||
1134 | * processed. | ||
1135 | */ | ||
1136 | static __inline unsigned int | ||
1137 | NETIO_PKT_ETHERTYPE_RECOGNIZED_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1138 | { | ||
1139 | return !(mda->__flags & _NETIO_PKT_TYPE_UNRECOGNIZED_MASK); | ||
1140 | } | ||
1141 | |||
1142 | |||
1143 | /** Retrieve the status of a packet and any errors that may have occurred | ||
1144 | * during ingress processing (length mismatches, CRC errors, etc.). | ||
1145 | * @ingroup ingress | ||
1146 | * | ||
1147 | * Note that packets for which @ref NETIO_PKT_ETHERTYPE_RECOGNIZED() | ||
1148 | * returns zero are always reported as underlength, as there is no a priori | ||
1149 | * means to determine their length. Normally, applications should use | ||
1150 | * @ref NETIO_PKT_BAD_M() instead of explicitly checking status with this | ||
1151 | * function. | ||
1152 | * | ||
1153 | * @param[in] mda Pointer to packet's standard metadata. | ||
1154 | * @param[in] pkt Packet on which to operate. | ||
1155 | * @return The packet's status. | ||
1156 | */ | ||
1157 | static __inline netio_pkt_status_t | ||
1158 | NETIO_PKT_STATUS_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1159 | { | ||
1160 | return (netio_pkt_status_t) __NETIO_PKT_NOTIF_HEADER(pkt).bits.__status; | ||
1161 | } | ||
1162 | |||
1163 | |||
1164 | /** Report whether a packet is bad (i.e., was shorter than expected based on | ||
1165 | * its headers, or had a bad CRC). | ||
1166 | * @ingroup ingress | ||
1167 | * | ||
1168 | * Note that this function does not verify L3 or L4 checksums. | ||
1169 | * | ||
1170 | * @param[in] mda Pointer to packet's standard metadata. | ||
1171 | * @param[in] pkt Packet on which to operate. | ||
1172 | * @return Nonzero if the packet is bad and should be discarded. | ||
1173 | */ | ||
1174 | static __inline unsigned int | ||
1175 | NETIO_PKT_BAD_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1176 | { | ||
1177 | return ((NETIO_PKT_STATUS_M(mda, pkt) & 1) && | ||
1178 | (NETIO_PKT_ETHERTYPE_RECOGNIZED_M(mda, pkt) || | ||
1179 | NETIO_PKT_STATUS_M(mda, pkt) == NETIO_PKT_STATUS_BAD)); | ||
1180 | } | ||
1181 | |||
1182 | |||
1183 | /** Return the length of the packet, starting with the L2 (Ethernet) header. | ||
1184 | * @ingroup egress | ||
1185 | * | ||
1186 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1187 | * @param[in] pkt Packet on which to operate. | ||
1188 | * @return The length of the packet, in bytes. | ||
1189 | */ | ||
1190 | static __inline netio_size_t | ||
1191 | NETIO_PKT_L2_LENGTH_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt) | ||
1192 | { | ||
1193 | return mmd->l2_length; | ||
1194 | } | ||
1195 | |||
1196 | |||
1197 | /** Return the length of the L2 (Ethernet) header. | ||
1198 | * @ingroup egress | ||
1199 | * | ||
1200 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1201 | * @param[in] pkt Packet on which to operate. | ||
1202 | * @return The length of the packet's L2 header, in bytes. | ||
1203 | */ | ||
1204 | static __inline netio_size_t | ||
1205 | NETIO_PKT_L2_HEADER_LENGTH_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1206 | netio_pkt_t* pkt) | ||
1207 | { | ||
1208 | return mmd->l3_offset - mmd->l2_offset; | ||
1209 | } | ||
1210 | |||
1211 | |||
1212 | /** Return the length of the packet, starting with the L3 (IP) header. | ||
1213 | * @ingroup egress | ||
1214 | * | ||
1215 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1216 | * @param[in] pkt Packet on which to operate. | ||
1217 | * @return Length of the packet's L3 header and data, in bytes. | ||
1218 | */ | ||
1219 | static __inline netio_size_t | ||
1220 | NETIO_PKT_L3_LENGTH_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt) | ||
1221 | { | ||
1222 | return (NETIO_PKT_L2_LENGTH_MM(mmd, pkt) - | ||
1223 | NETIO_PKT_L2_HEADER_LENGTH_MM(mmd, pkt)); | ||
1224 | } | ||
1225 | |||
1226 | |||
1227 | /** Return a pointer to the packet's L3 (generally, the IP) header. | ||
1228 | * @ingroup egress | ||
1229 | * | ||
1230 | * Note that we guarantee word alignment of the L3 header. | ||
1231 | * | ||
1232 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1233 | * @param[in] pkt Packet on which to operate. | ||
1234 | * @return A pointer to the packet's L3 header. | ||
1235 | */ | ||
1236 | static __inline unsigned char* | ||
1237 | NETIO_PKT_L3_DATA_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt) | ||
1238 | { | ||
1239 | return _NETIO_PKT_BASE(pkt) + mmd->l3_offset; | ||
1240 | } | ||
1241 | |||
1242 | |||
1243 | /** Return a pointer to the packet's L2 (Ethernet) header. | ||
1244 | * @ingroup egress | ||
1245 | * | ||
1246 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1247 | * @param[in] pkt Packet on which to operate. | ||
1248 | * @return A pointer to start of the packet. | ||
1249 | */ | ||
1250 | static __inline unsigned char* | ||
1251 | NETIO_PKT_L2_DATA_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt) | ||
1252 | { | ||
1253 | return _NETIO_PKT_BASE(pkt) + mmd->l2_offset; | ||
1254 | } | ||
1255 | |||
1256 | |||
1257 | /** Retrieve the status of a packet and any errors that may have occurred | ||
1258 | * during ingress processing (length mismatches, CRC errors, etc.). | ||
1259 | * @ingroup ingress | ||
1260 | * | ||
1261 | * Note that packets for which @ref NETIO_PKT_ETHERTYPE_RECOGNIZED() | ||
1262 | * returns zero are always reported as underlength, as there is no a priori | ||
1263 | * means to determine their length. Normally, applications should use | ||
1264 | * @ref NETIO_PKT_BAD() instead of explicitly checking status with this | ||
1265 | * function. | ||
1266 | * | ||
1267 | * @param[in] pkt Packet on which to operate. | ||
1268 | * @return The packet's status. | ||
1269 | */ | ||
1270 | static __inline netio_pkt_status_t | ||
1271 | NETIO_PKT_STATUS(netio_pkt_t* pkt) | ||
1272 | { | ||
1273 | netio_assert(!pkt->__packet.bits.__minimal); | ||
1274 | |||
1275 | return (netio_pkt_status_t) __NETIO_PKT_NOTIF_HEADER(pkt).bits.__status; | ||
1276 | } | ||
1277 | |||
1278 | |||
1279 | /** Report whether a packet is bad (i.e., was shorter than expected based on | ||
1280 | * its headers, or had a bad CRC). | ||
1281 | * @ingroup ingress | ||
1282 | * | ||
1283 | * Note that this function does not verify L3 or L4 checksums. | ||
1284 | * | ||
1285 | * @param[in] pkt Packet on which to operate. | ||
1286 | * @return Nonzero if the packet is bad and should be discarded. | ||
1287 | */ | ||
1288 | static __inline unsigned int | ||
1289 | NETIO_PKT_BAD(netio_pkt_t* pkt) | ||
1290 | { | ||
1291 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1292 | |||
1293 | return NETIO_PKT_BAD_M(mda, pkt); | ||
1294 | } | ||
1295 | |||
1296 | |||
1297 | /** Return the length of the packet's custom header. | ||
1298 | * A custom header may or may not be present, depending upon the IPP; its | ||
1299 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
1300 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
1301 | * the custom header precedes the L2 header in the packet buffer. | ||
1302 | * @ingroup pktfuncs | ||
1303 | * | ||
1304 | * @param[in] pkt Packet on which to operate. | ||
1305 | * @return The length of the packet's custom header, in bytes. | ||
1306 | */ | ||
1307 | static __inline netio_size_t | ||
1308 | NETIO_PKT_CUSTOM_HEADER_LENGTH(netio_pkt_t* pkt) | ||
1309 | { | ||
1310 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1311 | |||
1312 | return NETIO_PKT_CUSTOM_HEADER_LENGTH_M(mda, pkt); | ||
1313 | } | ||
1314 | |||
1315 | |||
1316 | /** Return the length of the packet, starting with the custom header. | ||
1317 | * A custom header may or may not be present, depending upon the IPP; its | ||
1318 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
1319 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
1320 | * the custom header precedes the L2 header in the packet buffer. | ||
1321 | * @ingroup pktfuncs | ||
1322 | * | ||
1323 | * @param[in] pkt Packet on which to operate. | ||
1324 | * @return The length of the packet, in bytes. | ||
1325 | */ | ||
1326 | static __inline netio_size_t | ||
1327 | NETIO_PKT_CUSTOM_LENGTH(netio_pkt_t* pkt) | ||
1328 | { | ||
1329 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1330 | |||
1331 | return NETIO_PKT_CUSTOM_LENGTH_M(mda, pkt); | ||
1332 | } | ||
1333 | |||
1334 | |||
1335 | /** Return a pointer to the packet's custom header. | ||
1336 | * A custom header may or may not be present, depending upon the IPP; its | ||
1337 | * contents and alignment are also IPP-dependent. Currently, none of the | ||
1338 | * standard IPPs supplied by Tilera produce a custom header. If present, | ||
1339 | * the custom header precedes the L2 header in the packet buffer. | ||
1340 | * @ingroup pktfuncs | ||
1341 | * | ||
1342 | * @param[in] pkt Packet on which to operate. | ||
1343 | * @return A pointer to start of the packet. | ||
1344 | */ | ||
1345 | static __inline unsigned char* | ||
1346 | NETIO_PKT_CUSTOM_DATA(netio_pkt_t* pkt) | ||
1347 | { | ||
1348 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1349 | |||
1350 | return NETIO_PKT_CUSTOM_DATA_M(mda, pkt); | ||
1351 | } | ||
1352 | |||
1353 | |||
1354 | /** Return the length of the packet's L2 (Ethernet plus VLAN or SNAP) header. | ||
1355 | * @ingroup pktfuncs | ||
1356 | * | ||
1357 | * @param[in] pkt Packet on which to operate. | ||
1358 | * @return The length of the packet's L2 header, in bytes. | ||
1359 | */ | ||
1360 | static __inline netio_size_t | ||
1361 | NETIO_PKT_L2_HEADER_LENGTH(netio_pkt_t* pkt) | ||
1362 | { | ||
1363 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1364 | { | ||
1365 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1366 | |||
1367 | return NETIO_PKT_L2_HEADER_LENGTH_MM(mmd, pkt); | ||
1368 | } | ||
1369 | else | ||
1370 | { | ||
1371 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1372 | |||
1373 | return NETIO_PKT_L2_HEADER_LENGTH_M(mda, pkt); | ||
1374 | } | ||
1375 | } | ||
1376 | |||
1377 | |||
1378 | /** Return the length of the packet, starting with the L2 (Ethernet) header. | ||
1379 | * @ingroup pktfuncs | ||
1380 | * | ||
1381 | * @param[in] pkt Packet on which to operate. | ||
1382 | * @return The length of the packet, in bytes. | ||
1383 | */ | ||
1384 | static __inline netio_size_t | ||
1385 | NETIO_PKT_L2_LENGTH(netio_pkt_t* pkt) | ||
1386 | { | ||
1387 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1388 | { | ||
1389 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1390 | |||
1391 | return NETIO_PKT_L2_LENGTH_MM(mmd, pkt); | ||
1392 | } | ||
1393 | else | ||
1394 | { | ||
1395 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1396 | |||
1397 | return NETIO_PKT_L2_LENGTH_M(mda, pkt); | ||
1398 | } | ||
1399 | } | ||
1400 | |||
1401 | |||
1402 | /** Return a pointer to the packet's L2 (Ethernet) header. | ||
1403 | * @ingroup pktfuncs | ||
1404 | * | ||
1405 | * @param[in] pkt Packet on which to operate. | ||
1406 | * @return A pointer to start of the packet. | ||
1407 | */ | ||
1408 | static __inline unsigned char* | ||
1409 | NETIO_PKT_L2_DATA(netio_pkt_t* pkt) | ||
1410 | { | ||
1411 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1412 | { | ||
1413 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1414 | |||
1415 | return NETIO_PKT_L2_DATA_MM(mmd, pkt); | ||
1416 | } | ||
1417 | else | ||
1418 | { | ||
1419 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1420 | |||
1421 | return NETIO_PKT_L2_DATA_M(mda, pkt); | ||
1422 | } | ||
1423 | } | ||
1424 | |||
1425 | |||
1426 | /** Retrieve the length of the packet, starting with the L3 (generally, the IP) | ||
1427 | * header. | ||
1428 | * @ingroup pktfuncs | ||
1429 | * | ||
1430 | * @param[in] pkt Packet on which to operate. | ||
1431 | * @return Length of the packet's L3 header and data, in bytes. | ||
1432 | */ | ||
1433 | static __inline netio_size_t | ||
1434 | NETIO_PKT_L3_LENGTH(netio_pkt_t* pkt) | ||
1435 | { | ||
1436 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1437 | { | ||
1438 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1439 | |||
1440 | return NETIO_PKT_L3_LENGTH_MM(mmd, pkt); | ||
1441 | } | ||
1442 | else | ||
1443 | { | ||
1444 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1445 | |||
1446 | return NETIO_PKT_L3_LENGTH_M(mda, pkt); | ||
1447 | } | ||
1448 | } | ||
1449 | |||
1450 | |||
1451 | /** Return a pointer to the packet's L3 (generally, the IP) header. | ||
1452 | * @ingroup pktfuncs | ||
1453 | * | ||
1454 | * Note that we guarantee word alignment of the L3 header. | ||
1455 | * | ||
1456 | * @param[in] pkt Packet on which to operate. | ||
1457 | * @return A pointer to the packet's L3 header. | ||
1458 | */ | ||
1459 | static __inline unsigned char* | ||
1460 | NETIO_PKT_L3_DATA(netio_pkt_t* pkt) | ||
1461 | { | ||
1462 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1463 | { | ||
1464 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1465 | |||
1466 | return NETIO_PKT_L3_DATA_MM(mmd, pkt); | ||
1467 | } | ||
1468 | else | ||
1469 | { | ||
1470 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1471 | |||
1472 | return NETIO_PKT_L3_DATA_M(mda, pkt); | ||
1473 | } | ||
1474 | } | ||
1475 | |||
1476 | |||
1477 | /** Return the ordinal of the packet. | ||
1478 | * @ingroup ingress | ||
1479 | * | ||
1480 | * Each packet is given an ordinal number when it is delivered by the IPP. | ||
1481 | * In the medium term, the ordinal is unique and monotonically increasing, | ||
1482 | * being incremented by 1 for each packet; the ordinal of the first packet | ||
1483 | * delivered after the IPP starts is zero. (Since the ordinal is of finite | ||
1484 | * size, given enough input packets, it will eventually wrap around to zero; | ||
1485 | * in the long term, therefore, ordinals are not unique.) The ordinals | ||
1486 | * handed out by different IPPs are not disjoint, so two packets from | ||
1487 | * different IPPs may have identical ordinals. Packets dropped by the | ||
1488 | * IPP or by the I/O shim are not assigned ordinals. | ||
1489 | * | ||
1490 | * | ||
1491 | * @param[in] pkt Packet on which to operate. | ||
1492 | * @return The packet's per-IPP packet ordinal. | ||
1493 | */ | ||
1494 | static __inline unsigned int | ||
1495 | NETIO_PKT_ORDINAL(netio_pkt_t* pkt) | ||
1496 | { | ||
1497 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1498 | |||
1499 | return NETIO_PKT_ORDINAL_M(mda, pkt); | ||
1500 | } | ||
1501 | |||
1502 | |||
1503 | /** Return the per-group ordinal of the packet. | ||
1504 | * @ingroup ingress | ||
1505 | * | ||
1506 | * Each packet is given a per-group ordinal number when it is | ||
1507 | * delivered by the IPP. By default, the group is the packet's VLAN, | ||
1508 | * although IPP can be recompiled to use different values. In | ||
1509 | * the medium term, the ordinal is unique and monotonically | ||
1510 | * increasing, being incremented by 1 for each packet; the ordinal of | ||
1511 | * the first packet distributed to a particular group is zero. | ||
1512 | * (Since the ordinal is of finite size, given enough input packets, | ||
1513 | * it will eventually wrap around to zero; in the long term, | ||
1514 | * therefore, ordinals are not unique.) The ordinals handed out by | ||
1515 | * different IPPs are not disjoint, so two packets from different IPPs | ||
1516 | * may have identical ordinals; similarly, packets distributed to | ||
1517 | * different groups may have identical ordinals. Packets dropped by | ||
1518 | * the IPP or by the I/O shim are not assigned ordinals. | ||
1519 | * | ||
1520 | * @param[in] pkt Packet on which to operate. | ||
1521 | * @return The packet's per-IPP, per-group ordinal. | ||
1522 | */ | ||
1523 | static __inline unsigned int | ||
1524 | NETIO_PKT_GROUP_ORDINAL(netio_pkt_t* pkt) | ||
1525 | { | ||
1526 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1527 | |||
1528 | return NETIO_PKT_GROUP_ORDINAL_M(mda, pkt); | ||
1529 | } | ||
1530 | |||
1531 | |||
1532 | /** Return the VLAN ID assigned to the packet. | ||
1533 | * @ingroup ingress | ||
1534 | * | ||
1535 | * This is usually also contained within the packet header. If the packet | ||
1536 | * does not have a VLAN tag, the VLAN ID returned by this function is zero. | ||
1537 | * | ||
1538 | * @param[in] pkt Packet on which to operate. | ||
1539 | * @return The packet's VLAN ID. | ||
1540 | */ | ||
1541 | static __inline unsigned short | ||
1542 | NETIO_PKT_VLAN_ID(netio_pkt_t* pkt) | ||
1543 | { | ||
1544 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1545 | |||
1546 | return NETIO_PKT_VLAN_ID_M(mda, pkt); | ||
1547 | } | ||
1548 | |||
1549 | |||
1550 | /** Return the ethertype of the packet. | ||
1551 | * @ingroup ingress | ||
1552 | * | ||
1553 | * This value is reliable if @ref NETIO_PKT_ETHERTYPE_RECOGNIZED() | ||
1554 | * returns true, and otherwise, may not be well defined. | ||
1555 | * | ||
1556 | * @param[in] pkt Packet on which to operate. | ||
1557 | * @return The packet's ethertype. | ||
1558 | */ | ||
1559 | static __inline unsigned short | ||
1560 | NETIO_PKT_ETHERTYPE(netio_pkt_t* pkt) | ||
1561 | { | ||
1562 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1563 | |||
1564 | return NETIO_PKT_ETHERTYPE_M(mda, pkt); | ||
1565 | } | ||
1566 | |||
1567 | |||
1568 | /** Return the flow hash computed on the packet. | ||
1569 | * @ingroup ingress | ||
1570 | * | ||
1571 | * For TCP and UDP packets, this hash is calculated by hashing together | ||
1572 | * the "5-tuple" values, specifically the source IP address, destination | ||
1573 | * IP address, protocol type, source port and destination port. | ||
1574 | * The hash value is intended to be helpful for millions of distinct | ||
1575 | * flows. | ||
1576 | * | ||
1577 | * For IPv4 or IPv6 packets which are neither TCP nor UDP, the flow hash is | ||
1578 | * derived by hashing together the source and destination IP addresses. | ||
1579 | * | ||
1580 | * For MPLS-encapsulated packets, the flow hash is derived by hashing | ||
1581 | * the first MPLS label. | ||
1582 | * | ||
1583 | * For all other packets the flow hash is computed from the source | ||
1584 | * and destination Ethernet addresses. | ||
1585 | * | ||
1586 | * The hash is symmetric, meaning it produces the same value if the | ||
1587 | * source and destination are swapped. The only exceptions are | ||
1588 | * tunneling protocols 0x04 (IP in IP Encapsulation), 0x29 (Simple | ||
1589 | * Internet Protocol), 0x2F (General Routing Encapsulation) and 0x32 | ||
1590 | * (Encap Security Payload), which use only the destination address | ||
1591 | * since the source address is not meaningful. | ||
1592 | * | ||
1593 | * @param[in] pkt Packet on which to operate. | ||
1594 | * @return The packet's 32-bit flow hash. | ||
1595 | */ | ||
1596 | static __inline unsigned int | ||
1597 | NETIO_PKT_FLOW_HASH(netio_pkt_t* pkt) | ||
1598 | { | ||
1599 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1600 | |||
1601 | return NETIO_PKT_FLOW_HASH_M(mda, pkt); | ||
1602 | } | ||
1603 | |||
1604 | |||
1605 | /** Return the first word of "user data" for the packet. | ||
1606 | * | ||
1607 | * The contents of the user data words depend on the IPP. | ||
1608 | * | ||
1609 | * When using the standard ipp1, ipp2, or ipp4 sub-drivers, the first | ||
1610 | * word of user data contains the least significant bits of the 64-bit | ||
1611 | * arrival cycle count (see @c get_cycle_count_low()). | ||
1612 | * | ||
1613 | * See the <em>System Programmer's Guide</em> for details. | ||
1614 | * | ||
1615 | * @ingroup ingress | ||
1616 | * | ||
1617 | * @param[in] pkt Packet on which to operate. | ||
1618 | * @return The packet's first word of "user data". | ||
1619 | */ | ||
1620 | static __inline unsigned int | ||
1621 | NETIO_PKT_USER_DATA_0(netio_pkt_t* pkt) | ||
1622 | { | ||
1623 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1624 | |||
1625 | return NETIO_PKT_USER_DATA_0_M(mda, pkt); | ||
1626 | } | ||
1627 | |||
1628 | |||
1629 | /** Return the second word of "user data" for the packet. | ||
1630 | * | ||
1631 | * The contents of the user data words depend on the IPP. | ||
1632 | * | ||
1633 | * When using the standard ipp1, ipp2, or ipp4 sub-drivers, the second | ||
1634 | * word of user data contains the most significant bits of the 64-bit | ||
1635 | * arrival cycle count (see @c get_cycle_count_high()). | ||
1636 | * | ||
1637 | * See the <em>System Programmer's Guide</em> for details. | ||
1638 | * | ||
1639 | * @ingroup ingress | ||
1640 | * | ||
1641 | * @param[in] pkt Packet on which to operate. | ||
1642 | * @return The packet's second word of "user data". | ||
1643 | */ | ||
1644 | static __inline unsigned int | ||
1645 | NETIO_PKT_USER_DATA_1(netio_pkt_t* pkt) | ||
1646 | { | ||
1647 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1648 | |||
1649 | return NETIO_PKT_USER_DATA_1_M(mda, pkt); | ||
1650 | } | ||
1651 | |||
1652 | |||
1653 | /** Determine whether the L4 (TCP/UDP) checksum was calculated. | ||
1654 | * @ingroup ingress | ||
1655 | * | ||
1656 | * @param[in] pkt Packet on which to operate. | ||
1657 | * @return Nonzero if the L4 checksum was calculated. | ||
1658 | */ | ||
1659 | static __inline unsigned int | ||
1660 | NETIO_PKT_L4_CSUM_CALCULATED(netio_pkt_t* pkt) | ||
1661 | { | ||
1662 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1663 | |||
1664 | return NETIO_PKT_L4_CSUM_CALCULATED_M(mda, pkt); | ||
1665 | } | ||
1666 | |||
1667 | |||
1668 | /** Determine whether the L4 (TCP/UDP) checksum was calculated and found to | ||
1669 | * be correct. | ||
1670 | * @ingroup ingress | ||
1671 | * | ||
1672 | * @param[in] pkt Packet on which to operate. | ||
1673 | * @return Nonzero if the checksum was calculated and is correct. | ||
1674 | */ | ||
1675 | static __inline unsigned int | ||
1676 | NETIO_PKT_L4_CSUM_CORRECT(netio_pkt_t* pkt) | ||
1677 | { | ||
1678 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1679 | |||
1680 | return NETIO_PKT_L4_CSUM_CORRECT_M(mda, pkt); | ||
1681 | } | ||
1682 | |||
1683 | |||
1684 | /** Determine whether the L3 (IP) checksum was calculated. | ||
1685 | * @ingroup ingress | ||
1686 | * | ||
1687 | * @param[in] pkt Packet on which to operate. | ||
1688 | * @return Nonzero if the L3 (IP) checksum was calculated. | ||
1689 | */ | ||
1690 | static __inline unsigned int | ||
1691 | NETIO_PKT_L3_CSUM_CALCULATED(netio_pkt_t* pkt) | ||
1692 | { | ||
1693 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1694 | |||
1695 | return NETIO_PKT_L3_CSUM_CALCULATED_M(mda, pkt); | ||
1696 | } | ||
1697 | |||
1698 | |||
1699 | /** Determine whether the L3 (IP) checksum was calculated and found to be | ||
1700 | * correct. | ||
1701 | * @ingroup ingress | ||
1702 | * | ||
1703 | * @param[in] pkt Packet on which to operate. | ||
1704 | * @return Nonzero if the checksum was calculated and is correct. | ||
1705 | */ | ||
1706 | static __inline unsigned int | ||
1707 | NETIO_PKT_L3_CSUM_CORRECT(netio_pkt_t* pkt) | ||
1708 | { | ||
1709 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1710 | |||
1711 | return NETIO_PKT_L3_CSUM_CORRECT_M(mda, pkt); | ||
1712 | } | ||
1713 | |||
1714 | |||
1715 | /** Determine whether the Ethertype was recognized and L3 packet data was | ||
1716 | * processed. | ||
1717 | * @ingroup ingress | ||
1718 | * | ||
1719 | * @param[in] pkt Packet on which to operate. | ||
1720 | * @return Nonzero if the Ethertype was recognized and L3 packet data was | ||
1721 | * processed. | ||
1722 | */ | ||
1723 | static __inline unsigned int | ||
1724 | NETIO_PKT_ETHERTYPE_RECOGNIZED(netio_pkt_t* pkt) | ||
1725 | { | ||
1726 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1727 | |||
1728 | return NETIO_PKT_ETHERTYPE_RECOGNIZED_M(mda, pkt); | ||
1729 | } | ||
1730 | |||
1731 | |||
1732 | /** Set an egress packet's L2 length, using a metadata pointer to speed the | ||
1733 | * computation. | ||
1734 | * @ingroup egress | ||
1735 | * | ||
1736 | * @param[in,out] mmd Pointer to packet's minimal metadata. | ||
1737 | * @param[in] pkt Packet on which to operate. | ||
1738 | * @param[in] len Packet L2 length, in bytes. | ||
1739 | */ | ||
1740 | static __inline void | ||
1741 | NETIO_PKT_SET_L2_LENGTH_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt, | ||
1742 | int len) | ||
1743 | { | ||
1744 | mmd->l2_length = len; | ||
1745 | } | ||
1746 | |||
1747 | |||
1748 | /** Set an egress packet's L2 length. | ||
1749 | * @ingroup egress | ||
1750 | * | ||
1751 | * @param[in,out] pkt Packet on which to operate. | ||
1752 | * @param[in] len Packet L2 length, in bytes. | ||
1753 | */ | ||
1754 | static __inline void | ||
1755 | NETIO_PKT_SET_L2_LENGTH(netio_pkt_t* pkt, int len) | ||
1756 | { | ||
1757 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1758 | |||
1759 | NETIO_PKT_SET_L2_LENGTH_MM(mmd, pkt, len); | ||
1760 | } | ||
1761 | |||
1762 | |||
1763 | /** Set an egress packet's L2 header length, using a metadata pointer to | ||
1764 | * speed the computation. | ||
1765 | * @ingroup egress | ||
1766 | * | ||
1767 | * It is not normally necessary to call this routine; only the L2 length, | ||
1768 | * not the header length, is needed to transmit a packet. It may be useful if | ||
1769 | * the egress packet will later be processed by code which expects to use | ||
1770 | * functions like @ref NETIO_PKT_L3_DATA() to get a pointer to the L3 payload. | ||
1771 | * | ||
1772 | * @param[in,out] mmd Pointer to packet's minimal metadata. | ||
1773 | * @param[in] pkt Packet on which to operate. | ||
1774 | * @param[in] len Packet L2 header length, in bytes. | ||
1775 | */ | ||
1776 | static __inline void | ||
1777 | NETIO_PKT_SET_L2_HEADER_LENGTH_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1778 | netio_pkt_t* pkt, int len) | ||
1779 | { | ||
1780 | mmd->l3_offset = mmd->l2_offset + len; | ||
1781 | } | ||
1782 | |||
1783 | |||
1784 | /** Set an egress packet's L2 header length. | ||
1785 | * @ingroup egress | ||
1786 | * | ||
1787 | * It is not normally necessary to call this routine; only the L2 length, | ||
1788 | * not the header length, is needed to transmit a packet. It may be useful if | ||
1789 | * the egress packet will later be processed by code which expects to use | ||
1790 | * functions like @ref NETIO_PKT_L3_DATA() to get a pointer to the L3 payload. | ||
1791 | * | ||
1792 | * @param[in,out] pkt Packet on which to operate. | ||
1793 | * @param[in] len Packet L2 header length, in bytes. | ||
1794 | */ | ||
1795 | static __inline void | ||
1796 | NETIO_PKT_SET_L2_HEADER_LENGTH(netio_pkt_t* pkt, int len) | ||
1797 | { | ||
1798 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1799 | |||
1800 | NETIO_PKT_SET_L2_HEADER_LENGTH_MM(mmd, pkt, len); | ||
1801 | } | ||
1802 | |||
1803 | |||
1804 | /** Set up an egress packet for hardware checksum computation, using a | ||
1805 | * metadata pointer to speed the operation. | ||
1806 | * @ingroup egress | ||
1807 | * | ||
1808 | * NetIO provides the ability to automatically calculate a standard | ||
1809 | * 16-bit Internet checksum on transmitted packets. The application | ||
1810 | * may specify the point in the packet where the checksum starts, the | ||
1811 | * number of bytes to be checksummed, and the two bytes in the packet | ||
1812 | * which will be replaced with the completed checksum. (If the range | ||
1813 | * of bytes to be checksummed includes the bytes to be replaced, the | ||
1814 | * initial values of those bytes will be included in the checksum.) | ||
1815 | * | ||
1816 | * For some protocols, the packet checksum covers data which is not present | ||
1817 | * in the packet, or is at least not contiguous to the main data payload. | ||
1818 | * For instance, the TCP checksum includes a "pseudo-header" which includes | ||
1819 | * the source and destination IP addresses of the packet. To accommodate | ||
1820 | * this, the checksum engine may be "seeded" with an initial value, which | ||
1821 | * the application would need to compute based on the specific protocol's | ||
1822 | * requirements. Note that the seed is given in host byte order (little- | ||
1823 | * endian), not network byte order (big-endian); code written to compute a | ||
1824 | * pseudo-header checksum in network byte order will need to byte-swap it | ||
1825 | * before use as the seed. | ||
1826 | * | ||
1827 | * Note that the checksum is computed as part of the transmission process, | ||
1828 | * so it will not be present in the packet upon completion of this routine. | ||
1829 | * | ||
1830 | * @param[in,out] mmd Pointer to packet's minimal metadata. | ||
1831 | * @param[in] pkt Packet on which to operate. | ||
1832 | * @param[in] start Offset within L2 packet of the first byte to include in | ||
1833 | * the checksum. | ||
1834 | * @param[in] length Number of bytes to include in the checksum. | ||
1835 | * the checksum. | ||
1836 | * @param[in] location Offset within L2 packet of the first of the two bytes | ||
1837 | * to be replaced with the calculated checksum. | ||
1838 | * @param[in] seed Initial value of the running checksum before any of the | ||
1839 | * packet data is added. | ||
1840 | */ | ||
1841 | static __inline void | ||
1842 | NETIO_PKT_DO_EGRESS_CSUM_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1843 | netio_pkt_t* pkt, int start, int length, | ||
1844 | int location, uint16_t seed) | ||
1845 | { | ||
1846 | mmd->csum_start = start; | ||
1847 | mmd->csum_length = length; | ||
1848 | mmd->csum_location = location; | ||
1849 | mmd->csum_seed = seed; | ||
1850 | mmd->flags |= _NETIO_PKT_NEED_EDMA_CSUM_MASK; | ||
1851 | } | ||
1852 | |||
1853 | |||
1854 | /** Set up an egress packet for hardware checksum computation. | ||
1855 | * @ingroup egress | ||
1856 | * | ||
1857 | * NetIO provides the ability to automatically calculate a standard | ||
1858 | * 16-bit Internet checksum on transmitted packets. The application | ||
1859 | * may specify the point in the packet where the checksum starts, the | ||
1860 | * number of bytes to be checksummed, and the two bytes in the packet | ||
1861 | * which will be replaced with the completed checksum. (If the range | ||
1862 | * of bytes to be checksummed includes the bytes to be replaced, the | ||
1863 | * initial values of those bytes will be included in the checksum.) | ||
1864 | * | ||
1865 | * For some protocols, the packet checksum covers data which is not present | ||
1866 | * in the packet, or is at least not contiguous to the main data payload. | ||
1867 | * For instance, the TCP checksum includes a "pseudo-header" which includes | ||
1868 | * the source and destination IP addresses of the packet. To accommodate | ||
1869 | * this, the checksum engine may be "seeded" with an initial value, which | ||
1870 | * the application would need to compute based on the specific protocol's | ||
1871 | * requirements. Note that the seed is given in host byte order (little- | ||
1872 | * endian), not network byte order (big-endian); code written to compute a | ||
1873 | * pseudo-header checksum in network byte order will need to byte-swap it | ||
1874 | * before use as the seed. | ||
1875 | * | ||
1876 | * Note that the checksum is computed as part of the transmission process, | ||
1877 | * so it will not be present in the packet upon completion of this routine. | ||
1878 | * | ||
1879 | * @param[in,out] pkt Packet on which to operate. | ||
1880 | * @param[in] start Offset within L2 packet of the first byte to include in | ||
1881 | * the checksum. | ||
1882 | * @param[in] length Number of bytes to include in the checksum. | ||
1883 | * the checksum. | ||
1884 | * @param[in] location Offset within L2 packet of the first of the two bytes | ||
1885 | * to be replaced with the calculated checksum. | ||
1886 | * @param[in] seed Initial value of the running checksum before any of the | ||
1887 | * packet data is added. | ||
1888 | */ | ||
1889 | static __inline void | ||
1890 | NETIO_PKT_DO_EGRESS_CSUM(netio_pkt_t* pkt, int start, int length, | ||
1891 | int location, uint16_t seed) | ||
1892 | { | ||
1893 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1894 | |||
1895 | NETIO_PKT_DO_EGRESS_CSUM_MM(mmd, pkt, start, length, location, seed); | ||
1896 | } | ||
1897 | |||
1898 | |||
1899 | /** Return the number of bytes which could be prepended to a packet, using a | ||
1900 | * metadata pointer to speed the operation. | ||
1901 | * See @ref netio_populate_prepend_buffer() to get a full description of | ||
1902 | * prepending. | ||
1903 | * | ||
1904 | * @param[in,out] mda Pointer to packet's standard metadata. | ||
1905 | * @param[in] pkt Packet on which to operate. | ||
1906 | */ | ||
1907 | static __inline int | ||
1908 | NETIO_PKT_PREPEND_AVAIL_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
1909 | { | ||
1910 | return (pkt->__packet.bits.__offset << 6) + | ||
1911 | NETIO_PKT_CUSTOM_HEADER_LENGTH_M(mda, pkt); | ||
1912 | } | ||
1913 | |||
1914 | |||
1915 | /** Return the number of bytes which could be prepended to a packet, using a | ||
1916 | * metadata pointer to speed the operation. | ||
1917 | * See @ref netio_populate_prepend_buffer() to get a full description of | ||
1918 | * prepending. | ||
1919 | * @ingroup egress | ||
1920 | * | ||
1921 | * @param[in,out] mmd Pointer to packet's minimal metadata. | ||
1922 | * @param[in] pkt Packet on which to operate. | ||
1923 | */ | ||
1924 | static __inline int | ||
1925 | NETIO_PKT_PREPEND_AVAIL_MM(netio_pkt_minimal_metadata_t* mmd, netio_pkt_t* pkt) | ||
1926 | { | ||
1927 | return (pkt->__packet.bits.__offset << 6) + mmd->l2_offset; | ||
1928 | } | ||
1929 | |||
1930 | |||
1931 | /** Return the number of bytes which could be prepended to a packet. | ||
1932 | * See @ref netio_populate_prepend_buffer() to get a full description of | ||
1933 | * prepending. | ||
1934 | * @ingroup egress | ||
1935 | * | ||
1936 | * @param[in] pkt Packet on which to operate. | ||
1937 | */ | ||
1938 | static __inline int | ||
1939 | NETIO_PKT_PREPEND_AVAIL(netio_pkt_t* pkt) | ||
1940 | { | ||
1941 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
1942 | { | ||
1943 | netio_pkt_minimal_metadata_t* mmd = NETIO_PKT_MINIMAL_METADATA(pkt); | ||
1944 | |||
1945 | return NETIO_PKT_PREPEND_AVAIL_MM(mmd, pkt); | ||
1946 | } | ||
1947 | else | ||
1948 | { | ||
1949 | netio_pkt_metadata_t* mda = NETIO_PKT_METADATA(pkt); | ||
1950 | |||
1951 | return NETIO_PKT_PREPEND_AVAIL_M(mda, pkt); | ||
1952 | } | ||
1953 | } | ||
1954 | |||
1955 | |||
1956 | /** Flush a packet's minimal metadata from the cache, using a metadata pointer | ||
1957 | * to speed the operation. | ||
1958 | * @ingroup egress | ||
1959 | * | ||
1960 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1961 | * @param[in] pkt Packet on which to operate. | ||
1962 | */ | ||
1963 | static __inline void | ||
1964 | NETIO_PKT_FLUSH_MINIMAL_METADATA_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1965 | netio_pkt_t* pkt) | ||
1966 | { | ||
1967 | } | ||
1968 | |||
1969 | |||
1970 | /** Invalidate a packet's minimal metadata from the cache, using a metadata | ||
1971 | * pointer to speed the operation. | ||
1972 | * @ingroup egress | ||
1973 | * | ||
1974 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1975 | * @param[in] pkt Packet on which to operate. | ||
1976 | */ | ||
1977 | static __inline void | ||
1978 | NETIO_PKT_INV_MINIMAL_METADATA_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1979 | netio_pkt_t* pkt) | ||
1980 | { | ||
1981 | } | ||
1982 | |||
1983 | |||
1984 | /** Flush and then invalidate a packet's minimal metadata from the cache, | ||
1985 | * using a metadata pointer to speed the operation. | ||
1986 | * @ingroup egress | ||
1987 | * | ||
1988 | * @param[in] mmd Pointer to packet's minimal metadata. | ||
1989 | * @param[in] pkt Packet on which to operate. | ||
1990 | */ | ||
1991 | static __inline void | ||
1992 | NETIO_PKT_FLUSH_INV_MINIMAL_METADATA_MM(netio_pkt_minimal_metadata_t* mmd, | ||
1993 | netio_pkt_t* pkt) | ||
1994 | { | ||
1995 | } | ||
1996 | |||
1997 | |||
1998 | /** Flush a packet's metadata from the cache, using a metadata pointer | ||
1999 | * to speed the operation. | ||
2000 | * @ingroup ingress | ||
2001 | * | ||
2002 | * @param[in] mda Pointer to packet's minimal metadata. | ||
2003 | * @param[in] pkt Packet on which to operate. | ||
2004 | */ | ||
2005 | static __inline void | ||
2006 | NETIO_PKT_FLUSH_METADATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
2007 | { | ||
2008 | } | ||
2009 | |||
2010 | |||
2011 | /** Invalidate a packet's metadata from the cache, using a metadata | ||
2012 | * pointer to speed the operation. | ||
2013 | * @ingroup ingress | ||
2014 | * | ||
2015 | * @param[in] mda Pointer to packet's metadata. | ||
2016 | * @param[in] pkt Packet on which to operate. | ||
2017 | */ | ||
2018 | static __inline void | ||
2019 | NETIO_PKT_INV_METADATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
2020 | { | ||
2021 | } | ||
2022 | |||
2023 | |||
2024 | /** Flush and then invalidate a packet's metadata from the cache, | ||
2025 | * using a metadata pointer to speed the operation. | ||
2026 | * @ingroup ingress | ||
2027 | * | ||
2028 | * @param[in] mda Pointer to packet's metadata. | ||
2029 | * @param[in] pkt Packet on which to operate. | ||
2030 | */ | ||
2031 | static __inline void | ||
2032 | NETIO_PKT_FLUSH_INV_METADATA_M(netio_pkt_metadata_t* mda, netio_pkt_t* pkt) | ||
2033 | { | ||
2034 | } | ||
2035 | |||
2036 | |||
2037 | /** Flush a packet's minimal metadata from the cache. | ||
2038 | * @ingroup egress | ||
2039 | * | ||
2040 | * @param[in] pkt Packet on which to operate. | ||
2041 | */ | ||
2042 | static __inline void | ||
2043 | NETIO_PKT_FLUSH_MINIMAL_METADATA(netio_pkt_t* pkt) | ||
2044 | { | ||
2045 | } | ||
2046 | |||
2047 | |||
2048 | /** Invalidate a packet's minimal metadata from the cache. | ||
2049 | * @ingroup egress | ||
2050 | * | ||
2051 | * @param[in] pkt Packet on which to operate. | ||
2052 | */ | ||
2053 | static __inline void | ||
2054 | NETIO_PKT_INV_MINIMAL_METADATA(netio_pkt_t* pkt) | ||
2055 | { | ||
2056 | } | ||
2057 | |||
2058 | |||
2059 | /** Flush and then invalidate a packet's minimal metadata from the cache. | ||
2060 | * @ingroup egress | ||
2061 | * | ||
2062 | * @param[in] pkt Packet on which to operate. | ||
2063 | */ | ||
2064 | static __inline void | ||
2065 | NETIO_PKT_FLUSH_INV_MINIMAL_METADATA(netio_pkt_t* pkt) | ||
2066 | { | ||
2067 | } | ||
2068 | |||
2069 | |||
2070 | /** Flush a packet's metadata from the cache. | ||
2071 | * @ingroup ingress | ||
2072 | * | ||
2073 | * @param[in] pkt Packet on which to operate. | ||
2074 | */ | ||
2075 | static __inline void | ||
2076 | NETIO_PKT_FLUSH_METADATA(netio_pkt_t* pkt) | ||
2077 | { | ||
2078 | } | ||
2079 | |||
2080 | |||
2081 | /** Invalidate a packet's metadata from the cache. | ||
2082 | * @ingroup ingress | ||
2083 | * | ||
2084 | * @param[in] pkt Packet on which to operate. | ||
2085 | */ | ||
2086 | static __inline void | ||
2087 | NETIO_PKT_INV_METADATA(netio_pkt_t* pkt) | ||
2088 | { | ||
2089 | } | ||
2090 | |||
2091 | |||
2092 | /** Flush and then invalidate a packet's metadata from the cache. | ||
2093 | * @ingroup ingress | ||
2094 | * | ||
2095 | * @param[in] pkt Packet on which to operate. | ||
2096 | */ | ||
2097 | static __inline void | ||
2098 | NETIO_PKT_FLUSH_INV_METADATA(netio_pkt_t* pkt) | ||
2099 | { | ||
2100 | } | ||
2101 | |||
2102 | /** Number of NUMA nodes we can distribute buffers to. | ||
2103 | * @ingroup setup */ | ||
2104 | #define NETIO_NUM_NODE_WEIGHTS 16 | ||
2105 | |||
2106 | /** | ||
2107 | * @brief An object for specifying the characteristics of NetIO communication | ||
2108 | * endpoint. | ||
2109 | * | ||
2110 | * @ingroup setup | ||
2111 | * | ||
2112 | * The @ref netio_input_register() function uses this structure to define | ||
2113 | * how an application tile will communicate with an IPP. | ||
2114 | * | ||
2115 | * | ||
2116 | * Future updates to NetIO may add new members to this structure, | ||
2117 | * which can affect the success of the registration operation. Thus, | ||
2118 | * if dynamically initializing the structure, applications are urged to | ||
2119 | * zero it out first, for example: | ||
2120 | * | ||
2121 | * @code | ||
2122 | * netio_input_config_t config; | ||
2123 | * memset(&config, 0, sizeof (config)); | ||
2124 | * config.flags = NETIO_RECV | NETIO_XMIT_CSUM | NETIO_TAG_NONE; | ||
2125 | * config.num_receive_packets = NETIO_MAX_RECEIVE_PKTS; | ||
2126 | * config.queue_id = 0; | ||
2127 | * . | ||
2128 | * . | ||
2129 | * . | ||
2130 | * @endcode | ||
2131 | * | ||
2132 | * since that guarantees that any unused structure members, including | ||
2133 | * members which did not exist when the application was first developed, | ||
2134 | * will not have unexpected values. | ||
2135 | * | ||
2136 | * If statically initializing the structure, we strongly recommend use of | ||
2137 | * C99-style named initializers, for example: | ||
2138 | * | ||
2139 | * @code | ||
2140 | * netio_input_config_t config = { | ||
2141 | * .flags = NETIO_RECV | NETIO_XMIT_CSUM | NETIO_TAG_NONE, | ||
2142 | * .num_receive_packets = NETIO_MAX_RECEIVE_PKTS, | ||
2143 | * .queue_id = 0, | ||
2144 | * }, | ||
2145 | * @endcode | ||
2146 | * | ||
2147 | * instead of the old-style structure initialization: | ||
2148 | * | ||
2149 | * @code | ||
2150 | * // Bad example! Currently equivalent to the above, but don't do this. | ||
2151 | * netio_input_config_t config = { | ||
2152 | * NETIO_RECV | NETIO_XMIT_CSUM | NETIO_TAG_NONE, NETIO_MAX_RECEIVE_PKTS, 0 | ||
2153 | * }, | ||
2154 | * @endcode | ||
2155 | * | ||
2156 | * since the C99 style requires no changes to the code if elements of the | ||
2157 | * config structure are rearranged. (It also makes the initialization much | ||
2158 | * easier to understand.) | ||
2159 | * | ||
2160 | * Except for items which address a particular tile's transmit or receive | ||
2161 | * characteristics, such as the ::NETIO_RECV flag, applications are advised | ||
2162 | * to specify the same set of configuration data on all registrations. | ||
2163 | * This prevents differing results if multiple tiles happen to do their | ||
2164 | * registration operations in a different order on different invocations of | ||
2165 | * the application. This is particularly important for things like link | ||
2166 | * management flags, and buffer size and homing specifications. | ||
2167 | * | ||
2168 | * Unless the ::NETIO_FIXED_BUFFER_VA flag is specified in flags, the NetIO | ||
2169 | * buffer pool is automatically created and mapped into the application's | ||
2170 | * virtual address space at an address chosen by the operating system, | ||
2171 | * using the common memory (cmem) facility in the Tilera Multicore | ||
2172 | * Components library. The cmem facility allows multiple processes to gain | ||
2173 | * access to shared memory which is mapped into each process at an | ||
2174 | * identical virtual address. In order for this to work, the processes | ||
2175 | * must have a common ancestor, which must create the common memory using | ||
2176 | * tmc_cmem_init(). | ||
2177 | * | ||
2178 | * In programs using the iLib process creation API, or in programs which use | ||
2179 | * only one process (which include programs using the pthreads library), | ||
2180 | * tmc_cmem_init() is called automatically. All other applications | ||
2181 | * must call it explicitly, before any child processes which might call | ||
2182 | * netio_input_register() are created. | ||
2183 | */ | ||
2184 | typedef struct | ||
2185 | { | ||
2186 | /** Registration characteristics. | ||
2187 | |||
2188 | This value determines several characteristics of the registration; | ||
2189 | flags for different types of behavior are ORed together to make the | ||
2190 | final flag value. Generally applications should specify exactly | ||
2191 | one flag from each of the following categories: | ||
2192 | |||
2193 | - Whether the application will be receiving packets on this queue | ||
2194 | (::NETIO_RECV or ::NETIO_NO_RECV). | ||
2195 | |||
2196 | - Whether the application will be transmitting packets on this queue, | ||
2197 | and if so, whether it will request egress checksum calculation | ||
2198 | (::NETIO_XMIT, ::NETIO_XMIT_CSUM, or ::NETIO_NO_XMIT). It is | ||
2199 | legal to call netio_get_buffer() without one of the XMIT flags, | ||
2200 | as long as ::NETIO_RECV is specified; in this case, the retrieved | ||
2201 | buffers must be passed to another tile for transmission. | ||
2202 | |||
2203 | - Whether the application expects any vendor-specific tags in | ||
2204 | its packets' L2 headers (::NETIO_TAG_NONE, ::NETIO_TAG_BRCM, | ||
2205 | or ::NETIO_TAG_MRVL). This must match the configuration of the | ||
2206 | target IPP. | ||
2207 | |||
2208 | To accommodate applications written to previous versions of the NetIO | ||
2209 | interface, none of the flags above are currently required; if omitted, | ||
2210 | NetIO behaves more or less as if ::NETIO_RECV | ::NETIO_XMIT_CSUM | | ||
2211 | ::NETIO_TAG_NONE were used. However, explicit specification of | ||
2212 | the relevant flags allows NetIO to do a better job of resource | ||
2213 | allocation, allows earlier detection of certain configuration errors, | ||
2214 | and may enable advanced features or higher performance in the future, | ||
2215 | so their use is strongly recommended. | ||
2216 | |||
2217 | Note that specifying ::NETIO_NO_RECV along with ::NETIO_NO_XMIT | ||
2218 | is a special case, intended primarily for use by programs which | ||
2219 | retrieve network statistics or do link management operations. | ||
2220 | When these flags are both specified, the resulting queue may not | ||
2221 | be used with NetIO routines other than netio_get(), netio_set(), | ||
2222 | and netio_input_unregister(). See @ref link for more information | ||
2223 | on link management. | ||
2224 | |||
2225 | Other flags are optional; their use is described below. | ||
2226 | */ | ||
2227 | int flags; | ||
2228 | |||
2229 | /** Interface name. This is a string which identifies the specific | ||
2230 | Ethernet controller hardware to be used. The format of the string | ||
2231 | is a device type and a device index, separated by a slash; so, | ||
2232 | the first 10 Gigabit Ethernet controller is named "xgbe/0", while | ||
2233 | the second 10/100/1000 Megabit Ethernet controller is named "gbe/1". | ||
2234 | */ | ||
2235 | const char* interface; | ||
2236 | |||
2237 | /** Receive packet queue size. This specifies the maximum number | ||
2238 | of ingress packets that can be received on this queue without | ||
2239 | being retrieved by @ref netio_get_packet(). If the IPP's distribution | ||
2240 | algorithm calls for a packet to be sent to this queue, and this | ||
2241 | number of packets are already pending there, the new packet | ||
2242 | will either be discarded, or sent to another tile registered | ||
2243 | for the same queue_id (see @ref drops). This value must | ||
2244 | be at least ::NETIO_MIN_RECEIVE_PKTS, can always be at least | ||
2245 | ::NETIO_MAX_RECEIVE_PKTS, and may be larger than that on certain | ||
2246 | interfaces. | ||
2247 | */ | ||
2248 | int num_receive_packets; | ||
2249 | |||
2250 | /** The queue ID being requested. Legal values for this range from 0 | ||
2251 | to ::NETIO_MAX_QUEUE_ID, inclusive. ::NETIO_MAX_QUEUE_ID is always | ||
2252 | greater than or equal to the number of tiles; this allows one queue | ||
2253 | for each tile, plus at least one additional queue. Some applications | ||
2254 | may wish to use the additional queue as a destination for unwanted | ||
2255 | packets, since packets delivered to queues for which no tiles have | ||
2256 | registered are discarded. | ||
2257 | */ | ||
2258 | unsigned int queue_id; | ||
2259 | |||
2260 | /** Maximum number of small send buffers to be held in the local empty | ||
2261 | buffer cache. This specifies the size of the area which holds | ||
2262 | empty small egress buffers requested from the IPP but not yet | ||
2263 | retrieved via @ref netio_get_buffer(). This value must be greater | ||
2264 | than zero if the application will ever use @ref netio_get_buffer() | ||
2265 | to allocate empty small egress buffers; it may be no larger than | ||
2266 | ::NETIO_MAX_SEND_BUFFERS. See @ref epp for more details on empty | ||
2267 | buffer caching. | ||
2268 | */ | ||
2269 | int num_send_buffers_small_total; | ||
2270 | |||
2271 | /** Number of small send buffers to be preallocated at registration. | ||
2272 | If this value is nonzero, the specified number of empty small egress | ||
2273 | buffers will be requested from the IPP during the netio_input_register | ||
2274 | operation; this may speed the execution of @ref netio_get_buffer(). | ||
2275 | This may be no larger than @ref num_send_buffers_small_total. See @ref | ||
2276 | epp for more details on empty buffer caching. | ||
2277 | */ | ||
2278 | int num_send_buffers_small_prealloc; | ||
2279 | |||
2280 | /** Maximum number of large send buffers to be held in the local empty | ||
2281 | buffer cache. This specifies the size of the area which holds empty | ||
2282 | large egress buffers requested from the IPP but not yet retrieved via | ||
2283 | @ref netio_get_buffer(). This value must be greater than zero if the | ||
2284 | application will ever use @ref netio_get_buffer() to allocate empty | ||
2285 | large egress buffers; it may be no larger than ::NETIO_MAX_SEND_BUFFERS. | ||
2286 | See @ref epp for more details on empty buffer caching. | ||
2287 | */ | ||
2288 | int num_send_buffers_large_total; | ||
2289 | |||
2290 | /** Number of large send buffers to be preallocated at registration. | ||
2291 | If this value is nonzero, the specified number of empty large egress | ||
2292 | buffers will be requested from the IPP during the netio_input_register | ||
2293 | operation; this may speed the execution of @ref netio_get_buffer(). | ||
2294 | This may be no larger than @ref num_send_buffers_large_total. See @ref | ||
2295 | epp for more details on empty buffer caching. | ||
2296 | */ | ||
2297 | int num_send_buffers_large_prealloc; | ||
2298 | |||
2299 | /** Maximum number of jumbo send buffers to be held in the local empty | ||
2300 | buffer cache. This specifies the size of the area which holds empty | ||
2301 | jumbo egress buffers requested from the IPP but not yet retrieved via | ||
2302 | @ref netio_get_buffer(). This value must be greater than zero if the | ||
2303 | application will ever use @ref netio_get_buffer() to allocate empty | ||
2304 | jumbo egress buffers; it may be no larger than ::NETIO_MAX_SEND_BUFFERS. | ||
2305 | See @ref epp for more details on empty buffer caching. | ||
2306 | */ | ||
2307 | int num_send_buffers_jumbo_total; | ||
2308 | |||
2309 | /** Number of jumbo send buffers to be preallocated at registration. | ||
2310 | If this value is nonzero, the specified number of empty jumbo egress | ||
2311 | buffers will be requested from the IPP during the netio_input_register | ||
2312 | operation; this may speed the execution of @ref netio_get_buffer(). | ||
2313 | This may be no larger than @ref num_send_buffers_jumbo_total. See @ref | ||
2314 | epp for more details on empty buffer caching. | ||
2315 | */ | ||
2316 | int num_send_buffers_jumbo_prealloc; | ||
2317 | |||
2318 | /** Total packet buffer size. This determines the total size, in bytes, | ||
2319 | of the NetIO buffer pool. Note that the maximum number of available | ||
2320 | buffers of each size is determined during hypervisor configuration | ||
2321 | (see the <em>System Programmer's Guide</em> for details); this just | ||
2322 | influences how much host memory is allocated for those buffers. | ||
2323 | |||
2324 | The buffer pool is allocated from common memory, which will be | ||
2325 | automatically initialized if needed. If your buffer pool is larger | ||
2326 | than 240 MB, you might need to explicitly call @c tmc_cmem_init(), | ||
2327 | as described in the Application Libraries Reference Manual (UG227). | ||
2328 | |||
2329 | Packet buffers are currently allocated in chunks of 16 MB; this | ||
2330 | value will be rounded up to the next larger multiple of 16 MB. | ||
2331 | If this value is zero, a default of 32 MB will be used; this was | ||
2332 | the value used by previous versions of NetIO. Note that taking this | ||
2333 | default also affects the placement of buffers on Linux NUMA nodes. | ||
2334 | See @ref buffer_node_weights for an explanation of buffer placement. | ||
2335 | |||
2336 | In order to successfully allocate packet buffers, Linux must have | ||
2337 | available huge pages on the relevant Linux NUMA nodes. See the | ||
2338 | <em>System Programmer's Guide</em> for information on configuring | ||
2339 | huge page support in Linux. | ||
2340 | */ | ||
2341 | uint64_t total_buffer_size; | ||
2342 | |||
2343 | /** Buffer placement weighting factors. | ||
2344 | |||
2345 | This array specifies the relative amount of buffering to place | ||
2346 | on each of the available Linux NUMA nodes. This array is | ||
2347 | indexed by the NUMA node, and the values in the array are | ||
2348 | proportional to the amount of buffer space to allocate on that | ||
2349 | node. | ||
2350 | |||
2351 | If memory striping is enabled in the Hypervisor, then there is | ||
2352 | only one logical NUMA node (node 0). In that case, NetIO will by | ||
2353 | default ignore the suggested buffer node weights, and buffers | ||
2354 | will be striped across the physical memory controllers. See | ||
2355 | UG209 System Programmer's Guide for a description of the | ||
2356 | hypervisor option that controls memory striping. | ||
2357 | |||
2358 | If memory striping is disabled, then there are up to four NUMA | ||
2359 | nodes, corresponding to the four DDRAM controllers in the TILE | ||
2360 | processor architecture. See UG100 Tile Processor Architecture | ||
2361 | Overview for a diagram showing the location of each of the DDRAM | ||
2362 | controllers relative to the tile array. | ||
2363 | |||
2364 | For instance, if memory striping is disabled, the following | ||
2365 | configuration strucure: | ||
2366 | |||
2367 | @code | ||
2368 | netio_input_config_t config = { | ||
2369 | . | ||
2370 | . | ||
2371 | . | ||
2372 | .total_buffer_size = 4 * 16 * 1024 * 1024; | ||
2373 | .buffer_node_weights = { 1, 0, 1, 0 }, | ||
2374 | }, | ||
2375 | @endcode | ||
2376 | |||
2377 | would result in 32 MB of buffers being placed on controller 0, and | ||
2378 | 32 MB on controller 2. (Since buffers are allocated in units of | ||
2379 | 16 MB, some sets of weights will not be able to be matched exactly.) | ||
2380 | |||
2381 | For the weights to be effective, @ref total_buffer_size must be | ||
2382 | nonzero. If @ref total_buffer_size is zero, causing the default | ||
2383 | 32 MB of buffer space to be used, then any specified weights will | ||
2384 | be ignored, and buffers will positioned as they were in previous | ||
2385 | versions of NetIO: | ||
2386 | |||
2387 | - For xgbe/0 and gbe/0, 16 MB of buffers will be placed on controller 1, | ||
2388 | and the other 16 MB will be placed on controller 2. | ||
2389 | |||
2390 | - For xgbe/1 and gbe/1, 16 MB of buffers will be placed on controller 2, | ||
2391 | and the other 16 MB will be placed on controller 3. | ||
2392 | |||
2393 | If @ref total_buffer_size is nonzero, but all weights are zero, | ||
2394 | then all buffer space will be allocated on Linux NUMA node zero. | ||
2395 | |||
2396 | By default, the specified buffer placement is treated as a hint; | ||
2397 | if sufficient free memory is not available on the specified | ||
2398 | controllers, the buffers will be allocated elsewhere. However, | ||
2399 | if the ::NETIO_STRICT_HOMING flag is specified in @ref flags, then a | ||
2400 | failure to allocate buffer space exactly as requested will cause the | ||
2401 | registration operation to fail with an error of ::NETIO_CANNOT_HOME. | ||
2402 | |||
2403 | Note that maximal network performance cannot be achieved with | ||
2404 | only one memory controller. | ||
2405 | */ | ||
2406 | uint8_t buffer_node_weights[NETIO_NUM_NODE_WEIGHTS]; | ||
2407 | |||
2408 | /** Fixed virtual address for packet buffers. Only valid when | ||
2409 | ::NETIO_FIXED_BUFFER_VA is specified in @ref flags; see the | ||
2410 | description of that flag for details. | ||
2411 | */ | ||
2412 | void* fixed_buffer_va; | ||
2413 | |||
2414 | /** | ||
2415 | Maximum number of outstanding send packet requests. This value is | ||
2416 | only relevant when an EPP is in use; it determines the number of | ||
2417 | slots in the EPP's outgoing packet queue which this tile is allowed | ||
2418 | to consume, and thus the number of packets which may be sent before | ||
2419 | the sending tile must wait for an acknowledgment from the EPP. | ||
2420 | Modifying this value is generally only helpful when using @ref | ||
2421 | netio_send_packet_vector(), where it can help improve performance by | ||
2422 | allowing a single vector send operation to process more packets. | ||
2423 | Typically it is not specified, and the default, which divides the | ||
2424 | outgoing packet slots evenly between all tiles on the chip, is used. | ||
2425 | |||
2426 | If a registration asks for more outgoing packet queue slots than are | ||
2427 | available, ::NETIO_TOOMANY_XMIT will be returned. The total number | ||
2428 | of packet queue slots which are available for all tiles for each EPP | ||
2429 | is subject to change, but is currently ::NETIO_TOTAL_SENDS_OUTSTANDING. | ||
2430 | |||
2431 | |||
2432 | This value is ignored if ::NETIO_XMIT is not specified in flags. | ||
2433 | If you want to specify a large value here for a specific tile, you are | ||
2434 | advised to specify NETIO_NO_XMIT on other, non-transmitting tiles so | ||
2435 | that they do not consume a default number of packet slots. Any tile | ||
2436 | transmitting is required to have at least ::NETIO_MIN_SENDS_OUTSTANDING | ||
2437 | slots allocated to it; values less than that will be silently | ||
2438 | increased by the NetIO library. | ||
2439 | */ | ||
2440 | int num_sends_outstanding; | ||
2441 | } | ||
2442 | netio_input_config_t; | ||
2443 | |||
2444 | |||
2445 | /** Registration flags; used in the @ref netio_input_config_t structure. | ||
2446 | * @addtogroup setup | ||
2447 | */ | ||
2448 | /** @{ */ | ||
2449 | |||
2450 | /** Fail a registration request if we can't put packet buffers | ||
2451 | on the specified memory controllers. */ | ||
2452 | #define NETIO_STRICT_HOMING 0x00000002 | ||
2453 | |||
2454 | /** This application expects no tags on its L2 headers. */ | ||
2455 | #define NETIO_TAG_NONE 0x00000004 | ||
2456 | |||
2457 | /** This application expects Marvell extended tags on its L2 headers. */ | ||
2458 | #define NETIO_TAG_MRVL 0x00000008 | ||
2459 | |||
2460 | /** This application expects Broadcom tags on its L2 headers. */ | ||
2461 | #define NETIO_TAG_BRCM 0x00000010 | ||
2462 | |||
2463 | /** This registration may call routines which receive packets. */ | ||
2464 | #define NETIO_RECV 0x00000020 | ||
2465 | |||
2466 | /** This registration may not call routines which receive packets. */ | ||
2467 | #define NETIO_NO_RECV 0x00000040 | ||
2468 | |||
2469 | /** This registration may call routines which transmit packets. */ | ||
2470 | #define NETIO_XMIT 0x00000080 | ||
2471 | |||
2472 | /** This registration may call routines which transmit packets with | ||
2473 | checksum acceleration. */ | ||
2474 | #define NETIO_XMIT_CSUM 0x00000100 | ||
2475 | |||
2476 | /** This registration may not call routines which transmit packets. */ | ||
2477 | #define NETIO_NO_XMIT 0x00000200 | ||
2478 | |||
2479 | /** This registration wants NetIO buffers mapped at an application-specified | ||
2480 | virtual address. | ||
2481 | |||
2482 | NetIO buffers are by default created by the TMC common memory facility, | ||
2483 | which must be configured by a common ancestor of all processes sharing | ||
2484 | a network interface. When this flag is specified, NetIO buffers are | ||
2485 | instead mapped at an address chosen by the application (and specified | ||
2486 | in @ref netio_input_config_t::fixed_buffer_va). This allows multiple | ||
2487 | unrelated but cooperating processes to share a NetIO interface. | ||
2488 | All processes sharing the same interface must specify this flag, | ||
2489 | and all must specify the same fixed virtual address. | ||
2490 | |||
2491 | @ref netio_input_config_t::fixed_buffer_va must be a | ||
2492 | multiple of 16 MB, and the packet buffers will occupy @ref | ||
2493 | netio_input_config_t::total_buffer_size bytes of virtual address | ||
2494 | space, beginning at that address. If any of those virtual addresses | ||
2495 | are currently occupied by other memory objects, like application or | ||
2496 | shared library code or data, @ref netio_input_register() will return | ||
2497 | ::NETIO_FAULT. While it is impossible to provide a fixed_buffer_va | ||
2498 | which will work for all applications, a good first guess might be to | ||
2499 | use 0xb0000000 minus @ref netio_input_config_t::total_buffer_size. | ||
2500 | If that fails, it might be helpful to consult the running application's | ||
2501 | virtual address description file (/proc/<em>pid</em>/maps) to see | ||
2502 | which regions of virtual address space are available. | ||
2503 | */ | ||
2504 | #define NETIO_FIXED_BUFFER_VA 0x00000400 | ||
2505 | |||
2506 | /** This registration call will not complete unless the network link | ||
2507 | is up. The process will wait several seconds for this to happen (the | ||
2508 | precise interval is link-dependent), but if the link does not come up, | ||
2509 | ::NETIO_LINK_DOWN will be returned. This flag is the default if | ||
2510 | ::NETIO_NOREQUIRE_LINK_UP is not specified. Note that this flag by | ||
2511 | itself does not request that the link be brought up; that can be done | ||
2512 | with the ::NETIO_AUTO_LINK_UPDN or ::NETIO_AUTO_LINK_UP flags (the | ||
2513 | latter is the default if no NETIO_AUTO_LINK_xxx flags are specified), | ||
2514 | or by explicitly setting the link's desired state via netio_set(). | ||
2515 | If the link is not brought up by one of those methods, and this flag | ||
2516 | is specified, the registration operation will return ::NETIO_LINK_DOWN. | ||
2517 | This flag is ignored if it is specified along with ::NETIO_NO_XMIT and | ||
2518 | ::NETIO_NO_RECV. See @ref link for more information on link | ||
2519 | management. | ||
2520 | */ | ||
2521 | #define NETIO_REQUIRE_LINK_UP 0x00000800 | ||
2522 | |||
2523 | /** This registration call will complete even if the network link is not up. | ||
2524 | Whenever the link is not up, packets will not be sent or received: | ||
2525 | netio_get_packet() will return ::NETIO_NOPKT once all queued packets | ||
2526 | have been drained, and netio_send_packet() and similar routines will | ||
2527 | return NETIO_QUEUE_FULL once the outgoing packet queue in the EPP | ||
2528 | or the I/O shim is full. See @ref link for more information on link | ||
2529 | management. | ||
2530 | */ | ||
2531 | #define NETIO_NOREQUIRE_LINK_UP 0x00001000 | ||
2532 | |||
2533 | #ifndef __DOXYGEN__ | ||
2534 | /* | ||
2535 | * These are part of the implementation of the NETIO_AUTO_LINK_xxx flags, | ||
2536 | * but should not be used directly by applications, and are thus not | ||
2537 | * documented. | ||
2538 | */ | ||
2539 | #define _NETIO_AUTO_UP 0x00002000 | ||
2540 | #define _NETIO_AUTO_DN 0x00004000 | ||
2541 | #define _NETIO_AUTO_PRESENT 0x00008000 | ||
2542 | #endif | ||
2543 | |||
2544 | /** Set the desired state of the link to up, allowing any speeds which are | ||
2545 | supported by the link hardware, as part of this registration operation. | ||
2546 | Do not take down the link automatically. This is the default if | ||
2547 | no other NETIO_AUTO_LINK_xxx flags are specified. This flag is ignored | ||
2548 | if it is specified along with ::NETIO_NO_XMIT and ::NETIO_NO_RECV. | ||
2549 | See @ref link for more information on link management. | ||
2550 | */ | ||
2551 | #define NETIO_AUTO_LINK_UP (_NETIO_AUTO_PRESENT | _NETIO_AUTO_UP) | ||
2552 | |||
2553 | /** Set the desired state of the link to up, allowing any speeds which are | ||
2554 | supported by the link hardware, as part of this registration operation. | ||
2555 | Set the desired state of the link to down the next time no tiles are | ||
2556 | registered for packet reception or transmission. This flag is ignored | ||
2557 | if it is specified along with ::NETIO_NO_XMIT and ::NETIO_NO_RECV. | ||
2558 | See @ref link for more information on link management. | ||
2559 | */ | ||
2560 | #define NETIO_AUTO_LINK_UPDN (_NETIO_AUTO_PRESENT | _NETIO_AUTO_UP | \ | ||
2561 | _NETIO_AUTO_DN) | ||
2562 | |||
2563 | /** Set the desired state of the link to down the next time no tiles are | ||
2564 | registered for packet reception or transmission. This flag is ignored | ||
2565 | if it is specified along with ::NETIO_NO_XMIT and ::NETIO_NO_RECV. | ||
2566 | See @ref link for more information on link management. | ||
2567 | */ | ||
2568 | #define NETIO_AUTO_LINK_DN (_NETIO_AUTO_PRESENT | _NETIO_AUTO_DN) | ||
2569 | |||
2570 | /** Do not bring up the link automatically as part of this registration | ||
2571 | operation. Do not take down the link automatically. This flag | ||
2572 | is ignored if it is specified along with ::NETIO_NO_XMIT and | ||
2573 | ::NETIO_NO_RECV. See @ref link for more information on link management. | ||
2574 | */ | ||
2575 | #define NETIO_AUTO_LINK_NONE _NETIO_AUTO_PRESENT | ||
2576 | |||
2577 | |||
2578 | /** Minimum number of receive packets. */ | ||
2579 | #define NETIO_MIN_RECEIVE_PKTS 16 | ||
2580 | |||
2581 | /** Lower bound on the maximum number of receive packets; may be higher | ||
2582 | than this on some interfaces. */ | ||
2583 | #define NETIO_MAX_RECEIVE_PKTS 128 | ||
2584 | |||
2585 | /** Maximum number of send buffers, per packet size. */ | ||
2586 | #define NETIO_MAX_SEND_BUFFERS 16 | ||
2587 | |||
2588 | /** Number of EPP queue slots, and thus outstanding sends, per EPP. */ | ||
2589 | #define NETIO_TOTAL_SENDS_OUTSTANDING 2015 | ||
2590 | |||
2591 | /** Minimum number of EPP queue slots, and thus outstanding sends, per | ||
2592 | * transmitting tile. */ | ||
2593 | #define NETIO_MIN_SENDS_OUTSTANDING 16 | ||
2594 | |||
2595 | |||
2596 | /**@}*/ | ||
2597 | |||
2598 | #ifndef __DOXYGEN__ | ||
2599 | |||
2600 | /** | ||
2601 | * An object for providing Ethernet packets to a process. | ||
2602 | */ | ||
2603 | struct __netio_queue_impl_t; | ||
2604 | |||
2605 | /** | ||
2606 | * An object for managing the user end of a NetIO queue. | ||
2607 | */ | ||
2608 | struct __netio_queue_user_impl_t; | ||
2609 | |||
2610 | #endif /* !__DOXYGEN__ */ | ||
2611 | |||
2612 | |||
2613 | /** A netio_queue_t describes a NetIO communications endpoint. | ||
2614 | * @ingroup setup | ||
2615 | */ | ||
2616 | typedef struct | ||
2617 | { | ||
2618 | #ifdef __DOXYGEN__ | ||
2619 | uint8_t opaque[8]; /**< This is an opaque structure. */ | ||
2620 | #else | ||
2621 | struct __netio_queue_impl_t* __system_part; /**< The system part. */ | ||
2622 | struct __netio_queue_user_impl_t* __user_part; /**< The user part. */ | ||
2623 | #ifdef _NETIO_PTHREAD | ||
2624 | _netio_percpu_mutex_t lock; /**< Queue lock. */ | ||
2625 | #endif | ||
2626 | #endif | ||
2627 | } | ||
2628 | netio_queue_t; | ||
2629 | |||
2630 | |||
2631 | /** | ||
2632 | * @brief Packet send context. | ||
2633 | * | ||
2634 | * @ingroup egress | ||
2635 | * | ||
2636 | * Packet send context for use with netio_send_packet_prepare and _commit. | ||
2637 | */ | ||
2638 | typedef struct | ||
2639 | { | ||
2640 | #ifdef __DOXYGEN__ | ||
2641 | uint8_t opaque[44]; /**< This is an opaque structure. */ | ||
2642 | #else | ||
2643 | uint8_t flags; /**< Defined below */ | ||
2644 | uint8_t datalen; /**< Number of valid words pointed to by data. */ | ||
2645 | uint32_t request[9]; /**< Request to be sent to the EPP or shim. Note | ||
2646 | that this is smaller than the 11-word maximum | ||
2647 | request size, since some constant values are | ||
2648 | not saved in the context. */ | ||
2649 | uint32_t *data; /**< Data to be sent to the EPP or shim via IDN. */ | ||
2650 | #endif | ||
2651 | } | ||
2652 | netio_send_pkt_context_t; | ||
2653 | |||
2654 | |||
2655 | #ifndef __DOXYGEN__ | ||
2656 | #define SEND_PKT_CTX_USE_EPP 1 /**< We're sending to an EPP. */ | ||
2657 | #define SEND_PKT_CTX_SEND_CSUM 2 /**< Request includes a checksum. */ | ||
2658 | #endif | ||
2659 | |||
2660 | /** | ||
2661 | * @brief Packet vector entry. | ||
2662 | * | ||
2663 | * @ingroup egress | ||
2664 | * | ||
2665 | * This data structure is used with netio_send_packet_vector() to send multiple | ||
2666 | * packets with one NetIO call. The structure should be initialized by | ||
2667 | * calling netio_pkt_vector_set(), rather than by setting the fields | ||
2668 | * directly. | ||
2669 | * | ||
2670 | * This structure is guaranteed to be a power of two in size, no | ||
2671 | * bigger than one L2 cache line, and to be aligned modulo its size. | ||
2672 | */ | ||
2673 | typedef struct | ||
2674 | #ifndef __DOXYGEN__ | ||
2675 | __attribute__((aligned(8))) | ||
2676 | #endif | ||
2677 | { | ||
2678 | /** Reserved for use by the user application. When initialized with | ||
2679 | * the netio_set_pkt_vector_entry() function, this field is guaranteed | ||
2680 | * to be visible to readers only after all other fields are already | ||
2681 | * visible. This way it can be used as a valid flag or generation | ||
2682 | * counter. */ | ||
2683 | uint8_t user_data; | ||
2684 | |||
2685 | /* Structure members below this point should not be accessed directly by | ||
2686 | * applications, as they may change in the future. */ | ||
2687 | |||
2688 | /** Low 8 bits of the packet address to send. The high bits are | ||
2689 | * acquired from the 'handle' field. */ | ||
2690 | uint8_t buffer_address_low; | ||
2691 | |||
2692 | /** Number of bytes to transmit. */ | ||
2693 | uint16_t size; | ||
2694 | |||
2695 | /** The raw handle from a netio_pkt_t. If this is NETIO_PKT_HANDLE_NONE, | ||
2696 | * this vector entry will be skipped and no packet will be transmitted. */ | ||
2697 | netio_pkt_handle_t handle; | ||
2698 | } | ||
2699 | netio_pkt_vector_entry_t; | ||
2700 | |||
2701 | |||
2702 | /** | ||
2703 | * @brief Initialize fields in a packet vector entry. | ||
2704 | * | ||
2705 | * @ingroup egress | ||
2706 | * | ||
2707 | * @param[out] v Pointer to the vector entry to be initialized. | ||
2708 | * @param[in] pkt Packet to be transmitted when the vector entry is passed to | ||
2709 | * netio_send_packet_vector(). Note that the packet's attributes | ||
2710 | * (e.g., its L2 offset and length) are captured at the time this | ||
2711 | * routine is called; subsequent changes in those attributes will not | ||
2712 | * be reflected in the packet which is actually transmitted. | ||
2713 | * Changes in the packet's contents, however, will be so reflected. | ||
2714 | * If this is NULL, no packet will be transmitted. | ||
2715 | * @param[in] user_data User data to be set in the vector entry. | ||
2716 | * This function guarantees that the "user_data" field will become | ||
2717 | * visible to a reader only after all other fields have become visible. | ||
2718 | * This allows a structure in a ring buffer to be written and read | ||
2719 | * by a polling reader without any locks or other synchronization. | ||
2720 | */ | ||
2721 | static __inline void | ||
2722 | netio_pkt_vector_set(volatile netio_pkt_vector_entry_t* v, netio_pkt_t* pkt, | ||
2723 | uint8_t user_data) | ||
2724 | { | ||
2725 | if (pkt) | ||
2726 | { | ||
2727 | if (NETIO_PKT_IS_MINIMAL(pkt)) | ||
2728 | { | ||
2729 | netio_pkt_minimal_metadata_t* mmd = | ||
2730 | (netio_pkt_minimal_metadata_t*) &pkt->__metadata; | ||
2731 | v->buffer_address_low = (uintptr_t) NETIO_PKT_L2_DATA_MM(mmd, pkt) & 0xFF; | ||
2732 | v->size = NETIO_PKT_L2_LENGTH_MM(mmd, pkt); | ||
2733 | } | ||
2734 | else | ||
2735 | { | ||
2736 | netio_pkt_metadata_t* mda = &pkt->__metadata; | ||
2737 | v->buffer_address_low = (uintptr_t) NETIO_PKT_L2_DATA_M(mda, pkt) & 0xFF; | ||
2738 | v->size = NETIO_PKT_L2_LENGTH_M(mda, pkt); | ||
2739 | } | ||
2740 | v->handle.word = pkt->__packet.word; | ||
2741 | } | ||
2742 | else | ||
2743 | { | ||
2744 | v->handle.word = 0; /* Set handle to NETIO_PKT_HANDLE_NONE. */ | ||
2745 | } | ||
2746 | |||
2747 | __asm__("" : : : "memory"); | ||
2748 | |||
2749 | v->user_data = user_data; | ||
2750 | } | ||
2751 | |||
2752 | |||
2753 | /** | ||
2754 | * Flags and structures for @ref netio_get() and @ref netio_set(). | ||
2755 | * @ingroup config | ||
2756 | */ | ||
2757 | |||
2758 | /** @{ */ | ||
2759 | /** Parameter class; addr is a NETIO_PARAM_xxx value. */ | ||
2760 | #define NETIO_PARAM 0 | ||
2761 | /** Interface MAC address. This address is only valid with @ref netio_get(). | ||
2762 | * The value is a 6-byte MAC address. Depending upon the overall system | ||
2763 | * design, a MAC address may or may not be available for each interface. */ | ||
2764 | #define NETIO_PARAM_MAC 0 | ||
2765 | |||
2766 | /** Determine whether to suspend output on the receipt of pause frames. | ||
2767 | * If the value is nonzero, the I/O shim will suspend output when a pause | ||
2768 | * frame is received. If the value is zero, pause frames will be ignored. */ | ||
2769 | #define NETIO_PARAM_PAUSE_IN 1 | ||
2770 | |||
2771 | /** Determine whether to send pause frames if the I/O shim packet FIFOs are | ||
2772 | * nearly full. If the value is zero, pause frames are not sent. If | ||
2773 | * the value is nonzero, it is the delay value which will be sent in any | ||
2774 | * pause frames which are output, in units of 512 bit times. */ | ||
2775 | #define NETIO_PARAM_PAUSE_OUT 2 | ||
2776 | |||
2777 | /** Jumbo frame support. The value is a 4-byte integer. If the value is | ||
2778 | * nonzero, the MAC will accept frames of up to 10240 bytes. If the value | ||
2779 | * is zero, the MAC will only accept frames of up to 1544 bytes. */ | ||
2780 | #define NETIO_PARAM_JUMBO 3 | ||
2781 | |||
2782 | /** I/O shim's overflow statistics register. The value is two 16-bit integers. | ||
2783 | * The first 16-bit value (or the low 16 bits, if the value is treated as a | ||
2784 | * 32-bit number) is the count of packets which were completely dropped and | ||
2785 | * not delivered by the shim. The second 16-bit value (or the high 16 bits, | ||
2786 | * if the value is treated as a 32-bit number) is the count of packets | ||
2787 | * which were truncated and thus only partially delivered by the shim. This | ||
2788 | * register is automatically reset to zero after it has been read. | ||
2789 | */ | ||
2790 | #define NETIO_PARAM_OVERFLOW 4 | ||
2791 | |||
2792 | /** IPP statistics. This address is only valid with @ref netio_get(). The | ||
2793 | * value is a netio_stat_t structure. Unlike the I/O shim statistics, the | ||
2794 | * IPP statistics are not all reset to zero on read; see the description | ||
2795 | * of the netio_stat_t for details. */ | ||
2796 | #define NETIO_PARAM_STAT 5 | ||
2797 | |||
2798 | /** Possible link state. The value is a combination of "NETIO_LINK_xxx" | ||
2799 | * flags. With @ref netio_get(), this will indicate which flags are | ||
2800 | * actually supported by the hardware. | ||
2801 | * | ||
2802 | * For historical reasons, specifying this value to netio_set() will have | ||
2803 | * the same behavior as using ::NETIO_PARAM_LINK_CONFIG, but this usage is | ||
2804 | * discouraged. | ||
2805 | */ | ||
2806 | #define NETIO_PARAM_LINK_POSSIBLE_STATE 6 | ||
2807 | |||
2808 | /** Link configuration. The value is a combination of "NETIO_LINK_xxx" flags. | ||
2809 | * With @ref netio_set(), this will attempt to immediately bring up the | ||
2810 | * link using whichever of the requested flags are supported by the | ||
2811 | * hardware, or take down the link if the flags are zero; if this is | ||
2812 | * not possible, an error will be returned. Many programs will want | ||
2813 | * to use ::NETIO_PARAM_LINK_DESIRED_STATE instead. | ||
2814 | * | ||
2815 | * For historical reasons, specifying this value to netio_get() will | ||
2816 | * have the same behavior as using ::NETIO_PARAM_LINK_POSSIBLE_STATE, | ||
2817 | * but this usage is discouraged. | ||
2818 | */ | ||
2819 | #define NETIO_PARAM_LINK_CONFIG NETIO_PARAM_LINK_POSSIBLE_STATE | ||
2820 | |||
2821 | /** Current link state. This address is only valid with @ref netio_get(). | ||
2822 | * The value is zero or more of the "NETIO_LINK_xxx" flags, ORed together. | ||
2823 | * If the link is down, the value ANDed with NETIO_LINK_SPEED will be | ||
2824 | * zero; if the link is up, the value ANDed with NETIO_LINK_SPEED will | ||
2825 | * result in exactly one of the NETIO_LINK_xxx values, indicating the | ||
2826 | * current speed. */ | ||
2827 | #define NETIO_PARAM_LINK_CURRENT_STATE 7 | ||
2828 | |||
2829 | /** Variant symbol for current state, retained for compatibility with | ||
2830 | * pre-MDE-2.1 programs. */ | ||
2831 | #define NETIO_PARAM_LINK_STATUS NETIO_PARAM_LINK_CURRENT_STATE | ||
2832 | |||
2833 | /** Packet Coherence protocol. This address is only valid with @ref netio_get(). | ||
2834 | * The value is nonzero if the interface is configured for cache-coherent DMA. | ||
2835 | */ | ||
2836 | #define NETIO_PARAM_COHERENT 8 | ||
2837 | |||
2838 | /** Desired link state. The value is a conbination of "NETIO_LINK_xxx" | ||
2839 | * flags, which specify the desired state for the link. With @ref | ||
2840 | * netio_set(), this will, in the background, attempt to bring up the link | ||
2841 | * using whichever of the requested flags are reasonable, or take down the | ||
2842 | * link if the flags are zero. The actual link up or down operation may | ||
2843 | * happen after this call completes. If the link state changes in the | ||
2844 | * future, the system will continue to try to get back to the desired link | ||
2845 | * state; for instance, if the link is brought up successfully, and then | ||
2846 | * the network cable is disconnected, the link will go down. However, the | ||
2847 | * desired state of the link is still up, so if the cable is reconnected, | ||
2848 | * the link will be brought up again. | ||
2849 | * | ||
2850 | * With @ref netio_get(), this will indicate the desired state for the | ||
2851 | * link, as set with a previous netio_set() call, or implicitly by a | ||
2852 | * netio_input_register() or netio_input_unregister() operation. This may | ||
2853 | * not reflect the current state of the link; to get that, use | ||
2854 | * ::NETIO_PARAM_LINK_CURRENT_STATE. */ | ||
2855 | #define NETIO_PARAM_LINK_DESIRED_STATE 9 | ||
2856 | |||
2857 | /** NetIO statistics structure. Retrieved using the ::NETIO_PARAM_STAT | ||
2858 | * address passed to @ref netio_get(). */ | ||
2859 | typedef struct | ||
2860 | { | ||
2861 | /** Number of packets which have been received by the IPP and forwarded | ||
2862 | * to a tile's receive queue for processing. This value wraps at its | ||
2863 | * maximum, and is not cleared upon read. */ | ||
2864 | uint32_t packets_received; | ||
2865 | |||
2866 | /** Number of packets which have been dropped by the IPP, because they could | ||
2867 | * not be received, or could not be forwarded to a tile. The former happens | ||
2868 | * when the IPP does not have a free packet buffer of suitable size for an | ||
2869 | * incoming frame. The latter happens when all potential destination tiles | ||
2870 | * for a packet, as defined by the group, bucket, and queue configuration, | ||
2871 | * have full receive queues. This value wraps at its maximum, and is not | ||
2872 | * cleared upon read. */ | ||
2873 | uint32_t packets_dropped; | ||
2874 | |||
2875 | /* | ||
2876 | * Note: the #defines after each of the following four one-byte values | ||
2877 | * denote their location within the third word of the netio_stat_t. They | ||
2878 | * are intended for use only by the IPP implementation and are thus omitted | ||
2879 | * from the Doxygen output. | ||
2880 | */ | ||
2881 | |||
2882 | /** Number of packets dropped because no worker was able to accept a new | ||
2883 | * packet. This value saturates at its maximum, and is cleared upon | ||
2884 | * read. */ | ||
2885 | uint8_t drops_no_worker; | ||
2886 | #ifndef __DOXYGEN__ | ||
2887 | #define NETIO_STAT_DROPS_NO_WORKER 0 | ||
2888 | #endif | ||
2889 | |||
2890 | /** Number of packets dropped because no small buffers were available. | ||
2891 | * This value saturates at its maximum, and is cleared upon read. */ | ||
2892 | uint8_t drops_no_smallbuf; | ||
2893 | #ifndef __DOXYGEN__ | ||
2894 | #define NETIO_STAT_DROPS_NO_SMALLBUF 1 | ||
2895 | #endif | ||
2896 | |||
2897 | /** Number of packets dropped because no large buffers were available. | ||
2898 | * This value saturates at its maximum, and is cleared upon read. */ | ||
2899 | uint8_t drops_no_largebuf; | ||
2900 | #ifndef __DOXYGEN__ | ||
2901 | #define NETIO_STAT_DROPS_NO_LARGEBUF 2 | ||
2902 | #endif | ||
2903 | |||
2904 | /** Number of packets dropped because no jumbo buffers were available. | ||
2905 | * This value saturates at its maximum, and is cleared upon read. */ | ||
2906 | uint8_t drops_no_jumbobuf; | ||
2907 | #ifndef __DOXYGEN__ | ||
2908 | #define NETIO_STAT_DROPS_NO_JUMBOBUF 3 | ||
2909 | #endif | ||
2910 | } | ||
2911 | netio_stat_t; | ||
2912 | |||
2913 | |||
2914 | /** Link can run, should run, or is running at 10 Mbps. */ | ||
2915 | #define NETIO_LINK_10M 0x01 | ||
2916 | |||
2917 | /** Link can run, should run, or is running at 100 Mbps. */ | ||
2918 | #define NETIO_LINK_100M 0x02 | ||
2919 | |||
2920 | /** Link can run, should run, or is running at 1 Gbps. */ | ||
2921 | #define NETIO_LINK_1G 0x04 | ||
2922 | |||
2923 | /** Link can run, should run, or is running at 10 Gbps. */ | ||
2924 | #define NETIO_LINK_10G 0x08 | ||
2925 | |||
2926 | /** Link should run at the highest speed supported by the link and by | ||
2927 | * the device connected to the link. Only usable as a value for | ||
2928 | * the link's desired state; never returned as a value for the current | ||
2929 | * or possible states. */ | ||
2930 | #define NETIO_LINK_ANYSPEED 0x10 | ||
2931 | |||
2932 | /** All legal link speeds. */ | ||
2933 | #define NETIO_LINK_SPEED (NETIO_LINK_10M | \ | ||
2934 | NETIO_LINK_100M | \ | ||
2935 | NETIO_LINK_1G | \ | ||
2936 | NETIO_LINK_10G | \ | ||
2937 | NETIO_LINK_ANYSPEED) | ||
2938 | |||
2939 | |||
2940 | /** MAC register class. Addr is a register offset within the MAC. | ||
2941 | * Registers within the XGbE and GbE MACs are documented in the Tile | ||
2942 | * Processor I/O Device Guide (UG104). MAC registers start at address | ||
2943 | * 0x4000, and do not include the MAC_INTERFACE registers. */ | ||
2944 | #define NETIO_MAC 1 | ||
2945 | |||
2946 | /** MDIO register class (IEEE 802.3 clause 22 format). Addr is the "addr" | ||
2947 | * member of a netio_mdio_addr_t structure. */ | ||
2948 | #define NETIO_MDIO 2 | ||
2949 | |||
2950 | /** MDIO register class (IEEE 802.3 clause 45 format). Addr is the "addr" | ||
2951 | * member of a netio_mdio_addr_t structure. */ | ||
2952 | #define NETIO_MDIO_CLAUSE45 3 | ||
2953 | |||
2954 | /** NetIO MDIO address type. Retrieved or provided using the ::NETIO_MDIO | ||
2955 | * address passed to @ref netio_get() or @ref netio_set(). */ | ||
2956 | typedef union | ||
2957 | { | ||
2958 | struct | ||
2959 | { | ||
2960 | unsigned int reg:16; /**< MDIO register offset. For clause 22 access, | ||
2961 | must be less than 32. */ | ||
2962 | unsigned int phy:5; /**< Which MDIO PHY to access. */ | ||
2963 | unsigned int dev:5; /**< Which MDIO device to access within that PHY. | ||
2964 | Applicable for clause 45 access only; ignored | ||
2965 | for clause 22 access. */ | ||
2966 | } | ||
2967 | bits; /**< Container for bitfields. */ | ||
2968 | uint64_t addr; /**< Value to pass to @ref netio_get() or | ||
2969 | * @ref netio_set(). */ | ||
2970 | } | ||
2971 | netio_mdio_addr_t; | ||
2972 | |||
2973 | /** @} */ | ||
2974 | |||
2975 | #endif /* __NETIO_INTF_H__ */ | ||
diff --git a/arch/tile/kernel/Makefile b/arch/tile/kernel/Makefile index 112b1e248f05..b4c8e8ec45dc 100644 --- a/arch/tile/kernel/Makefile +++ b/arch/tile/kernel/Makefile | |||
@@ -15,3 +15,4 @@ obj-$(CONFIG_SMP) += smpboot.o smp.o tlb.o | |||
15 | obj-$(CONFIG_MODULES) += module.o | 15 | obj-$(CONFIG_MODULES) += module.o |
16 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 16 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
17 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | 17 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o |
18 | obj-$(CONFIG_PCI) += pci.o | ||
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c new file mode 100644 index 000000000000..a1ee25be9ad9 --- /dev/null +++ b/arch/tile/kernel/pci.c | |||
@@ -0,0 +1,621 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/pci.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/capability.h> | ||
21 | #include <linux/sched.h> | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/bootmem.h> | ||
24 | #include <linux/irq.h> | ||
25 | #include <linux/io.h> | ||
26 | #include <linux/uaccess.h> | ||
27 | |||
28 | #include <asm/processor.h> | ||
29 | #include <asm/sections.h> | ||
30 | #include <asm/byteorder.h> | ||
31 | #include <asm/hv_driver.h> | ||
32 | #include <hv/drv_pcie_rc_intf.h> | ||
33 | |||
34 | |||
35 | /* | ||
36 | * Initialization flow and process | ||
37 | * ------------------------------- | ||
38 | * | ||
39 | * This files containes the routines to search for PCI buses, | ||
40 | * enumerate the buses, and configure any attached devices. | ||
41 | * | ||
42 | * There are two entry points here: | ||
43 | * 1) tile_pci_init | ||
44 | * This sets up the pci_controller structs, and opens the | ||
45 | * FDs to the hypervisor. This is called from setup_arch() early | ||
46 | * in the boot process. | ||
47 | * 2) pcibios_init | ||
48 | * This probes the PCI bus(es) for any attached hardware. It's | ||
49 | * called by subsys_initcall. All of the real work is done by the | ||
50 | * generic Linux PCI layer. | ||
51 | * | ||
52 | */ | ||
53 | |||
54 | /* | ||
55 | * This flag tells if the platform is TILEmpower that needs | ||
56 | * special configuration for the PLX switch chip. | ||
57 | */ | ||
58 | int __write_once tile_plx_gen1; | ||
59 | |||
60 | static struct pci_controller controllers[TILE_NUM_PCIE]; | ||
61 | static int num_controllers; | ||
62 | |||
63 | static struct pci_ops tile_cfg_ops; | ||
64 | |||
65 | |||
66 | /* | ||
67 | * We don't need to worry about the alignment of resources. | ||
68 | */ | ||
69 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | ||
70 | resource_size_t size, resource_size_t align) | ||
71 | { | ||
72 | return res->start; | ||
73 | } | ||
74 | EXPORT_SYMBOL(pcibios_align_resource); | ||
75 | |||
76 | /* | ||
77 | * Open a FD to the hypervisor PCI device. | ||
78 | * | ||
79 | * controller_id is the controller number, config type is 0 or 1 for | ||
80 | * config0 or config1 operations. | ||
81 | */ | ||
82 | static int __init tile_pcie_open(int controller_id, int config_type) | ||
83 | { | ||
84 | char filename[32]; | ||
85 | int fd; | ||
86 | |||
87 | sprintf(filename, "pcie/%d/config%d", controller_id, config_type); | ||
88 | |||
89 | fd = hv_dev_open((HV_VirtAddr)filename, 0); | ||
90 | |||
91 | return fd; | ||
92 | } | ||
93 | |||
94 | |||
95 | /* | ||
96 | * Get the IRQ numbers from the HV and set up the handlers for them. | ||
97 | */ | ||
98 | static int __init tile_init_irqs(int controller_id, | ||
99 | struct pci_controller *controller) | ||
100 | { | ||
101 | char filename[32]; | ||
102 | int fd; | ||
103 | int ret; | ||
104 | int x; | ||
105 | struct pcie_rc_config rc_config; | ||
106 | |||
107 | sprintf(filename, "pcie/%d/ctl", controller_id); | ||
108 | fd = hv_dev_open((HV_VirtAddr)filename, 0); | ||
109 | if (fd < 0) { | ||
110 | pr_err("PCI: hv_dev_open(%s) failed\n", filename); | ||
111 | return -1; | ||
112 | } | ||
113 | ret = hv_dev_pread(fd, 0, (HV_VirtAddr)(&rc_config), | ||
114 | sizeof(rc_config), PCIE_RC_CONFIG_MASK_OFF); | ||
115 | hv_dev_close(fd); | ||
116 | if (ret != sizeof(rc_config)) { | ||
117 | pr_err("PCI: wanted %zd bytes, got %d\n", | ||
118 | sizeof(rc_config), ret); | ||
119 | return -1; | ||
120 | } | ||
121 | /* Record irq_base so that we can map INTx to IRQ # later. */ | ||
122 | controller->irq_base = rc_config.intr; | ||
123 | |||
124 | for (x = 0; x < 4; x++) | ||
125 | tile_irq_activate(rc_config.intr + x, | ||
126 | TILE_IRQ_HW_CLEAR); | ||
127 | |||
128 | if (rc_config.plx_gen1) | ||
129 | controller->plx_gen1 = 1; | ||
130 | |||
131 | return 0; | ||
132 | } | ||
133 | |||
134 | /* | ||
135 | * First initialization entry point, called from setup_arch(). | ||
136 | * | ||
137 | * Find valid controllers and fill in pci_controller structs for each | ||
138 | * of them. | ||
139 | * | ||
140 | * Returns the number of controllers discovered. | ||
141 | */ | ||
142 | int __init tile_pci_init(void) | ||
143 | { | ||
144 | int i; | ||
145 | |||
146 | pr_info("PCI: Searching for controllers...\n"); | ||
147 | |||
148 | /* Do any configuration we need before using the PCIe */ | ||
149 | |||
150 | for (i = 0; i < TILE_NUM_PCIE; i++) { | ||
151 | int hv_cfg_fd0 = -1; | ||
152 | int hv_cfg_fd1 = -1; | ||
153 | int hv_mem_fd = -1; | ||
154 | char name[32]; | ||
155 | struct pci_controller *controller; | ||
156 | |||
157 | /* | ||
158 | * Open the fd to the HV. If it fails then this | ||
159 | * device doesn't exist. | ||
160 | */ | ||
161 | hv_cfg_fd0 = tile_pcie_open(i, 0); | ||
162 | if (hv_cfg_fd0 < 0) | ||
163 | continue; | ||
164 | hv_cfg_fd1 = tile_pcie_open(i, 1); | ||
165 | if (hv_cfg_fd1 < 0) { | ||
166 | pr_err("PCI: Couldn't open config fd to HV " | ||
167 | "for controller %d\n", i); | ||
168 | goto err_cont; | ||
169 | } | ||
170 | |||
171 | sprintf(name, "pcie/%d/mem", i); | ||
172 | hv_mem_fd = hv_dev_open((HV_VirtAddr)name, 0); | ||
173 | if (hv_mem_fd < 0) { | ||
174 | pr_err("PCI: Could not open mem fd to HV!\n"); | ||
175 | goto err_cont; | ||
176 | } | ||
177 | |||
178 | pr_info("PCI: Found PCI controller #%d\n", i); | ||
179 | |||
180 | controller = &controllers[num_controllers]; | ||
181 | |||
182 | if (tile_init_irqs(i, controller)) { | ||
183 | pr_err("PCI: Could not initialize " | ||
184 | "IRQs, aborting.\n"); | ||
185 | goto err_cont; | ||
186 | } | ||
187 | |||
188 | controller->index = num_controllers; | ||
189 | controller->hv_cfg_fd[0] = hv_cfg_fd0; | ||
190 | controller->hv_cfg_fd[1] = hv_cfg_fd1; | ||
191 | controller->hv_mem_fd = hv_mem_fd; | ||
192 | controller->first_busno = 0; | ||
193 | controller->last_busno = 0xff; | ||
194 | controller->ops = &tile_cfg_ops; | ||
195 | |||
196 | num_controllers++; | ||
197 | continue; | ||
198 | |||
199 | err_cont: | ||
200 | if (hv_cfg_fd0 >= 0) | ||
201 | hv_dev_close(hv_cfg_fd0); | ||
202 | if (hv_cfg_fd1 >= 0) | ||
203 | hv_dev_close(hv_cfg_fd1); | ||
204 | if (hv_mem_fd >= 0) | ||
205 | hv_dev_close(hv_mem_fd); | ||
206 | continue; | ||
207 | } | ||
208 | |||
209 | /* | ||
210 | * Before using the PCIe, see if we need to do any platform-specific | ||
211 | * configuration, such as the PLX switch Gen 1 issue on TILEmpower. | ||
212 | */ | ||
213 | for (i = 0; i < num_controllers; i++) { | ||
214 | struct pci_controller *controller = &controllers[i]; | ||
215 | |||
216 | if (controller->plx_gen1) | ||
217 | tile_plx_gen1 = 1; | ||
218 | } | ||
219 | |||
220 | return num_controllers; | ||
221 | } | ||
222 | |||
223 | /* | ||
224 | * (pin - 1) converts from the PCI standard's [1:4] convention to | ||
225 | * a normal [0:3] range. | ||
226 | */ | ||
227 | static int tile_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
228 | { | ||
229 | struct pci_controller *controller = | ||
230 | (struct pci_controller *)dev->sysdata; | ||
231 | return (pin - 1) + controller->irq_base; | ||
232 | } | ||
233 | |||
234 | |||
235 | static void __init fixup_read_and_payload_sizes(void) | ||
236 | { | ||
237 | struct pci_dev *dev = NULL; | ||
238 | int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */ | ||
239 | int max_read_size = 0x2; /* Limit to 512 byte reads. */ | ||
240 | u16 new_values; | ||
241 | |||
242 | /* Scan for the smallest maximum payload size. */ | ||
243 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | ||
244 | int pcie_caps_offset; | ||
245 | u32 devcap; | ||
246 | int max_payload; | ||
247 | |||
248 | pcie_caps_offset = pci_find_capability(dev, PCI_CAP_ID_EXP); | ||
249 | if (pcie_caps_offset == 0) | ||
250 | continue; | ||
251 | |||
252 | pci_read_config_dword(dev, pcie_caps_offset + PCI_EXP_DEVCAP, | ||
253 | &devcap); | ||
254 | max_payload = devcap & PCI_EXP_DEVCAP_PAYLOAD; | ||
255 | if (max_payload < smallest_max_payload) | ||
256 | smallest_max_payload = max_payload; | ||
257 | } | ||
258 | |||
259 | /* Now, set the max_payload_size for all devices to that value. */ | ||
260 | new_values = (max_read_size << 12) | (smallest_max_payload << 5); | ||
261 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | ||
262 | int pcie_caps_offset; | ||
263 | u16 devctl; | ||
264 | |||
265 | pcie_caps_offset = pci_find_capability(dev, PCI_CAP_ID_EXP); | ||
266 | if (pcie_caps_offset == 0) | ||
267 | continue; | ||
268 | |||
269 | pci_read_config_word(dev, pcie_caps_offset + PCI_EXP_DEVCTL, | ||
270 | &devctl); | ||
271 | devctl &= ~(PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ); | ||
272 | devctl |= new_values; | ||
273 | pci_write_config_word(dev, pcie_caps_offset + PCI_EXP_DEVCTL, | ||
274 | devctl); | ||
275 | } | ||
276 | } | ||
277 | |||
278 | |||
279 | /* | ||
280 | * Second PCI initialization entry point, called by subsys_initcall. | ||
281 | * | ||
282 | * The controllers have been set up by the time we get here, by a call to | ||
283 | * tile_pci_init. | ||
284 | */ | ||
285 | static int __init pcibios_init(void) | ||
286 | { | ||
287 | int i; | ||
288 | |||
289 | pr_info("PCI: Probing PCI hardware\n"); | ||
290 | |||
291 | /* | ||
292 | * Delay a bit in case devices aren't ready. Some devices are | ||
293 | * known to require at least 20ms here, but we use a more | ||
294 | * conservative value. | ||
295 | */ | ||
296 | mdelay(250); | ||
297 | |||
298 | /* Scan all of the recorded PCI controllers. */ | ||
299 | for (i = 0; i < num_controllers; i++) { | ||
300 | struct pci_controller *controller = &controllers[i]; | ||
301 | struct pci_bus *bus; | ||
302 | |||
303 | pr_info("PCI: initializing controller #%d\n", i); | ||
304 | |||
305 | /* | ||
306 | * This comes from the generic Linux PCI driver. | ||
307 | * | ||
308 | * It reads the PCI tree for this bus into the Linux | ||
309 | * data structures. | ||
310 | * | ||
311 | * This is inlined in linux/pci.h and calls into | ||
312 | * pci_scan_bus_parented() in probe.c. | ||
313 | */ | ||
314 | bus = pci_scan_bus(0, controller->ops, controller); | ||
315 | controller->root_bus = bus; | ||
316 | controller->last_busno = bus->subordinate; | ||
317 | |||
318 | } | ||
319 | |||
320 | /* Do machine dependent PCI interrupt routing */ | ||
321 | pci_fixup_irqs(pci_common_swizzle, tile_map_irq); | ||
322 | |||
323 | /* | ||
324 | * This comes from the generic Linux PCI driver. | ||
325 | * | ||
326 | * It allocates all of the resources (I/O memory, etc) | ||
327 | * associated with the devices read in above. | ||
328 | */ | ||
329 | |||
330 | pci_assign_unassigned_resources(); | ||
331 | |||
332 | /* Configure the max_read_size and max_payload_size values. */ | ||
333 | fixup_read_and_payload_sizes(); | ||
334 | |||
335 | /* Record the I/O resources in the PCI controller structure. */ | ||
336 | for (i = 0; i < num_controllers; i++) { | ||
337 | struct pci_bus *root_bus = controllers[i].root_bus; | ||
338 | struct pci_bus *next_bus; | ||
339 | struct pci_dev *dev; | ||
340 | |||
341 | list_for_each_entry(dev, &root_bus->devices, bus_list) { | ||
342 | /* Find the PCI host controller, ie. the 1st bridge. */ | ||
343 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && | ||
344 | (PCI_SLOT(dev->devfn) == 0)) { | ||
345 | next_bus = dev->subordinate; | ||
346 | controllers[i].mem_resources[0] = | ||
347 | *next_bus->resource[0]; | ||
348 | controllers[i].mem_resources[1] = | ||
349 | *next_bus->resource[1]; | ||
350 | controllers[i].mem_resources[2] = | ||
351 | *next_bus->resource[2]; | ||
352 | |||
353 | break; | ||
354 | } | ||
355 | } | ||
356 | |||
357 | } | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | subsys_initcall(pcibios_init); | ||
362 | |||
363 | /* | ||
364 | * No bus fixups needed. | ||
365 | */ | ||
366 | void __devinit pcibios_fixup_bus(struct pci_bus *bus) | ||
367 | { | ||
368 | /* Nothing needs to be done. */ | ||
369 | } | ||
370 | |||
371 | /* | ||
372 | * This can be called from the generic PCI layer, but doesn't need to | ||
373 | * do anything. | ||
374 | */ | ||
375 | char __devinit *pcibios_setup(char *str) | ||
376 | { | ||
377 | /* Nothing needs to be done. */ | ||
378 | return str; | ||
379 | } | ||
380 | |||
381 | /* | ||
382 | * This is called from the generic Linux layer. | ||
383 | */ | ||
384 | void __init pcibios_update_irq(struct pci_dev *dev, int irq) | ||
385 | { | ||
386 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); | ||
387 | } | ||
388 | |||
389 | /* | ||
390 | * Enable memory and/or address decoding, as appropriate, for the | ||
391 | * device described by the 'dev' struct. | ||
392 | * | ||
393 | * This is called from the generic PCI layer, and can be called | ||
394 | * for bridges or endpoints. | ||
395 | */ | ||
396 | int pcibios_enable_device(struct pci_dev *dev, int mask) | ||
397 | { | ||
398 | u16 cmd, old_cmd; | ||
399 | u8 header_type; | ||
400 | int i; | ||
401 | struct resource *r; | ||
402 | |||
403 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | ||
404 | |||
405 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | ||
406 | old_cmd = cmd; | ||
407 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { | ||
408 | /* | ||
409 | * For bridges, we enable both memory and I/O decoding | ||
410 | * in call cases. | ||
411 | */ | ||
412 | cmd |= PCI_COMMAND_IO; | ||
413 | cmd |= PCI_COMMAND_MEMORY; | ||
414 | } else { | ||
415 | /* | ||
416 | * For endpoints, we enable memory and/or I/O decoding | ||
417 | * only if they have a memory resource of that type. | ||
418 | */ | ||
419 | for (i = 0; i < 6; i++) { | ||
420 | r = &dev->resource[i]; | ||
421 | if (r->flags & IORESOURCE_UNSET) { | ||
422 | pr_err("PCI: Device %s not available " | ||
423 | "because of resource collisions\n", | ||
424 | pci_name(dev)); | ||
425 | return -EINVAL; | ||
426 | } | ||
427 | if (r->flags & IORESOURCE_IO) | ||
428 | cmd |= PCI_COMMAND_IO; | ||
429 | if (r->flags & IORESOURCE_MEM) | ||
430 | cmd |= PCI_COMMAND_MEMORY; | ||
431 | } | ||
432 | } | ||
433 | |||
434 | /* | ||
435 | * We only write the command if it changed. | ||
436 | */ | ||
437 | if (cmd != old_cmd) | ||
438 | pci_write_config_word(dev, PCI_COMMAND, cmd); | ||
439 | return 0; | ||
440 | } | ||
441 | |||
442 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max) | ||
443 | { | ||
444 | unsigned long start = pci_resource_start(dev, bar); | ||
445 | unsigned long len = pci_resource_len(dev, bar); | ||
446 | unsigned long flags = pci_resource_flags(dev, bar); | ||
447 | |||
448 | if (!len) | ||
449 | return NULL; | ||
450 | if (max && len > max) | ||
451 | len = max; | ||
452 | |||
453 | if (!(flags & IORESOURCE_MEM)) { | ||
454 | pr_info("PCI: Trying to map invalid resource %#lx\n", flags); | ||
455 | start = 0; | ||
456 | } | ||
457 | |||
458 | return (void __iomem *)start; | ||
459 | } | ||
460 | EXPORT_SYMBOL(pci_iomap); | ||
461 | |||
462 | |||
463 | /**************************************************************** | ||
464 | * | ||
465 | * Tile PCI config space read/write routines | ||
466 | * | ||
467 | ****************************************************************/ | ||
468 | |||
469 | /* | ||
470 | * These are the normal read and write ops | ||
471 | * These are expanded with macros from pci_bus_read_config_byte() etc. | ||
472 | * | ||
473 | * devfn is the combined PCI slot & function. | ||
474 | * | ||
475 | * offset is in bytes, from the start of config space for the | ||
476 | * specified bus & slot. | ||
477 | */ | ||
478 | |||
479 | static int __devinit tile_cfg_read(struct pci_bus *bus, | ||
480 | unsigned int devfn, | ||
481 | int offset, | ||
482 | int size, | ||
483 | u32 *val) | ||
484 | { | ||
485 | struct pci_controller *controller = bus->sysdata; | ||
486 | int busnum = bus->number & 0xff; | ||
487 | int slot = (devfn >> 3) & 0x1f; | ||
488 | int function = devfn & 0x7; | ||
489 | u32 addr; | ||
490 | int config_mode = 1; | ||
491 | |||
492 | /* | ||
493 | * There is no bridge between the Tile and bus 0, so we | ||
494 | * use config0 to talk to bus 0. | ||
495 | * | ||
496 | * If we're talking to a bus other than zero then we | ||
497 | * must have found a bridge. | ||
498 | */ | ||
499 | if (busnum == 0) { | ||
500 | /* | ||
501 | * We fake an empty slot for (busnum == 0) && (slot > 0), | ||
502 | * since there is only one slot on bus 0. | ||
503 | */ | ||
504 | if (slot) { | ||
505 | *val = 0xFFFFFFFF; | ||
506 | return 0; | ||
507 | } | ||
508 | config_mode = 0; | ||
509 | } | ||
510 | |||
511 | addr = busnum << 20; /* Bus in 27:20 */ | ||
512 | addr |= slot << 15; /* Slot (device) in 19:15 */ | ||
513 | addr |= function << 12; /* Function is in 14:12 */ | ||
514 | addr |= (offset & 0xFFF); /* byte address in 0:11 */ | ||
515 | |||
516 | return hv_dev_pread(controller->hv_cfg_fd[config_mode], 0, | ||
517 | (HV_VirtAddr)(val), size, addr); | ||
518 | } | ||
519 | |||
520 | |||
521 | /* | ||
522 | * See tile_cfg_read() for relevent comments. | ||
523 | * Note that "val" is the value to write, not a pointer to that value. | ||
524 | */ | ||
525 | static int __devinit tile_cfg_write(struct pci_bus *bus, | ||
526 | unsigned int devfn, | ||
527 | int offset, | ||
528 | int size, | ||
529 | u32 val) | ||
530 | { | ||
531 | struct pci_controller *controller = bus->sysdata; | ||
532 | int busnum = bus->number & 0xff; | ||
533 | int slot = (devfn >> 3) & 0x1f; | ||
534 | int function = devfn & 0x7; | ||
535 | u32 addr; | ||
536 | int config_mode = 1; | ||
537 | HV_VirtAddr valp = (HV_VirtAddr)&val; | ||
538 | |||
539 | /* | ||
540 | * For bus 0 slot 0 we use config 0 accesses. | ||
541 | */ | ||
542 | if (busnum == 0) { | ||
543 | /* | ||
544 | * We fake an empty slot for (busnum == 0) && (slot > 0), | ||
545 | * since there is only one slot on bus 0. | ||
546 | */ | ||
547 | if (slot) | ||
548 | return 0; | ||
549 | config_mode = 0; | ||
550 | } | ||
551 | |||
552 | addr = busnum << 20; /* Bus in 27:20 */ | ||
553 | addr |= slot << 15; /* Slot (device) in 19:15 */ | ||
554 | addr |= function << 12; /* Function is in 14:12 */ | ||
555 | addr |= (offset & 0xFFF); /* byte address in 0:11 */ | ||
556 | |||
557 | #ifdef __BIG_ENDIAN | ||
558 | /* Point to the correct part of the 32-bit "val". */ | ||
559 | valp += 4 - size; | ||
560 | #endif | ||
561 | |||
562 | return hv_dev_pwrite(controller->hv_cfg_fd[config_mode], 0, | ||
563 | valp, size, addr); | ||
564 | } | ||
565 | |||
566 | |||
567 | static struct pci_ops tile_cfg_ops = { | ||
568 | .read = tile_cfg_read, | ||
569 | .write = tile_cfg_write, | ||
570 | }; | ||
571 | |||
572 | |||
573 | /* | ||
574 | * In the following, each PCI controller's mem_resources[1] | ||
575 | * represents its (non-prefetchable) PCI memory resource. | ||
576 | * mem_resources[0] and mem_resources[2] refer to its PCI I/O and | ||
577 | * prefetchable PCI memory resources, respectively. | ||
578 | * For more details, see pci_setup_bridge() in setup-bus.c. | ||
579 | * By comparing the target PCI memory address against the | ||
580 | * end address of controller 0, we can determine the controller | ||
581 | * that should accept the PCI memory access. | ||
582 | */ | ||
583 | #define TILE_READ(size, type) \ | ||
584 | type _tile_read##size(unsigned long addr) \ | ||
585 | { \ | ||
586 | type val; \ | ||
587 | int idx = 0; \ | ||
588 | if (addr > controllers[0].mem_resources[1].end && \ | ||
589 | addr > controllers[0].mem_resources[2].end) \ | ||
590 | idx = 1; \ | ||
591 | if (hv_dev_pread(controllers[idx].hv_mem_fd, 0, \ | ||
592 | (HV_VirtAddr)(&val), sizeof(type), addr)) \ | ||
593 | pr_err("PCI: read %zd bytes at 0x%lX failed\n", \ | ||
594 | sizeof(type), addr); \ | ||
595 | return val; \ | ||
596 | } \ | ||
597 | EXPORT_SYMBOL(_tile_read##size) | ||
598 | |||
599 | TILE_READ(b, u8); | ||
600 | TILE_READ(w, u16); | ||
601 | TILE_READ(l, u32); | ||
602 | TILE_READ(q, u64); | ||
603 | |||
604 | #define TILE_WRITE(size, type) \ | ||
605 | void _tile_write##size(type val, unsigned long addr) \ | ||
606 | { \ | ||
607 | int idx = 0; \ | ||
608 | if (addr > controllers[0].mem_resources[1].end && \ | ||
609 | addr > controllers[0].mem_resources[2].end) \ | ||
610 | idx = 1; \ | ||
611 | if (hv_dev_pwrite(controllers[idx].hv_mem_fd, 0, \ | ||
612 | (HV_VirtAddr)(&val), sizeof(type), addr)) \ | ||
613 | pr_err("PCI: write %zd bytes at 0x%lX failed\n", \ | ||
614 | sizeof(type), addr); \ | ||
615 | } \ | ||
616 | EXPORT_SYMBOL(_tile_write##size) | ||
617 | |||
618 | TILE_WRITE(b, u8); | ||
619 | TILE_WRITE(w, u16); | ||
620 | TILE_WRITE(l, u32); | ||
621 | TILE_WRITE(q, u64); | ||
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index fb0b3cbeae14..f18573643ed1 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c | |||
@@ -840,7 +840,7 @@ static int __init topology_init(void) | |||
840 | for_each_online_node(i) | 840 | for_each_online_node(i) |
841 | register_one_node(i); | 841 | register_one_node(i); |
842 | 842 | ||
843 | for_each_present_cpu(i) | 843 | for (i = 0; i < smp_height * smp_width; ++i) |
844 | register_cpu(&cpu_devices[i], i); | 844 | register_cpu(&cpu_devices[i], i); |
845 | 845 | ||
846 | return 0; | 846 | return 0; |
diff --git a/arch/tile/lib/memchr_32.c b/arch/tile/lib/memchr_32.c index 6235283b4859..cc3d9badf030 100644 --- a/arch/tile/lib/memchr_32.c +++ b/arch/tile/lib/memchr_32.c | |||
@@ -18,12 +18,24 @@ | |||
18 | 18 | ||
19 | void *memchr(const void *s, int c, size_t n) | 19 | void *memchr(const void *s, int c, size_t n) |
20 | { | 20 | { |
21 | const uint32_t *last_word_ptr; | ||
22 | const uint32_t *p; | ||
23 | const char *last_byte_ptr; | ||
24 | uintptr_t s_int; | ||
25 | uint32_t goal, before_mask, v, bits; | ||
26 | char *ret; | ||
27 | |||
28 | if (__builtin_expect(n == 0, 0)) { | ||
29 | /* Don't dereference any memory if the array is empty. */ | ||
30 | return NULL; | ||
31 | } | ||
32 | |||
21 | /* Get an aligned pointer. */ | 33 | /* Get an aligned pointer. */ |
22 | const uintptr_t s_int = (uintptr_t) s; | 34 | s_int = (uintptr_t) s; |
23 | const uint32_t *p = (const uint32_t *)(s_int & -4); | 35 | p = (const uint32_t *)(s_int & -4); |
24 | 36 | ||
25 | /* Create four copies of the byte for which we are looking. */ | 37 | /* Create four copies of the byte for which we are looking. */ |
26 | const uint32_t goal = 0x01010101 * (uint8_t) c; | 38 | goal = 0x01010101 * (uint8_t) c; |
27 | 39 | ||
28 | /* Read the first word, but munge it so that bytes before the array | 40 | /* Read the first word, but munge it so that bytes before the array |
29 | * will not match goal. | 41 | * will not match goal. |
@@ -31,23 +43,14 @@ void *memchr(const void *s, int c, size_t n) | |||
31 | * Note that this shift count expression works because we know | 43 | * Note that this shift count expression works because we know |
32 | * shift counts are taken mod 32. | 44 | * shift counts are taken mod 32. |
33 | */ | 45 | */ |
34 | const uint32_t before_mask = (1 << (s_int << 3)) - 1; | 46 | before_mask = (1 << (s_int << 3)) - 1; |
35 | uint32_t v = (*p | before_mask) ^ (goal & before_mask); | 47 | v = (*p | before_mask) ^ (goal & before_mask); |
36 | 48 | ||
37 | /* Compute the address of the last byte. */ | 49 | /* Compute the address of the last byte. */ |
38 | const char *const last_byte_ptr = (const char *)s + n - 1; | 50 | last_byte_ptr = (const char *)s + n - 1; |
39 | 51 | ||
40 | /* Compute the address of the word containing the last byte. */ | 52 | /* Compute the address of the word containing the last byte. */ |
41 | const uint32_t *const last_word_ptr = | 53 | last_word_ptr = (const uint32_t *)((uintptr_t) last_byte_ptr & -4); |
42 | (const uint32_t *)((uintptr_t) last_byte_ptr & -4); | ||
43 | |||
44 | uint32_t bits; | ||
45 | char *ret; | ||
46 | |||
47 | if (__builtin_expect(n == 0, 0)) { | ||
48 | /* Don't dereference any memory if the array is empty. */ | ||
49 | return NULL; | ||
50 | } | ||
51 | 54 | ||
52 | while ((bits = __insn_seqb(v, goal)) == 0) { | 55 | while ((bits = __insn_seqb(v, goal)) == 0) { |
53 | if (__builtin_expect(p == last_word_ptr, 0)) { | 56 | if (__builtin_expect(p == last_word_ptr, 0)) { |
diff --git a/arch/tile/lib/spinlock_32.c b/arch/tile/lib/spinlock_32.c index 485e24d62c6b..5cd1c4004eca 100644 --- a/arch/tile/lib/spinlock_32.c +++ b/arch/tile/lib/spinlock_32.c | |||
@@ -167,23 +167,30 @@ void arch_write_lock_slow(arch_rwlock_t *rwlock, u32 val) | |||
167 | * when we compare them. | 167 | * when we compare them. |
168 | */ | 168 | */ |
169 | u32 my_ticket_; | 169 | u32 my_ticket_; |
170 | u32 iterations = 0; | ||
170 | 171 | ||
171 | /* Take out the next ticket; this will also stop would-be readers. */ | 172 | /* |
172 | if (val & 1) | 173 | * Wait until there are no readers, then bump up the next |
173 | val = get_rwlock(rwlock); | 174 | * field and capture the ticket value. |
174 | rwlock->lock = __insn_addb(val, 1 << WR_NEXT_SHIFT); | 175 | */ |
176 | for (;;) { | ||
177 | if (!(val & 1)) { | ||
178 | if ((val >> RD_COUNT_SHIFT) == 0) | ||
179 | break; | ||
180 | rwlock->lock = val; | ||
181 | } | ||
182 | delay_backoff(iterations++); | ||
183 | val = __insn_tns((int *)&rwlock->lock); | ||
184 | } | ||
175 | 185 | ||
176 | /* Extract my ticket value from the original word. */ | 186 | /* Take out the next ticket and extract my ticket value. */ |
187 | rwlock->lock = __insn_addb(val, 1 << WR_NEXT_SHIFT); | ||
177 | my_ticket_ = val >> WR_NEXT_SHIFT; | 188 | my_ticket_ = val >> WR_NEXT_SHIFT; |
178 | 189 | ||
179 | /* | 190 | /* Wait until the "current" field matches our ticket. */ |
180 | * Wait until the "current" field matches our ticket, and | ||
181 | * there are no remaining readers. | ||
182 | */ | ||
183 | for (;;) { | 191 | for (;;) { |
184 | u32 curr_ = val >> WR_CURR_SHIFT; | 192 | u32 curr_ = val >> WR_CURR_SHIFT; |
185 | u32 readers = val >> RD_COUNT_SHIFT; | 193 | u32 delta = ((my_ticket_ - curr_) & WR_MASK); |
186 | u32 delta = ((my_ticket_ - curr_) & WR_MASK) + !!readers; | ||
187 | if (likely(delta == 0)) | 194 | if (likely(delta == 0)) |
188 | break; | 195 | break; |
189 | 196 | ||
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index 7f7338c90784..1664cce7b0ac 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c | |||
@@ -727,6 +727,9 @@ struct winch { | |||
727 | 727 | ||
728 | static void free_winch(struct winch *winch, int free_irq_ok) | 728 | static void free_winch(struct winch *winch, int free_irq_ok) |
729 | { | 729 | { |
730 | if (free_irq_ok) | ||
731 | free_irq(WINCH_IRQ, winch); | ||
732 | |||
730 | list_del(&winch->list); | 733 | list_del(&winch->list); |
731 | 734 | ||
732 | if (winch->pid != -1) | 735 | if (winch->pid != -1) |
@@ -735,8 +738,6 @@ static void free_winch(struct winch *winch, int free_irq_ok) | |||
735 | os_close_file(winch->fd); | 738 | os_close_file(winch->fd); |
736 | if (winch->stack != 0) | 739 | if (winch->stack != 0) |
737 | free_stack(winch->stack, 0); | 740 | free_stack(winch->stack, 0); |
738 | if (free_irq_ok) | ||
739 | free_irq(WINCH_IRQ, winch); | ||
740 | kfree(winch); | 741 | kfree(winch); |
741 | } | 742 | } |
742 | 743 | ||
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h index 4d293dced62f..9479a037419f 100644 --- a/arch/x86/include/asm/fixmap.h +++ b/arch/x86/include/asm/fixmap.h | |||
@@ -216,8 +216,8 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) | |||
216 | } | 216 | } |
217 | 217 | ||
218 | /* Return an pointer with offset calculated */ | 218 | /* Return an pointer with offset calculated */ |
219 | static inline unsigned long __set_fixmap_offset(enum fixed_addresses idx, | 219 | static __always_inline unsigned long |
220 | phys_addr_t phys, pgprot_t flags) | 220 | __set_fixmap_offset(enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags) |
221 | { | 221 | { |
222 | __set_fixmap(idx, phys, flags); | 222 | __set_fixmap(idx, phys, flags); |
223 | return fix_to_virt(idx) + (phys & (PAGE_SIZE - 1)); | 223 | return fix_to_virt(idx) + (phys & (PAGE_SIZE - 1)); |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 3ea3dc487047..6b89f5e86021 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -128,7 +128,7 @@ | |||
128 | #define FAM10H_MMIO_CONF_ENABLE (1<<0) | 128 | #define FAM10H_MMIO_CONF_ENABLE (1<<0) |
129 | #define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf | 129 | #define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf |
130 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 | 130 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 |
131 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff | 131 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffffULL |
132 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 | 132 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 |
133 | #define MSR_FAM10H_NODE_ID 0xc001100c | 133 | #define MSR_FAM10H_NODE_ID 0xc001100c |
134 | 134 | ||
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index e969f691cbfd..a501741c2335 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h | |||
@@ -199,6 +199,8 @@ union uvh_apicid { | |||
199 | #define UVH_APICID 0x002D0E00L | 199 | #define UVH_APICID 0x002D0E00L |
200 | #define UV_APIC_PNODE_SHIFT 6 | 200 | #define UV_APIC_PNODE_SHIFT 6 |
201 | 201 | ||
202 | #define UV_APICID_HIBIT_MASK 0xffff0000 | ||
203 | |||
202 | /* Local Bus from cpu's perspective */ | 204 | /* Local Bus from cpu's perspective */ |
203 | #define LOCAL_BUS_BASE 0x1c00000 | 205 | #define LOCAL_BUS_BASE 0x1c00000 |
204 | #define LOCAL_BUS_SIZE (4 * 1024 * 1024) | 206 | #define LOCAL_BUS_SIZE (4 * 1024 * 1024) |
@@ -491,8 +493,10 @@ static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value) | |||
491 | } | 493 | } |
492 | } | 494 | } |
493 | 495 | ||
496 | extern unsigned int uv_apicid_hibits; | ||
494 | static unsigned long uv_hub_ipi_value(int apicid, int vector, int mode) | 497 | static unsigned long uv_hub_ipi_value(int apicid, int vector, int mode) |
495 | { | 498 | { |
499 | apicid |= uv_apicid_hibits; | ||
496 | return (1UL << UVH_IPI_INT_SEND_SHFT) | | 500 | return (1UL << UVH_IPI_INT_SEND_SHFT) | |
497 | ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) | | 501 | ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) | |
498 | (mode << UVH_IPI_INT_DELIVERY_MODE_SHFT) | | 502 | (mode << UVH_IPI_INT_DELIVERY_MODE_SHFT) | |
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h index 6d90adf4428a..20cafeac7455 100644 --- a/arch/x86/include/asm/uv/uv_mmrs.h +++ b/arch/x86/include/asm/uv/uv_mmrs.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * SGI UV MMR definitions | 6 | * SGI UV MMR definitions |
7 | * | 7 | * |
8 | * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2007-2010 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef _ASM_X86_UV_UV_MMRS_H | 11 | #ifndef _ASM_X86_UV_UV_MMRS_H |
@@ -754,6 +754,23 @@ union uvh_lb_bau_sb_descriptor_base_u { | |||
754 | }; | 754 | }; |
755 | 755 | ||
756 | /* ========================================================================= */ | 756 | /* ========================================================================= */ |
757 | /* UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK */ | ||
758 | /* ========================================================================= */ | ||
759 | #define UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK 0x320130UL | ||
760 | #define UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK_32 0x009f0 | ||
761 | |||
762 | #define UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK_BIT_ENABLES_SHFT 0 | ||
763 | #define UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK_BIT_ENABLES_MASK 0x00000000ffffffffUL | ||
764 | |||
765 | union uvh_lb_target_physical_apic_id_mask_u { | ||
766 | unsigned long v; | ||
767 | struct uvh_lb_target_physical_apic_id_mask_s { | ||
768 | unsigned long bit_enables : 32; /* RW */ | ||
769 | unsigned long rsvd_32_63 : 32; /* */ | ||
770 | } s; | ||
771 | }; | ||
772 | |||
773 | /* ========================================================================= */ | ||
757 | /* UVH_NODE_ID */ | 774 | /* UVH_NODE_ID */ |
758 | /* ========================================================================= */ | 775 | /* ========================================================================= */ |
759 | #define UVH_NODE_ID 0x0UL | 776 | #define UVH_NODE_ID 0x0UL |
diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h index e8506c1f0c55..1c10c88ee4e1 100644 --- a/arch/x86/include/asm/xen/interface.h +++ b/arch/x86/include/asm/xen/interface.h | |||
@@ -61,9 +61,9 @@ DEFINE_GUEST_HANDLE(void); | |||
61 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | 61 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) |
62 | #endif | 62 | #endif |
63 | 63 | ||
64 | #ifndef machine_to_phys_mapping | 64 | #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) |
65 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | 65 | #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) |
66 | #endif | 66 | #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT) |
67 | 67 | ||
68 | /* Maximum number of virtual CPUs in multi-processor guests. */ | 68 | /* Maximum number of virtual CPUs in multi-processor guests. */ |
69 | #define MAX_VIRT_CPUS 32 | 69 | #define MAX_VIRT_CPUS 32 |
diff --git a/arch/x86/include/asm/xen/interface_32.h b/arch/x86/include/asm/xen/interface_32.h index 42a7e004ae5c..8413688b2571 100644 --- a/arch/x86/include/asm/xen/interface_32.h +++ b/arch/x86/include/asm/xen/interface_32.h | |||
@@ -32,6 +32,11 @@ | |||
32 | /* And the trap vector is... */ | 32 | /* And the trap vector is... */ |
33 | #define TRAP_INSTR "int $0x82" | 33 | #define TRAP_INSTR "int $0x82" |
34 | 34 | ||
35 | #define __MACH2PHYS_VIRT_START 0xF5800000 | ||
36 | #define __MACH2PHYS_VIRT_END 0xF6800000 | ||
37 | |||
38 | #define __MACH2PHYS_SHIFT 2 | ||
39 | |||
35 | /* | 40 | /* |
36 | * Virtual addresses beyond this are not modifiable by guest OSes. The | 41 | * Virtual addresses beyond this are not modifiable by guest OSes. The |
37 | * machine->physical mapping table starts at this address, read-only. | 42 | * machine->physical mapping table starts at this address, read-only. |
diff --git a/arch/x86/include/asm/xen/interface_64.h b/arch/x86/include/asm/xen/interface_64.h index 100d2662b97c..839a4811cf98 100644 --- a/arch/x86/include/asm/xen/interface_64.h +++ b/arch/x86/include/asm/xen/interface_64.h | |||
@@ -39,18 +39,7 @@ | |||
39 | #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 | 39 | #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 |
40 | #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 | 40 | #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 |
41 | #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 | 41 | #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 |
42 | 42 | #define __MACH2PHYS_SHIFT 3 | |
43 | #ifndef HYPERVISOR_VIRT_START | ||
44 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
45 | #define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END) | ||
46 | #endif | ||
47 | |||
48 | #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) | ||
49 | #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) | ||
50 | #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3) | ||
51 | #ifndef machine_to_phys_mapping | ||
52 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
53 | #endif | ||
54 | 43 | ||
55 | /* | 44 | /* |
56 | * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) | 45 | * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) |
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h index dd8c1414b3d5..8760cc60a21c 100644 --- a/arch/x86/include/asm/xen/page.h +++ b/arch/x86/include/asm/xen/page.h | |||
@@ -5,6 +5,7 @@ | |||
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | #include <linux/spinlock.h> | 6 | #include <linux/spinlock.h> |
7 | #include <linux/pfn.h> | 7 | #include <linux/pfn.h> |
8 | #include <linux/mm.h> | ||
8 | 9 | ||
9 | #include <asm/uaccess.h> | 10 | #include <asm/uaccess.h> |
10 | #include <asm/page.h> | 11 | #include <asm/page.h> |
@@ -35,6 +36,8 @@ typedef struct xpaddr { | |||
35 | #define MAX_DOMAIN_PAGES \ | 36 | #define MAX_DOMAIN_PAGES \ |
36 | ((unsigned long)((u64)CONFIG_XEN_MAX_DOMAIN_MEMORY * 1024 * 1024 * 1024 / PAGE_SIZE)) | 37 | ((unsigned long)((u64)CONFIG_XEN_MAX_DOMAIN_MEMORY * 1024 * 1024 * 1024 / PAGE_SIZE)) |
37 | 38 | ||
39 | extern unsigned long *machine_to_phys_mapping; | ||
40 | extern unsigned int machine_to_phys_order; | ||
38 | 41 | ||
39 | extern unsigned long get_phys_to_machine(unsigned long pfn); | 42 | extern unsigned long get_phys_to_machine(unsigned long pfn); |
40 | extern bool set_phys_to_machine(unsigned long pfn, unsigned long mfn); | 43 | extern bool set_phys_to_machine(unsigned long pfn, unsigned long mfn); |
@@ -69,10 +72,8 @@ static inline unsigned long mfn_to_pfn(unsigned long mfn) | |||
69 | if (xen_feature(XENFEAT_auto_translated_physmap)) | 72 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
70 | return mfn; | 73 | return mfn; |
71 | 74 | ||
72 | #if 0 | ||
73 | if (unlikely((mfn >> machine_to_phys_order) != 0)) | 75 | if (unlikely((mfn >> machine_to_phys_order) != 0)) |
74 | return max_mapnr; | 76 | return ~0; |
75 | #endif | ||
76 | 77 | ||
77 | pfn = 0; | 78 | pfn = 0; |
78 | /* | 79 | /* |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 194539aea175..c1c52c341f40 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -44,6 +44,8 @@ static u64 gru_start_paddr, gru_end_paddr; | |||
44 | static union uvh_apicid uvh_apicid; | 44 | static union uvh_apicid uvh_apicid; |
45 | int uv_min_hub_revision_id; | 45 | int uv_min_hub_revision_id; |
46 | EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); | 46 | EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); |
47 | unsigned int uv_apicid_hibits; | ||
48 | EXPORT_SYMBOL_GPL(uv_apicid_hibits); | ||
47 | static DEFINE_SPINLOCK(uv_nmi_lock); | 49 | static DEFINE_SPINLOCK(uv_nmi_lock); |
48 | 50 | ||
49 | static inline bool is_GRU_range(u64 start, u64 end) | 51 | static inline bool is_GRU_range(u64 start, u64 end) |
@@ -85,6 +87,23 @@ static void __init early_get_apic_pnode_shift(void) | |||
85 | uvh_apicid.s.pnode_shift = UV_APIC_PNODE_SHIFT; | 87 | uvh_apicid.s.pnode_shift = UV_APIC_PNODE_SHIFT; |
86 | } | 88 | } |
87 | 89 | ||
90 | /* | ||
91 | * Add an extra bit as dictated by bios to the destination apicid of | ||
92 | * interrupts potentially passing through the UV HUB. This prevents | ||
93 | * a deadlock between interrupts and IO port operations. | ||
94 | */ | ||
95 | static void __init uv_set_apicid_hibit(void) | ||
96 | { | ||
97 | union uvh_lb_target_physical_apic_id_mask_u apicid_mask; | ||
98 | unsigned long *mmr; | ||
99 | |||
100 | mmr = early_ioremap(UV_LOCAL_MMR_BASE | | ||
101 | UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK, sizeof(*mmr)); | ||
102 | apicid_mask.v = *mmr; | ||
103 | early_iounmap(mmr, sizeof(*mmr)); | ||
104 | uv_apicid_hibits = apicid_mask.s.bit_enables & UV_APICID_HIBIT_MASK; | ||
105 | } | ||
106 | |||
88 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 107 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
89 | { | 108 | { |
90 | int nodeid; | 109 | int nodeid; |
@@ -102,6 +121,7 @@ static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |||
102 | __get_cpu_var(x2apic_extra_bits) = | 121 | __get_cpu_var(x2apic_extra_bits) = |
103 | nodeid << (uvh_apicid.s.pnode_shift - 1); | 122 | nodeid << (uvh_apicid.s.pnode_shift - 1); |
104 | uv_system_type = UV_NON_UNIQUE_APIC; | 123 | uv_system_type = UV_NON_UNIQUE_APIC; |
124 | uv_set_apicid_hibit(); | ||
105 | return 1; | 125 | return 1; |
106 | } | 126 | } |
107 | } | 127 | } |
@@ -155,6 +175,7 @@ static int __cpuinit uv_wakeup_secondary(int phys_apicid, unsigned long start_ri | |||
155 | int pnode; | 175 | int pnode; |
156 | 176 | ||
157 | pnode = uv_apicid_to_pnode(phys_apicid); | 177 | pnode = uv_apicid_to_pnode(phys_apicid); |
178 | phys_apicid |= uv_apicid_hibits; | ||
158 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | 179 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
159 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | | 180 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
160 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | | 181 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
@@ -236,7 +257,7 @@ static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask) | |||
236 | int cpu = cpumask_first(cpumask); | 257 | int cpu = cpumask_first(cpumask); |
237 | 258 | ||
238 | if ((unsigned)cpu < nr_cpu_ids) | 259 | if ((unsigned)cpu < nr_cpu_ids) |
239 | return per_cpu(x86_cpu_to_apicid, cpu); | 260 | return per_cpu(x86_cpu_to_apicid, cpu) | uv_apicid_hibits; |
240 | else | 261 | else |
241 | return BAD_APICID; | 262 | return BAD_APICID; |
242 | } | 263 | } |
@@ -255,7 +276,7 @@ uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
255 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 276 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
256 | break; | 277 | break; |
257 | } | 278 | } |
258 | return per_cpu(x86_cpu_to_apicid, cpu); | 279 | return per_cpu(x86_cpu_to_apicid, cpu) | uv_apicid_hibits; |
259 | } | 280 | } |
260 | 281 | ||
261 | static unsigned int x2apic_get_apic_id(unsigned long x) | 282 | static unsigned int x2apic_get_apic_id(unsigned long x) |
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 59e175e89599..591e60104278 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S | |||
@@ -395,7 +395,7 @@ sysenter_past_esp: | |||
395 | * A tiny bit of offset fixup is necessary - 4*4 means the 4 words | 395 | * A tiny bit of offset fixup is necessary - 4*4 means the 4 words |
396 | * pushed above; +8 corresponds to copy_thread's esp0 setting. | 396 | * pushed above; +8 corresponds to copy_thread's esp0 setting. |
397 | */ | 397 | */ |
398 | pushl_cfi (TI_sysenter_return-THREAD_SIZE_asm+8+4*4)(%esp) | 398 | pushl_cfi ((TI_sysenter_return)-THREAD_SIZE_asm+8+4*4)(%esp) |
399 | CFI_REL_OFFSET eip, 0 | 399 | CFI_REL_OFFSET eip, 0 |
400 | 400 | ||
401 | pushl_cfi %eax | 401 | pushl_cfi %eax |
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index 6da143c2a6b8..ac861b8348e2 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c | |||
@@ -25,7 +25,6 @@ struct pci_hostbridge_probe { | |||
25 | }; | 25 | }; |
26 | 26 | ||
27 | static u64 __cpuinitdata fam10h_pci_mmconf_base; | 27 | static u64 __cpuinitdata fam10h_pci_mmconf_base; |
28 | static int __cpuinitdata fam10h_pci_mmconf_base_status; | ||
29 | 28 | ||
30 | static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = { | 29 | static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = { |
31 | { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, | 30 | { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, |
@@ -44,10 +43,12 @@ static int __cpuinit cmp_range(const void *x1, const void *x2) | |||
44 | return start1 - start2; | 43 | return start1 - start2; |
45 | } | 44 | } |
46 | 45 | ||
47 | /*[47:0] */ | 46 | #define MMCONF_UNIT (1ULL << FAM10H_MMIO_CONF_BASE_SHIFT) |
48 | /* need to avoid (0xfd<<32) and (0xfe<<32), ht used space */ | 47 | #define MMCONF_MASK (~(MMCONF_UNIT - 1)) |
48 | #define MMCONF_SIZE (MMCONF_UNIT << 8) | ||
49 | /* need to avoid (0xfd<<32), (0xfe<<32), and (0xff<<32), ht used space */ | ||
49 | #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32) | 50 | #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32) |
50 | #define BASE_VALID(b) ((b != (0xfdULL << 32)) && (b != (0xfeULL << 32))) | 51 | #define BASE_VALID(b) ((b) + MMCONF_SIZE <= (0xfdULL<<32) || (b) >= (1ULL<<40)) |
51 | static void __cpuinit get_fam10h_pci_mmconf_base(void) | 52 | static void __cpuinit get_fam10h_pci_mmconf_base(void) |
52 | { | 53 | { |
53 | int i; | 54 | int i; |
@@ -64,12 +65,11 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
64 | struct range range[8]; | 65 | struct range range[8]; |
65 | 66 | ||
66 | /* only try to get setting from BSP */ | 67 | /* only try to get setting from BSP */ |
67 | /* -1 or 1 */ | 68 | if (fam10h_pci_mmconf_base) |
68 | if (fam10h_pci_mmconf_base_status) | ||
69 | return; | 69 | return; |
70 | 70 | ||
71 | if (!early_pci_allowed()) | 71 | if (!early_pci_allowed()) |
72 | goto fail; | 72 | return; |
73 | 73 | ||
74 | found = 0; | 74 | found = 0; |
75 | for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { | 75 | for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { |
@@ -91,7 +91,7 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
91 | } | 91 | } |
92 | 92 | ||
93 | if (!found) | 93 | if (!found) |
94 | goto fail; | 94 | return; |
95 | 95 | ||
96 | /* SYS_CFG */ | 96 | /* SYS_CFG */ |
97 | address = MSR_K8_SYSCFG; | 97 | address = MSR_K8_SYSCFG; |
@@ -99,16 +99,16 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
99 | 99 | ||
100 | /* TOP_MEM2 is not enabled? */ | 100 | /* TOP_MEM2 is not enabled? */ |
101 | if (!(val & (1<<21))) { | 101 | if (!(val & (1<<21))) { |
102 | tom2 = 0; | 102 | tom2 = 1ULL << 32; |
103 | } else { | 103 | } else { |
104 | /* TOP_MEM2 */ | 104 | /* TOP_MEM2 */ |
105 | address = MSR_K8_TOP_MEM2; | 105 | address = MSR_K8_TOP_MEM2; |
106 | rdmsrl(address, val); | 106 | rdmsrl(address, val); |
107 | tom2 = val & (0xffffULL<<32); | 107 | tom2 = max(val & 0xffffff800000ULL, 1ULL << 32); |
108 | } | 108 | } |
109 | 109 | ||
110 | if (base <= tom2) | 110 | if (base <= tom2) |
111 | base = tom2 + (1ULL<<32); | 111 | base = (tom2 + 2 * MMCONF_UNIT - 1) & MMCONF_MASK; |
112 | 112 | ||
113 | /* | 113 | /* |
114 | * need to check if the range is in the high mmio range that is | 114 | * need to check if the range is in the high mmio range that is |
@@ -123,11 +123,11 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
123 | if (!(reg & 3)) | 123 | if (!(reg & 3)) |
124 | continue; | 124 | continue; |
125 | 125 | ||
126 | start = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/ | 126 | start = (u64)(reg & 0xffffff00) << 8; /* 39:16 on 31:8*/ |
127 | reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); | 127 | reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); |
128 | end = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/ | 128 | end = ((u64)(reg & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/ |
129 | 129 | ||
130 | if (!end) | 130 | if (end < tom2) |
131 | continue; | 131 | continue; |
132 | 132 | ||
133 | range[hi_mmio_num].start = start; | 133 | range[hi_mmio_num].start = start; |
@@ -143,32 +143,27 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
143 | 143 | ||
144 | if (range[hi_mmio_num - 1].end < base) | 144 | if (range[hi_mmio_num - 1].end < base) |
145 | goto out; | 145 | goto out; |
146 | if (range[0].start > base) | 146 | if (range[0].start > base + MMCONF_SIZE) |
147 | goto out; | 147 | goto out; |
148 | 148 | ||
149 | /* need to find one window */ | 149 | /* need to find one window */ |
150 | base = range[0].start - (1ULL << 32); | 150 | base = (range[0].start & MMCONF_MASK) - MMCONF_UNIT; |
151 | if ((base > tom2) && BASE_VALID(base)) | 151 | if ((base > tom2) && BASE_VALID(base)) |
152 | goto out; | 152 | goto out; |
153 | base = range[hi_mmio_num - 1].end + (1ULL << 32); | 153 | base = (range[hi_mmio_num - 1].end + MMCONF_UNIT) & MMCONF_MASK; |
154 | if ((base > tom2) && BASE_VALID(base)) | 154 | if (BASE_VALID(base)) |
155 | goto out; | 155 | goto out; |
156 | /* need to find window between ranges */ | 156 | /* need to find window between ranges */ |
157 | if (hi_mmio_num > 1) | 157 | for (i = 1; i < hi_mmio_num; i++) { |
158 | for (i = 0; i < hi_mmio_num - 1; i++) { | 158 | base = (range[i - 1].end + MMCONF_UNIT) & MMCONF_MASK; |
159 | if (range[i + 1].start > (range[i].end + (1ULL << 32))) { | 159 | val = range[i].start & MMCONF_MASK; |
160 | base = range[i].end + (1ULL << 32); | 160 | if (val >= base + MMCONF_SIZE && BASE_VALID(base)) |
161 | if ((base > tom2) && BASE_VALID(base)) | 161 | goto out; |
162 | goto out; | ||
163 | } | ||
164 | } | 162 | } |
165 | |||
166 | fail: | ||
167 | fam10h_pci_mmconf_base_status = -1; | ||
168 | return; | 163 | return; |
164 | |||
169 | out: | 165 | out: |
170 | fam10h_pci_mmconf_base = base; | 166 | fam10h_pci_mmconf_base = base; |
171 | fam10h_pci_mmconf_base_status = 1; | ||
172 | } | 167 | } |
173 | 168 | ||
174 | void __cpuinit fam10h_check_enable_mmcfg(void) | 169 | void __cpuinit fam10h_check_enable_mmcfg(void) |
@@ -190,11 +185,10 @@ void __cpuinit fam10h_check_enable_mmcfg(void) | |||
190 | 185 | ||
191 | /* only trust the one handle 256 buses, if acpi=off */ | 186 | /* only trust the one handle 256 buses, if acpi=off */ |
192 | if (!acpi_pci_disabled || busnbits >= 8) { | 187 | if (!acpi_pci_disabled || busnbits >= 8) { |
193 | u64 base; | 188 | u64 base = val & MMCONF_MASK; |
194 | base = val & (0xffffULL << 32); | 189 | |
195 | if (fam10h_pci_mmconf_base_status <= 0) { | 190 | if (!fam10h_pci_mmconf_base) { |
196 | fam10h_pci_mmconf_base = base; | 191 | fam10h_pci_mmconf_base = base; |
197 | fam10h_pci_mmconf_base_status = 1; | ||
198 | return; | 192 | return; |
199 | } else if (fam10h_pci_mmconf_base == base) | 193 | } else if (fam10h_pci_mmconf_base == base) |
200 | return; | 194 | return; |
@@ -206,8 +200,10 @@ void __cpuinit fam10h_check_enable_mmcfg(void) | |||
206 | * with 256 buses | 200 | * with 256 buses |
207 | */ | 201 | */ |
208 | get_fam10h_pci_mmconf_base(); | 202 | get_fam10h_pci_mmconf_base(); |
209 | if (fam10h_pci_mmconf_base_status <= 0) | 203 | if (!fam10h_pci_mmconf_base) { |
204 | pci_probe &= ~PCI_CHECK_ENABLE_AMD_MMCONF; | ||
210 | return; | 205 | return; |
206 | } | ||
211 | 207 | ||
212 | printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n"); | 208 | printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n"); |
213 | val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) | | 209 | val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) | |
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 12cdbb17ad18..6acc724d5d8f 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c | |||
@@ -223,7 +223,7 @@ void native_flush_tlb_others(const struct cpumask *cpumask, | |||
223 | 223 | ||
224 | static void __cpuinit calculate_tlb_offset(void) | 224 | static void __cpuinit calculate_tlb_offset(void) |
225 | { | 225 | { |
226 | int cpu, node, nr_node_vecs; | 226 | int cpu, node, nr_node_vecs, idx = 0; |
227 | /* | 227 | /* |
228 | * we are changing tlb_vector_offset for each CPU in runtime, but this | 228 | * we are changing tlb_vector_offset for each CPU in runtime, but this |
229 | * will not cause inconsistency, as the write is atomic under X86. we | 229 | * will not cause inconsistency, as the write is atomic under X86. we |
@@ -239,7 +239,7 @@ static void __cpuinit calculate_tlb_offset(void) | |||
239 | nr_node_vecs = NUM_INVALIDATE_TLB_VECTORS/nr_online_nodes; | 239 | nr_node_vecs = NUM_INVALIDATE_TLB_VECTORS/nr_online_nodes; |
240 | 240 | ||
241 | for_each_online_node(node) { | 241 | for_each_online_node(node) { |
242 | int node_offset = (node % NUM_INVALIDATE_TLB_VECTORS) * | 242 | int node_offset = (idx % NUM_INVALIDATE_TLB_VECTORS) * |
243 | nr_node_vecs; | 243 | nr_node_vecs; |
244 | int cpu_offset = 0; | 244 | int cpu_offset = 0; |
245 | for_each_cpu(cpu, cpumask_of_node(node)) { | 245 | for_each_cpu(cpu, cpumask_of_node(node)) { |
@@ -248,6 +248,7 @@ static void __cpuinit calculate_tlb_offset(void) | |||
248 | cpu_offset++; | 248 | cpu_offset++; |
249 | cpu_offset = cpu_offset % nr_node_vecs; | 249 | cpu_offset = cpu_offset % nr_node_vecs; |
250 | } | 250 | } |
251 | idx++; | ||
251 | } | 252 | } |
252 | } | 253 | } |
253 | 254 | ||
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index d7b5109f7a9c..25cd4a07d09f 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c | |||
@@ -70,6 +70,9 @@ static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, | |||
70 | struct xen_pci_frontend_ops *xen_pci_frontend; | 70 | struct xen_pci_frontend_ops *xen_pci_frontend; |
71 | EXPORT_SYMBOL_GPL(xen_pci_frontend); | 71 | EXPORT_SYMBOL_GPL(xen_pci_frontend); |
72 | 72 | ||
73 | #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \ | ||
74 | MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0)) | ||
75 | |||
73 | static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, | 76 | static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, |
74 | struct msi_msg *msg) | 77 | struct msi_msg *msg) |
75 | { | 78 | { |
@@ -83,12 +86,7 @@ static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, | |||
83 | MSI_ADDR_REDIRECTION_CPU | | 86 | MSI_ADDR_REDIRECTION_CPU | |
84 | MSI_ADDR_DEST_ID(pirq); | 87 | MSI_ADDR_DEST_ID(pirq); |
85 | 88 | ||
86 | msg->data = | 89 | msg->data = XEN_PIRQ_MSI_DATA; |
87 | MSI_DATA_TRIGGER_EDGE | | ||
88 | MSI_DATA_LEVEL_ASSERT | | ||
89 | /* delivery mode reserved */ | ||
90 | (3 << 8) | | ||
91 | MSI_DATA_VECTOR(0); | ||
92 | } | 90 | } |
93 | 91 | ||
94 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | 92 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
@@ -98,8 +96,23 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
98 | struct msi_msg msg; | 96 | struct msi_msg msg; |
99 | 97 | ||
100 | list_for_each_entry(msidesc, &dev->msi_list, list) { | 98 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
99 | __read_msi_msg(msidesc, &msg); | ||
100 | pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | | ||
101 | ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); | ||
102 | if (xen_irq_from_pirq(pirq) >= 0 && msg.data == XEN_PIRQ_MSI_DATA) { | ||
103 | xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? | ||
104 | "msi-x" : "msi", &irq, &pirq, XEN_ALLOC_IRQ); | ||
105 | if (irq < 0) | ||
106 | goto error; | ||
107 | ret = set_irq_msi(irq, msidesc); | ||
108 | if (ret < 0) | ||
109 | goto error_while; | ||
110 | printk(KERN_DEBUG "xen: msi already setup: msi --> irq=%d" | ||
111 | " pirq=%d\n", irq, pirq); | ||
112 | return 0; | ||
113 | } | ||
101 | xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? | 114 | xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? |
102 | "msi-x" : "msi", &irq, &pirq); | 115 | "msi-x" : "msi", &irq, &pirq, (XEN_ALLOC_IRQ | XEN_ALLOC_PIRQ)); |
103 | if (irq < 0 || pirq < 0) | 116 | if (irq < 0 || pirq < 0) |
104 | goto error; | 117 | goto error; |
105 | printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq); | 118 | printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq); |
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c index a318194002b5..ba9caa808a9c 100644 --- a/arch/x86/platform/uv/tlb_uv.c +++ b/arch/x86/platform/uv/tlb_uv.c | |||
@@ -1455,7 +1455,7 @@ static void __init uv_init_uvhub(int uvhub, int vector) | |||
1455 | * the below initialization can't be in firmware because the | 1455 | * the below initialization can't be in firmware because the |
1456 | * messaging IRQ will be determined by the OS | 1456 | * messaging IRQ will be determined by the OS |
1457 | */ | 1457 | */ |
1458 | apicid = uvhub_to_first_apicid(uvhub); | 1458 | apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits; |
1459 | uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, | 1459 | uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, |
1460 | ((apicid << 32) | vector)); | 1460 | ((apicid << 32) | vector)); |
1461 | } | 1461 | } |
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c index 56e421bc379b..9daf5d1af9f1 100644 --- a/arch/x86/platform/uv/uv_time.c +++ b/arch/x86/platform/uv/uv_time.c | |||
@@ -89,6 +89,7 @@ static void uv_rtc_send_IPI(int cpu) | |||
89 | 89 | ||
90 | apicid = cpu_physical_id(cpu); | 90 | apicid = cpu_physical_id(cpu); |
91 | pnode = uv_apicid_to_pnode(apicid); | 91 | pnode = uv_apicid_to_pnode(apicid); |
92 | apicid |= uv_apicid_hibits; | ||
92 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | 93 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
93 | (apicid << UVH_IPI_INT_APIC_ID_SHFT) | | 94 | (apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
94 | (X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT); | 95 | (X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT); |
@@ -107,6 +108,7 @@ static int uv_intr_pending(int pnode) | |||
107 | static int uv_setup_intr(int cpu, u64 expires) | 108 | static int uv_setup_intr(int cpu, u64 expires) |
108 | { | 109 | { |
109 | u64 val; | 110 | u64 val; |
111 | unsigned long apicid = cpu_physical_id(cpu) | uv_apicid_hibits; | ||
110 | int pnode = uv_cpu_to_pnode(cpu); | 112 | int pnode = uv_cpu_to_pnode(cpu); |
111 | 113 | ||
112 | uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, | 114 | uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, |
@@ -117,7 +119,7 @@ static int uv_setup_intr(int cpu, u64 expires) | |||
117 | UVH_EVENT_OCCURRED0_RTC1_MASK); | 119 | UVH_EVENT_OCCURRED0_RTC1_MASK); |
118 | 120 | ||
119 | val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) | | 121 | val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) | |
120 | ((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT); | 122 | ((u64)apicid << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT); |
121 | 123 | ||
122 | /* Set configuration */ | 124 | /* Set configuration */ |
123 | uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, val); | 125 | uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, val); |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 235c0f4d3861..44dcad43989d 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
@@ -75,6 +75,11 @@ DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |||
75 | enum xen_domain_type xen_domain_type = XEN_NATIVE; | 75 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
76 | EXPORT_SYMBOL_GPL(xen_domain_type); | 76 | EXPORT_SYMBOL_GPL(xen_domain_type); |
77 | 77 | ||
78 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; | ||
79 | EXPORT_SYMBOL(machine_to_phys_mapping); | ||
80 | unsigned int machine_to_phys_order; | ||
81 | EXPORT_SYMBOL(machine_to_phys_order); | ||
82 | |||
78 | struct start_info *xen_start_info; | 83 | struct start_info *xen_start_info; |
79 | EXPORT_SYMBOL_GPL(xen_start_info); | 84 | EXPORT_SYMBOL_GPL(xen_start_info); |
80 | 85 | ||
@@ -1016,10 +1021,6 @@ static void xen_reboot(int reason) | |||
1016 | { | 1021 | { |
1017 | struct sched_shutdown r = { .reason = reason }; | 1022 | struct sched_shutdown r = { .reason = reason }; |
1018 | 1023 | ||
1019 | #ifdef CONFIG_SMP | ||
1020 | stop_other_cpus(); | ||
1021 | #endif | ||
1022 | |||
1023 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) | 1024 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
1024 | BUG(); | 1025 | BUG(); |
1025 | } | 1026 | } |
@@ -1090,6 +1091,8 @@ static void __init xen_setup_stackprotector(void) | |||
1090 | /* First C function to be called on Xen boot */ | 1091 | /* First C function to be called on Xen boot */ |
1091 | asmlinkage void __init xen_start_kernel(void) | 1092 | asmlinkage void __init xen_start_kernel(void) |
1092 | { | 1093 | { |
1094 | struct physdev_set_iopl set_iopl; | ||
1095 | int rc; | ||
1093 | pgd_t *pgd; | 1096 | pgd_t *pgd; |
1094 | 1097 | ||
1095 | if (!xen_start_info) | 1098 | if (!xen_start_info) |
@@ -1097,6 +1100,8 @@ asmlinkage void __init xen_start_kernel(void) | |||
1097 | 1100 | ||
1098 | xen_domain_type = XEN_PV_DOMAIN; | 1101 | xen_domain_type = XEN_PV_DOMAIN; |
1099 | 1102 | ||
1103 | xen_setup_machphys_mapping(); | ||
1104 | |||
1100 | /* Install Xen paravirt ops */ | 1105 | /* Install Xen paravirt ops */ |
1101 | pv_info = xen_info; | 1106 | pv_info = xen_info; |
1102 | pv_init_ops = xen_init_ops; | 1107 | pv_init_ops = xen_init_ops; |
@@ -1191,8 +1196,6 @@ asmlinkage void __init xen_start_kernel(void) | |||
1191 | /* Allocate and initialize top and mid mfn levels for p2m structure */ | 1196 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1192 | xen_build_mfn_list_list(); | 1197 | xen_build_mfn_list_list(); |
1193 | 1198 | ||
1194 | init_mm.pgd = pgd; | ||
1195 | |||
1196 | /* keep using Xen gdt for now; no urgent need to change it */ | 1199 | /* keep using Xen gdt for now; no urgent need to change it */ |
1197 | 1200 | ||
1198 | #ifdef CONFIG_X86_32 | 1201 | #ifdef CONFIG_X86_32 |
@@ -1202,10 +1205,18 @@ asmlinkage void __init xen_start_kernel(void) | |||
1202 | #else | 1205 | #else |
1203 | pv_info.kernel_rpl = 0; | 1206 | pv_info.kernel_rpl = 0; |
1204 | #endif | 1207 | #endif |
1205 | |||
1206 | /* set the limit of our address space */ | 1208 | /* set the limit of our address space */ |
1207 | xen_reserve_top(); | 1209 | xen_reserve_top(); |
1208 | 1210 | ||
1211 | /* We used to do this in xen_arch_setup, but that is too late on AMD | ||
1212 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | ||
1213 | * which pokes 0xcf8 port. | ||
1214 | */ | ||
1215 | set_iopl.iopl = 1; | ||
1216 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | ||
1217 | if (rc != 0) | ||
1218 | xen_raw_printk("physdev_op failed %d\n", rc); | ||
1219 | |||
1209 | #ifdef CONFIG_X86_32 | 1220 | #ifdef CONFIG_X86_32 |
1210 | /* set up basic CPUID stuff */ | 1221 | /* set up basic CPUID stuff */ |
1211 | cpu_detect(&new_cpu_data); | 1222 | cpu_detect(&new_cpu_data); |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 21ed8d7f75a5..44924e551fde 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -2034,6 +2034,20 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) | |||
2034 | set_page_prot(pmd, PAGE_KERNEL_RO); | 2034 | set_page_prot(pmd, PAGE_KERNEL_RO); |
2035 | } | 2035 | } |
2036 | 2036 | ||
2037 | void __init xen_setup_machphys_mapping(void) | ||
2038 | { | ||
2039 | struct xen_machphys_mapping mapping; | ||
2040 | unsigned long machine_to_phys_nr_ents; | ||
2041 | |||
2042 | if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { | ||
2043 | machine_to_phys_mapping = (unsigned long *)mapping.v_start; | ||
2044 | machine_to_phys_nr_ents = mapping.max_mfn + 1; | ||
2045 | } else { | ||
2046 | machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES; | ||
2047 | } | ||
2048 | machine_to_phys_order = fls(machine_to_phys_nr_ents - 1); | ||
2049 | } | ||
2050 | |||
2037 | #ifdef CONFIG_X86_64 | 2051 | #ifdef CONFIG_X86_64 |
2038 | static void convert_pfn_mfn(void *v) | 2052 | static void convert_pfn_mfn(void *v) |
2039 | { | 2053 | { |
@@ -2119,44 +2133,83 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | |||
2119 | return pgd; | 2133 | return pgd; |
2120 | } | 2134 | } |
2121 | #else /* !CONFIG_X86_64 */ | 2135 | #else /* !CONFIG_X86_64 */ |
2122 | static RESERVE_BRK_ARRAY(pmd_t, level2_kernel_pgt, PTRS_PER_PMD); | 2136 | static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); |
2137 | static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); | ||
2138 | |||
2139 | static __init void xen_write_cr3_init(unsigned long cr3) | ||
2140 | { | ||
2141 | unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); | ||
2142 | |||
2143 | BUG_ON(read_cr3() != __pa(initial_page_table)); | ||
2144 | BUG_ON(cr3 != __pa(swapper_pg_dir)); | ||
2145 | |||
2146 | /* | ||
2147 | * We are switching to swapper_pg_dir for the first time (from | ||
2148 | * initial_page_table) and therefore need to mark that page | ||
2149 | * read-only and then pin it. | ||
2150 | * | ||
2151 | * Xen disallows sharing of kernel PMDs for PAE | ||
2152 | * guests. Therefore we must copy the kernel PMD from | ||
2153 | * initial_page_table into a new kernel PMD to be used in | ||
2154 | * swapper_pg_dir. | ||
2155 | */ | ||
2156 | swapper_kernel_pmd = | ||
2157 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | ||
2158 | memcpy(swapper_kernel_pmd, initial_kernel_pmd, | ||
2159 | sizeof(pmd_t) * PTRS_PER_PMD); | ||
2160 | swapper_pg_dir[KERNEL_PGD_BOUNDARY] = | ||
2161 | __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); | ||
2162 | set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); | ||
2163 | |||
2164 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | ||
2165 | xen_write_cr3(cr3); | ||
2166 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); | ||
2167 | |||
2168 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | ||
2169 | PFN_DOWN(__pa(initial_page_table))); | ||
2170 | set_page_prot(initial_page_table, PAGE_KERNEL); | ||
2171 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL); | ||
2172 | |||
2173 | pv_mmu_ops.write_cr3 = &xen_write_cr3; | ||
2174 | } | ||
2123 | 2175 | ||
2124 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | 2176 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, |
2125 | unsigned long max_pfn) | 2177 | unsigned long max_pfn) |
2126 | { | 2178 | { |
2127 | pmd_t *kernel_pmd; | 2179 | pmd_t *kernel_pmd; |
2128 | 2180 | ||
2129 | level2_kernel_pgt = extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | 2181 | initial_kernel_pmd = |
2182 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | ||
2130 | 2183 | ||
2131 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + | 2184 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + |
2132 | xen_start_info->nr_pt_frames * PAGE_SIZE + | 2185 | xen_start_info->nr_pt_frames * PAGE_SIZE + |
2133 | 512*1024); | 2186 | 512*1024); |
2134 | 2187 | ||
2135 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | 2188 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); |
2136 | memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); | 2189 | memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); |
2137 | 2190 | ||
2138 | xen_map_identity_early(level2_kernel_pgt, max_pfn); | 2191 | xen_map_identity_early(initial_kernel_pmd, max_pfn); |
2139 | 2192 | ||
2140 | memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD); | 2193 | memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD); |
2141 | set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY], | 2194 | initial_page_table[KERNEL_PGD_BOUNDARY] = |
2142 | __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT)); | 2195 | __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); |
2143 | 2196 | ||
2144 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | 2197 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); |
2145 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | 2198 | set_page_prot(initial_page_table, PAGE_KERNEL_RO); |
2146 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); | 2199 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); |
2147 | 2200 | ||
2148 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | 2201 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); |
2149 | 2202 | ||
2150 | xen_write_cr3(__pa(swapper_pg_dir)); | 2203 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, |
2151 | 2204 | PFN_DOWN(__pa(initial_page_table))); | |
2152 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir))); | 2205 | xen_write_cr3(__pa(initial_page_table)); |
2153 | 2206 | ||
2154 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), | 2207 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), |
2155 | __pa(xen_start_info->pt_base + | 2208 | __pa(xen_start_info->pt_base + |
2156 | xen_start_info->nr_pt_frames * PAGE_SIZE), | 2209 | xen_start_info->nr_pt_frames * PAGE_SIZE), |
2157 | "XEN PAGETABLES"); | 2210 | "XEN PAGETABLES"); |
2158 | 2211 | ||
2159 | return swapper_pg_dir; | 2212 | return initial_page_table; |
2160 | } | 2213 | } |
2161 | #endif /* CONFIG_X86_64 */ | 2214 | #endif /* CONFIG_X86_64 */ |
2162 | 2215 | ||
@@ -2290,7 +2343,11 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = { | |||
2290 | .write_cr2 = xen_write_cr2, | 2343 | .write_cr2 = xen_write_cr2, |
2291 | 2344 | ||
2292 | .read_cr3 = xen_read_cr3, | 2345 | .read_cr3 = xen_read_cr3, |
2346 | #ifdef CONFIG_X86_32 | ||
2347 | .write_cr3 = xen_write_cr3_init, | ||
2348 | #else | ||
2293 | .write_cr3 = xen_write_cr3, | 2349 | .write_cr3 = xen_write_cr3, |
2350 | #endif | ||
2294 | 2351 | ||
2295 | .flush_tlb_user = xen_flush_tlb, | 2352 | .flush_tlb_user = xen_flush_tlb, |
2296 | .flush_tlb_kernel = xen_flush_tlb, | 2353 | .flush_tlb_kernel = xen_flush_tlb, |
@@ -2358,8 +2415,6 @@ void __init xen_init_mmu_ops(void) | |||
2358 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; | 2415 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; |
2359 | pv_mmu_ops = xen_mmu_ops; | 2416 | pv_mmu_ops = xen_mmu_ops; |
2360 | 2417 | ||
2361 | vmap_lazy_unmap = false; | ||
2362 | |||
2363 | memset(dummy_mapping, 0xff, PAGE_SIZE); | 2418 | memset(dummy_mapping, 0xff, PAGE_SIZE); |
2364 | } | 2419 | } |
2365 | 2420 | ||
@@ -2627,7 +2682,8 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma, | |||
2627 | 2682 | ||
2628 | prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP); | 2683 | prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP); |
2629 | 2684 | ||
2630 | vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP; | 2685 | BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) == |
2686 | (VM_PFNMAP | VM_RESERVED | VM_IO))); | ||
2631 | 2687 | ||
2632 | rmd.mfn = mfn; | 2688 | rmd.mfn = mfn; |
2633 | rmd.prot = prot; | 2689 | rmd.prot = prot; |
diff --git a/arch/x86/xen/platform-pci-unplug.c b/arch/x86/xen/platform-pci-unplug.c index 0f456386cce5..25c52f94a27c 100644 --- a/arch/x86/xen/platform-pci-unplug.c +++ b/arch/x86/xen/platform-pci-unplug.c | |||
@@ -68,7 +68,7 @@ static int __init check_platform_magic(void) | |||
68 | return 0; | 68 | return 0; |
69 | } | 69 | } |
70 | 70 | ||
71 | void __init xen_unplug_emulated_devices(void) | 71 | void xen_unplug_emulated_devices(void) |
72 | { | 72 | { |
73 | int r; | 73 | int r; |
74 | 74 | ||
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index 769c4b01fa32..b5a7f928234b 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <xen/interface/callback.h> | 23 | #include <xen/interface/callback.h> |
24 | #include <xen/interface/memory.h> | 24 | #include <xen/interface/memory.h> |
25 | #include <xen/interface/physdev.h> | 25 | #include <xen/interface/physdev.h> |
26 | #include <xen/interface/memory.h> | ||
27 | #include <xen/features.h> | 26 | #include <xen/features.h> |
28 | 27 | ||
29 | #include "xen-ops.h" | 28 | #include "xen-ops.h" |
@@ -182,24 +181,21 @@ char * __init xen_memory_setup(void) | |||
182 | for (i = 0; i < memmap.nr_entries; i++) { | 181 | for (i = 0; i < memmap.nr_entries; i++) { |
183 | unsigned long long end = map[i].addr + map[i].size; | 182 | unsigned long long end = map[i].addr + map[i].size; |
184 | 183 | ||
185 | if (map[i].type == E820_RAM) { | 184 | if (map[i].type == E820_RAM && end > mem_end) { |
186 | if (map[i].addr < mem_end && end > mem_end) { | 185 | /* RAM off the end - may be partially included */ |
187 | /* Truncate region to max_mem. */ | 186 | u64 delta = min(map[i].size, end - mem_end); |
188 | u64 delta = end - mem_end; | ||
189 | 187 | ||
190 | map[i].size -= delta; | 188 | map[i].size -= delta; |
191 | extra_pages += PFN_DOWN(delta); | 189 | end -= delta; |
192 | 190 | ||
193 | end = mem_end; | 191 | extra_pages += PFN_DOWN(delta); |
194 | } | ||
195 | } | 192 | } |
196 | 193 | ||
197 | if (end > xen_extra_mem_start) | 194 | if (map[i].size > 0 && end > xen_extra_mem_start) |
198 | xen_extra_mem_start = end; | 195 | xen_extra_mem_start = end; |
199 | 196 | ||
200 | /* If region is non-RAM or below mem_end, add what remains */ | 197 | /* Add region if any remains */ |
201 | if ((map[i].type != E820_RAM || map[i].addr < mem_end) && | 198 | if (map[i].size > 0) |
202 | map[i].size > 0) | ||
203 | e820_add_region(map[i].addr, map[i].size, map[i].type); | 199 | e820_add_region(map[i].addr, map[i].size, map[i].type); |
204 | } | 200 | } |
205 | 201 | ||
@@ -248,26 +244,11 @@ char * __init xen_memory_setup(void) | |||
248 | else | 244 | else |
249 | extra_pages = 0; | 245 | extra_pages = 0; |
250 | 246 | ||
251 | if (!xen_initial_domain()) | 247 | xen_add_extra_mem(extra_pages); |
252 | xen_add_extra_mem(extra_pages); | ||
253 | 248 | ||
254 | return "Xen"; | 249 | return "Xen"; |
255 | } | 250 | } |
256 | 251 | ||
257 | static void xen_idle(void) | ||
258 | { | ||
259 | local_irq_disable(); | ||
260 | |||
261 | if (need_resched()) | ||
262 | local_irq_enable(); | ||
263 | else { | ||
264 | current_thread_info()->status &= ~TS_POLLING; | ||
265 | smp_mb__after_clear_bit(); | ||
266 | safe_halt(); | ||
267 | current_thread_info()->status |= TS_POLLING; | ||
268 | } | ||
269 | } | ||
270 | |||
271 | /* | 252 | /* |
272 | * Set the bit indicating "nosegneg" library variants should be used. | 253 | * Set the bit indicating "nosegneg" library variants should be used. |
273 | * We only need to bother in pure 32-bit mode; compat 32-bit processes | 254 | * We only need to bother in pure 32-bit mode; compat 32-bit processes |
@@ -337,9 +318,6 @@ void __cpuinit xen_enable_syscall(void) | |||
337 | 318 | ||
338 | void __init xen_arch_setup(void) | 319 | void __init xen_arch_setup(void) |
339 | { | 320 | { |
340 | struct physdev_set_iopl set_iopl; | ||
341 | int rc; | ||
342 | |||
343 | xen_panic_handler_init(); | 321 | xen_panic_handler_init(); |
344 | 322 | ||
345 | HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_4gb_segments); | 323 | HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_4gb_segments); |
@@ -356,11 +334,6 @@ void __init xen_arch_setup(void) | |||
356 | xen_enable_sysenter(); | 334 | xen_enable_sysenter(); |
357 | xen_enable_syscall(); | 335 | xen_enable_syscall(); |
358 | 336 | ||
359 | set_iopl.iopl = 1; | ||
360 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | ||
361 | if (rc != 0) | ||
362 | printk(KERN_INFO "physdev_op failed %d\n", rc); | ||
363 | |||
364 | #ifdef CONFIG_ACPI | 337 | #ifdef CONFIG_ACPI |
365 | if (!(xen_start_info->flags & SIF_INITDOMAIN)) { | 338 | if (!(xen_start_info->flags & SIF_INITDOMAIN)) { |
366 | printk(KERN_INFO "ACPI in unprivileged domain disabled\n"); | 339 | printk(KERN_INFO "ACPI in unprivileged domain disabled\n"); |
@@ -372,7 +345,11 @@ void __init xen_arch_setup(void) | |||
372 | MAX_GUEST_CMDLINE > COMMAND_LINE_SIZE ? | 345 | MAX_GUEST_CMDLINE > COMMAND_LINE_SIZE ? |
373 | COMMAND_LINE_SIZE : MAX_GUEST_CMDLINE); | 346 | COMMAND_LINE_SIZE : MAX_GUEST_CMDLINE); |
374 | 347 | ||
375 | pm_idle = xen_idle; | 348 | /* Set up idle, making sure it calls safe_halt() pvop */ |
349 | #ifdef CONFIG_X86_32 | ||
350 | boot_cpu_data.hlt_works_ok = 1; | ||
351 | #endif | ||
352 | pm_idle = default_idle; | ||
376 | 353 | ||
377 | fiddle_vdso(); | 354 | fiddle_vdso(); |
378 | } | 355 | } |
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c index 1d789d56877c..9bbd63a129b5 100644 --- a/arch/x86/xen/suspend.c +++ b/arch/x86/xen/suspend.c | |||
@@ -31,6 +31,7 @@ void xen_hvm_post_suspend(int suspend_cancelled) | |||
31 | int cpu; | 31 | int cpu; |
32 | xen_hvm_init_shared_info(); | 32 | xen_hvm_init_shared_info(); |
33 | xen_callback_vector(); | 33 | xen_callback_vector(); |
34 | xen_unplug_emulated_devices(); | ||
34 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) { | 35 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) { |
35 | for_each_online_cpu(cpu) { | 36 | for_each_online_cpu(cpu) { |
36 | xen_setup_runstate_info(cpu); | 37 | xen_setup_runstate_info(cpu); |
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index 64044747348e..9d41bf985757 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h | |||
@@ -43,7 +43,7 @@ void xen_vcpu_restore(void); | |||
43 | 43 | ||
44 | void xen_callback_vector(void); | 44 | void xen_callback_vector(void); |
45 | void xen_hvm_init_shared_info(void); | 45 | void xen_hvm_init_shared_info(void); |
46 | void __init xen_unplug_emulated_devices(void); | 46 | void xen_unplug_emulated_devices(void); |
47 | 47 | ||
48 | void __init xen_build_dynamic_phys_to_machine(void); | 48 | void __init xen_build_dynamic_phys_to_machine(void); |
49 | 49 | ||