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authorSoren Brinkmann <soren.brinkmann@xilinx.com>2014-04-04 17:27:56 -0400
committerMichal Simek <michal.simek@xilinx.com>2014-04-22 03:30:49 -0400
commit0f6faa3fc909482c2b40161de9bcf0d5460e54c5 (patch)
treef0909f3b704fb590958b97440d96ebbcf6fe6e06 /arch
parentb2bf5d484848450e7aa3332e268c5e874d9dc523 (diff)
ARM: zynq: dt: Add I2C nodes to Zynq device tree
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi22
-rw-r--r--arch/arm/boot/dts/zynq-zc702.dts76
-rw-r--r--arch/arm/boot/dts/zynq-zc706.dts68
3 files changed, 166 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index c39baefcfd76..c1176abc34d9 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -55,6 +55,28 @@
55 interrupt-parent = <&intc>; 55 interrupt-parent = <&intc>;
56 ranges; 56 ranges;
57 57
58 i2c0: zynq-i2c@e0004000 {
59 compatible = "cdns,i2c-r1p10";
60 status = "disabled";
61 clocks = <&clkc 38>;
62 interrupt-parent = <&intc>;
63 interrupts = <0 25 4>;
64 reg = <0xe0004000 0x1000>;
65 #address-cells = <1>;
66 #size-cells = <0>;
67 };
68
69 i2c1: zynq-i2c@e0005000 {
70 compatible = "cdns,i2c-r1p10";
71 status = "disabled";
72 clocks = <&clkc 39>;
73 interrupt-parent = <&intc>;
74 interrupts = <0 48 4>;
75 reg = <0xe0005000 0x1000>;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 };
79
58 intc: interrupt-controller@f8f01000 { 80 intc: interrupt-controller@f8f01000 {
59 compatible = "arm,cortex-a9-gic"; 81 compatible = "arm,cortex-a9-gic";
60 #interrupt-cells = <3>; 82 #interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index c913f77a21eb..5e09cee33d42 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -34,6 +34,82 @@
34 phy-mode = "rgmii"; 34 phy-mode = "rgmii";
35}; 35};
36 36
37&i2c0 {
38 status = "okay";
39 clock-frequency = <400000>;
40
41 i2cswitch@74 {
42 compatible = "nxp,pca9548";
43 #address-cells = <1>;
44 #size-cells = <0>;
45 reg = <0x74>;
46
47 i2c@0 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 reg = <0>;
51 si570: clock-generator@5d {
52 #clock-cells = <0>;
53 compatible = "silabs,si570";
54 temperature-stability = <50>;
55 reg = <0x5d>;
56 factory-fout = <156250000>;
57 clock-frequency = <148500000>;
58 };
59 };
60
61 i2c@2 {
62 #address-cells = <1>;
63 #size-cells = <0>;
64 reg = <2>;
65 eeprom@54 {
66 compatible = "at,24c08";
67 reg = <0x54>;
68 };
69 };
70
71 i2c@3 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 reg = <3>;
75 gpio@21 {
76 compatible = "ti,tca6416";
77 reg = <0x21>;
78 gpio-controller;
79 #gpio-cells = <2>;
80 };
81 };
82
83 i2c@4 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 reg = <4>;
87 rtc@51 {
88 compatible = "nxp,pcf8563";
89 reg = <0x51>;
90 };
91 };
92
93 i2c@7 {
94 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <7>;
97 hwmon@52 {
98 compatible = "ti,ucd9248";
99 reg = <52>;
100 };
101 hwmon@53 {
102 compatible = "ti,ucd9248";
103 reg = <53>;
104 };
105 hwmon@54 {
106 compatible = "ti,ucd9248";
107 reg = <54>;
108 };
109 };
110 };
111};
112
37&sdhci0 { 113&sdhci0 {
38 status = "okay"; 114 status = "okay";
39}; 115};
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 88f62c50382e..4cc9913078cd 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,74 @@
35 phy-mode = "rgmii"; 35 phy-mode = "rgmii";
36}; 36};
37 37
38&i2c0 {
39 status = "okay";
40 clock-frequency = <400000>;
41
42 i2cswitch@74 {
43 compatible = "nxp,pca9548";
44 #address-cells = <1>;
45 #size-cells = <0>;
46 reg = <0x74>;
47
48 i2c@0 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 reg = <0>;
52 si570: clock-generator@5d {
53 #clock-cells = <0>;
54 compatible = "silabs,si570";
55 temperature-stability = <50>;
56 reg = <0x5d>;
57 factory-fout = <156250000>;
58 clock-frequency = <148500000>;
59 };
60 };
61
62 i2c@2 {
63 #address-cells = <1>;
64 #size-cells = <0>;
65 reg = <2>;
66 eeprom@54 {
67 compatible = "at,24c08";
68 reg = <0x54>;
69 };
70 };
71
72 i2c@3 {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 reg = <3>;
76 gpio@21 {
77 compatible = "ti,tca6416";
78 reg = <0x21>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 };
82 };
83
84 i2c@4 {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 reg = <4>;
88 rtc@51 {
89 compatible = "nxp,pcf8563";
90 reg = <0x51>;
91 };
92 };
93
94 i2c@7 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 reg = <7>;
98 ucd90120@65 {
99 compatible = "ti,ucd90120";
100 reg = <0x65>;
101 };
102 };
103 };
104};
105
38&sdhci0 { 106&sdhci0 {
39 status = "okay"; 107 status = "okay";
40}; 108};