DaVinci: DM365: Adding entries for DM365 IRQ's

This patch adds definitions for some DM365 IRQs that are used by
the codecs. Codecs will also use the IRQs.
Entries are being added to enable/disable IRQ's.
There is no use as such for these entires in the kernel itself.
Instead these will be used by the "linuxutils" package of the DVSDK.

For further information on IRQ muxing refer to
http://focus.ti.com/lit/ug/sprufg5a/sprufg5a.pdf

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

3 files changed, 19 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f8bac9486b09..e81517434703 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -595,6 +595,14 @@ INT_CFG(DM365,  INT_EMAC_RXTHRESH,   14,    1,    1,     false)
 INT_CFG(DM365,  INT_EMAC_RXPULSE,    15,    1,    1,     false)
 INT_CFG(DM365,  INT_EMAC_TXPULSE,    16,    1,    1,     false)
 INT_CFG(DM365,  INT_EMAC_MISCPULSE,  17,    1,    1,     false)
+INT_CFG(DM365,  INT_IMX0_ENABLE,     0,     1,    0,     false)
+INT_CFG(DM365,  INT_IMX0_DISABLE,    0,     1,    1,     false)
+INT_CFG(DM365,  INT_HDVICP_ENABLE,   0,     1,    1,     false)
+INT_CFG(DM365,  INT_HDVICP_DISABLE,  0,     1,    0,     false)
+INT_CFG(DM365,  INT_IMX1_ENABLE,     24,    1,    1,     false)
+INT_CFG(DM365,  INT_IMX1_DISABLE,    24,    1,    0,     false)
+INT_CFG(DM365,  INT_NSF_ENABLE,      25,    1,    1,     false)
+INT_CFG(DM365,  INT_NSF_DISABLE,     25,    1,    0,     false)
 #endif
 };
 
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 7f755cc387e5..3c918a772619 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -205,6 +205,9 @@
 
 /* DaVinci DM365-specific Interrupts */
 #define IRQ_DM365_INSFINT       7
+#define IRQ_DM365_IMXINT1       8
+#define IRQ_DM365_IMXINT0       10
+#define IRQ_DM365_KLD_ARMINT    10
 #define IRQ_DM365_IMCOPINT      11
 #define IRQ_DM365_RTOINT        13
 #define IRQ_DM365_TINT5         14
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 7fad9b1a106b..773283281be8 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -301,6 +301,14 @@ enum davinci_dm365_index {
         DM365_INT_EMAC_RXPULSE,
         DM365_INT_EMAC_TXPULSE,
         DM365_INT_EMAC_MISCPULSE,
+        DM365_INT_IMX0_ENABLE,
+        DM365_INT_IMX0_DISABLE,
+        DM365_INT_HDVICP_ENABLE,
+        DM365_INT_HDVICP_DISABLE,
+        DM365_INT_IMX1_ENABLE,
+        DM365_INT_IMX1_DISABLE,
+        DM365_INT_NSF_ENABLE,
+        DM365_INT_NSF_DISABLE,
 
         /* EDMA event muxing */
         DM365_EVT2_ASP_TX,