diff options
| author | Tony Lindgren <tony@atomide.com> | 2011-02-22 13:54:12 -0500 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2011-02-22 13:54:12 -0500 |
| commit | 04aa67dec63b61c1a8b9b6d001262250f1a92130 (patch) | |
| tree | 7e0d2cfb30f904ffbd2ac39a055cd53034c873b7 /arch | |
| parent | 3b03b58dab847883e6b9a431558c7d8e43fa94c6 (diff) | |
| parent | 18a26892d62d2786c2b259ba4605ee10bba0ba13 (diff) | |
Merge branch 'for-tony' of git://gitorious.org/usb/usb into omap-for-linus
Conflicts:
arch/arm/mach-omap2/omap_hwmod_2430_data.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-omap2/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/board-4430sdp.c | 19 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/board-am3517evm.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 101 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 165 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_phy_internal.c | 93 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/usb-musb.c | 219 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/usb.h | 4 |
8 files changed, 452 insertions, 156 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ec24999eefea..ee72a9787bf1 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -218,7 +218,8 @@ obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \ | |||
| 218 | hsmmc.o \ | 218 | hsmmc.o \ |
| 219 | omap_phy_internal.o | 219 | omap_phy_internal.o |
| 220 | 220 | ||
| 221 | obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o | 221 | obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \ |
| 222 | omap_phy_internal.o \ | ||
| 222 | 223 | ||
| 223 | obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o | 224 | obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o |
| 224 | 225 | ||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 12d99e582cd6..bf8268438d00 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
| @@ -44,7 +44,6 @@ | |||
| 44 | #define ETH_KS8851_IRQ 34 | 44 | #define ETH_KS8851_IRQ 34 |
| 45 | #define ETH_KS8851_POWER_ON 48 | 45 | #define ETH_KS8851_POWER_ON 48 |
| 46 | #define ETH_KS8851_QUART 138 | 46 | #define ETH_KS8851_QUART 138 |
| 47 | #define OMAP4SDP_MDM_PWR_EN_GPIO 157 | ||
| 48 | #define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 | 47 | #define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 |
| 49 | #define OMAP4_SFH7741_ENABLE_GPIO 188 | 48 | #define OMAP4_SFH7741_ENABLE_GPIO 188 |
| 50 | 49 | ||
| @@ -250,16 +249,6 @@ static void __init omap_4430sdp_init_early(void) | |||
| 250 | #endif | 249 | #endif |
| 251 | } | 250 | } |
| 252 | 251 | ||
| 253 | static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 254 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 255 | .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 256 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 257 | .phy_reset = false, | ||
| 258 | .reset_gpio_port[0] = -EINVAL, | ||
| 259 | .reset_gpio_port[1] = -EINVAL, | ||
| 260 | .reset_gpio_port[2] = -EINVAL, | ||
| 261 | }; | ||
| 262 | |||
| 263 | static struct omap_musb_board_data musb_board_data = { | 252 | static struct omap_musb_board_data musb_board_data = { |
| 264 | .interface_type = MUSB_INTERFACE_UTMI, | 253 | .interface_type = MUSB_INTERFACE_UTMI, |
| 265 | .mode = MUSB_OTG, | 254 | .mode = MUSB_OTG, |
| @@ -575,14 +564,6 @@ static void __init omap_4430sdp_init(void) | |||
| 575 | omap_serial_init(); | 564 | omap_serial_init(); |
| 576 | omap4_twl6030_hsmmc_init(mmc); | 565 | omap4_twl6030_hsmmc_init(mmc); |
| 577 | 566 | ||
| 578 | /* Power on the ULPI PHY */ | ||
| 579 | status = gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3"); | ||
| 580 | if (status) | ||
| 581 | pr_err("%s: Could not get USBB1 PHY GPIO\n", __func__); | ||
| 582 | else | ||
| 583 | gpio_direction_output(OMAP4SDP_MDM_PWR_EN_GPIO, 1); | ||
| 584 | |||
| 585 | usb_ehci_init(&ehci_pdata); | ||
| 586 | usb_musb_init(&musb_board_data); | 567 | usb_musb_init(&musb_board_data); |
| 587 | 568 | ||
| 588 | status = omap_ethernet_init(); | 569 | status = omap_ethernet_init(); |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index d0d0f5528132..8532d6e0d53a 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
| @@ -408,6 +408,10 @@ static struct omap_musb_board_data musb_board_data = { | |||
| 408 | .interface_type = MUSB_INTERFACE_ULPI, | 408 | .interface_type = MUSB_INTERFACE_ULPI, |
| 409 | .mode = MUSB_OTG, | 409 | .mode = MUSB_OTG, |
| 410 | .power = 500, | 410 | .power = 500, |
| 411 | .set_phy_power = am35x_musb_phy_power, | ||
| 412 | .clear_irq = am35x_musb_clear_irq, | ||
| 413 | .set_mode = am35x_musb_set_mode, | ||
| 414 | .reset = am35x_musb_reset, | ||
| 411 | }; | 415 | }; |
| 412 | 416 | ||
| 413 | static __init void am3517_evm_musb_init(void) | 417 | static __init void am3517_evm_musb_init(void) |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 60fe4aac1f50..7ba688a1c840 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
| @@ -93,6 +93,16 @@ static struct omap_hwmod omap2430_uart3_hwmod; | |||
| 93 | static struct omap_hwmod omap2430_i2c1_hwmod; | 93 | static struct omap_hwmod omap2430_i2c1_hwmod; |
| 94 | static struct omap_hwmod omap2430_i2c2_hwmod; | 94 | static struct omap_hwmod omap2430_i2c2_hwmod; |
| 95 | 95 | ||
| 96 | static struct omap_hwmod omap2430_usbhsotg_hwmod; | ||
| 97 | |||
| 98 | /* l3_core -> usbhsotg interface */ | ||
| 99 | static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { | ||
| 100 | .master = &omap2430_usbhsotg_hwmod, | ||
| 101 | .slave = &omap2430_l3_main_hwmod, | ||
| 102 | .clk = "core_l3_ck", | ||
| 103 | .user = OCP_USER_MPU, | ||
| 104 | }; | ||
| 105 | |||
| 96 | /* I2C IP block address space length (in bytes) */ | 106 | /* I2C IP block address space length (in bytes) */ |
| 97 | #define OMAP2_I2C_AS_LEN 128 | 107 | #define OMAP2_I2C_AS_LEN 128 |
| 98 | 108 | ||
| @@ -193,6 +203,35 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | |||
| 193 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 203 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 194 | }; | 204 | }; |
| 195 | 205 | ||
| 206 | /* | ||
| 207 | * usbhsotg interface data | ||
| 208 | */ | ||
| 209 | static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { | ||
| 210 | { | ||
| 211 | .pa_start = OMAP243X_HS_BASE, | ||
| 212 | .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, | ||
| 213 | .flags = ADDR_TYPE_RT | ||
| 214 | }, | ||
| 215 | }; | ||
| 216 | |||
| 217 | /* l4_core ->usbhsotg interface */ | ||
| 218 | static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { | ||
| 219 | .master = &omap2430_l4_core_hwmod, | ||
| 220 | .slave = &omap2430_usbhsotg_hwmod, | ||
| 221 | .clk = "usb_l4_ick", | ||
| 222 | .addr = omap2430_usbhsotg_addrs, | ||
| 223 | .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), | ||
| 224 | .user = OCP_USER_MPU, | ||
| 225 | }; | ||
| 226 | |||
| 227 | static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = { | ||
| 228 | &omap2430_usbhsotg__l3, | ||
| 229 | }; | ||
| 230 | |||
| 231 | static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { | ||
| 232 | &omap2430_l4_core__usbhsotg, | ||
| 233 | }; | ||
| 234 | |||
| 196 | /* Slave interfaces on the L4_CORE interconnect */ | 235 | /* Slave interfaces on the L4_CORE interconnect */ |
| 197 | static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { | 236 | static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { |
| 198 | &omap2430_l3_main__l4_core, | 237 | &omap2430_l3_main__l4_core, |
| @@ -1133,6 +1172,64 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { | |||
| 1133 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | 1172 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
| 1134 | }; | 1173 | }; |
| 1135 | 1174 | ||
| 1175 | /* | ||
| 1176 | * usbhsotg | ||
| 1177 | */ | ||
| 1178 | static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { | ||
| 1179 | .rev_offs = 0x0400, | ||
| 1180 | .sysc_offs = 0x0404, | ||
| 1181 | .syss_offs = 0x0408, | ||
| 1182 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| | ||
| 1183 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1184 | SYSC_HAS_AUTOIDLE), | ||
| 1185 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 1186 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 1187 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1188 | }; | ||
| 1189 | |||
| 1190 | static struct omap_hwmod_class usbotg_class = { | ||
| 1191 | .name = "usbotg", | ||
| 1192 | .sysc = &omap2430_usbhsotg_sysc, | ||
| 1193 | }; | ||
| 1194 | |||
| 1195 | /* usb_otg_hs */ | ||
| 1196 | static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { | ||
| 1197 | |||
| 1198 | { .name = "mc", .irq = 92 }, | ||
| 1199 | { .name = "dma", .irq = 93 }, | ||
| 1200 | }; | ||
| 1201 | |||
| 1202 | static struct omap_hwmod omap2430_usbhsotg_hwmod = { | ||
| 1203 | .name = "usb_otg_hs", | ||
| 1204 | .mpu_irqs = omap2430_usbhsotg_mpu_irqs, | ||
| 1205 | .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), | ||
| 1206 | .main_clk = "usbhs_ick", | ||
| 1207 | .prcm = { | ||
| 1208 | .omap2 = { | ||
| 1209 | .prcm_reg_id = 1, | ||
| 1210 | .module_bit = OMAP2430_EN_USBHS_MASK, | ||
| 1211 | .module_offs = CORE_MOD, | ||
| 1212 | .idlest_reg_id = 1, | ||
| 1213 | .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, | ||
| 1214 | }, | ||
| 1215 | }, | ||
| 1216 | .masters = omap2430_usbhsotg_masters, | ||
| 1217 | .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters), | ||
| 1218 | .slaves = omap2430_usbhsotg_slaves, | ||
| 1219 | .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves), | ||
| 1220 | .class = &usbotg_class, | ||
| 1221 | /* | ||
| 1222 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially | ||
| 1223 | * broken when autoidle is enabled | ||
| 1224 | * workaround is to disable the autoidle bit at module level. | ||
| 1225 | */ | ||
| 1226 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | ||
| 1227 | | HWMOD_SWSUP_MSTANDBY, | ||
| 1228 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 1229 | }; | ||
| 1230 | |||
| 1231 | |||
| 1232 | |||
| 1136 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { | 1233 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { |
| 1137 | &omap2430_l3_main_hwmod, | 1234 | &omap2430_l3_main_hwmod, |
| 1138 | &omap2430_l4_core_hwmod, | 1235 | &omap2430_l4_core_hwmod, |
| @@ -1160,6 +1257,10 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = { | |||
| 1160 | &omap2430_mcspi1_hwmod, | 1257 | &omap2430_mcspi1_hwmod, |
| 1161 | &omap2430_mcspi2_hwmod, | 1258 | &omap2430_mcspi2_hwmod, |
| 1162 | &omap2430_mcspi3_hwmod, | 1259 | &omap2430_mcspi3_hwmod, |
| 1260 | |||
| 1261 | /* usbotg class*/ | ||
| 1262 | &omap2430_usbhsotg_hwmod, | ||
| 1263 | |||
| 1163 | NULL, | 1264 | NULL, |
| 1164 | }; | 1265 | }; |
| 1165 | 1266 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 800eda4adb54..879f55f272e2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include "prm-regbits-34xx.h" | 29 | #include "prm-regbits-34xx.h" |
| 30 | #include "cm-regbits-34xx.h" | 30 | #include "cm-regbits-34xx.h" |
| 31 | #include "wd_timer.h" | 31 | #include "wd_timer.h" |
| 32 | #include <mach/am35xx.h> | ||
| 32 | 33 | ||
| 33 | /* | 34 | /* |
| 34 | * OMAP3xxx hardware module integration data | 35 | * OMAP3xxx hardware module integration data |
| @@ -60,6 +61,7 @@ static struct omap_hwmod omap34xx_mcspi1; | |||
| 60 | static struct omap_hwmod omap34xx_mcspi2; | 61 | static struct omap_hwmod omap34xx_mcspi2; |
| 61 | static struct omap_hwmod omap34xx_mcspi3; | 62 | static struct omap_hwmod omap34xx_mcspi3; |
| 62 | static struct omap_hwmod omap34xx_mcspi4; | 63 | static struct omap_hwmod omap34xx_mcspi4; |
| 64 | static struct omap_hwmod am35xx_usbhsotg_hwmod; | ||
| 63 | 65 | ||
| 64 | static struct omap_hwmod omap3xxx_dma_system_hwmod; | 66 | static struct omap_hwmod omap3xxx_dma_system_hwmod; |
| 65 | 67 | ||
| @@ -112,7 +114,23 @@ static struct omap_hwmod omap3xxx_uart1_hwmod; | |||
| 112 | static struct omap_hwmod omap3xxx_uart2_hwmod; | 114 | static struct omap_hwmod omap3xxx_uart2_hwmod; |
| 113 | static struct omap_hwmod omap3xxx_uart3_hwmod; | 115 | static struct omap_hwmod omap3xxx_uart3_hwmod; |
| 114 | static struct omap_hwmod omap3xxx_uart4_hwmod; | 116 | static struct omap_hwmod omap3xxx_uart4_hwmod; |
| 117 | static struct omap_hwmod omap3xxx_usbhsotg_hwmod; | ||
| 115 | 118 | ||
| 119 | /* l3_core -> usbhsotg interface */ | ||
| 120 | static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = { | ||
| 121 | .master = &omap3xxx_usbhsotg_hwmod, | ||
| 122 | .slave = &omap3xxx_l3_main_hwmod, | ||
| 123 | .clk = "core_l3_ick", | ||
| 124 | .user = OCP_USER_MPU, | ||
| 125 | }; | ||
| 126 | |||
| 127 | /* l3_core -> am35xx_usbhsotg interface */ | ||
| 128 | static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = { | ||
| 129 | .master = &am35xx_usbhsotg_hwmod, | ||
| 130 | .slave = &omap3xxx_l3_main_hwmod, | ||
| 131 | .clk = "core_l3_ick", | ||
| 132 | .user = OCP_USER_MPU, | ||
| 133 | }; | ||
| 116 | /* L4_CORE -> L4_WKUP interface */ | 134 | /* L4_CORE -> L4_WKUP interface */ |
| 117 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { | 135 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { |
| 118 | .master = &omap3xxx_l4_core_hwmod, | 136 | .master = &omap3xxx_l4_core_hwmod, |
| @@ -306,6 +324,61 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { | |||
| 306 | .user = OCP_USER_MPU, | 324 | .user = OCP_USER_MPU, |
| 307 | }; | 325 | }; |
| 308 | 326 | ||
| 327 | /* | ||
| 328 | * usbhsotg interface data | ||
| 329 | */ | ||
| 330 | |||
| 331 | static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { | ||
| 332 | { | ||
| 333 | .pa_start = OMAP34XX_HSUSB_OTG_BASE, | ||
| 334 | .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, | ||
| 335 | .flags = ADDR_TYPE_RT | ||
| 336 | }, | ||
| 337 | }; | ||
| 338 | |||
| 339 | /* l4_core -> usbhsotg */ | ||
| 340 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { | ||
| 341 | .master = &omap3xxx_l4_core_hwmod, | ||
| 342 | .slave = &omap3xxx_usbhsotg_hwmod, | ||
| 343 | .clk = "l4_ick", | ||
| 344 | .addr = omap3xxx_usbhsotg_addrs, | ||
| 345 | .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), | ||
| 346 | .user = OCP_USER_MPU, | ||
| 347 | }; | ||
| 348 | |||
| 349 | static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = { | ||
| 350 | &omap3xxx_usbhsotg__l3, | ||
| 351 | }; | ||
| 352 | |||
| 353 | static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = { | ||
| 354 | &omap3xxx_l4_core__usbhsotg, | ||
| 355 | }; | ||
| 356 | |||
| 357 | static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { | ||
| 358 | { | ||
| 359 | .pa_start = AM35XX_IPSS_USBOTGSS_BASE, | ||
| 360 | .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, | ||
| 361 | .flags = ADDR_TYPE_RT | ||
| 362 | }, | ||
| 363 | }; | ||
| 364 | |||
| 365 | /* l4_core -> usbhsotg */ | ||
| 366 | static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { | ||
| 367 | .master = &omap3xxx_l4_core_hwmod, | ||
| 368 | .slave = &am35xx_usbhsotg_hwmod, | ||
| 369 | .clk = "l4_ick", | ||
| 370 | .addr = am35xx_usbhsotg_addrs, | ||
| 371 | .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), | ||
| 372 | .user = OCP_USER_MPU, | ||
| 373 | }; | ||
| 374 | |||
| 375 | static struct omap_hwmod_ocp_if *am35xx_usbhsotg_masters[] = { | ||
| 376 | &am35xx_usbhsotg__l3, | ||
| 377 | }; | ||
| 378 | |||
| 379 | static struct omap_hwmod_ocp_if *am35xx_usbhsotg_slaves[] = { | ||
| 380 | &am35xx_l4_core__usbhsotg, | ||
| 381 | }; | ||
| 309 | /* Slave interfaces on the L4_CORE interconnect */ | 382 | /* Slave interfaces on the L4_CORE interconnect */ |
| 310 | static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { | 383 | static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { |
| 311 | &omap3xxx_l3_main__l4_core, | 384 | &omap3xxx_l3_main__l4_core, |
| @@ -1630,6 +1703,91 @@ static struct omap_hwmod omap34xx_mcspi4 = { | |||
| 1630 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 1703 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
| 1631 | }; | 1704 | }; |
| 1632 | 1705 | ||
| 1706 | /* | ||
| 1707 | * usbhsotg | ||
| 1708 | */ | ||
| 1709 | static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = { | ||
| 1710 | .rev_offs = 0x0400, | ||
| 1711 | .sysc_offs = 0x0404, | ||
| 1712 | .syss_offs = 0x0408, | ||
| 1713 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| | ||
| 1714 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1715 | SYSC_HAS_AUTOIDLE), | ||
| 1716 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 1717 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 1718 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1719 | }; | ||
| 1720 | |||
| 1721 | static struct omap_hwmod_class usbotg_class = { | ||
| 1722 | .name = "usbotg", | ||
| 1723 | .sysc = &omap3xxx_usbhsotg_sysc, | ||
| 1724 | }; | ||
| 1725 | /* usb_otg_hs */ | ||
| 1726 | static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { | ||
| 1727 | |||
| 1728 | { .name = "mc", .irq = 92 }, | ||
| 1729 | { .name = "dma", .irq = 93 }, | ||
| 1730 | }; | ||
| 1731 | |||
| 1732 | static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { | ||
| 1733 | .name = "usb_otg_hs", | ||
| 1734 | .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, | ||
| 1735 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), | ||
| 1736 | .main_clk = "hsotgusb_ick", | ||
| 1737 | .prcm = { | ||
| 1738 | .omap2 = { | ||
| 1739 | .prcm_reg_id = 1, | ||
| 1740 | .module_bit = OMAP3430_EN_HSOTGUSB_SHIFT, | ||
| 1741 | .module_offs = CORE_MOD, | ||
| 1742 | .idlest_reg_id = 1, | ||
| 1743 | .idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT, | ||
| 1744 | .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT | ||
| 1745 | }, | ||
| 1746 | }, | ||
| 1747 | .masters = omap3xxx_usbhsotg_masters, | ||
| 1748 | .masters_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_masters), | ||
| 1749 | .slaves = omap3xxx_usbhsotg_slaves, | ||
| 1750 | .slaves_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_slaves), | ||
| 1751 | .class = &usbotg_class, | ||
| 1752 | |||
| 1753 | /* | ||
| 1754 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially | ||
| 1755 | * broken when autoidle is enabled | ||
| 1756 | * workaround is to disable the autoidle bit at module level. | ||
| 1757 | */ | ||
| 1758 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | ||
| 1759 | | HWMOD_SWSUP_MSTANDBY, | ||
| 1760 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | ||
| 1761 | }; | ||
| 1762 | |||
| 1763 | /* usb_otg_hs */ | ||
| 1764 | static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { | ||
| 1765 | |||
| 1766 | { .name = "mc", .irq = 71 }, | ||
| 1767 | }; | ||
| 1768 | |||
| 1769 | static struct omap_hwmod_class am35xx_usbotg_class = { | ||
| 1770 | .name = "am35xx_usbotg", | ||
| 1771 | .sysc = NULL, | ||
| 1772 | }; | ||
| 1773 | |||
| 1774 | static struct omap_hwmod am35xx_usbhsotg_hwmod = { | ||
| 1775 | .name = "am35x_otg_hs", | ||
| 1776 | .mpu_irqs = am35xx_usbhsotg_mpu_irqs, | ||
| 1777 | .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), | ||
| 1778 | .main_clk = NULL, | ||
| 1779 | .prcm = { | ||
| 1780 | .omap2 = { | ||
| 1781 | }, | ||
| 1782 | }, | ||
| 1783 | .masters = am35xx_usbhsotg_masters, | ||
| 1784 | .masters_cnt = ARRAY_SIZE(am35xx_usbhsotg_masters), | ||
| 1785 | .slaves = am35xx_usbhsotg_slaves, | ||
| 1786 | .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves), | ||
| 1787 | .class = &am35xx_usbotg_class, | ||
| 1788 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1) | ||
| 1789 | }; | ||
| 1790 | |||
| 1633 | static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | 1791 | static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { |
| 1634 | &omap3xxx_l3_main_hwmod, | 1792 | &omap3xxx_l3_main_hwmod, |
| 1635 | &omap3xxx_l4_core_hwmod, | 1793 | &omap3xxx_l4_core_hwmod, |
| @@ -1667,6 +1825,13 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | |||
| 1667 | &omap34xx_mcspi2, | 1825 | &omap34xx_mcspi2, |
| 1668 | &omap34xx_mcspi3, | 1826 | &omap34xx_mcspi3, |
| 1669 | &omap34xx_mcspi4, | 1827 | &omap34xx_mcspi4, |
| 1828 | |||
| 1829 | /* usbotg class */ | ||
| 1830 | &omap3xxx_usbhsotg_hwmod, | ||
| 1831 | |||
| 1832 | /* usbotg for am35x */ | ||
| 1833 | &am35xx_usbhsotg_hwmod, | ||
| 1834 | |||
| 1670 | NULL, | 1835 | NULL, |
| 1671 | }; | 1836 | }; |
| 1672 | 1837 | ||
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 745252c60e32..f172ec06c06a 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <linux/usb.h> | 29 | #include <linux/usb.h> |
| 30 | 30 | ||
| 31 | #include <plat/usb.h> | 31 | #include <plat/usb.h> |
| 32 | #include "control.h" | ||
| 32 | 33 | ||
| 33 | /* OMAP control module register for UTMI PHY */ | 34 | /* OMAP control module register for UTMI PHY */ |
| 34 | #define CONTROL_DEV_CONF 0x300 | 35 | #define CONTROL_DEV_CONF 0x300 |
| @@ -147,3 +148,95 @@ int omap4430_phy_exit(struct device *dev) | |||
| 147 | 148 | ||
| 148 | return 0; | 149 | return 0; |
| 149 | } | 150 | } |
| 151 | |||
| 152 | void am35x_musb_reset(void) | ||
| 153 | { | ||
| 154 | u32 regval; | ||
| 155 | |||
| 156 | /* Reset the musb interface */ | ||
| 157 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
| 158 | |||
| 159 | regval |= AM35XX_USBOTGSS_SW_RST; | ||
| 160 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
| 161 | |||
| 162 | regval &= ~AM35XX_USBOTGSS_SW_RST; | ||
| 163 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
| 164 | |||
| 165 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
| 166 | } | ||
| 167 | |||
| 168 | void am35x_musb_phy_power(u8 on) | ||
| 169 | { | ||
| 170 | unsigned long timeout = jiffies + msecs_to_jiffies(100); | ||
| 171 | u32 devconf2; | ||
| 172 | |||
| 173 | if (on) { | ||
| 174 | /* | ||
| 175 | * Start the on-chip PHY and its PLL. | ||
| 176 | */ | ||
| 177 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 178 | |||
| 179 | devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN); | ||
| 180 | devconf2 |= CONF2_PHY_PLLON; | ||
| 181 | |||
| 182 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 183 | |||
| 184 | pr_info(KERN_INFO "Waiting for PHY clock good...\n"); | ||
| 185 | while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2) | ||
| 186 | & CONF2_PHYCLKGD)) { | ||
| 187 | cpu_relax(); | ||
| 188 | |||
| 189 | if (time_after(jiffies, timeout)) { | ||
| 190 | pr_err(KERN_ERR "musb PHY clock good timed out\n"); | ||
| 191 | break; | ||
| 192 | } | ||
| 193 | } | ||
| 194 | } else { | ||
| 195 | /* | ||
| 196 | * Power down the on-chip PHY. | ||
| 197 | */ | ||
| 198 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 199 | |||
| 200 | devconf2 &= ~CONF2_PHY_PLLON; | ||
| 201 | devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN; | ||
| 202 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 203 | } | ||
| 204 | } | ||
| 205 | |||
| 206 | void am35x_musb_clear_irq(void) | ||
| 207 | { | ||
| 208 | u32 regval; | ||
| 209 | |||
| 210 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 211 | regval |= AM35XX_USBOTGSS_INT_CLR; | ||
| 212 | omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 213 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 214 | } | ||
| 215 | |||
| 216 | void am35x_musb_set_mode(u8 musb_mode) | ||
| 217 | { | ||
| 218 | u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 219 | |||
| 220 | devconf2 &= ~CONF2_OTGMODE; | ||
| 221 | switch (musb_mode) { | ||
| 222 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | ||
| 223 | case MUSB_HOST: /* Force VBUS valid, ID = 0 */ | ||
| 224 | devconf2 |= CONF2_FORCE_HOST; | ||
| 225 | break; | ||
| 226 | #endif | ||
| 227 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | ||
| 228 | case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ | ||
| 229 | devconf2 |= CONF2_FORCE_DEVICE; | ||
| 230 | break; | ||
| 231 | #endif | ||
| 232 | #ifdef CONFIG_USB_MUSB_OTG | ||
| 233 | case MUSB_OTG: /* Don't override the VBUS/ID comparators */ | ||
| 234 | devconf2 |= CONF2_NO_OVERRIDE; | ||
| 235 | break; | ||
| 236 | #endif | ||
| 237 | default: | ||
| 238 | pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); | ||
| 239 | } | ||
| 240 | |||
| 241 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 242 | } | ||
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 5298949d4b11..a9d4d143086d 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
| @@ -30,118 +30,11 @@ | |||
| 30 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
| 31 | #include <mach/am35xx.h> | 31 | #include <mach/am35xx.h> |
| 32 | #include <plat/usb.h> | 32 | #include <plat/usb.h> |
| 33 | #include "control.h" | 33 | #include <plat/omap_device.h> |
| 34 | #include "mux.h" | ||
| 34 | 35 | ||
| 35 | #if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X) | 36 | #if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X) |
| 36 | 37 | ||
| 37 | static void am35x_musb_reset(void) | ||
| 38 | { | ||
| 39 | u32 regval; | ||
| 40 | |||
| 41 | /* Reset the musb interface */ | ||
| 42 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
| 43 | |||
| 44 | regval |= AM35XX_USBOTGSS_SW_RST; | ||
| 45 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
| 46 | |||
| 47 | regval &= ~AM35XX_USBOTGSS_SW_RST; | ||
| 48 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
| 49 | |||
| 50 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
| 51 | } | ||
| 52 | |||
| 53 | static void am35x_musb_phy_power(u8 on) | ||
| 54 | { | ||
| 55 | unsigned long timeout = jiffies + msecs_to_jiffies(100); | ||
| 56 | u32 devconf2; | ||
| 57 | |||
| 58 | if (on) { | ||
| 59 | /* | ||
| 60 | * Start the on-chip PHY and its PLL. | ||
| 61 | */ | ||
| 62 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 63 | |||
| 64 | devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN); | ||
| 65 | devconf2 |= CONF2_PHY_PLLON; | ||
| 66 | |||
| 67 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 68 | |||
| 69 | pr_info(KERN_INFO "Waiting for PHY clock good...\n"); | ||
| 70 | while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2) | ||
| 71 | & CONF2_PHYCLKGD)) { | ||
| 72 | cpu_relax(); | ||
| 73 | |||
| 74 | if (time_after(jiffies, timeout)) { | ||
| 75 | pr_err(KERN_ERR "musb PHY clock good timed out\n"); | ||
| 76 | break; | ||
| 77 | } | ||
| 78 | } | ||
| 79 | } else { | ||
| 80 | /* | ||
| 81 | * Power down the on-chip PHY. | ||
| 82 | */ | ||
| 83 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 84 | |||
| 85 | devconf2 &= ~CONF2_PHY_PLLON; | ||
| 86 | devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN; | ||
| 87 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 88 | } | ||
| 89 | } | ||
| 90 | |||
| 91 | static void am35x_musb_clear_irq(void) | ||
| 92 | { | ||
| 93 | u32 regval; | ||
| 94 | |||
| 95 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 96 | regval |= AM35XX_USBOTGSS_INT_CLR; | ||
| 97 | omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 98 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
| 99 | } | ||
| 100 | |||
| 101 | static void am35x_musb_set_mode(u8 musb_mode) | ||
| 102 | { | ||
| 103 | u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
| 104 | |||
| 105 | devconf2 &= ~CONF2_OTGMODE; | ||
| 106 | switch (musb_mode) { | ||
| 107 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | ||
| 108 | case MUSB_HOST: /* Force VBUS valid, ID = 0 */ | ||
| 109 | devconf2 |= CONF2_FORCE_HOST; | ||
| 110 | break; | ||
| 111 | #endif | ||
| 112 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | ||
| 113 | case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ | ||
| 114 | devconf2 |= CONF2_FORCE_DEVICE; | ||
| 115 | break; | ||
| 116 | #endif | ||
| 117 | #ifdef CONFIG_USB_MUSB_OTG | ||
| 118 | case MUSB_OTG: /* Don't override the VBUS/ID comparators */ | ||
| 119 | devconf2 |= CONF2_NO_OVERRIDE; | ||
| 120 | break; | ||
| 121 | #endif | ||
| 122 | default: | ||
| 123 | pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); | ||
| 124 | } | ||
| 125 | |||
| 126 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
| 127 | } | ||
| 128 | |||
| 129 | static struct resource musb_resources[] = { | ||
| 130 | [0] = { /* start and end set dynamically */ | ||
| 131 | .flags = IORESOURCE_MEM, | ||
| 132 | }, | ||
| 133 | [1] = { /* general IRQ */ | ||
| 134 | .start = INT_243X_HS_USB_MC, | ||
| 135 | .flags = IORESOURCE_IRQ, | ||
| 136 | .name = "mc", | ||
| 137 | }, | ||
| 138 | [2] = { /* DMA IRQ */ | ||
| 139 | .start = INT_243X_HS_USB_DMA, | ||
| 140 | .flags = IORESOURCE_IRQ, | ||
| 141 | .name = "dma", | ||
| 142 | }, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct musb_hdrc_config musb_config = { | 38 | static struct musb_hdrc_config musb_config = { |
| 146 | .multipoint = 1, | 39 | .multipoint = 1, |
| 147 | .dyn_fifo = 1, | 40 | .dyn_fifo = 1, |
| @@ -169,38 +62,65 @@ static struct musb_hdrc_platform_data musb_plat = { | |||
| 169 | 62 | ||
| 170 | static u64 musb_dmamask = DMA_BIT_MASK(32); | 63 | static u64 musb_dmamask = DMA_BIT_MASK(32); |
| 171 | 64 | ||
| 172 | static struct platform_device musb_device = { | 65 | static struct omap_device_pm_latency omap_musb_latency[] = { |
| 173 | .name = "musb-omap2430", | 66 | { |
| 174 | .id = -1, | 67 | .deactivate_func = omap_device_idle_hwmods, |
| 175 | .dev = { | 68 | .activate_func = omap_device_enable_hwmods, |
| 176 | .dma_mask = &musb_dmamask, | 69 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, |
| 177 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 178 | .platform_data = &musb_plat, | ||
| 179 | }, | 70 | }, |
| 180 | .num_resources = ARRAY_SIZE(musb_resources), | ||
| 181 | .resource = musb_resources, | ||
| 182 | }; | 71 | }; |
| 183 | 72 | ||
| 73 | static void usb_musb_mux_init(struct omap_musb_board_data *board_data) | ||
| 74 | { | ||
| 75 | switch (board_data->interface_type) { | ||
| 76 | case MUSB_INTERFACE_UTMI: | ||
| 77 | omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT); | ||
| 78 | omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT); | ||
| 79 | break; | ||
| 80 | case MUSB_INTERFACE_ULPI: | ||
| 81 | omap_mux_init_signal("usba0_ulpiphy_clk", | ||
| 82 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 83 | omap_mux_init_signal("usba0_ulpiphy_stp", | ||
| 84 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 85 | omap_mux_init_signal("usba0_ulpiphy_dir", | ||
| 86 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 87 | omap_mux_init_signal("usba0_ulpiphy_nxt", | ||
| 88 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 89 | omap_mux_init_signal("usba0_ulpiphy_dat0", | ||
| 90 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 91 | omap_mux_init_signal("usba0_ulpiphy_dat1", | ||
| 92 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 93 | omap_mux_init_signal("usba0_ulpiphy_dat2", | ||
| 94 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 95 | omap_mux_init_signal("usba0_ulpiphy_dat3", | ||
| 96 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 97 | omap_mux_init_signal("usba0_ulpiphy_dat4", | ||
| 98 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 99 | omap_mux_init_signal("usba0_ulpiphy_dat5", | ||
| 100 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 101 | omap_mux_init_signal("usba0_ulpiphy_dat6", | ||
| 102 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 103 | omap_mux_init_signal("usba0_ulpiphy_dat7", | ||
| 104 | OMAP_PIN_INPUT_PULLDOWN); | ||
| 105 | break; | ||
| 106 | default: | ||
| 107 | break; | ||
| 108 | } | ||
| 109 | } | ||
| 110 | |||
| 184 | void __init usb_musb_init(struct omap_musb_board_data *board_data) | 111 | void __init usb_musb_init(struct omap_musb_board_data *board_data) |
| 185 | { | 112 | { |
| 186 | if (cpu_is_omap243x()) { | 113 | struct omap_hwmod *oh; |
| 187 | musb_resources[0].start = OMAP243X_HS_BASE; | 114 | struct omap_device *od; |
| 188 | } else if (cpu_is_omap3517() || cpu_is_omap3505()) { | 115 | struct platform_device *pdev; |
| 189 | musb_device.name = "musb-am35x"; | 116 | struct device *dev; |
| 190 | musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE; | 117 | int bus_id = -1; |
| 191 | musb_resources[1].start = INT_35XX_USBOTG_IRQ; | 118 | const char *oh_name, *name; |
| 192 | board_data->set_phy_power = am35x_musb_phy_power; | 119 | |
| 193 | board_data->clear_irq = am35x_musb_clear_irq; | 120 | if (cpu_is_omap3517() || cpu_is_omap3505()) { |
| 194 | board_data->set_mode = am35x_musb_set_mode; | ||
| 195 | board_data->reset = am35x_musb_reset; | ||
| 196 | } else if (cpu_is_omap34xx()) { | ||
| 197 | musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; | ||
| 198 | } else if (cpu_is_omap44xx()) { | 121 | } else if (cpu_is_omap44xx()) { |
| 199 | musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE; | 122 | usb_musb_mux_init(board_data); |
| 200 | musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N; | ||
| 201 | musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N; | ||
| 202 | } | 123 | } |
| 203 | musb_resources[0].end = musb_resources[0].start + SZ_4K - 1; | ||
| 204 | 124 | ||
| 205 | /* | 125 | /* |
| 206 | * REVISIT: This line can be removed once all the platforms using | 126 | * REVISIT: This line can be removed once all the platforms using |
| @@ -212,8 +132,35 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) | |||
| 212 | musb_plat.mode = board_data->mode; | 132 | musb_plat.mode = board_data->mode; |
| 213 | musb_plat.extvbus = board_data->extvbus; | 133 | musb_plat.extvbus = board_data->extvbus; |
| 214 | 134 | ||
| 215 | if (platform_device_register(&musb_device) < 0) | 135 | if (cpu_is_omap3517() || cpu_is_omap3505()) { |
| 216 | printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); | 136 | oh_name = "am35x_otg_hs"; |
| 137 | name = "musb-am35x"; | ||
| 138 | } else { | ||
| 139 | oh_name = "usb_otg_hs"; | ||
| 140 | name = "musb-omap2430"; | ||
| 141 | } | ||
| 142 | |||
| 143 | oh = omap_hwmod_lookup(oh_name); | ||
| 144 | if (!oh) { | ||
| 145 | pr_err("Could not look up %s\n", oh_name); | ||
| 146 | return; | ||
| 147 | } | ||
| 148 | |||
| 149 | od = omap_device_build(name, bus_id, oh, &musb_plat, | ||
| 150 | sizeof(musb_plat), omap_musb_latency, | ||
| 151 | ARRAY_SIZE(omap_musb_latency), false); | ||
| 152 | if (IS_ERR(od)) { | ||
| 153 | pr_err("Could not build omap_device for %s %s\n", | ||
| 154 | name, oh_name); | ||
| 155 | return; | ||
| 156 | } | ||
| 157 | |||
| 158 | pdev = &od->pdev; | ||
| 159 | dev = &pdev->dev; | ||
| 160 | get_device(dev); | ||
| 161 | dev->dma_mask = &musb_dmamask; | ||
| 162 | dev->coherent_dma_mask = musb_dmamask; | ||
| 163 | put_device(dev); | ||
| 217 | } | 164 | } |
| 218 | 165 | ||
| 219 | #else | 166 | #else |
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 450a332f1009..077192759afc 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
| @@ -91,6 +91,10 @@ extern int omap4430_phy_exit(struct device *dev); | |||
| 91 | 91 | ||
| 92 | #endif | 92 | #endif |
| 93 | 93 | ||
| 94 | extern void am35x_musb_reset(void); | ||
| 95 | extern void am35x_musb_phy_power(u8 on); | ||
| 96 | extern void am35x_musb_clear_irq(void); | ||
| 97 | extern void am35x_musb_set_mode(u8 musb_mode); | ||
| 94 | 98 | ||
| 95 | /* | 99 | /* |
| 96 | * FIXME correct answer depends on hmc_mode, | 100 | * FIXME correct answer depends on hmc_mode, |
