diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-13 18:02:15 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-02-04 09:32:23 -0500 |
commit | 03e0092c85e34b6f84bb3b852579b78a17496be2 (patch) | |
tree | caf8b1fc6e1f1a21ea2009437c8f4657d90ef6a0 /arch | |
parent | 81f33c65e6c09597e748288010476861ac5bd166 (diff) |
PCMCIA: sa11x0: assabet: convert to use new irq/gpio management
Convert Assabet socket driver to use the new irq/gpio management.
This is slightly more involved because we have to touch the private
platform header file to modify the GPIO bitmasks to be GPIO numbers.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/assabet.h | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h index 28c2cf50c259..307391488c22 100644 --- a/arch/arm/mach-sa1100/include/mach/assabet.h +++ b/arch/arm/mach-sa1100/include/mach/assabet.h | |||
@@ -85,21 +85,18 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); | |||
85 | #define ASSABET_BSR_RAD_RI (1 << 31) | 85 | #define ASSABET_BSR_RAD_RI (1 << 31) |
86 | 86 | ||
87 | 87 | ||
88 | /* GPIOs for which the generic definition doesn't say much */ | 88 | /* GPIOs (bitmasks) for which the generic definition doesn't say much */ |
89 | #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ | 89 | #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ |
90 | #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ | 90 | #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ |
91 | #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ | 91 | #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ |
92 | #define ASSABET_GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */ | ||
93 | #define ASSABET_GPIO_CF_CD GPIO_GPIO (22) /* CF CD */ | ||
94 | #define ASSABET_GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */ | ||
95 | #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ | 92 | #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ |
96 | #define ASSABET_GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */ | ||
97 | #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ | 93 | #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ |
98 | #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ | 94 | #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ |
99 | 95 | ||
100 | #define ASSABET_IRQ_GPIO_CF_IRQ IRQ_GPIO21 | 96 | /* These are gpiolib GPIO numbers, not bitmasks */ |
101 | #define ASSABET_IRQ_GPIO_CF_CD IRQ_GPIO22 | 97 | #define ASSABET_GPIO_CF_IRQ 21 /* CF IRQ */ |
102 | #define ASSABET_IRQ_GPIO_CF_BVD2 IRQ_GPIO24 | 98 | #define ASSABET_GPIO_CF_CD 22 /* CF CD */ |
103 | #define ASSABET_IRQ_GPIO_CF_BVD1 IRQ_GPIO25 | 99 | #define ASSABET_GPIO_CF_BVD2 24 /* CF BVD / IOSPKR */ |
100 | #define ASSABET_GPIO_CF_BVD1 25 /* CF BVD / IOSTSCHG */ | ||
104 | 101 | ||
105 | #endif | 102 | #endif |