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authorKevin Hilman <khilman@linaro.org>2013-10-09 15:59:23 -0400
committerKevin Hilman <khilman@linaro.org>2013-10-09 16:00:37 -0400
commit0397bb85b53b73796e81aaa3f4114403a2b1236d (patch)
tree950f2df77decf6f2a7196328669f284bc680b764 /arch
parent3d729d33ee89a3e63bee14bdd516af0662490fab (diff)
parent96ae0b548672adc12431312718835e77472f5bf0 (diff)
Merge tag 'drivers-3.13' of git://git.infradead.org/linux-mvebu into next/drivers
From Jason Cooper: mvebu drivers changes for v3.13 - irqchip - add MSI support for armada-370/XP - pci - add MSI support - add support for Marvell Dove SoCs - mvebu (soc changes depending on the pci and irq changes) - probe mbus windows via DT - probe pcie and clock via DT - docs for mvebu - update gated clock documentation * tag 'drivers-3.13' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix gated clock documentation ARM: dove: remove legacy pcie and clock init ARM: dove: switch to DT probed mbus address windows PCI: mvebu: add support for Marvell Dove SoCs PCI: mvebu: add support for reset on GPIO PCI: mvebu: remove subsys_initcall PCI: mvebu: increment nports only for registered ports PCI: mvebu: move clock enable before register access PCI: mvebu: add support for MSI irqchip: armada-370-xp: implement MSI support irqchip: armada-370-xp: properly request resources Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-dove/board-dt.c39
1 files changed, 1 insertions, 38 deletions
diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c
index 49f72a848423..9a116d796323 100644
--- a/arch/arm/mach-dove/board-dt.c
+++ b/arch/arm/mach-dove/board-dt.c
@@ -23,41 +23,12 @@
23#include <plat/irq.h> 23#include <plat/irq.h>
24#include "common.h" 24#include "common.h"
25 25
26/*
27 * There are still devices that doesn't even know about DT,
28 * get clock gates here and add a clock lookup.
29 */
30static void __init dove_legacy_clk_init(void)
31{
32 struct device_node *np = of_find_compatible_node(NULL, NULL,
33 "marvell,dove-gating-clock");
34 struct of_phandle_args clkspec;
35
36 clkspec.np = np;
37 clkspec.args_count = 1;
38
39 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
40 orion_clkdev_add("0", "pcie",
41 of_clk_get_from_provider(&clkspec));
42
43 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
44 orion_clkdev_add("1", "pcie",
45 of_clk_get_from_provider(&clkspec));
46}
47
48static void __init dove_dt_time_init(void) 26static void __init dove_dt_time_init(void)
49{ 27{
50 of_clk_init(NULL); 28 of_clk_init(NULL);
51 clocksource_of_init(); 29 clocksource_of_init();
52} 30}
53 31
54static void __init dove_dt_init_early(void)
55{
56 mvebu_mbus_init("marvell,dove-mbus",
57 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
58 DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);
59}
60
61static void __init dove_dt_init(void) 32static void __init dove_dt_init(void)
62{ 33{
63 pr_info("Dove 88AP510 SoC\n"); 34 pr_info("Dove 88AP510 SoC\n");
@@ -65,14 +36,7 @@ static void __init dove_dt_init(void)
65#ifdef CONFIG_CACHE_TAUROS2 36#ifdef CONFIG_CACHE_TAUROS2
66 tauros2_init(0); 37 tauros2_init(0);
67#endif 38#endif
68 dove_setup_cpu_wins(); 39 BUG_ON(mvebu_mbus_dt_init());
69
70 /* Setup clocks for legacy devices */
71 dove_legacy_clk_init();
72
73 /* Internal devices not ported to DT yet */
74 dove_pcie_init(1, 1);
75
76 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 40 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
77} 41}
78 42
@@ -83,7 +47,6 @@ static const char * const dove_dt_board_compat[] = {
83 47
84DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") 48DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
85 .map_io = dove_map_io, 49 .map_io = dove_map_io,
86 .init_early = dove_dt_init_early,
87 .init_time = dove_dt_time_init, 50 .init_time = dove_dt_time_init,
88 .init_machine = dove_dt_init, 51 .init_machine = dove_dt_init,
89 .restart = dove_restart, 52 .restart = dove_restart,