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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-11-25 17:25:25 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-11-25 17:25:25 -0500
commit3991782ea3e41412f8a665cd6ce66943d76aff8a (patch)
treecb4287612e4a23a2f663a9be910ff9cb8365563b /arch
parent2a859ab07b6ab66f4134c4fffc341398bd3d328c (diff)
parent1723d90915d4689fa2e8cd4151d45ea38c96cb99 (diff)
Merge remote-tracking branch 'kumar/next' into next
Freescale updates from Kumar
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi85
-rw-r--r--arch/powerpc/include/asm/fsl_guts.h4
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c2
-rw-r--r--arch/powerpc/platforms/85xx/smp.c49
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c2
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c37
8 files changed, 169 insertions, 17 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 64b6abea8464..5d7205b7bb05 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -354,4 +354,5 @@
354/include/ "qoriq-sata2-0.dtsi" 354/include/ "qoriq-sata2-0.dtsi"
355/include/ "qoriq-sata2-1.dtsi" 355/include/ "qoriq-sata2-1.dtsi"
356/include/ "qoriq-sec4.2-0.dtsi" 356/include/ "qoriq-sec4.2-0.dtsi"
357/include/ "qoriq-raid1.0-0.dtsi"
357}; 358};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 0a198b0a77e5..8df47fc45ab5 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -73,6 +73,12 @@
73 rtic_c = &rtic_c; 73 rtic_c = &rtic_c;
74 rtic_d = &rtic_d; 74 rtic_d = &rtic_d;
75 sec_mon = &sec_mon; 75 sec_mon = &sec_mon;
76
77 raideng = &raideng;
78 raideng_jr0 = &raideng_jr0;
79 raideng_jr1 = &raideng_jr1;
80 raideng_jr2 = &raideng_jr2;
81 raideng_jr3 = &raideng_jr3;
76 }; 82 };
77 83
78 cpus { 84 cpus {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi
new file mode 100644
index 000000000000..8d2e8aa6cf8a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi
@@ -0,0 +1,85 @@
1/*
2 * QorIQ RAID 1.0 device tree stub [ controller @ offset 0x320000 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35raideng: raideng@320000 {
36 compatible = "fsl,raideng-v1.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x320000 0x10000>;
40 ranges = <0 0x320000 0x10000>;
41
42 raideng_jq0@1000 {
43 compatible = "fsl,raideng-v1.0-job-queue";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 reg = <0x1000 0x1000>;
47 ranges = <0x0 0x1000 0x1000>;
48
49 raideng_jr0: jr@0 {
50 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
51 reg = <0x0 0x400>;
52 interrupts = <139 2 0 0>;
53 interrupt-parent = <&mpic>;
54 };
55
56 raideng_jr1: jr@400 {
57 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
58 reg = <0x400 0x400>;
59 interrupts = <140 2 0 0>;
60 interrupt-parent = <&mpic>;
61 };
62 };
63
64 raideng_jq1@2000 {
65 compatible = "fsl,raideng-v1.0-job-queue";
66 #address-cells = <1>;
67 #size-cells = <1>;
68 reg = <0x2000 0x1000>;
69 ranges = <0x0 0x2000 0x1000>;
70
71 raideng_jr2: jr@0 {
72 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
73 reg = <0x0 0x400>;
74 interrupts = <141 2 0 0>;
75 interrupt-parent = <&mpic>;
76 };
77
78 raideng_jr3: jr@400 {
79 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
80 reg = <0x400 0x400>;
81 interrupts = <142 2 0 0>;
82 interrupt-parent = <&mpic>;
83 };
84 };
85};
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index dd5ba2c22771..77ced0b3d81d 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -71,7 +71,9 @@ struct ccsr_guts {
71 u8 res0c4[0x224 - 0xc4]; 71 u8 res0c4[0x224 - 0xc4];
72 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ 72 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
73 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ 73 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
74 u8 res22c[0x800 - 0x22c]; 74 u8 res22c[0x604 - 0x22c];
75 __be32 pamubypenr; /* 0x.604 - PAMU bypass enable register */
76 u8 res608[0x800 - 0x608];
75 __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ 77 __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */
76 u8 res804[0x900 - 0x804]; 78 u8 res804[0x900 - 0x804];
77 __be32 ircr; /* 0x.0900 - Infrared Control Register */ 79 __be32 ircr; /* 0x.0900 - Infrared Control Register */
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 8fb12570b2f5..7328b8d74129 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -249,7 +249,7 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
249 goto exit; 249 goto exit;
250 } 250 }
251 251
252 iprop = of_get_property(law_node, "fsl,num-laws", 0); 252 iprop = of_get_property(law_node, "fsl,num-laws", NULL);
253 if (!iprop) { 253 if (!iprop) {
254 pr_err("p1022ds: LAW node is missing fsl,num-laws property\n"); 254 pr_err("p1022ds: LAW node is missing fsl,num-laws property\n");
255 goto exit; 255 goto exit;
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 6fcfa12e5c56..148c2f2d9780 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -128,6 +128,19 @@ static void __cpuinit smp_85xx_mach_cpu_die(void)
128} 128}
129#endif 129#endif
130 130
131static inline void flush_spin_table(void *spin_table)
132{
133 flush_dcache_range((ulong)spin_table,
134 (ulong)spin_table + sizeof(struct epapr_spin_table));
135}
136
137static inline u32 read_spin_table_addr_l(void *spin_table)
138{
139 flush_dcache_range((ulong)spin_table,
140 (ulong)spin_table + sizeof(struct epapr_spin_table));
141 return in_be32(&((struct epapr_spin_table *)spin_table)->addr_l);
142}
143
131static int __cpuinit smp_85xx_kick_cpu(int nr) 144static int __cpuinit smp_85xx_kick_cpu(int nr)
132{ 145{
133 unsigned long flags; 146 unsigned long flags;
@@ -161,8 +174,8 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
161 174
162 /* Map the spin table */ 175 /* Map the spin table */
163 if (ioremappable) 176 if (ioremappable)
164 spin_table = ioremap(*cpu_rel_addr, 177 spin_table = ioremap_prot(*cpu_rel_addr,
165 sizeof(struct epapr_spin_table)); 178 sizeof(struct epapr_spin_table), _PAGE_COHERENT);
166 else 179 else
167 spin_table = phys_to_virt(*cpu_rel_addr); 180 spin_table = phys_to_virt(*cpu_rel_addr);
168 181
@@ -173,7 +186,16 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
173 generic_set_cpu_up(nr); 186 generic_set_cpu_up(nr);
174 187
175 if (system_state == SYSTEM_RUNNING) { 188 if (system_state == SYSTEM_RUNNING) {
189 /*
190 * To keep it compatible with old boot program which uses
191 * cache-inhibit spin table, we need to flush the cache
192 * before accessing spin table to invalidate any staled data.
193 * We also need to flush the cache after writing to spin
194 * table to push data out.
195 */
196 flush_spin_table(spin_table);
176 out_be32(&spin_table->addr_l, 0); 197 out_be32(&spin_table->addr_l, 0);
198 flush_spin_table(spin_table);
177 199
178 /* 200 /*
179 * We don't set the BPTR register here since it already points 201 * We don't set the BPTR register here since it already points
@@ -181,9 +203,14 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
181 */ 203 */
182 mpic_reset_core(hw_cpu); 204 mpic_reset_core(hw_cpu);
183 205
184 /* wait until core is ready... */ 206 /*
185 if (!spin_event_timeout(in_be32(&spin_table->addr_l) == 1, 207 * wait until core is ready...
186 10000, 100)) { 208 * We need to invalidate the stale data, in case the boot
209 * loader uses a cache-inhibited spin table.
210 */
211 if (!spin_event_timeout(
212 read_spin_table_addr_l(spin_table) == 1,
213 10000, 100)) {
187 pr_err("%s: timeout waiting for core %d to reset\n", 214 pr_err("%s: timeout waiting for core %d to reset\n",
188 __func__, hw_cpu); 215 __func__, hw_cpu);
189 ret = -ENOENT; 216 ret = -ENOENT;
@@ -194,12 +221,10 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
194 __secondary_hold_acknowledge = -1; 221 __secondary_hold_acknowledge = -1;
195 } 222 }
196#endif 223#endif
224 flush_spin_table(spin_table);
197 out_be32(&spin_table->pir, hw_cpu); 225 out_be32(&spin_table->pir, hw_cpu);
198 out_be32(&spin_table->addr_l, __pa(__early_start)); 226 out_be32(&spin_table->addr_l, __pa(__early_start));
199 227 flush_spin_table(spin_table);
200 if (!ioremappable)
201 flush_dcache_range((ulong)spin_table,
202 (ulong)spin_table + sizeof(struct epapr_spin_table));
203 228
204 /* Wait a bit for the CPU to ack. */ 229 /* Wait a bit for the CPU to ack. */
205 if (!spin_event_timeout(__secondary_hold_acknowledge == hw_cpu, 230 if (!spin_event_timeout(__secondary_hold_acknowledge == hw_cpu,
@@ -213,13 +238,11 @@ out:
213#else 238#else
214 smp_generic_kick_cpu(nr); 239 smp_generic_kick_cpu(nr);
215 240
241 flush_spin_table(spin_table);
216 out_be32(&spin_table->pir, hw_cpu); 242 out_be32(&spin_table->pir, hw_cpu);
217 out_be64((u64 *)(&spin_table->addr_h), 243 out_be64((u64 *)(&spin_table->addr_h),
218 __pa((u64)*((unsigned long long *)generic_secondary_smp_init))); 244 __pa((u64)*((unsigned long long *)generic_secondary_smp_init)));
219 245 flush_spin_table(spin_table);
220 if (!ioremappable)
221 flush_dcache_range((ulong)spin_table,
222 (ulong)spin_table + sizeof(struct epapr_spin_table));
223#endif 246#endif
224 247
225 local_irq_restore(flags); 248 local_irq_restore(flags);
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index a817398a56da..04d9d317f741 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -353,5 +353,7 @@ define_machine(mpc86xx_hpcd) {
353 .time_init = mpc86xx_time_init, 353 .time_init = mpc86xx_time_init,
354 .calibrate_decr = generic_calibrate_decr, 354 .calibrate_decr = generic_calibrate_decr,
355 .progress = udbg_progress, 355 .progress = udbg_progress,
356#ifdef CONFIG_PCI
356 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 357 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
358#endif
357}; 359};
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index ffb93ae9379b..b96885b4e996 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -89,7 +89,7 @@ static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
89 return 0; 89 return 0;
90} 90}
91 91
92static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, 92static int setup_one_atmu(struct ccsr_pci __iomem *pci,
93 unsigned int index, const struct resource *res, 93 unsigned int index, const struct resource *res,
94 resource_size_t offset) 94 resource_size_t offset)
95{ 95{
@@ -126,7 +126,7 @@ static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
126} 126}
127 127
128/* atmu setup for fsl pci/pcie controller */ 128/* atmu setup for fsl pci/pcie controller */
129static void __init setup_pci_atmu(struct pci_controller *hose, 129static void setup_pci_atmu(struct pci_controller *hose,
130 struct resource *rsrc) 130 struct resource *rsrc)
131{ 131{
132 struct ccsr_pci __iomem *pci; 132 struct ccsr_pci __iomem *pci;
@@ -902,9 +902,42 @@ static int __devinit fsl_pci_probe(struct platform_device *pdev)
902 return 0; 902 return 0;
903} 903}
904 904
905#ifdef CONFIG_PM
906static int fsl_pci_resume(struct device *dev)
907{
908 struct pci_controller *hose;
909 struct resource pci_rsrc;
910
911 hose = pci_find_hose_for_OF_device(dev->of_node);
912 if (!hose)
913 return -ENODEV;
914
915 if (of_address_to_resource(dev->of_node, 0, &pci_rsrc)) {
916 dev_err(dev, "Get pci register base failed.");
917 return -ENODEV;
918 }
919
920 setup_pci_atmu(hose, &pci_rsrc);
921
922 return 0;
923}
924
925static const struct dev_pm_ops pci_pm_ops = {
926 .resume = fsl_pci_resume,
927};
928
929#define PCI_PM_OPS (&pci_pm_ops)
930
931#else
932
933#define PCI_PM_OPS NULL
934
935#endif
936
905static struct platform_driver fsl_pci_driver = { 937static struct platform_driver fsl_pci_driver = {
906 .driver = { 938 .driver = {
907 .name = "fsl-pci", 939 .name = "fsl-pci",
940 .pm = PCI_PM_OPS,
908 .of_match_table = pci_ids, 941 .of_match_table = pci_ids,
909 }, 942 },
910 .probe = fsl_pci_probe, 943 .probe = fsl_pci_probe,