diff options
| author | Chris Zankel <chris@zankel.net> | 2008-02-12 13:11:45 -0500 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2008-02-13 20:08:18 -0500 |
| commit | 0b2c3afdaaaa3e577300b2235df43eb8af00020b (patch) | |
| tree | a19e12791a9d109f61f1edce731f50589302d04d /arch/xtensa | |
| parent | 70e137eb48f62e59dfa5e06d0d01f123e9464f9a (diff) | |
[XTENSA] Fix icache flush for cache aliasing
Set the execution bit in the temporary TLB when we flush the
instruction cache.
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa')
| -rw-r--r-- | arch/xtensa/mm/misc.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S index e1f880368e32..c885664211d1 100644 --- a/arch/xtensa/mm/misc.S +++ b/arch/xtensa/mm/misc.S | |||
| @@ -295,7 +295,7 @@ ENTRY(__tlbtemp_mapping_itlb) | |||
| 295 | ENTRY(__invalidate_icache_page_alias) | 295 | ENTRY(__invalidate_icache_page_alias) |
| 296 | entry sp, 16 | 296 | entry sp, 16 |
| 297 | 297 | ||
| 298 | addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE) | 298 | addi a6, a3, (PAGE_KERNEL_EXEC | _PAGE_HW_WRITE) |
| 299 | mov a4, a2 | 299 | mov a4, a2 |
| 300 | witlb a6, a2 | 300 | witlb a6, a2 |
| 301 | isync | 301 | isync |