xtensa: add support for TLS

The Xtensa architecture provides a global register called THREADPTR
for the purpose of Thread Local Storage (TLS) support. This allows us
to use a fairly simple implementation, keeping the thread pointer in
the regset and simply saving and restoring it upon entering/exiting
the from user space.

Signed-off-by: Chris Zankel <chris@zankel.net>

1 files changed, 11 insertions, 1 deletions

diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 70d5a9e33573..63845f950792 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -130,6 +130,11 @@ _user_exception:
         s32i    a3, a1, PT_SAR
         s32i    a2, a1, PT_ICOUNTLEVEL
 
+#if XCHAL_HAVE_THREADPTR
+        rur     a2, threadptr
+        s32i    a2, a1, PT_THREADPTR
+#endif
+
         /* Rotate ws so that the current windowbase is at bit0. */
         /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
 
@@ -510,6 +515,11 @@ user_exception_exit:
          *       (if we have restored WSBITS-1 frames).
          */
 
+#if XCHAL_HAVE_THREADPTR
+        l32i    a3, a1, PT_THREADPTR
+        wur     a3, threadptr
+#endif
+
 2:      j       common_exception_exit
 
         /* This is the kernel exception exit.
@@ -1955,7 +1965,7 @@ ENTRY(_switch_to)
         s32i    a6, a3, EXC_TABLE_FIXUP
         s32i    a7, a3, EXC_TABLE_KSTK
 
-        /* restore context of the task that 'next' addresses */
+        /* restore context of the task 'next' */
 
         l32i    a0, a13, THREAD_RA      # restore return address
         l32i    a1, a13, THREAD_SP      # restore stack pointer