diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-26 22:53:12 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-26 22:53:12 -0500 |
commit | 9626357371b519f2b955fef399647181034a77fe (patch) | |
tree | 232abd741e773c7d3afb4ba6b02fcba03b82214d /arch/xtensa/include | |
parent | 2b37e9a28afbd11f899738e912fb4a617a74b462 (diff) | |
parent | 9cf81c759b7db1db593b2ca60b74ec350d5f9205 (diff) |
Merge tag 'xtensa-next-20130225' of git://github.com/czankel/xtensa-linux
Pull xtensa update from Chris Zankel:
"Added features:
- add support for thread local storage (TLS)
- add accept4 and finit_module syscalls
- support medium-priority interrupts
- add support for dc232c processor variant
- support file-base simulated disk for ISS simulator
Bug fixes:
- fix return values returned by the str[n]cmp functions
- avoid mmap cache aliasing
- fix handling of 'windowed registers' in ptrace"
* tag 'xtensa-next-20130225' of git://github.com/czankel/xtensa-linux:
xtensa: add accept4 syscall
xtensa: add support for TLS
xtensa: add missing include asm/uaccess.h to checksum.h
xtensa: do not enable GENERIC_GPIO by default
xtensa: complete ptrace handling of register windows
xtensa: add support for oprofile
xtensa: move spill_registers to traps.h
xtensa: ISS: add host file-based simulated disk
xtensa: fix str[n]cmp return value
xtensa: avoid mmap cache aliasing
xtensa: add finit_module syscall
xtensa: pull signal definitions from signal-defs.h
xtensa: fix ipc_parse_version selection
xtensa: dispatch medium-priority interrupts
xtensa: Add config files for Diamond 233L - Rev C processor variant
xtensa: use new common dtc rule
xtensa: rename prom_update_property to of_update_property
Diffstat (limited to 'arch/xtensa/include')
-rw-r--r-- | arch/xtensa/include/asm/atomic.h | 6 | ||||
-rw-r--r-- | arch/xtensa/include/asm/checksum.h | 1 | ||||
-rw-r--r-- | arch/xtensa/include/asm/elf.h | 3 | ||||
-rw-r--r-- | arch/xtensa/include/asm/pgtable.h | 4 | ||||
-rw-r--r-- | arch/xtensa/include/asm/processor.h | 4 | ||||
-rw-r--r-- | arch/xtensa/include/asm/ptrace.h | 3 | ||||
-rw-r--r-- | arch/xtensa/include/asm/regs.h | 1 | ||||
-rw-r--r-- | arch/xtensa/include/asm/string.h | 4 | ||||
-rw-r--r-- | arch/xtensa/include/asm/timex.h | 8 | ||||
-rw-r--r-- | arch/xtensa/include/asm/traps.h | 24 | ||||
-rw-r--r-- | arch/xtensa/include/uapi/asm/signal.h | 11 | ||||
-rw-r--r-- | arch/xtensa/include/uapi/asm/unistd.h | 7 |
12 files changed, 52 insertions, 24 deletions
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h index c3f289174c10..e7fb447bce8e 100644 --- a/arch/xtensa/include/asm/atomic.h +++ b/arch/xtensa/include/asm/atomic.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * License. See the file "COPYING" in the main directory of this archive | 7 | * License. See the file "COPYING" in the main directory of this archive |
8 | * for more details. | 8 | * for more details. |
9 | * | 9 | * |
10 | * Copyright (C) 2001 - 2005 Tensilica Inc. | 10 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef _XTENSA_ATOMIC_H | 13 | #ifndef _XTENSA_ATOMIC_H |
@@ -24,11 +24,11 @@ | |||
24 | 24 | ||
25 | /* | 25 | /* |
26 | * This Xtensa implementation assumes that the right mechanism | 26 | * This Xtensa implementation assumes that the right mechanism |
27 | * for exclusion is for locking interrupts to level 1. | 27 | * for exclusion is for locking interrupts to level EXCM_LEVEL. |
28 | * | 28 | * |
29 | * Locking interrupts looks like this: | 29 | * Locking interrupts looks like this: |
30 | * | 30 | * |
31 | * rsil a15, 1 | 31 | * rsil a15, LOCKLEVEL |
32 | * <code> | 32 | * <code> |
33 | * wsr a15, PS | 33 | * wsr a15, PS |
34 | * rsync | 34 | * rsync |
diff --git a/arch/xtensa/include/asm/checksum.h b/arch/xtensa/include/asm/checksum.h index aed7ad68ca46..0593de689b56 100644 --- a/arch/xtensa/include/asm/checksum.h +++ b/arch/xtensa/include/asm/checksum.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define _XTENSA_CHECKSUM_H | 12 | #define _XTENSA_CHECKSUM_H |
13 | 13 | ||
14 | #include <linux/in6.h> | 14 | #include <linux/in6.h> |
15 | #include <asm/uaccess.h> | ||
15 | #include <variant/core.h> | 16 | #include <variant/core.h> |
16 | 17 | ||
17 | /* | 18 | /* |
diff --git a/arch/xtensa/include/asm/elf.h b/arch/xtensa/include/asm/elf.h index 264d5fa450d8..eacb25a41718 100644 --- a/arch/xtensa/include/asm/elf.h +++ b/arch/xtensa/include/asm/elf.h | |||
@@ -84,7 +84,8 @@ typedef struct { | |||
84 | elf_greg_t sar; | 84 | elf_greg_t sar; |
85 | elf_greg_t windowstart; | 85 | elf_greg_t windowstart; |
86 | elf_greg_t windowbase; | 86 | elf_greg_t windowbase; |
87 | elf_greg_t reserved[8+48]; | 87 | elf_greg_t threadptr; |
88 | elf_greg_t reserved[7+48]; | ||
88 | elf_greg_t a[64]; | 89 | elf_greg_t a[64]; |
89 | } xtensa_gregset_t; | 90 | } xtensa_gregset_t; |
90 | 91 | ||
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index c90ea5bfa1b4..d7546c94da52 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h | |||
@@ -410,6 +410,10 @@ typedef pte_t *pte_addr_t; | |||
410 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | 410 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT |
411 | #define __HAVE_ARCH_PTEP_MKDIRTY | 411 | #define __HAVE_ARCH_PTEP_MKDIRTY |
412 | #define __HAVE_ARCH_PTE_SAME | 412 | #define __HAVE_ARCH_PTE_SAME |
413 | /* We provide our own get_unmapped_area to cope with | ||
414 | * SHM area cache aliasing for userland. | ||
415 | */ | ||
416 | #define HAVE_ARCH_UNMAPPED_AREA | ||
413 | 417 | ||
414 | #include <asm-generic/pgtable.h> | 418 | #include <asm-generic/pgtable.h> |
415 | 419 | ||
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index e5fb6b0abdf4..7e409a5b0ec5 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | 8 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef _XTENSA_PROCESSOR_H | 11 | #ifndef _XTENSA_PROCESSOR_H |
@@ -68,7 +68,7 @@ | |||
68 | /* LOCKLEVEL defines the interrupt level that masks all | 68 | /* LOCKLEVEL defines the interrupt level that masks all |
69 | * general-purpose interrupts. | 69 | * general-purpose interrupts. |
70 | */ | 70 | */ |
71 | #define LOCKLEVEL 1 | 71 | #define LOCKLEVEL XCHAL_EXCM_LEVEL |
72 | 72 | ||
73 | /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE | 73 | /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE |
74 | * registers | 74 | * registers |
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h index 682b1deac1f2..81f31bc9dde0 100644 --- a/arch/xtensa/include/asm/ptrace.h +++ b/arch/xtensa/include/asm/ptrace.h | |||
@@ -38,6 +38,7 @@ struct pt_regs { | |||
38 | unsigned long syscall; /* 56 */ | 38 | unsigned long syscall; /* 56 */ |
39 | unsigned long icountlevel; /* 60 */ | 39 | unsigned long icountlevel; /* 60 */ |
40 | unsigned long scompare1; /* 64 */ | 40 | unsigned long scompare1; /* 64 */ |
41 | unsigned long threadptr; /* 68 */ | ||
41 | 42 | ||
42 | /* Additional configurable registers that are used by the compiler. */ | 43 | /* Additional configurable registers that are used by the compiler. */ |
43 | xtregs_opt_t xtregs_opt; | 44 | xtregs_opt_t xtregs_opt; |
@@ -48,7 +49,7 @@ struct pt_regs { | |||
48 | /* current register frame. | 49 | /* current register frame. |
49 | * Note: The ESF for kernel exceptions ends after 16 registers! | 50 | * Note: The ESF for kernel exceptions ends after 16 registers! |
50 | */ | 51 | */ |
51 | unsigned long areg[16]; /* 128 (64) */ | 52 | unsigned long areg[16]; |
52 | }; | 53 | }; |
53 | 54 | ||
54 | #include <variant/core.h> | 55 | #include <variant/core.h> |
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index 76096a4e5b8d..b24de6717020 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h | |||
@@ -88,6 +88,7 @@ | |||
88 | #define PS_UM_BIT 5 | 88 | #define PS_UM_BIT 5 |
89 | #define PS_EXCM_BIT 4 | 89 | #define PS_EXCM_BIT 4 |
90 | #define PS_INTLEVEL_SHIFT 0 | 90 | #define PS_INTLEVEL_SHIFT 0 |
91 | #define PS_INTLEVEL_WIDTH 4 | ||
91 | #define PS_INTLEVEL_MASK 0x0000000F | 92 | #define PS_INTLEVEL_MASK 0x0000000F |
92 | 93 | ||
93 | /* DBREAKCn register fields. */ | 94 | /* DBREAKCn register fields. */ |
diff --git a/arch/xtensa/include/asm/string.h b/arch/xtensa/include/asm/string.h index 405a8c49ff2c..8d5d9dfadb09 100644 --- a/arch/xtensa/include/asm/string.h +++ b/arch/xtensa/include/asm/string.h | |||
@@ -74,7 +74,7 @@ static inline int strcmp(const char *__cs, const char *__ct) | |||
74 | "beqz %2, 2f\n\t" | 74 | "beqz %2, 2f\n\t" |
75 | "beq %2, %3, 1b\n" | 75 | "beq %2, %3, 1b\n" |
76 | "2:\n\t" | 76 | "2:\n\t" |
77 | "sub %2, %3, %2" | 77 | "sub %2, %2, %3" |
78 | : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy) | 78 | : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy) |
79 | : "0" (__cs), "1" (__ct)); | 79 | : "0" (__cs), "1" (__ct)); |
80 | 80 | ||
@@ -99,7 +99,7 @@ static inline int strncmp(const char *__cs, const char *__ct, size_t __n) | |||
99 | "beqz %3, 2f\n\t" | 99 | "beqz %3, 2f\n\t" |
100 | "beq %2, %3, 1b\n" | 100 | "beq %2, %3, 1b\n" |
101 | "2:\n\t" | 101 | "2:\n\t" |
102 | "sub %2, %3, %2" | 102 | "sub %2, %2, %3" |
103 | : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy) | 103 | : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy) |
104 | : "0" (__cs), "1" (__ct), "r" (__cs+__n)); | 104 | : "0" (__cs), "1" (__ct), "r" (__cs+__n)); |
105 | 105 | ||
diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h index 175b3d5e1b01..9e85ce8bd8dd 100644 --- a/arch/xtensa/include/asm/timex.h +++ b/arch/xtensa/include/asm/timex.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | 8 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef _XTENSA_TIMEX_H | 11 | #ifndef _XTENSA_TIMEX_H |
@@ -19,13 +19,13 @@ | |||
19 | #define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL | 19 | #define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL |
20 | #define INTLEVEL(x) _INTLEVEL(x) | 20 | #define INTLEVEL(x) _INTLEVEL(x) |
21 | 21 | ||
22 | #if INTLEVEL(XCHAL_TIMER0_INTERRUPT) == 1 | 22 | #if INTLEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL |
23 | # define LINUX_TIMER 0 | 23 | # define LINUX_TIMER 0 |
24 | # define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT | 24 | # define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT |
25 | #elif INTLEVEL(XCHAL_TIMER1_INTERRUPT) == 1 | 25 | #elif INTLEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL |
26 | # define LINUX_TIMER 1 | 26 | # define LINUX_TIMER 1 |
27 | # define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT | 27 | # define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT |
28 | #elif INTLEVEL(XCHAL_TIMER2_INTERRUPT) == 1 | 28 | #elif INTLEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL |
29 | # define LINUX_TIMER 2 | 29 | # define LINUX_TIMER 2 |
30 | # define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT | 30 | # define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT |
31 | #else | 31 | #else |
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h index 54f70440185e..b5464ef3cf66 100644 --- a/arch/xtensa/include/asm/traps.h +++ b/arch/xtensa/include/asm/traps.h | |||
@@ -20,4 +20,28 @@ | |||
20 | extern void * __init trap_set_handler(int cause, void *handler); | 20 | extern void * __init trap_set_handler(int cause, void *handler); |
21 | extern void do_unhandled(struct pt_regs *regs, unsigned long exccause); | 21 | extern void do_unhandled(struct pt_regs *regs, unsigned long exccause); |
22 | 22 | ||
23 | static inline void spill_registers(void) | ||
24 | { | ||
25 | unsigned int a0, ps; | ||
26 | |||
27 | __asm__ __volatile__ ( | ||
28 | "movi a14, " __stringify(PS_EXCM_BIT | LOCKLEVEL) "\n\t" | ||
29 | "mov a12, a0\n\t" | ||
30 | "rsr a13, sar\n\t" | ||
31 | "xsr a14, ps\n\t" | ||
32 | "movi a0, _spill_registers\n\t" | ||
33 | "rsync\n\t" | ||
34 | "callx0 a0\n\t" | ||
35 | "mov a0, a12\n\t" | ||
36 | "wsr a13, sar\n\t" | ||
37 | "wsr a14, ps\n\t" | ||
38 | : : "a" (&a0), "a" (&ps) | ||
39 | #if defined(CONFIG_FRAME_POINTER) | ||
40 | : "a2", "a3", "a4", "a11", "a12", "a13", "a14", "a15", | ||
41 | #else | ||
42 | : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", | ||
43 | #endif | ||
44 | "memory"); | ||
45 | } | ||
46 | |||
23 | #endif /* _XTENSA_TRAPS_H */ | 47 | #endif /* _XTENSA_TRAPS_H */ |
diff --git a/arch/xtensa/include/uapi/asm/signal.h b/arch/xtensa/include/uapi/asm/signal.h index dacf716dd3e0..586756ee267a 100644 --- a/arch/xtensa/include/uapi/asm/signal.h +++ b/arch/xtensa/include/uapi/asm/signal.h | |||
@@ -102,16 +102,7 @@ typedef struct { | |||
102 | 102 | ||
103 | #ifndef __ASSEMBLY__ | 103 | #ifndef __ASSEMBLY__ |
104 | 104 | ||
105 | #define SIG_BLOCK 0 /* for blocking signals */ | 105 | #include <asm-generic/signal-defs.h> |
106 | #define SIG_UNBLOCK 1 /* for unblocking signals */ | ||
107 | #define SIG_SETMASK 2 /* for setting the signal mask */ | ||
108 | |||
109 | /* Type of a signal handler. */ | ||
110 | typedef void (*__sighandler_t)(int); | ||
111 | |||
112 | #define SIG_DFL ((__sighandler_t)0) /* default signal handling */ | ||
113 | #define SIG_IGN ((__sighandler_t)1) /* ignore signal */ | ||
114 | #define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ | ||
115 | 106 | ||
116 | #ifndef __KERNEL__ | 107 | #ifndef __KERNEL__ |
117 | 108 | ||
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h index 19fac3f543a2..51940fec6990 100644 --- a/arch/xtensa/include/uapi/asm/unistd.h +++ b/arch/xtensa/include/uapi/asm/unistd.h | |||
@@ -728,8 +728,13 @@ __SYSCALL(330, sys_prlimit64, 4) | |||
728 | #define __NR_kcmp 331 | 728 | #define __NR_kcmp 331 |
729 | __SYSCALL(331, sys_kcmp, 5) | 729 | __SYSCALL(331, sys_kcmp, 5) |
730 | 730 | ||
731 | #define __NR_finit_module 332 | ||
732 | __SYSCALL(332, sys_finit_module, 3) | ||
731 | 733 | ||
732 | #define __NR_syscall_count 332 | 734 | #define __NR_accept4 333 |
735 | __SYSCALL(333, sys_accept4, 4) | ||
736 | |||
737 | #define __NR_syscall_count 334 | ||
733 | 738 | ||
734 | /* | 739 | /* |
735 | * sysxtensa syscall handler | 740 | * sysxtensa syscall handler |