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authorStephane Eranian <eranian@hpl.hp.com>2006-12-06 20:14:02 -0500
committerAndi Kleen <andi@basil.nowhere.org>2006-12-06 20:14:02 -0500
commitbb0d977ed42c79ed709c79dbab4ff2159941eb2a (patch)
treeef0af6c23743b49c263db36f389433c9a7155367 /arch/x86_64/kernel/trampoline.S
parent86efef50cfff9905c4e4ec64f3d3d3b299226674 (diff)
[PATCH] i386: add Intel Core related PMU MSRs
- add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/x86_64/kernel/trampoline.S')
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