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authorEric W. Biederman <ebiederm@xmission.com>2007-02-23 06:13:55 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-26 13:34:07 -0500
commit9f0a5ba5508143731dc63235de19659be20d26dc (patch)
treea642cd2987e119e4cda611230cf39d403e1e9706 /arch/x86_64/kernel/io_apic.c
parentfc5d56f987170cda1d344095c4df65a60a3e9820 (diff)
[PATCH] irq: Remove set_native_irq_info
This patch replaces all instances of "set_native_irq_info(irq, mask)" with "irq_desc[irq].affinity = mask". The latter form is clearer uses fewer abstractions, and makes access to this field uniform accross different architectures. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64/kernel/io_apic.c')
-rw-r--r--arch/x86_64/kernel/io_apic.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 357b354921c1..184721348f59 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -261,7 +261,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
261 261
262 spin_lock_irqsave(&ioapic_lock, flags); 262 spin_lock_irqsave(&ioapic_lock, flags);
263 __target_IO_APIC_irq(irq, dest, vector); 263 __target_IO_APIC_irq(irq, dest, vector);
264 set_native_irq_info(irq, mask); 264 irq_desc[irq].affinity = mask;
265 spin_unlock_irqrestore(&ioapic_lock, flags); 265 spin_unlock_irqrestore(&ioapic_lock, flags);
266} 266}
267#endif 267#endif
@@ -857,7 +857,7 @@ static void __init setup_IO_APIC_irq(int apic, int pin, int idx, int irq)
857 ioapic_write_entry(apic, pin, entry); 857 ioapic_write_entry(apic, pin, entry);
858 858
859 spin_lock_irqsave(&ioapic_lock, flags); 859 spin_lock_irqsave(&ioapic_lock, flags);
860 set_native_irq_info(irq, TARGET_CPUS); 860 irq_desc[irq].affinity = TARGET_CPUS;
861 spin_unlock_irqrestore(&ioapic_lock, flags); 861 spin_unlock_irqrestore(&ioapic_lock, flags);
862 862
863} 863}
@@ -1930,7 +1930,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
1930 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 1930 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
1931 1931
1932 write_msi_msg(irq, &msg); 1932 write_msi_msg(irq, &msg);
1933 set_native_irq_info(irq, mask); 1933 irq_desc[irq].affinity = mask;
1934} 1934}
1935#endif /* CONFIG_SMP */ 1935#endif /* CONFIG_SMP */
1936 1936
@@ -2018,7 +2018,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
2018 dest = cpu_mask_to_apicid(tmp); 2018 dest = cpu_mask_to_apicid(tmp);
2019 2019
2020 target_ht_irq(irq, dest, vector); 2020 target_ht_irq(irq, dest, vector);
2021 set_native_irq_info(irq, mask); 2021 irq_desc[irq].affinity = mask;
2022} 2022}
2023#endif 2023#endif
2024 2024
@@ -2143,7 +2143,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
2143 ioapic_write_entry(ioapic, pin, entry); 2143 ioapic_write_entry(ioapic, pin, entry);
2144 2144
2145 spin_lock_irqsave(&ioapic_lock, flags); 2145 spin_lock_irqsave(&ioapic_lock, flags);
2146 set_native_irq_info(irq, TARGET_CPUS); 2146 irq_desc[irq].affinity = TARGET_CPUS;
2147 spin_unlock_irqrestore(&ioapic_lock, flags); 2147 spin_unlock_irqrestore(&ioapic_lock, flags);
2148 2148
2149 return 0; 2149 return 0;