diff options
author | Joerg Roedel <joerg.roedel@amd.com> | 2008-02-11 14:28:27 -0500 |
---|---|---|
committer | Avi Kivity <avi@qumranet.com> | 2008-03-03 04:22:37 -0500 |
commit | c7ac679c160db864810920df61a6ed14275011aa (patch) | |
tree | ac343b837766f9cf7a5941f89fb796f904c808f7 /arch/x86 | |
parent | 674eea0fc4d1d693250b5d3ddad42ca931c87dfd (diff) |
KVM: emulate access to MSR_IA32_MCG_CTL
Injecting an GP when accessing this MSR lets Windows crash when running some
stress test tools in KVM. So this patch emulates access to this MSR.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Markus Rechberger <markus.rechberger@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kvm/x86.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index a7069ec2267c..338764fa5391 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
@@ -487,6 +487,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |||
487 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", | 487 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", |
488 | __FUNCTION__, data); | 488 | __FUNCTION__, data); |
489 | break; | 489 | break; |
490 | case MSR_IA32_MCG_CTL: | ||
491 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", | ||
492 | __FUNCTION__, data); | ||
493 | break; | ||
490 | case MSR_IA32_UCODE_REV: | 494 | case MSR_IA32_UCODE_REV: |
491 | case MSR_IA32_UCODE_WRITE: | 495 | case MSR_IA32_UCODE_WRITE: |
492 | case 0x200 ... 0x2ff: /* MTRRs */ | 496 | case 0x200 ... 0x2ff: /* MTRRs */ |
@@ -529,6 +533,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |||
529 | case MSR_IA32_MC0_CTL: | 533 | case MSR_IA32_MC0_CTL: |
530 | case MSR_IA32_MCG_STATUS: | 534 | case MSR_IA32_MCG_STATUS: |
531 | case MSR_IA32_MCG_CAP: | 535 | case MSR_IA32_MCG_CAP: |
536 | case MSR_IA32_MCG_CTL: | ||
532 | case MSR_IA32_MC0_MISC: | 537 | case MSR_IA32_MC0_MISC: |
533 | case MSR_IA32_MC0_MISC+4: | 538 | case MSR_IA32_MC0_MISC+4: |
534 | case MSR_IA32_MC0_MISC+8: | 539 | case MSR_IA32_MC0_MISC+8: |